mwl8k.c 99 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/slab.h>
  22. #include <net/mac80211.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/firmware.h>
  25. #include <linux/workqueue.h>
  26. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  27. #define MWL8K_NAME KBUILD_MODNAME
  28. #define MWL8K_VERSION "0.12"
  29. /* Register definitions */
  30. #define MWL8K_HIU_GEN_PTR 0x00000c10
  31. #define MWL8K_MODE_STA 0x0000005a
  32. #define MWL8K_MODE_AP 0x000000a5
  33. #define MWL8K_HIU_INT_CODE 0x00000c14
  34. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  35. #define MWL8K_FWAP_READY 0xf1f2f4a5
  36. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  37. #define MWL8K_HIU_SCRATCH 0x00000c40
  38. /* Host->device communications */
  39. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  40. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  41. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  42. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  43. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  44. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  45. #define MWL8K_H2A_INT_RESET (1 << 15)
  46. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  47. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  48. /* Device->host communications */
  49. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  50. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  51. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  52. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  53. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  54. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  55. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  56. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  57. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  58. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  59. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  60. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  61. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  62. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  63. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  64. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  65. MWL8K_A2H_INT_CHNL_SWITCHED | \
  66. MWL8K_A2H_INT_QUEUE_EMPTY | \
  67. MWL8K_A2H_INT_RADAR_DETECT | \
  68. MWL8K_A2H_INT_RADIO_ON | \
  69. MWL8K_A2H_INT_RADIO_OFF | \
  70. MWL8K_A2H_INT_MAC_EVENT | \
  71. MWL8K_A2H_INT_OPC_DONE | \
  72. MWL8K_A2H_INT_RX_READY | \
  73. MWL8K_A2H_INT_TX_DONE)
  74. #define MWL8K_RX_QUEUES 1
  75. #define MWL8K_TX_QUEUES 4
  76. struct rxd_ops {
  77. int rxd_size;
  78. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  79. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  80. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  81. __le16 *qos, s8 *noise);
  82. };
  83. struct mwl8k_device_info {
  84. char *part_name;
  85. char *helper_image;
  86. char *fw_image;
  87. struct rxd_ops *ap_rxd_ops;
  88. };
  89. struct mwl8k_rx_queue {
  90. int rxd_count;
  91. /* hw receives here */
  92. int head;
  93. /* refill descs here */
  94. int tail;
  95. void *rxd;
  96. dma_addr_t rxd_dma;
  97. struct {
  98. struct sk_buff *skb;
  99. DEFINE_DMA_UNMAP_ADDR(dma);
  100. } *buf;
  101. };
  102. struct mwl8k_tx_queue {
  103. /* hw transmits here */
  104. int head;
  105. /* sw appends here */
  106. int tail;
  107. unsigned int len;
  108. struct mwl8k_tx_desc *txd;
  109. dma_addr_t txd_dma;
  110. struct sk_buff **skb;
  111. };
  112. struct mwl8k_priv {
  113. struct ieee80211_hw *hw;
  114. struct pci_dev *pdev;
  115. struct mwl8k_device_info *device_info;
  116. void __iomem *sram;
  117. void __iomem *regs;
  118. /* firmware */
  119. struct firmware *fw_helper;
  120. struct firmware *fw_ucode;
  121. /* hardware/firmware parameters */
  122. bool ap_fw;
  123. struct rxd_ops *rxd_ops;
  124. struct ieee80211_supported_band band_24;
  125. struct ieee80211_channel channels_24[14];
  126. struct ieee80211_rate rates_24[14];
  127. struct ieee80211_supported_band band_50;
  128. struct ieee80211_channel channels_50[4];
  129. struct ieee80211_rate rates_50[9];
  130. u32 ap_macids_supported;
  131. u32 sta_macids_supported;
  132. /* firmware access */
  133. struct mutex fw_mutex;
  134. struct task_struct *fw_mutex_owner;
  135. int fw_mutex_depth;
  136. struct completion *hostcmd_wait;
  137. /* lock held over TX and TX reap */
  138. spinlock_t tx_lock;
  139. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  140. struct completion *tx_wait;
  141. /* List of interfaces. */
  142. u32 macids_used;
  143. struct list_head vif_list;
  144. /* power management status cookie from firmware */
  145. u32 *cookie;
  146. dma_addr_t cookie_dma;
  147. u16 num_mcaddrs;
  148. u8 hw_rev;
  149. u32 fw_rev;
  150. /*
  151. * Running count of TX packets in flight, to avoid
  152. * iterating over the transmit rings each time.
  153. */
  154. int pending_tx_pkts;
  155. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  156. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  157. bool radio_on;
  158. bool radio_short_preamble;
  159. bool sniffer_enabled;
  160. bool wmm_enabled;
  161. /* XXX need to convert this to handle multiple interfaces */
  162. bool capture_beacon;
  163. u8 capture_bssid[ETH_ALEN];
  164. struct sk_buff *beacon_skb;
  165. /*
  166. * This FJ worker has to be global as it is scheduled from the
  167. * RX handler. At this point we don't know which interface it
  168. * belongs to until the list of bssids waiting to complete join
  169. * is checked.
  170. */
  171. struct work_struct finalize_join_worker;
  172. /* Tasklet to perform TX reclaim. */
  173. struct tasklet_struct poll_tx_task;
  174. /* Tasklet to perform RX. */
  175. struct tasklet_struct poll_rx_task;
  176. /* Most recently reported noise in dBm */
  177. s8 noise;
  178. };
  179. /* Per interface specific private data */
  180. struct mwl8k_vif {
  181. struct list_head list;
  182. struct ieee80211_vif *vif;
  183. /* Firmware macid for this vif. */
  184. int macid;
  185. /* Non AMPDU sequence number assigned by driver. */
  186. u16 seqno;
  187. };
  188. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  189. struct mwl8k_sta {
  190. /* Index into station database. Returned by UPDATE_STADB. */
  191. u8 peer_id;
  192. };
  193. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  194. static const struct ieee80211_channel mwl8k_channels_24[] = {
  195. { .center_freq = 2412, .hw_value = 1, },
  196. { .center_freq = 2417, .hw_value = 2, },
  197. { .center_freq = 2422, .hw_value = 3, },
  198. { .center_freq = 2427, .hw_value = 4, },
  199. { .center_freq = 2432, .hw_value = 5, },
  200. { .center_freq = 2437, .hw_value = 6, },
  201. { .center_freq = 2442, .hw_value = 7, },
  202. { .center_freq = 2447, .hw_value = 8, },
  203. { .center_freq = 2452, .hw_value = 9, },
  204. { .center_freq = 2457, .hw_value = 10, },
  205. { .center_freq = 2462, .hw_value = 11, },
  206. { .center_freq = 2467, .hw_value = 12, },
  207. { .center_freq = 2472, .hw_value = 13, },
  208. { .center_freq = 2484, .hw_value = 14, },
  209. };
  210. static const struct ieee80211_rate mwl8k_rates_24[] = {
  211. { .bitrate = 10, .hw_value = 2, },
  212. { .bitrate = 20, .hw_value = 4, },
  213. { .bitrate = 55, .hw_value = 11, },
  214. { .bitrate = 110, .hw_value = 22, },
  215. { .bitrate = 220, .hw_value = 44, },
  216. { .bitrate = 60, .hw_value = 12, },
  217. { .bitrate = 90, .hw_value = 18, },
  218. { .bitrate = 120, .hw_value = 24, },
  219. { .bitrate = 180, .hw_value = 36, },
  220. { .bitrate = 240, .hw_value = 48, },
  221. { .bitrate = 360, .hw_value = 72, },
  222. { .bitrate = 480, .hw_value = 96, },
  223. { .bitrate = 540, .hw_value = 108, },
  224. { .bitrate = 720, .hw_value = 144, },
  225. };
  226. static const struct ieee80211_channel mwl8k_channels_50[] = {
  227. { .center_freq = 5180, .hw_value = 36, },
  228. { .center_freq = 5200, .hw_value = 40, },
  229. { .center_freq = 5220, .hw_value = 44, },
  230. { .center_freq = 5240, .hw_value = 48, },
  231. };
  232. static const struct ieee80211_rate mwl8k_rates_50[] = {
  233. { .bitrate = 60, .hw_value = 12, },
  234. { .bitrate = 90, .hw_value = 18, },
  235. { .bitrate = 120, .hw_value = 24, },
  236. { .bitrate = 180, .hw_value = 36, },
  237. { .bitrate = 240, .hw_value = 48, },
  238. { .bitrate = 360, .hw_value = 72, },
  239. { .bitrate = 480, .hw_value = 96, },
  240. { .bitrate = 540, .hw_value = 108, },
  241. { .bitrate = 720, .hw_value = 144, },
  242. };
  243. /* Set or get info from Firmware */
  244. #define MWL8K_CMD_SET 0x0001
  245. #define MWL8K_CMD_GET 0x0000
  246. /* Firmware command codes */
  247. #define MWL8K_CMD_CODE_DNLD 0x0001
  248. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  249. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  250. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  251. #define MWL8K_CMD_GET_STAT 0x0014
  252. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  253. #define MWL8K_CMD_RF_TX_POWER 0x001e
  254. #define MWL8K_CMD_RF_ANTENNA 0x0020
  255. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  256. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  257. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  258. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  259. #define MWL8K_CMD_SET_AID 0x010d
  260. #define MWL8K_CMD_SET_RATE 0x0110
  261. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  262. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  263. #define MWL8K_CMD_SET_SLOT 0x0114
  264. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  265. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  266. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  267. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  268. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  269. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  270. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  271. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  272. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  273. #define MWL8K_CMD_UPDATE_STADB 0x1123
  274. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  275. {
  276. u16 command = le16_to_cpu(cmd);
  277. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  278. snprintf(buf, bufsize, "%s", #x);\
  279. return buf;\
  280. } while (0)
  281. switch (command & ~0x8000) {
  282. MWL8K_CMDNAME(CODE_DNLD);
  283. MWL8K_CMDNAME(GET_HW_SPEC);
  284. MWL8K_CMDNAME(SET_HW_SPEC);
  285. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  286. MWL8K_CMDNAME(GET_STAT);
  287. MWL8K_CMDNAME(RADIO_CONTROL);
  288. MWL8K_CMDNAME(RF_TX_POWER);
  289. MWL8K_CMDNAME(RF_ANTENNA);
  290. MWL8K_CMDNAME(SET_BEACON);
  291. MWL8K_CMDNAME(SET_PRE_SCAN);
  292. MWL8K_CMDNAME(SET_POST_SCAN);
  293. MWL8K_CMDNAME(SET_RF_CHANNEL);
  294. MWL8K_CMDNAME(SET_AID);
  295. MWL8K_CMDNAME(SET_RATE);
  296. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  297. MWL8K_CMDNAME(RTS_THRESHOLD);
  298. MWL8K_CMDNAME(SET_SLOT);
  299. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  300. MWL8K_CMDNAME(SET_WMM_MODE);
  301. MWL8K_CMDNAME(MIMO_CONFIG);
  302. MWL8K_CMDNAME(USE_FIXED_RATE);
  303. MWL8K_CMDNAME(ENABLE_SNIFFER);
  304. MWL8K_CMDNAME(SET_MAC_ADDR);
  305. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  306. MWL8K_CMDNAME(BSS_START);
  307. MWL8K_CMDNAME(SET_NEW_STN);
  308. MWL8K_CMDNAME(UPDATE_STADB);
  309. default:
  310. snprintf(buf, bufsize, "0x%x", cmd);
  311. }
  312. #undef MWL8K_CMDNAME
  313. return buf;
  314. }
  315. /* Hardware and firmware reset */
  316. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  317. {
  318. iowrite32(MWL8K_H2A_INT_RESET,
  319. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  320. iowrite32(MWL8K_H2A_INT_RESET,
  321. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  322. msleep(20);
  323. }
  324. /* Release fw image */
  325. static void mwl8k_release_fw(struct firmware **fw)
  326. {
  327. if (*fw == NULL)
  328. return;
  329. release_firmware(*fw);
  330. *fw = NULL;
  331. }
  332. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  333. {
  334. mwl8k_release_fw(&priv->fw_ucode);
  335. mwl8k_release_fw(&priv->fw_helper);
  336. }
  337. /* Request fw image */
  338. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  339. const char *fname, struct firmware **fw)
  340. {
  341. /* release current image */
  342. if (*fw != NULL)
  343. mwl8k_release_fw(fw);
  344. return request_firmware((const struct firmware **)fw,
  345. fname, &priv->pdev->dev);
  346. }
  347. static int mwl8k_request_firmware(struct mwl8k_priv *priv)
  348. {
  349. struct mwl8k_device_info *di = priv->device_info;
  350. int rc;
  351. if (di->helper_image != NULL) {
  352. rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
  353. if (rc) {
  354. printk(KERN_ERR "%s: Error requesting helper "
  355. "firmware file %s\n", pci_name(priv->pdev),
  356. di->helper_image);
  357. return rc;
  358. }
  359. }
  360. rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
  361. if (rc) {
  362. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  363. pci_name(priv->pdev), di->fw_image);
  364. mwl8k_release_fw(&priv->fw_helper);
  365. return rc;
  366. }
  367. return 0;
  368. }
  369. struct mwl8k_cmd_pkt {
  370. __le16 code;
  371. __le16 length;
  372. __u8 seq_num;
  373. __u8 macid;
  374. __le16 result;
  375. char payload[0];
  376. } __packed;
  377. /*
  378. * Firmware loading.
  379. */
  380. static int
  381. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  382. {
  383. void __iomem *regs = priv->regs;
  384. dma_addr_t dma_addr;
  385. int loops;
  386. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  387. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  388. return -ENOMEM;
  389. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  390. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  391. iowrite32(MWL8K_H2A_INT_DOORBELL,
  392. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  393. iowrite32(MWL8K_H2A_INT_DUMMY,
  394. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  395. loops = 1000;
  396. do {
  397. u32 int_code;
  398. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  399. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  400. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  401. break;
  402. }
  403. cond_resched();
  404. udelay(1);
  405. } while (--loops);
  406. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  407. return loops ? 0 : -ETIMEDOUT;
  408. }
  409. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  410. const u8 *data, size_t length)
  411. {
  412. struct mwl8k_cmd_pkt *cmd;
  413. int done;
  414. int rc = 0;
  415. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  416. if (cmd == NULL)
  417. return -ENOMEM;
  418. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  419. cmd->seq_num = 0;
  420. cmd->macid = 0;
  421. cmd->result = 0;
  422. done = 0;
  423. while (length) {
  424. int block_size = length > 256 ? 256 : length;
  425. memcpy(cmd->payload, data + done, block_size);
  426. cmd->length = cpu_to_le16(block_size);
  427. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  428. sizeof(*cmd) + block_size);
  429. if (rc)
  430. break;
  431. done += block_size;
  432. length -= block_size;
  433. }
  434. if (!rc) {
  435. cmd->length = 0;
  436. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  437. }
  438. kfree(cmd);
  439. return rc;
  440. }
  441. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  442. const u8 *data, size_t length)
  443. {
  444. unsigned char *buffer;
  445. int may_continue, rc = 0;
  446. u32 done, prev_block_size;
  447. buffer = kmalloc(1024, GFP_KERNEL);
  448. if (buffer == NULL)
  449. return -ENOMEM;
  450. done = 0;
  451. prev_block_size = 0;
  452. may_continue = 1000;
  453. while (may_continue > 0) {
  454. u32 block_size;
  455. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  456. if (block_size & 1) {
  457. block_size &= ~1;
  458. may_continue--;
  459. } else {
  460. done += prev_block_size;
  461. length -= prev_block_size;
  462. }
  463. if (block_size > 1024 || block_size > length) {
  464. rc = -EOVERFLOW;
  465. break;
  466. }
  467. if (length == 0) {
  468. rc = 0;
  469. break;
  470. }
  471. if (block_size == 0) {
  472. rc = -EPROTO;
  473. may_continue--;
  474. udelay(1);
  475. continue;
  476. }
  477. prev_block_size = block_size;
  478. memcpy(buffer, data + done, block_size);
  479. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  480. if (rc)
  481. break;
  482. }
  483. if (!rc && length != 0)
  484. rc = -EREMOTEIO;
  485. kfree(buffer);
  486. return rc;
  487. }
  488. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  489. {
  490. struct mwl8k_priv *priv = hw->priv;
  491. struct firmware *fw = priv->fw_ucode;
  492. int rc;
  493. int loops;
  494. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  495. struct firmware *helper = priv->fw_helper;
  496. if (helper == NULL) {
  497. printk(KERN_ERR "%s: helper image needed but none "
  498. "given\n", pci_name(priv->pdev));
  499. return -EINVAL;
  500. }
  501. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  502. if (rc) {
  503. printk(KERN_ERR "%s: unable to load firmware "
  504. "helper image\n", pci_name(priv->pdev));
  505. return rc;
  506. }
  507. msleep(5);
  508. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  509. } else {
  510. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  511. }
  512. if (rc) {
  513. printk(KERN_ERR "%s: unable to load firmware image\n",
  514. pci_name(priv->pdev));
  515. return rc;
  516. }
  517. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  518. loops = 500000;
  519. do {
  520. u32 ready_code;
  521. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  522. if (ready_code == MWL8K_FWAP_READY) {
  523. priv->ap_fw = 1;
  524. break;
  525. } else if (ready_code == MWL8K_FWSTA_READY) {
  526. priv->ap_fw = 0;
  527. break;
  528. }
  529. cond_resched();
  530. udelay(1);
  531. } while (--loops);
  532. return loops ? 0 : -ETIMEDOUT;
  533. }
  534. /* DMA header used by firmware and hardware. */
  535. struct mwl8k_dma_data {
  536. __le16 fwlen;
  537. struct ieee80211_hdr wh;
  538. char data[0];
  539. } __packed;
  540. /* Routines to add/remove DMA header from skb. */
  541. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  542. {
  543. struct mwl8k_dma_data *tr;
  544. int hdrlen;
  545. tr = (struct mwl8k_dma_data *)skb->data;
  546. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  547. if (hdrlen != sizeof(tr->wh)) {
  548. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  549. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  550. *((__le16 *)(tr->data - 2)) = qos;
  551. } else {
  552. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  553. }
  554. }
  555. if (hdrlen != sizeof(*tr))
  556. skb_pull(skb, sizeof(*tr) - hdrlen);
  557. }
  558. static inline void mwl8k_add_dma_header(struct sk_buff *skb)
  559. {
  560. struct ieee80211_hdr *wh;
  561. int hdrlen;
  562. struct mwl8k_dma_data *tr;
  563. /*
  564. * Add a firmware DMA header; the firmware requires that we
  565. * present a 2-byte payload length followed by a 4-address
  566. * header (without QoS field), followed (optionally) by any
  567. * WEP/ExtIV header (but only filled in for CCMP).
  568. */
  569. wh = (struct ieee80211_hdr *)skb->data;
  570. hdrlen = ieee80211_hdrlen(wh->frame_control);
  571. if (hdrlen != sizeof(*tr))
  572. skb_push(skb, sizeof(*tr) - hdrlen);
  573. if (ieee80211_is_data_qos(wh->frame_control))
  574. hdrlen -= 2;
  575. tr = (struct mwl8k_dma_data *)skb->data;
  576. if (wh != &tr->wh)
  577. memmove(&tr->wh, wh, hdrlen);
  578. if (hdrlen != sizeof(tr->wh))
  579. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  580. /*
  581. * Firmware length is the length of the fully formed "802.11
  582. * payload". That is, everything except for the 802.11 header.
  583. * This includes all crypto material including the MIC.
  584. */
  585. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
  586. }
  587. /*
  588. * Packet reception for 88w8366 AP firmware.
  589. */
  590. struct mwl8k_rxd_8366_ap {
  591. __le16 pkt_len;
  592. __u8 sq2;
  593. __u8 rate;
  594. __le32 pkt_phys_addr;
  595. __le32 next_rxd_phys_addr;
  596. __le16 qos_control;
  597. __le16 htsig2;
  598. __le32 hw_rssi_info;
  599. __le32 hw_noise_floor_info;
  600. __u8 noise_floor;
  601. __u8 pad0[3];
  602. __u8 rssi;
  603. __u8 rx_status;
  604. __u8 channel;
  605. __u8 rx_ctrl;
  606. } __packed;
  607. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  608. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  609. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  610. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  611. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  612. {
  613. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  614. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  615. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  616. }
  617. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  618. {
  619. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  620. rxd->pkt_len = cpu_to_le16(len);
  621. rxd->pkt_phys_addr = cpu_to_le32(addr);
  622. wmb();
  623. rxd->rx_ctrl = 0;
  624. }
  625. static int
  626. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  627. __le16 *qos, s8 *noise)
  628. {
  629. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  630. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  631. return -1;
  632. rmb();
  633. memset(status, 0, sizeof(*status));
  634. status->signal = -rxd->rssi;
  635. *noise = -rxd->noise_floor;
  636. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  637. status->flag |= RX_FLAG_HT;
  638. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  639. status->flag |= RX_FLAG_40MHZ;
  640. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  641. } else {
  642. int i;
  643. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  644. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  645. status->rate_idx = i;
  646. break;
  647. }
  648. }
  649. }
  650. if (rxd->channel > 14) {
  651. status->band = IEEE80211_BAND_5GHZ;
  652. if (!(status->flag & RX_FLAG_HT))
  653. status->rate_idx -= 5;
  654. } else {
  655. status->band = IEEE80211_BAND_2GHZ;
  656. }
  657. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  658. *qos = rxd->qos_control;
  659. return le16_to_cpu(rxd->pkt_len);
  660. }
  661. static struct rxd_ops rxd_8366_ap_ops = {
  662. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  663. .rxd_init = mwl8k_rxd_8366_ap_init,
  664. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  665. .rxd_process = mwl8k_rxd_8366_ap_process,
  666. };
  667. /*
  668. * Packet reception for STA firmware.
  669. */
  670. struct mwl8k_rxd_sta {
  671. __le16 pkt_len;
  672. __u8 link_quality;
  673. __u8 noise_level;
  674. __le32 pkt_phys_addr;
  675. __le32 next_rxd_phys_addr;
  676. __le16 qos_control;
  677. __le16 rate_info;
  678. __le32 pad0[4];
  679. __u8 rssi;
  680. __u8 channel;
  681. __le16 pad1;
  682. __u8 rx_ctrl;
  683. __u8 rx_status;
  684. __u8 pad2[2];
  685. } __packed;
  686. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  687. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  688. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  689. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  690. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  691. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  692. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  693. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  694. {
  695. struct mwl8k_rxd_sta *rxd = _rxd;
  696. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  697. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  698. }
  699. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  700. {
  701. struct mwl8k_rxd_sta *rxd = _rxd;
  702. rxd->pkt_len = cpu_to_le16(len);
  703. rxd->pkt_phys_addr = cpu_to_le32(addr);
  704. wmb();
  705. rxd->rx_ctrl = 0;
  706. }
  707. static int
  708. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  709. __le16 *qos, s8 *noise)
  710. {
  711. struct mwl8k_rxd_sta *rxd = _rxd;
  712. u16 rate_info;
  713. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  714. return -1;
  715. rmb();
  716. rate_info = le16_to_cpu(rxd->rate_info);
  717. memset(status, 0, sizeof(*status));
  718. status->signal = -rxd->rssi;
  719. *noise = -rxd->noise_level;
  720. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  721. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  722. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  723. status->flag |= RX_FLAG_SHORTPRE;
  724. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  725. status->flag |= RX_FLAG_40MHZ;
  726. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  727. status->flag |= RX_FLAG_SHORT_GI;
  728. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  729. status->flag |= RX_FLAG_HT;
  730. if (rxd->channel > 14) {
  731. status->band = IEEE80211_BAND_5GHZ;
  732. if (!(status->flag & RX_FLAG_HT))
  733. status->rate_idx -= 5;
  734. } else {
  735. status->band = IEEE80211_BAND_2GHZ;
  736. }
  737. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  738. *qos = rxd->qos_control;
  739. return le16_to_cpu(rxd->pkt_len);
  740. }
  741. static struct rxd_ops rxd_sta_ops = {
  742. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  743. .rxd_init = mwl8k_rxd_sta_init,
  744. .rxd_refill = mwl8k_rxd_sta_refill,
  745. .rxd_process = mwl8k_rxd_sta_process,
  746. };
  747. #define MWL8K_RX_DESCS 256
  748. #define MWL8K_RX_MAXSZ 3800
  749. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  750. {
  751. struct mwl8k_priv *priv = hw->priv;
  752. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  753. int size;
  754. int i;
  755. rxq->rxd_count = 0;
  756. rxq->head = 0;
  757. rxq->tail = 0;
  758. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  759. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  760. if (rxq->rxd == NULL) {
  761. wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
  762. return -ENOMEM;
  763. }
  764. memset(rxq->rxd, 0, size);
  765. rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
  766. if (rxq->buf == NULL) {
  767. wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
  768. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  769. return -ENOMEM;
  770. }
  771. memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
  772. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  773. int desc_size;
  774. void *rxd;
  775. int nexti;
  776. dma_addr_t next_dma_addr;
  777. desc_size = priv->rxd_ops->rxd_size;
  778. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  779. nexti = i + 1;
  780. if (nexti == MWL8K_RX_DESCS)
  781. nexti = 0;
  782. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  783. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  784. }
  785. return 0;
  786. }
  787. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  788. {
  789. struct mwl8k_priv *priv = hw->priv;
  790. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  791. int refilled;
  792. refilled = 0;
  793. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  794. struct sk_buff *skb;
  795. dma_addr_t addr;
  796. int rx;
  797. void *rxd;
  798. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  799. if (skb == NULL)
  800. break;
  801. addr = pci_map_single(priv->pdev, skb->data,
  802. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  803. rxq->rxd_count++;
  804. rx = rxq->tail++;
  805. if (rxq->tail == MWL8K_RX_DESCS)
  806. rxq->tail = 0;
  807. rxq->buf[rx].skb = skb;
  808. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  809. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  810. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  811. refilled++;
  812. }
  813. return refilled;
  814. }
  815. /* Must be called only when the card's reception is completely halted */
  816. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  817. {
  818. struct mwl8k_priv *priv = hw->priv;
  819. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  820. int i;
  821. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  822. if (rxq->buf[i].skb != NULL) {
  823. pci_unmap_single(priv->pdev,
  824. dma_unmap_addr(&rxq->buf[i], dma),
  825. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  826. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  827. kfree_skb(rxq->buf[i].skb);
  828. rxq->buf[i].skb = NULL;
  829. }
  830. }
  831. kfree(rxq->buf);
  832. rxq->buf = NULL;
  833. pci_free_consistent(priv->pdev,
  834. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  835. rxq->rxd, rxq->rxd_dma);
  836. rxq->rxd = NULL;
  837. }
  838. /*
  839. * Scan a list of BSSIDs to process for finalize join.
  840. * Allows for extension to process multiple BSSIDs.
  841. */
  842. static inline int
  843. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  844. {
  845. return priv->capture_beacon &&
  846. ieee80211_is_beacon(wh->frame_control) &&
  847. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  848. }
  849. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  850. struct sk_buff *skb)
  851. {
  852. struct mwl8k_priv *priv = hw->priv;
  853. priv->capture_beacon = false;
  854. memset(priv->capture_bssid, 0, ETH_ALEN);
  855. /*
  856. * Use GFP_ATOMIC as rxq_process is called from
  857. * the primary interrupt handler, memory allocation call
  858. * must not sleep.
  859. */
  860. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  861. if (priv->beacon_skb != NULL)
  862. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  863. }
  864. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  865. {
  866. struct mwl8k_priv *priv = hw->priv;
  867. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  868. int processed;
  869. processed = 0;
  870. while (rxq->rxd_count && limit--) {
  871. struct sk_buff *skb;
  872. void *rxd;
  873. int pkt_len;
  874. struct ieee80211_rx_status status;
  875. __le16 qos;
  876. skb = rxq->buf[rxq->head].skb;
  877. if (skb == NULL)
  878. break;
  879. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  880. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
  881. &priv->noise);
  882. if (pkt_len < 0)
  883. break;
  884. rxq->buf[rxq->head].skb = NULL;
  885. pci_unmap_single(priv->pdev,
  886. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  887. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  888. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  889. rxq->head++;
  890. if (rxq->head == MWL8K_RX_DESCS)
  891. rxq->head = 0;
  892. rxq->rxd_count--;
  893. skb_put(skb, pkt_len);
  894. mwl8k_remove_dma_header(skb, qos);
  895. /*
  896. * Check for a pending join operation. Save a
  897. * copy of the beacon and schedule a tasklet to
  898. * send a FINALIZE_JOIN command to the firmware.
  899. */
  900. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  901. mwl8k_save_beacon(hw, skb);
  902. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  903. ieee80211_rx_irqsafe(hw, skb);
  904. processed++;
  905. }
  906. return processed;
  907. }
  908. /*
  909. * Packet transmission.
  910. */
  911. #define MWL8K_TXD_STATUS_OK 0x00000001
  912. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  913. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  914. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  915. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  916. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  917. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  918. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  919. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  920. #define MWL8K_QOS_EOSP 0x0010
  921. struct mwl8k_tx_desc {
  922. __le32 status;
  923. __u8 data_rate;
  924. __u8 tx_priority;
  925. __le16 qos_control;
  926. __le32 pkt_phys_addr;
  927. __le16 pkt_len;
  928. __u8 dest_MAC_addr[ETH_ALEN];
  929. __le32 next_txd_phys_addr;
  930. __le32 reserved;
  931. __le16 rate_info;
  932. __u8 peer_id;
  933. __u8 tx_frag_cnt;
  934. } __packed;
  935. #define MWL8K_TX_DESCS 128
  936. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  937. {
  938. struct mwl8k_priv *priv = hw->priv;
  939. struct mwl8k_tx_queue *txq = priv->txq + index;
  940. int size;
  941. int i;
  942. txq->len = 0;
  943. txq->head = 0;
  944. txq->tail = 0;
  945. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  946. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  947. if (txq->txd == NULL) {
  948. wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
  949. return -ENOMEM;
  950. }
  951. memset(txq->txd, 0, size);
  952. txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
  953. if (txq->skb == NULL) {
  954. wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
  955. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  956. return -ENOMEM;
  957. }
  958. memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
  959. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  960. struct mwl8k_tx_desc *tx_desc;
  961. int nexti;
  962. tx_desc = txq->txd + i;
  963. nexti = (i + 1) % MWL8K_TX_DESCS;
  964. tx_desc->status = 0;
  965. tx_desc->next_txd_phys_addr =
  966. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  967. }
  968. return 0;
  969. }
  970. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  971. {
  972. iowrite32(MWL8K_H2A_INT_PPA_READY,
  973. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  974. iowrite32(MWL8K_H2A_INT_DUMMY,
  975. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  976. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  977. }
  978. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  979. {
  980. struct mwl8k_priv *priv = hw->priv;
  981. int i;
  982. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  983. struct mwl8k_tx_queue *txq = priv->txq + i;
  984. int fw_owned = 0;
  985. int drv_owned = 0;
  986. int unused = 0;
  987. int desc;
  988. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  989. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  990. u32 status;
  991. status = le32_to_cpu(tx_desc->status);
  992. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  993. fw_owned++;
  994. else
  995. drv_owned++;
  996. if (tx_desc->pkt_len == 0)
  997. unused++;
  998. }
  999. wiphy_err(hw->wiphy,
  1000. "txq[%d] len=%d head=%d tail=%d "
  1001. "fw_owned=%d drv_owned=%d unused=%d\n",
  1002. i,
  1003. txq->len, txq->head, txq->tail,
  1004. fw_owned, drv_owned, unused);
  1005. }
  1006. }
  1007. /*
  1008. * Must be called with priv->fw_mutex held and tx queues stopped.
  1009. */
  1010. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1011. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1012. {
  1013. struct mwl8k_priv *priv = hw->priv;
  1014. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1015. int retry;
  1016. int rc;
  1017. might_sleep();
  1018. /*
  1019. * The TX queues are stopped at this point, so this test
  1020. * doesn't need to take ->tx_lock.
  1021. */
  1022. if (!priv->pending_tx_pkts)
  1023. return 0;
  1024. retry = 0;
  1025. rc = 0;
  1026. spin_lock_bh(&priv->tx_lock);
  1027. priv->tx_wait = &tx_wait;
  1028. while (!rc) {
  1029. int oldcount;
  1030. unsigned long timeout;
  1031. oldcount = priv->pending_tx_pkts;
  1032. spin_unlock_bh(&priv->tx_lock);
  1033. timeout = wait_for_completion_timeout(&tx_wait,
  1034. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1035. spin_lock_bh(&priv->tx_lock);
  1036. if (timeout) {
  1037. WARN_ON(priv->pending_tx_pkts);
  1038. if (retry) {
  1039. wiphy_notice(hw->wiphy, "tx rings drained\n");
  1040. }
  1041. break;
  1042. }
  1043. if (priv->pending_tx_pkts < oldcount) {
  1044. wiphy_notice(hw->wiphy,
  1045. "waiting for tx rings to drain (%d -> %d pkts)\n",
  1046. oldcount, priv->pending_tx_pkts);
  1047. retry = 1;
  1048. continue;
  1049. }
  1050. priv->tx_wait = NULL;
  1051. wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
  1052. MWL8K_TX_WAIT_TIMEOUT_MS);
  1053. mwl8k_dump_tx_rings(hw);
  1054. rc = -ETIMEDOUT;
  1055. }
  1056. spin_unlock_bh(&priv->tx_lock);
  1057. return rc;
  1058. }
  1059. #define MWL8K_TXD_SUCCESS(status) \
  1060. ((status) & (MWL8K_TXD_STATUS_OK | \
  1061. MWL8K_TXD_STATUS_OK_RETRY | \
  1062. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1063. static int
  1064. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1065. {
  1066. struct mwl8k_priv *priv = hw->priv;
  1067. struct mwl8k_tx_queue *txq = priv->txq + index;
  1068. int processed;
  1069. processed = 0;
  1070. while (txq->len > 0 && limit--) {
  1071. int tx;
  1072. struct mwl8k_tx_desc *tx_desc;
  1073. unsigned long addr;
  1074. int size;
  1075. struct sk_buff *skb;
  1076. struct ieee80211_tx_info *info;
  1077. u32 status;
  1078. tx = txq->head;
  1079. tx_desc = txq->txd + tx;
  1080. status = le32_to_cpu(tx_desc->status);
  1081. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1082. if (!force)
  1083. break;
  1084. tx_desc->status &=
  1085. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1086. }
  1087. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1088. BUG_ON(txq->len == 0);
  1089. txq->len--;
  1090. priv->pending_tx_pkts--;
  1091. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1092. size = le16_to_cpu(tx_desc->pkt_len);
  1093. skb = txq->skb[tx];
  1094. txq->skb[tx] = NULL;
  1095. BUG_ON(skb == NULL);
  1096. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1097. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1098. /* Mark descriptor as unused */
  1099. tx_desc->pkt_phys_addr = 0;
  1100. tx_desc->pkt_len = 0;
  1101. info = IEEE80211_SKB_CB(skb);
  1102. ieee80211_tx_info_clear_status(info);
  1103. if (MWL8K_TXD_SUCCESS(status))
  1104. info->flags |= IEEE80211_TX_STAT_ACK;
  1105. ieee80211_tx_status_irqsafe(hw, skb);
  1106. processed++;
  1107. }
  1108. if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
  1109. ieee80211_wake_queue(hw, index);
  1110. return processed;
  1111. }
  1112. /* must be called only when the card's transmit is completely halted */
  1113. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1114. {
  1115. struct mwl8k_priv *priv = hw->priv;
  1116. struct mwl8k_tx_queue *txq = priv->txq + index;
  1117. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1118. kfree(txq->skb);
  1119. txq->skb = NULL;
  1120. pci_free_consistent(priv->pdev,
  1121. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1122. txq->txd, txq->txd_dma);
  1123. txq->txd = NULL;
  1124. }
  1125. static int
  1126. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1127. {
  1128. struct mwl8k_priv *priv = hw->priv;
  1129. struct ieee80211_tx_info *tx_info;
  1130. struct mwl8k_vif *mwl8k_vif;
  1131. struct ieee80211_hdr *wh;
  1132. struct mwl8k_tx_queue *txq;
  1133. struct mwl8k_tx_desc *tx;
  1134. dma_addr_t dma;
  1135. u32 txstatus;
  1136. u8 txdatarate;
  1137. u16 qos;
  1138. wh = (struct ieee80211_hdr *)skb->data;
  1139. if (ieee80211_is_data_qos(wh->frame_control))
  1140. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1141. else
  1142. qos = 0;
  1143. mwl8k_add_dma_header(skb);
  1144. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1145. tx_info = IEEE80211_SKB_CB(skb);
  1146. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1147. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1148. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1149. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1150. mwl8k_vif->seqno += 0x10;
  1151. }
  1152. /* Setup firmware control bit fields for each frame type. */
  1153. txstatus = 0;
  1154. txdatarate = 0;
  1155. if (ieee80211_is_mgmt(wh->frame_control) ||
  1156. ieee80211_is_ctl(wh->frame_control)) {
  1157. txdatarate = 0;
  1158. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1159. } else if (ieee80211_is_data(wh->frame_control)) {
  1160. txdatarate = 1;
  1161. if (is_multicast_ether_addr(wh->addr1))
  1162. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1163. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1164. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1165. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1166. else
  1167. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1168. }
  1169. dma = pci_map_single(priv->pdev, skb->data,
  1170. skb->len, PCI_DMA_TODEVICE);
  1171. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1172. wiphy_debug(hw->wiphy,
  1173. "failed to dma map skb, dropping TX frame.\n");
  1174. dev_kfree_skb(skb);
  1175. return NETDEV_TX_OK;
  1176. }
  1177. spin_lock_bh(&priv->tx_lock);
  1178. txq = priv->txq + index;
  1179. BUG_ON(txq->skb[txq->tail] != NULL);
  1180. txq->skb[txq->tail] = skb;
  1181. tx = txq->txd + txq->tail;
  1182. tx->data_rate = txdatarate;
  1183. tx->tx_priority = index;
  1184. tx->qos_control = cpu_to_le16(qos);
  1185. tx->pkt_phys_addr = cpu_to_le32(dma);
  1186. tx->pkt_len = cpu_to_le16(skb->len);
  1187. tx->rate_info = 0;
  1188. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1189. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1190. else
  1191. tx->peer_id = 0;
  1192. wmb();
  1193. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1194. txq->len++;
  1195. priv->pending_tx_pkts++;
  1196. txq->tail++;
  1197. if (txq->tail == MWL8K_TX_DESCS)
  1198. txq->tail = 0;
  1199. if (txq->head == txq->tail)
  1200. ieee80211_stop_queue(hw, index);
  1201. mwl8k_tx_start(priv);
  1202. spin_unlock_bh(&priv->tx_lock);
  1203. return NETDEV_TX_OK;
  1204. }
  1205. /*
  1206. * Firmware access.
  1207. *
  1208. * We have the following requirements for issuing firmware commands:
  1209. * - Some commands require that the packet transmit path is idle when
  1210. * the command is issued. (For simplicity, we'll just quiesce the
  1211. * transmit path for every command.)
  1212. * - There are certain sequences of commands that need to be issued to
  1213. * the hardware sequentially, with no other intervening commands.
  1214. *
  1215. * This leads to an implementation of a "firmware lock" as a mutex that
  1216. * can be taken recursively, and which is taken by both the low-level
  1217. * command submission function (mwl8k_post_cmd) as well as any users of
  1218. * that function that require issuing of an atomic sequence of commands,
  1219. * and quiesces the transmit path whenever it's taken.
  1220. */
  1221. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1222. {
  1223. struct mwl8k_priv *priv = hw->priv;
  1224. if (priv->fw_mutex_owner != current) {
  1225. int rc;
  1226. mutex_lock(&priv->fw_mutex);
  1227. ieee80211_stop_queues(hw);
  1228. rc = mwl8k_tx_wait_empty(hw);
  1229. if (rc) {
  1230. ieee80211_wake_queues(hw);
  1231. mutex_unlock(&priv->fw_mutex);
  1232. return rc;
  1233. }
  1234. priv->fw_mutex_owner = current;
  1235. }
  1236. priv->fw_mutex_depth++;
  1237. return 0;
  1238. }
  1239. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1240. {
  1241. struct mwl8k_priv *priv = hw->priv;
  1242. if (!--priv->fw_mutex_depth) {
  1243. ieee80211_wake_queues(hw);
  1244. priv->fw_mutex_owner = NULL;
  1245. mutex_unlock(&priv->fw_mutex);
  1246. }
  1247. }
  1248. /*
  1249. * Command processing.
  1250. */
  1251. /* Timeout firmware commands after 10s */
  1252. #define MWL8K_CMD_TIMEOUT_MS 10000
  1253. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1254. {
  1255. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1256. struct mwl8k_priv *priv = hw->priv;
  1257. void __iomem *regs = priv->regs;
  1258. dma_addr_t dma_addr;
  1259. unsigned int dma_size;
  1260. int rc;
  1261. unsigned long timeout = 0;
  1262. u8 buf[32];
  1263. cmd->result = (__force __le16) 0xffff;
  1264. dma_size = le16_to_cpu(cmd->length);
  1265. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1266. PCI_DMA_BIDIRECTIONAL);
  1267. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1268. return -ENOMEM;
  1269. rc = mwl8k_fw_lock(hw);
  1270. if (rc) {
  1271. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1272. PCI_DMA_BIDIRECTIONAL);
  1273. return rc;
  1274. }
  1275. priv->hostcmd_wait = &cmd_wait;
  1276. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1277. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1278. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1279. iowrite32(MWL8K_H2A_INT_DUMMY,
  1280. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1281. timeout = wait_for_completion_timeout(&cmd_wait,
  1282. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1283. priv->hostcmd_wait = NULL;
  1284. mwl8k_fw_unlock(hw);
  1285. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1286. PCI_DMA_BIDIRECTIONAL);
  1287. if (!timeout) {
  1288. wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
  1289. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1290. MWL8K_CMD_TIMEOUT_MS);
  1291. rc = -ETIMEDOUT;
  1292. } else {
  1293. int ms;
  1294. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1295. rc = cmd->result ? -EINVAL : 0;
  1296. if (rc)
  1297. wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
  1298. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1299. le16_to_cpu(cmd->result));
  1300. else if (ms > 2000)
  1301. wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
  1302. mwl8k_cmd_name(cmd->code,
  1303. buf, sizeof(buf)),
  1304. ms);
  1305. }
  1306. return rc;
  1307. }
  1308. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1309. struct ieee80211_vif *vif,
  1310. struct mwl8k_cmd_pkt *cmd)
  1311. {
  1312. if (vif != NULL)
  1313. cmd->macid = MWL8K_VIF(vif)->macid;
  1314. return mwl8k_post_cmd(hw, cmd);
  1315. }
  1316. /*
  1317. * Setup code shared between STA and AP firmware images.
  1318. */
  1319. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1320. {
  1321. struct mwl8k_priv *priv = hw->priv;
  1322. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1323. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1324. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1325. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1326. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1327. priv->band_24.channels = priv->channels_24;
  1328. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1329. priv->band_24.bitrates = priv->rates_24;
  1330. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1331. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1332. }
  1333. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1334. {
  1335. struct mwl8k_priv *priv = hw->priv;
  1336. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1337. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1338. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1339. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1340. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1341. priv->band_50.channels = priv->channels_50;
  1342. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1343. priv->band_50.bitrates = priv->rates_50;
  1344. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1345. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1346. }
  1347. /*
  1348. * CMD_GET_HW_SPEC (STA version).
  1349. */
  1350. struct mwl8k_cmd_get_hw_spec_sta {
  1351. struct mwl8k_cmd_pkt header;
  1352. __u8 hw_rev;
  1353. __u8 host_interface;
  1354. __le16 num_mcaddrs;
  1355. __u8 perm_addr[ETH_ALEN];
  1356. __le16 region_code;
  1357. __le32 fw_rev;
  1358. __le32 ps_cookie;
  1359. __le32 caps;
  1360. __u8 mcs_bitmap[16];
  1361. __le32 rx_queue_ptr;
  1362. __le32 num_tx_queues;
  1363. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1364. __le32 caps2;
  1365. __le32 num_tx_desc_per_queue;
  1366. __le32 total_rxd;
  1367. } __packed;
  1368. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1369. #define MWL8K_CAP_GREENFIELD 0x08000000
  1370. #define MWL8K_CAP_AMPDU 0x04000000
  1371. #define MWL8K_CAP_RX_STBC 0x01000000
  1372. #define MWL8K_CAP_TX_STBC 0x00800000
  1373. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1374. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1375. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1376. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1377. #define MWL8K_CAP_DELAY_BA 0x00003000
  1378. #define MWL8K_CAP_MIMO 0x00000200
  1379. #define MWL8K_CAP_40MHZ 0x00000100
  1380. #define MWL8K_CAP_BAND_MASK 0x00000007
  1381. #define MWL8K_CAP_5GHZ 0x00000004
  1382. #define MWL8K_CAP_2GHZ4 0x00000001
  1383. static void
  1384. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1385. struct ieee80211_supported_band *band, u32 cap)
  1386. {
  1387. int rx_streams;
  1388. int tx_streams;
  1389. band->ht_cap.ht_supported = 1;
  1390. if (cap & MWL8K_CAP_MAX_AMSDU)
  1391. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1392. if (cap & MWL8K_CAP_GREENFIELD)
  1393. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1394. if (cap & MWL8K_CAP_AMPDU) {
  1395. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1396. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1397. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1398. }
  1399. if (cap & MWL8K_CAP_RX_STBC)
  1400. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1401. if (cap & MWL8K_CAP_TX_STBC)
  1402. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1403. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1404. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1405. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1406. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1407. if (cap & MWL8K_CAP_DELAY_BA)
  1408. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1409. if (cap & MWL8K_CAP_40MHZ)
  1410. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1411. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1412. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1413. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1414. if (rx_streams >= 2)
  1415. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1416. if (rx_streams >= 3)
  1417. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1418. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1419. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1420. if (rx_streams != tx_streams) {
  1421. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1422. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1423. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1424. }
  1425. }
  1426. static void
  1427. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1428. {
  1429. struct mwl8k_priv *priv = hw->priv;
  1430. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1431. mwl8k_setup_2ghz_band(hw);
  1432. if (caps & MWL8K_CAP_MIMO)
  1433. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1434. }
  1435. if (caps & MWL8K_CAP_5GHZ) {
  1436. mwl8k_setup_5ghz_band(hw);
  1437. if (caps & MWL8K_CAP_MIMO)
  1438. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1439. }
  1440. }
  1441. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1442. {
  1443. struct mwl8k_priv *priv = hw->priv;
  1444. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1445. int rc;
  1446. int i;
  1447. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1448. if (cmd == NULL)
  1449. return -ENOMEM;
  1450. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1451. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1452. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1453. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1454. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1455. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1456. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1457. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1458. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1459. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1460. rc = mwl8k_post_cmd(hw, &cmd->header);
  1461. if (!rc) {
  1462. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1463. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1464. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1465. priv->hw_rev = cmd->hw_rev;
  1466. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1467. priv->ap_macids_supported = 0x00000000;
  1468. priv->sta_macids_supported = 0x00000001;
  1469. }
  1470. kfree(cmd);
  1471. return rc;
  1472. }
  1473. /*
  1474. * CMD_GET_HW_SPEC (AP version).
  1475. */
  1476. struct mwl8k_cmd_get_hw_spec_ap {
  1477. struct mwl8k_cmd_pkt header;
  1478. __u8 hw_rev;
  1479. __u8 host_interface;
  1480. __le16 num_wcb;
  1481. __le16 num_mcaddrs;
  1482. __u8 perm_addr[ETH_ALEN];
  1483. __le16 region_code;
  1484. __le16 num_antenna;
  1485. __le32 fw_rev;
  1486. __le32 wcbbase0;
  1487. __le32 rxwrptr;
  1488. __le32 rxrdptr;
  1489. __le32 ps_cookie;
  1490. __le32 wcbbase1;
  1491. __le32 wcbbase2;
  1492. __le32 wcbbase3;
  1493. } __packed;
  1494. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1495. {
  1496. struct mwl8k_priv *priv = hw->priv;
  1497. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1498. int rc;
  1499. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1500. if (cmd == NULL)
  1501. return -ENOMEM;
  1502. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1503. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1504. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1505. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1506. rc = mwl8k_post_cmd(hw, &cmd->header);
  1507. if (!rc) {
  1508. int off;
  1509. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1510. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1511. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1512. priv->hw_rev = cmd->hw_rev;
  1513. mwl8k_setup_2ghz_band(hw);
  1514. priv->ap_macids_supported = 0x000000ff;
  1515. priv->sta_macids_supported = 0x00000000;
  1516. off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  1517. iowrite32(priv->txq[0].txd_dma, priv->sram + off);
  1518. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  1519. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1520. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  1521. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1522. off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  1523. iowrite32(priv->txq[1].txd_dma, priv->sram + off);
  1524. off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  1525. iowrite32(priv->txq[2].txd_dma, priv->sram + off);
  1526. off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  1527. iowrite32(priv->txq[3].txd_dma, priv->sram + off);
  1528. }
  1529. kfree(cmd);
  1530. return rc;
  1531. }
  1532. /*
  1533. * CMD_SET_HW_SPEC.
  1534. */
  1535. struct mwl8k_cmd_set_hw_spec {
  1536. struct mwl8k_cmd_pkt header;
  1537. __u8 hw_rev;
  1538. __u8 host_interface;
  1539. __le16 num_mcaddrs;
  1540. __u8 perm_addr[ETH_ALEN];
  1541. __le16 region_code;
  1542. __le32 fw_rev;
  1543. __le32 ps_cookie;
  1544. __le32 caps;
  1545. __le32 rx_queue_ptr;
  1546. __le32 num_tx_queues;
  1547. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1548. __le32 flags;
  1549. __le32 num_tx_desc_per_queue;
  1550. __le32 total_rxd;
  1551. } __packed;
  1552. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  1553. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  1554. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  1555. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  1556. {
  1557. struct mwl8k_priv *priv = hw->priv;
  1558. struct mwl8k_cmd_set_hw_spec *cmd;
  1559. int rc;
  1560. int i;
  1561. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1562. if (cmd == NULL)
  1563. return -ENOMEM;
  1564. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  1565. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1566. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1567. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1568. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1569. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1570. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1571. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  1572. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  1573. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
  1574. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1575. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1576. rc = mwl8k_post_cmd(hw, &cmd->header);
  1577. kfree(cmd);
  1578. return rc;
  1579. }
  1580. /*
  1581. * CMD_MAC_MULTICAST_ADR.
  1582. */
  1583. struct mwl8k_cmd_mac_multicast_adr {
  1584. struct mwl8k_cmd_pkt header;
  1585. __le16 action;
  1586. __le16 numaddr;
  1587. __u8 addr[0][ETH_ALEN];
  1588. };
  1589. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  1590. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  1591. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  1592. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  1593. static struct mwl8k_cmd_pkt *
  1594. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  1595. struct netdev_hw_addr_list *mc_list)
  1596. {
  1597. struct mwl8k_priv *priv = hw->priv;
  1598. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1599. int size;
  1600. int mc_count = 0;
  1601. if (mc_list)
  1602. mc_count = netdev_hw_addr_list_count(mc_list);
  1603. if (allmulti || mc_count > priv->num_mcaddrs) {
  1604. allmulti = 1;
  1605. mc_count = 0;
  1606. }
  1607. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1608. cmd = kzalloc(size, GFP_ATOMIC);
  1609. if (cmd == NULL)
  1610. return NULL;
  1611. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1612. cmd->header.length = cpu_to_le16(size);
  1613. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  1614. MWL8K_ENABLE_RX_BROADCAST);
  1615. if (allmulti) {
  1616. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  1617. } else if (mc_count) {
  1618. struct netdev_hw_addr *ha;
  1619. int i = 0;
  1620. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1621. cmd->numaddr = cpu_to_le16(mc_count);
  1622. netdev_hw_addr_list_for_each(ha, mc_list) {
  1623. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  1624. }
  1625. }
  1626. return &cmd->header;
  1627. }
  1628. /*
  1629. * CMD_GET_STAT.
  1630. */
  1631. struct mwl8k_cmd_get_stat {
  1632. struct mwl8k_cmd_pkt header;
  1633. __le32 stats[64];
  1634. } __packed;
  1635. #define MWL8K_STAT_ACK_FAILURE 9
  1636. #define MWL8K_STAT_RTS_FAILURE 12
  1637. #define MWL8K_STAT_FCS_ERROR 24
  1638. #define MWL8K_STAT_RTS_SUCCESS 11
  1639. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  1640. struct ieee80211_low_level_stats *stats)
  1641. {
  1642. struct mwl8k_cmd_get_stat *cmd;
  1643. int rc;
  1644. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1645. if (cmd == NULL)
  1646. return -ENOMEM;
  1647. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1648. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1649. rc = mwl8k_post_cmd(hw, &cmd->header);
  1650. if (!rc) {
  1651. stats->dot11ACKFailureCount =
  1652. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1653. stats->dot11RTSFailureCount =
  1654. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1655. stats->dot11FCSErrorCount =
  1656. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1657. stats->dot11RTSSuccessCount =
  1658. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1659. }
  1660. kfree(cmd);
  1661. return rc;
  1662. }
  1663. /*
  1664. * CMD_RADIO_CONTROL.
  1665. */
  1666. struct mwl8k_cmd_radio_control {
  1667. struct mwl8k_cmd_pkt header;
  1668. __le16 action;
  1669. __le16 control;
  1670. __le16 radio_on;
  1671. } __packed;
  1672. static int
  1673. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1674. {
  1675. struct mwl8k_priv *priv = hw->priv;
  1676. struct mwl8k_cmd_radio_control *cmd;
  1677. int rc;
  1678. if (enable == priv->radio_on && !force)
  1679. return 0;
  1680. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1681. if (cmd == NULL)
  1682. return -ENOMEM;
  1683. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1684. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1685. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1686. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1687. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1688. rc = mwl8k_post_cmd(hw, &cmd->header);
  1689. kfree(cmd);
  1690. if (!rc)
  1691. priv->radio_on = enable;
  1692. return rc;
  1693. }
  1694. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  1695. {
  1696. return mwl8k_cmd_radio_control(hw, 0, 0);
  1697. }
  1698. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  1699. {
  1700. return mwl8k_cmd_radio_control(hw, 1, 0);
  1701. }
  1702. static int
  1703. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1704. {
  1705. struct mwl8k_priv *priv = hw->priv;
  1706. priv->radio_short_preamble = short_preamble;
  1707. return mwl8k_cmd_radio_control(hw, 1, 1);
  1708. }
  1709. /*
  1710. * CMD_RF_TX_POWER.
  1711. */
  1712. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1713. struct mwl8k_cmd_rf_tx_power {
  1714. struct mwl8k_cmd_pkt header;
  1715. __le16 action;
  1716. __le16 support_level;
  1717. __le16 current_level;
  1718. __le16 reserved;
  1719. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1720. } __packed;
  1721. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1722. {
  1723. struct mwl8k_cmd_rf_tx_power *cmd;
  1724. int rc;
  1725. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1726. if (cmd == NULL)
  1727. return -ENOMEM;
  1728. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1729. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1730. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1731. cmd->support_level = cpu_to_le16(dBm);
  1732. rc = mwl8k_post_cmd(hw, &cmd->header);
  1733. kfree(cmd);
  1734. return rc;
  1735. }
  1736. /*
  1737. * CMD_RF_ANTENNA.
  1738. */
  1739. struct mwl8k_cmd_rf_antenna {
  1740. struct mwl8k_cmd_pkt header;
  1741. __le16 antenna;
  1742. __le16 mode;
  1743. } __packed;
  1744. #define MWL8K_RF_ANTENNA_RX 1
  1745. #define MWL8K_RF_ANTENNA_TX 2
  1746. static int
  1747. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  1748. {
  1749. struct mwl8k_cmd_rf_antenna *cmd;
  1750. int rc;
  1751. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1752. if (cmd == NULL)
  1753. return -ENOMEM;
  1754. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  1755. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1756. cmd->antenna = cpu_to_le16(antenna);
  1757. cmd->mode = cpu_to_le16(mask);
  1758. rc = mwl8k_post_cmd(hw, &cmd->header);
  1759. kfree(cmd);
  1760. return rc;
  1761. }
  1762. /*
  1763. * CMD_SET_BEACON.
  1764. */
  1765. struct mwl8k_cmd_set_beacon {
  1766. struct mwl8k_cmd_pkt header;
  1767. __le16 beacon_len;
  1768. __u8 beacon[0];
  1769. };
  1770. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  1771. struct ieee80211_vif *vif, u8 *beacon, int len)
  1772. {
  1773. struct mwl8k_cmd_set_beacon *cmd;
  1774. int rc;
  1775. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  1776. if (cmd == NULL)
  1777. return -ENOMEM;
  1778. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  1779. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  1780. cmd->beacon_len = cpu_to_le16(len);
  1781. memcpy(cmd->beacon, beacon, len);
  1782. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  1783. kfree(cmd);
  1784. return rc;
  1785. }
  1786. /*
  1787. * CMD_SET_PRE_SCAN.
  1788. */
  1789. struct mwl8k_cmd_set_pre_scan {
  1790. struct mwl8k_cmd_pkt header;
  1791. } __packed;
  1792. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1793. {
  1794. struct mwl8k_cmd_set_pre_scan *cmd;
  1795. int rc;
  1796. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1797. if (cmd == NULL)
  1798. return -ENOMEM;
  1799. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1800. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1801. rc = mwl8k_post_cmd(hw, &cmd->header);
  1802. kfree(cmd);
  1803. return rc;
  1804. }
  1805. /*
  1806. * CMD_SET_POST_SCAN.
  1807. */
  1808. struct mwl8k_cmd_set_post_scan {
  1809. struct mwl8k_cmd_pkt header;
  1810. __le32 isibss;
  1811. __u8 bssid[ETH_ALEN];
  1812. } __packed;
  1813. static int
  1814. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  1815. {
  1816. struct mwl8k_cmd_set_post_scan *cmd;
  1817. int rc;
  1818. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1819. if (cmd == NULL)
  1820. return -ENOMEM;
  1821. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1822. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1823. cmd->isibss = 0;
  1824. memcpy(cmd->bssid, mac, ETH_ALEN);
  1825. rc = mwl8k_post_cmd(hw, &cmd->header);
  1826. kfree(cmd);
  1827. return rc;
  1828. }
  1829. /*
  1830. * CMD_SET_RF_CHANNEL.
  1831. */
  1832. struct mwl8k_cmd_set_rf_channel {
  1833. struct mwl8k_cmd_pkt header;
  1834. __le16 action;
  1835. __u8 current_channel;
  1836. __le32 channel_flags;
  1837. } __packed;
  1838. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1839. struct ieee80211_conf *conf)
  1840. {
  1841. struct ieee80211_channel *channel = conf->channel;
  1842. struct mwl8k_cmd_set_rf_channel *cmd;
  1843. int rc;
  1844. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1845. if (cmd == NULL)
  1846. return -ENOMEM;
  1847. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1848. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1849. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1850. cmd->current_channel = channel->hw_value;
  1851. if (channel->band == IEEE80211_BAND_2GHZ)
  1852. cmd->channel_flags |= cpu_to_le32(0x00000001);
  1853. else if (channel->band == IEEE80211_BAND_5GHZ)
  1854. cmd->channel_flags |= cpu_to_le32(0x00000004);
  1855. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1856. conf->channel_type == NL80211_CHAN_HT20)
  1857. cmd->channel_flags |= cpu_to_le32(0x00000080);
  1858. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1859. cmd->channel_flags |= cpu_to_le32(0x000001900);
  1860. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1861. cmd->channel_flags |= cpu_to_le32(0x000000900);
  1862. rc = mwl8k_post_cmd(hw, &cmd->header);
  1863. kfree(cmd);
  1864. return rc;
  1865. }
  1866. /*
  1867. * CMD_SET_AID.
  1868. */
  1869. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1870. #define MWL8K_FRAME_PROT_11G 0x07
  1871. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1872. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1873. struct mwl8k_cmd_update_set_aid {
  1874. struct mwl8k_cmd_pkt header;
  1875. __le16 aid;
  1876. /* AP's MAC address (BSSID) */
  1877. __u8 bssid[ETH_ALEN];
  1878. __le16 protection_mode;
  1879. __u8 supp_rates[14];
  1880. } __packed;
  1881. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  1882. {
  1883. int i;
  1884. int j;
  1885. /*
  1886. * Clear nonstandard rates 4 and 13.
  1887. */
  1888. mask &= 0x1fef;
  1889. for (i = 0, j = 0; i < 14; i++) {
  1890. if (mask & (1 << i))
  1891. rates[j++] = mwl8k_rates_24[i].hw_value;
  1892. }
  1893. }
  1894. static int
  1895. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1896. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  1897. {
  1898. struct mwl8k_cmd_update_set_aid *cmd;
  1899. u16 prot_mode;
  1900. int rc;
  1901. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1902. if (cmd == NULL)
  1903. return -ENOMEM;
  1904. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1905. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1906. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  1907. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  1908. if (vif->bss_conf.use_cts_prot) {
  1909. prot_mode = MWL8K_FRAME_PROT_11G;
  1910. } else {
  1911. switch (vif->bss_conf.ht_operation_mode &
  1912. IEEE80211_HT_OP_MODE_PROTECTION) {
  1913. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1914. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1915. break;
  1916. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1917. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1918. break;
  1919. default:
  1920. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1921. break;
  1922. }
  1923. }
  1924. cmd->protection_mode = cpu_to_le16(prot_mode);
  1925. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  1926. rc = mwl8k_post_cmd(hw, &cmd->header);
  1927. kfree(cmd);
  1928. return rc;
  1929. }
  1930. /*
  1931. * CMD_SET_RATE.
  1932. */
  1933. struct mwl8k_cmd_set_rate {
  1934. struct mwl8k_cmd_pkt header;
  1935. __u8 legacy_rates[14];
  1936. /* Bitmap for supported MCS codes. */
  1937. __u8 mcs_set[16];
  1938. __u8 reserved[16];
  1939. } __packed;
  1940. static int
  1941. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1942. u32 legacy_rate_mask, u8 *mcs_rates)
  1943. {
  1944. struct mwl8k_cmd_set_rate *cmd;
  1945. int rc;
  1946. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1947. if (cmd == NULL)
  1948. return -ENOMEM;
  1949. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1950. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1951. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  1952. memcpy(cmd->mcs_set, mcs_rates, 16);
  1953. rc = mwl8k_post_cmd(hw, &cmd->header);
  1954. kfree(cmd);
  1955. return rc;
  1956. }
  1957. /*
  1958. * CMD_FINALIZE_JOIN.
  1959. */
  1960. #define MWL8K_FJ_BEACON_MAXLEN 128
  1961. struct mwl8k_cmd_finalize_join {
  1962. struct mwl8k_cmd_pkt header;
  1963. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1964. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1965. } __packed;
  1966. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  1967. int framelen, int dtim)
  1968. {
  1969. struct mwl8k_cmd_finalize_join *cmd;
  1970. struct ieee80211_mgmt *payload = frame;
  1971. int payload_len;
  1972. int rc;
  1973. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1974. if (cmd == NULL)
  1975. return -ENOMEM;
  1976. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1977. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1978. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  1979. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  1980. if (payload_len < 0)
  1981. payload_len = 0;
  1982. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1983. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  1984. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1985. rc = mwl8k_post_cmd(hw, &cmd->header);
  1986. kfree(cmd);
  1987. return rc;
  1988. }
  1989. /*
  1990. * CMD_SET_RTS_THRESHOLD.
  1991. */
  1992. struct mwl8k_cmd_set_rts_threshold {
  1993. struct mwl8k_cmd_pkt header;
  1994. __le16 action;
  1995. __le16 threshold;
  1996. } __packed;
  1997. static int
  1998. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  1999. {
  2000. struct mwl8k_cmd_set_rts_threshold *cmd;
  2001. int rc;
  2002. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2003. if (cmd == NULL)
  2004. return -ENOMEM;
  2005. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2006. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2007. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2008. cmd->threshold = cpu_to_le16(rts_thresh);
  2009. rc = mwl8k_post_cmd(hw, &cmd->header);
  2010. kfree(cmd);
  2011. return rc;
  2012. }
  2013. /*
  2014. * CMD_SET_SLOT.
  2015. */
  2016. struct mwl8k_cmd_set_slot {
  2017. struct mwl8k_cmd_pkt header;
  2018. __le16 action;
  2019. __u8 short_slot;
  2020. } __packed;
  2021. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2022. {
  2023. struct mwl8k_cmd_set_slot *cmd;
  2024. int rc;
  2025. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2026. if (cmd == NULL)
  2027. return -ENOMEM;
  2028. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2029. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2030. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2031. cmd->short_slot = short_slot_time;
  2032. rc = mwl8k_post_cmd(hw, &cmd->header);
  2033. kfree(cmd);
  2034. return rc;
  2035. }
  2036. /*
  2037. * CMD_SET_EDCA_PARAMS.
  2038. */
  2039. struct mwl8k_cmd_set_edca_params {
  2040. struct mwl8k_cmd_pkt header;
  2041. /* See MWL8K_SET_EDCA_XXX below */
  2042. __le16 action;
  2043. /* TX opportunity in units of 32 us */
  2044. __le16 txop;
  2045. union {
  2046. struct {
  2047. /* Log exponent of max contention period: 0...15 */
  2048. __le32 log_cw_max;
  2049. /* Log exponent of min contention period: 0...15 */
  2050. __le32 log_cw_min;
  2051. /* Adaptive interframe spacing in units of 32us */
  2052. __u8 aifs;
  2053. /* TX queue to configure */
  2054. __u8 txq;
  2055. } ap;
  2056. struct {
  2057. /* Log exponent of max contention period: 0...15 */
  2058. __u8 log_cw_max;
  2059. /* Log exponent of min contention period: 0...15 */
  2060. __u8 log_cw_min;
  2061. /* Adaptive interframe spacing in units of 32us */
  2062. __u8 aifs;
  2063. /* TX queue to configure */
  2064. __u8 txq;
  2065. } sta;
  2066. };
  2067. } __packed;
  2068. #define MWL8K_SET_EDCA_CW 0x01
  2069. #define MWL8K_SET_EDCA_TXOP 0x02
  2070. #define MWL8K_SET_EDCA_AIFS 0x04
  2071. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2072. MWL8K_SET_EDCA_TXOP | \
  2073. MWL8K_SET_EDCA_AIFS)
  2074. static int
  2075. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2076. __u16 cw_min, __u16 cw_max,
  2077. __u8 aifs, __u16 txop)
  2078. {
  2079. struct mwl8k_priv *priv = hw->priv;
  2080. struct mwl8k_cmd_set_edca_params *cmd;
  2081. int rc;
  2082. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2083. if (cmd == NULL)
  2084. return -ENOMEM;
  2085. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2086. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2087. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2088. cmd->txop = cpu_to_le16(txop);
  2089. if (priv->ap_fw) {
  2090. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2091. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2092. cmd->ap.aifs = aifs;
  2093. cmd->ap.txq = qnum;
  2094. } else {
  2095. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2096. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2097. cmd->sta.aifs = aifs;
  2098. cmd->sta.txq = qnum;
  2099. }
  2100. rc = mwl8k_post_cmd(hw, &cmd->header);
  2101. kfree(cmd);
  2102. return rc;
  2103. }
  2104. /*
  2105. * CMD_SET_WMM_MODE.
  2106. */
  2107. struct mwl8k_cmd_set_wmm_mode {
  2108. struct mwl8k_cmd_pkt header;
  2109. __le16 action;
  2110. } __packed;
  2111. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2112. {
  2113. struct mwl8k_priv *priv = hw->priv;
  2114. struct mwl8k_cmd_set_wmm_mode *cmd;
  2115. int rc;
  2116. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2117. if (cmd == NULL)
  2118. return -ENOMEM;
  2119. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2120. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2121. cmd->action = cpu_to_le16(!!enable);
  2122. rc = mwl8k_post_cmd(hw, &cmd->header);
  2123. kfree(cmd);
  2124. if (!rc)
  2125. priv->wmm_enabled = enable;
  2126. return rc;
  2127. }
  2128. /*
  2129. * CMD_MIMO_CONFIG.
  2130. */
  2131. struct mwl8k_cmd_mimo_config {
  2132. struct mwl8k_cmd_pkt header;
  2133. __le32 action;
  2134. __u8 rx_antenna_map;
  2135. __u8 tx_antenna_map;
  2136. } __packed;
  2137. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2138. {
  2139. struct mwl8k_cmd_mimo_config *cmd;
  2140. int rc;
  2141. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2142. if (cmd == NULL)
  2143. return -ENOMEM;
  2144. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2145. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2146. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2147. cmd->rx_antenna_map = rx;
  2148. cmd->tx_antenna_map = tx;
  2149. rc = mwl8k_post_cmd(hw, &cmd->header);
  2150. kfree(cmd);
  2151. return rc;
  2152. }
  2153. /*
  2154. * CMD_USE_FIXED_RATE (STA version).
  2155. */
  2156. struct mwl8k_cmd_use_fixed_rate_sta {
  2157. struct mwl8k_cmd_pkt header;
  2158. __le32 action;
  2159. __le32 allow_rate_drop;
  2160. __le32 num_rates;
  2161. struct {
  2162. __le32 is_ht_rate;
  2163. __le32 enable_retry;
  2164. __le32 rate;
  2165. __le32 retry_count;
  2166. } rate_entry[8];
  2167. __le32 rate_type;
  2168. __le32 reserved1;
  2169. __le32 reserved2;
  2170. } __packed;
  2171. #define MWL8K_USE_AUTO_RATE 0x0002
  2172. #define MWL8K_UCAST_RATE 0
  2173. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2174. {
  2175. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2176. int rc;
  2177. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2178. if (cmd == NULL)
  2179. return -ENOMEM;
  2180. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2181. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2182. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2183. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2184. rc = mwl8k_post_cmd(hw, &cmd->header);
  2185. kfree(cmd);
  2186. return rc;
  2187. }
  2188. /*
  2189. * CMD_USE_FIXED_RATE (AP version).
  2190. */
  2191. struct mwl8k_cmd_use_fixed_rate_ap {
  2192. struct mwl8k_cmd_pkt header;
  2193. __le32 action;
  2194. __le32 allow_rate_drop;
  2195. __le32 num_rates;
  2196. struct mwl8k_rate_entry_ap {
  2197. __le32 is_ht_rate;
  2198. __le32 enable_retry;
  2199. __le32 rate;
  2200. __le32 retry_count;
  2201. } rate_entry[4];
  2202. u8 multicast_rate;
  2203. u8 multicast_rate_type;
  2204. u8 management_rate;
  2205. } __packed;
  2206. static int
  2207. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2208. {
  2209. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2210. int rc;
  2211. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2212. if (cmd == NULL)
  2213. return -ENOMEM;
  2214. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2215. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2216. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2217. cmd->multicast_rate = mcast;
  2218. cmd->management_rate = mgmt;
  2219. rc = mwl8k_post_cmd(hw, &cmd->header);
  2220. kfree(cmd);
  2221. return rc;
  2222. }
  2223. /*
  2224. * CMD_ENABLE_SNIFFER.
  2225. */
  2226. struct mwl8k_cmd_enable_sniffer {
  2227. struct mwl8k_cmd_pkt header;
  2228. __le32 action;
  2229. } __packed;
  2230. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2231. {
  2232. struct mwl8k_cmd_enable_sniffer *cmd;
  2233. int rc;
  2234. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2235. if (cmd == NULL)
  2236. return -ENOMEM;
  2237. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2238. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2239. cmd->action = cpu_to_le32(!!enable);
  2240. rc = mwl8k_post_cmd(hw, &cmd->header);
  2241. kfree(cmd);
  2242. return rc;
  2243. }
  2244. /*
  2245. * CMD_SET_MAC_ADDR.
  2246. */
  2247. struct mwl8k_cmd_set_mac_addr {
  2248. struct mwl8k_cmd_pkt header;
  2249. union {
  2250. struct {
  2251. __le16 mac_type;
  2252. __u8 mac_addr[ETH_ALEN];
  2253. } mbss;
  2254. __u8 mac_addr[ETH_ALEN];
  2255. };
  2256. } __packed;
  2257. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2258. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2259. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2260. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2261. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2262. struct ieee80211_vif *vif, u8 *mac)
  2263. {
  2264. struct mwl8k_priv *priv = hw->priv;
  2265. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2266. struct mwl8k_cmd_set_mac_addr *cmd;
  2267. int mac_type;
  2268. int rc;
  2269. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2270. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2271. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2272. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2273. else
  2274. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2275. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2276. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2277. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2278. else
  2279. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2280. }
  2281. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2282. if (cmd == NULL)
  2283. return -ENOMEM;
  2284. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2285. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2286. if (priv->ap_fw) {
  2287. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2288. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2289. } else {
  2290. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2291. }
  2292. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2293. kfree(cmd);
  2294. return rc;
  2295. }
  2296. /*
  2297. * CMD_SET_RATEADAPT_MODE.
  2298. */
  2299. struct mwl8k_cmd_set_rate_adapt_mode {
  2300. struct mwl8k_cmd_pkt header;
  2301. __le16 action;
  2302. __le16 mode;
  2303. } __packed;
  2304. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2305. {
  2306. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2307. int rc;
  2308. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2309. if (cmd == NULL)
  2310. return -ENOMEM;
  2311. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2312. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2313. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2314. cmd->mode = cpu_to_le16(mode);
  2315. rc = mwl8k_post_cmd(hw, &cmd->header);
  2316. kfree(cmd);
  2317. return rc;
  2318. }
  2319. /*
  2320. * CMD_BSS_START.
  2321. */
  2322. struct mwl8k_cmd_bss_start {
  2323. struct mwl8k_cmd_pkt header;
  2324. __le32 enable;
  2325. } __packed;
  2326. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  2327. struct ieee80211_vif *vif, int enable)
  2328. {
  2329. struct mwl8k_cmd_bss_start *cmd;
  2330. int rc;
  2331. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2332. if (cmd == NULL)
  2333. return -ENOMEM;
  2334. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2335. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2336. cmd->enable = cpu_to_le32(enable);
  2337. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2338. kfree(cmd);
  2339. return rc;
  2340. }
  2341. /*
  2342. * CMD_SET_NEW_STN.
  2343. */
  2344. struct mwl8k_cmd_set_new_stn {
  2345. struct mwl8k_cmd_pkt header;
  2346. __le16 aid;
  2347. __u8 mac_addr[6];
  2348. __le16 stn_id;
  2349. __le16 action;
  2350. __le16 rsvd;
  2351. __le32 legacy_rates;
  2352. __u8 ht_rates[4];
  2353. __le16 cap_info;
  2354. __le16 ht_capabilities_info;
  2355. __u8 mac_ht_param_info;
  2356. __u8 rev;
  2357. __u8 control_channel;
  2358. __u8 add_channel;
  2359. __le16 op_mode;
  2360. __le16 stbc;
  2361. __u8 add_qos_info;
  2362. __u8 is_qos_sta;
  2363. __le32 fw_sta_ptr;
  2364. } __packed;
  2365. #define MWL8K_STA_ACTION_ADD 0
  2366. #define MWL8K_STA_ACTION_REMOVE 2
  2367. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  2368. struct ieee80211_vif *vif,
  2369. struct ieee80211_sta *sta)
  2370. {
  2371. struct mwl8k_cmd_set_new_stn *cmd;
  2372. u32 rates;
  2373. int rc;
  2374. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2375. if (cmd == NULL)
  2376. return -ENOMEM;
  2377. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2378. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2379. cmd->aid = cpu_to_le16(sta->aid);
  2380. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  2381. cmd->stn_id = cpu_to_le16(sta->aid);
  2382. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  2383. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2384. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2385. else
  2386. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2387. cmd->legacy_rates = cpu_to_le32(rates);
  2388. if (sta->ht_cap.ht_supported) {
  2389. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  2390. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  2391. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  2392. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  2393. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  2394. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  2395. ((sta->ht_cap.ampdu_density & 7) << 2);
  2396. cmd->is_qos_sta = 1;
  2397. }
  2398. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2399. kfree(cmd);
  2400. return rc;
  2401. }
  2402. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  2403. struct ieee80211_vif *vif)
  2404. {
  2405. struct mwl8k_cmd_set_new_stn *cmd;
  2406. int rc;
  2407. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2408. if (cmd == NULL)
  2409. return -ENOMEM;
  2410. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2411. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2412. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  2413. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2414. kfree(cmd);
  2415. return rc;
  2416. }
  2417. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  2418. struct ieee80211_vif *vif, u8 *addr)
  2419. {
  2420. struct mwl8k_cmd_set_new_stn *cmd;
  2421. int rc;
  2422. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2423. if (cmd == NULL)
  2424. return -ENOMEM;
  2425. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2426. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2427. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  2428. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  2429. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2430. kfree(cmd);
  2431. return rc;
  2432. }
  2433. /*
  2434. * CMD_UPDATE_STADB.
  2435. */
  2436. struct ewc_ht_info {
  2437. __le16 control1;
  2438. __le16 control2;
  2439. __le16 control3;
  2440. } __packed;
  2441. struct peer_capability_info {
  2442. /* Peer type - AP vs. STA. */
  2443. __u8 peer_type;
  2444. /* Basic 802.11 capabilities from assoc resp. */
  2445. __le16 basic_caps;
  2446. /* Set if peer supports 802.11n high throughput (HT). */
  2447. __u8 ht_support;
  2448. /* Valid if HT is supported. */
  2449. __le16 ht_caps;
  2450. __u8 extended_ht_caps;
  2451. struct ewc_ht_info ewc_info;
  2452. /* Legacy rate table. Intersection of our rates and peer rates. */
  2453. __u8 legacy_rates[12];
  2454. /* HT rate table. Intersection of our rates and peer rates. */
  2455. __u8 ht_rates[16];
  2456. __u8 pad[16];
  2457. /* If set, interoperability mode, no proprietary extensions. */
  2458. __u8 interop;
  2459. __u8 pad2;
  2460. __u8 station_id;
  2461. __le16 amsdu_enabled;
  2462. } __packed;
  2463. struct mwl8k_cmd_update_stadb {
  2464. struct mwl8k_cmd_pkt header;
  2465. /* See STADB_ACTION_TYPE */
  2466. __le32 action;
  2467. /* Peer MAC address */
  2468. __u8 peer_addr[ETH_ALEN];
  2469. __le32 reserved;
  2470. /* Peer info - valid during add/update. */
  2471. struct peer_capability_info peer_info;
  2472. } __packed;
  2473. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  2474. #define MWL8K_STA_DB_DEL_ENTRY 2
  2475. /* Peer Entry flags - used to define the type of the peer node */
  2476. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  2477. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  2478. struct ieee80211_vif *vif,
  2479. struct ieee80211_sta *sta)
  2480. {
  2481. struct mwl8k_cmd_update_stadb *cmd;
  2482. struct peer_capability_info *p;
  2483. u32 rates;
  2484. int rc;
  2485. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2486. if (cmd == NULL)
  2487. return -ENOMEM;
  2488. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2489. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2490. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  2491. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  2492. p = &cmd->peer_info;
  2493. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  2494. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  2495. p->ht_support = sta->ht_cap.ht_supported;
  2496. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  2497. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  2498. ((sta->ht_cap.ampdu_density & 7) << 2);
  2499. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2500. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2501. else
  2502. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2503. legacy_rate_mask_to_array(p->legacy_rates, rates);
  2504. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  2505. p->interop = 1;
  2506. p->amsdu_enabled = 0;
  2507. rc = mwl8k_post_cmd(hw, &cmd->header);
  2508. kfree(cmd);
  2509. return rc ? rc : p->station_id;
  2510. }
  2511. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  2512. struct ieee80211_vif *vif, u8 *addr)
  2513. {
  2514. struct mwl8k_cmd_update_stadb *cmd;
  2515. int rc;
  2516. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2517. if (cmd == NULL)
  2518. return -ENOMEM;
  2519. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2520. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2521. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  2522. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  2523. rc = mwl8k_post_cmd(hw, &cmd->header);
  2524. kfree(cmd);
  2525. return rc;
  2526. }
  2527. /*
  2528. * Interrupt handling.
  2529. */
  2530. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2531. {
  2532. struct ieee80211_hw *hw = dev_id;
  2533. struct mwl8k_priv *priv = hw->priv;
  2534. u32 status;
  2535. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2536. if (!status)
  2537. return IRQ_NONE;
  2538. if (status & MWL8K_A2H_INT_TX_DONE) {
  2539. status &= ~MWL8K_A2H_INT_TX_DONE;
  2540. tasklet_schedule(&priv->poll_tx_task);
  2541. }
  2542. if (status & MWL8K_A2H_INT_RX_READY) {
  2543. status &= ~MWL8K_A2H_INT_RX_READY;
  2544. tasklet_schedule(&priv->poll_rx_task);
  2545. }
  2546. if (status)
  2547. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2548. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2549. if (priv->hostcmd_wait != NULL)
  2550. complete(priv->hostcmd_wait);
  2551. }
  2552. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2553. if (!mutex_is_locked(&priv->fw_mutex) &&
  2554. priv->radio_on && priv->pending_tx_pkts)
  2555. mwl8k_tx_start(priv);
  2556. }
  2557. return IRQ_HANDLED;
  2558. }
  2559. static void mwl8k_tx_poll(unsigned long data)
  2560. {
  2561. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2562. struct mwl8k_priv *priv = hw->priv;
  2563. int limit;
  2564. int i;
  2565. limit = 32;
  2566. spin_lock_bh(&priv->tx_lock);
  2567. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2568. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  2569. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  2570. complete(priv->tx_wait);
  2571. priv->tx_wait = NULL;
  2572. }
  2573. spin_unlock_bh(&priv->tx_lock);
  2574. if (limit) {
  2575. writel(~MWL8K_A2H_INT_TX_DONE,
  2576. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2577. } else {
  2578. tasklet_schedule(&priv->poll_tx_task);
  2579. }
  2580. }
  2581. static void mwl8k_rx_poll(unsigned long data)
  2582. {
  2583. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2584. struct mwl8k_priv *priv = hw->priv;
  2585. int limit;
  2586. limit = 32;
  2587. limit -= rxq_process(hw, 0, limit);
  2588. limit -= rxq_refill(hw, 0, limit);
  2589. if (limit) {
  2590. writel(~MWL8K_A2H_INT_RX_READY,
  2591. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2592. } else {
  2593. tasklet_schedule(&priv->poll_rx_task);
  2594. }
  2595. }
  2596. /*
  2597. * Core driver operations.
  2598. */
  2599. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2600. {
  2601. struct mwl8k_priv *priv = hw->priv;
  2602. int index = skb_get_queue_mapping(skb);
  2603. int rc;
  2604. if (!priv->radio_on) {
  2605. wiphy_debug(hw->wiphy,
  2606. "dropped TX frame since radio disabled\n");
  2607. dev_kfree_skb(skb);
  2608. return NETDEV_TX_OK;
  2609. }
  2610. rc = mwl8k_txq_xmit(hw, index, skb);
  2611. return rc;
  2612. }
  2613. static int mwl8k_start(struct ieee80211_hw *hw)
  2614. {
  2615. struct mwl8k_priv *priv = hw->priv;
  2616. int rc;
  2617. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  2618. IRQF_SHARED, MWL8K_NAME, hw);
  2619. if (rc) {
  2620. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  2621. return -EIO;
  2622. }
  2623. /* Enable TX reclaim and RX tasklets. */
  2624. tasklet_enable(&priv->poll_tx_task);
  2625. tasklet_enable(&priv->poll_rx_task);
  2626. /* Enable interrupts */
  2627. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2628. rc = mwl8k_fw_lock(hw);
  2629. if (!rc) {
  2630. rc = mwl8k_cmd_radio_enable(hw);
  2631. if (!priv->ap_fw) {
  2632. if (!rc)
  2633. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  2634. if (!rc)
  2635. rc = mwl8k_cmd_set_pre_scan(hw);
  2636. if (!rc)
  2637. rc = mwl8k_cmd_set_post_scan(hw,
  2638. "\x00\x00\x00\x00\x00\x00");
  2639. }
  2640. if (!rc)
  2641. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  2642. if (!rc)
  2643. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  2644. mwl8k_fw_unlock(hw);
  2645. }
  2646. if (rc) {
  2647. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2648. free_irq(priv->pdev->irq, hw);
  2649. tasklet_disable(&priv->poll_tx_task);
  2650. tasklet_disable(&priv->poll_rx_task);
  2651. }
  2652. return rc;
  2653. }
  2654. static void mwl8k_stop(struct ieee80211_hw *hw)
  2655. {
  2656. struct mwl8k_priv *priv = hw->priv;
  2657. int i;
  2658. mwl8k_cmd_radio_disable(hw);
  2659. ieee80211_stop_queues(hw);
  2660. /* Disable interrupts */
  2661. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2662. free_irq(priv->pdev->irq, hw);
  2663. /* Stop finalize join worker */
  2664. cancel_work_sync(&priv->finalize_join_worker);
  2665. if (priv->beacon_skb != NULL)
  2666. dev_kfree_skb(priv->beacon_skb);
  2667. /* Stop TX reclaim and RX tasklets. */
  2668. tasklet_disable(&priv->poll_tx_task);
  2669. tasklet_disable(&priv->poll_rx_task);
  2670. /* Return all skbs to mac80211 */
  2671. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2672. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  2673. }
  2674. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2675. struct ieee80211_vif *vif)
  2676. {
  2677. struct mwl8k_priv *priv = hw->priv;
  2678. struct mwl8k_vif *mwl8k_vif;
  2679. u32 macids_supported;
  2680. int macid;
  2681. /*
  2682. * Reject interface creation if sniffer mode is active, as
  2683. * STA operation is mutually exclusive with hardware sniffer
  2684. * mode. (Sniffer mode is only used on STA firmware.)
  2685. */
  2686. if (priv->sniffer_enabled) {
  2687. wiphy_info(hw->wiphy,
  2688. "unable to create STA interface because sniffer mode is enabled\n");
  2689. return -EINVAL;
  2690. }
  2691. switch (vif->type) {
  2692. case NL80211_IFTYPE_AP:
  2693. macids_supported = priv->ap_macids_supported;
  2694. break;
  2695. case NL80211_IFTYPE_STATION:
  2696. macids_supported = priv->sta_macids_supported;
  2697. break;
  2698. default:
  2699. return -EINVAL;
  2700. }
  2701. macid = ffs(macids_supported & ~priv->macids_used);
  2702. if (!macid--)
  2703. return -EBUSY;
  2704. /* Setup driver private area. */
  2705. mwl8k_vif = MWL8K_VIF(vif);
  2706. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2707. mwl8k_vif->vif = vif;
  2708. mwl8k_vif->macid = macid;
  2709. mwl8k_vif->seqno = 0;
  2710. /* Set the mac address. */
  2711. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  2712. if (priv->ap_fw)
  2713. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  2714. priv->macids_used |= 1 << mwl8k_vif->macid;
  2715. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  2716. return 0;
  2717. }
  2718. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2719. struct ieee80211_vif *vif)
  2720. {
  2721. struct mwl8k_priv *priv = hw->priv;
  2722. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2723. if (priv->ap_fw)
  2724. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  2725. mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
  2726. priv->macids_used &= ~(1 << mwl8k_vif->macid);
  2727. list_del(&mwl8k_vif->list);
  2728. }
  2729. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2730. {
  2731. struct ieee80211_conf *conf = &hw->conf;
  2732. struct mwl8k_priv *priv = hw->priv;
  2733. int rc;
  2734. if (conf->flags & IEEE80211_CONF_IDLE) {
  2735. mwl8k_cmd_radio_disable(hw);
  2736. return 0;
  2737. }
  2738. rc = mwl8k_fw_lock(hw);
  2739. if (rc)
  2740. return rc;
  2741. rc = mwl8k_cmd_radio_enable(hw);
  2742. if (rc)
  2743. goto out;
  2744. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  2745. if (rc)
  2746. goto out;
  2747. if (conf->power_level > 18)
  2748. conf->power_level = 18;
  2749. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  2750. if (rc)
  2751. goto out;
  2752. if (priv->ap_fw) {
  2753. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
  2754. if (!rc)
  2755. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  2756. } else {
  2757. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  2758. }
  2759. out:
  2760. mwl8k_fw_unlock(hw);
  2761. return rc;
  2762. }
  2763. static void
  2764. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2765. struct ieee80211_bss_conf *info, u32 changed)
  2766. {
  2767. struct mwl8k_priv *priv = hw->priv;
  2768. u32 ap_legacy_rates;
  2769. u8 ap_mcs_rates[16];
  2770. int rc;
  2771. if (mwl8k_fw_lock(hw))
  2772. return;
  2773. /*
  2774. * No need to capture a beacon if we're no longer associated.
  2775. */
  2776. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  2777. priv->capture_beacon = false;
  2778. /*
  2779. * Get the AP's legacy and MCS rates.
  2780. */
  2781. if (vif->bss_conf.assoc) {
  2782. struct ieee80211_sta *ap;
  2783. rcu_read_lock();
  2784. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  2785. if (ap == NULL) {
  2786. rcu_read_unlock();
  2787. goto out;
  2788. }
  2789. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  2790. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  2791. } else {
  2792. ap_legacy_rates =
  2793. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2794. }
  2795. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  2796. rcu_read_unlock();
  2797. }
  2798. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  2799. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  2800. if (rc)
  2801. goto out;
  2802. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  2803. if (rc)
  2804. goto out;
  2805. }
  2806. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2807. rc = mwl8k_set_radio_preamble(hw,
  2808. vif->bss_conf.use_short_preamble);
  2809. if (rc)
  2810. goto out;
  2811. }
  2812. if (changed & BSS_CHANGED_ERP_SLOT) {
  2813. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  2814. if (rc)
  2815. goto out;
  2816. }
  2817. if (vif->bss_conf.assoc &&
  2818. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  2819. BSS_CHANGED_HT))) {
  2820. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  2821. if (rc)
  2822. goto out;
  2823. }
  2824. if (vif->bss_conf.assoc &&
  2825. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  2826. /*
  2827. * Finalize the join. Tell rx handler to process
  2828. * next beacon from our BSSID.
  2829. */
  2830. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  2831. priv->capture_beacon = true;
  2832. }
  2833. out:
  2834. mwl8k_fw_unlock(hw);
  2835. }
  2836. static void
  2837. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2838. struct ieee80211_bss_conf *info, u32 changed)
  2839. {
  2840. int rc;
  2841. if (mwl8k_fw_lock(hw))
  2842. return;
  2843. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2844. rc = mwl8k_set_radio_preamble(hw,
  2845. vif->bss_conf.use_short_preamble);
  2846. if (rc)
  2847. goto out;
  2848. }
  2849. if (changed & BSS_CHANGED_BASIC_RATES) {
  2850. int idx;
  2851. int rate;
  2852. /*
  2853. * Use lowest supported basic rate for multicasts
  2854. * and management frames (such as probe responses --
  2855. * beacons will always go out at 1 Mb/s).
  2856. */
  2857. idx = ffs(vif->bss_conf.basic_rates);
  2858. if (idx)
  2859. idx--;
  2860. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2861. rate = mwl8k_rates_24[idx].hw_value;
  2862. else
  2863. rate = mwl8k_rates_50[idx].hw_value;
  2864. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  2865. }
  2866. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  2867. struct sk_buff *skb;
  2868. skb = ieee80211_beacon_get(hw, vif);
  2869. if (skb != NULL) {
  2870. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  2871. kfree_skb(skb);
  2872. }
  2873. }
  2874. if (changed & BSS_CHANGED_BEACON_ENABLED)
  2875. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  2876. out:
  2877. mwl8k_fw_unlock(hw);
  2878. }
  2879. static void
  2880. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2881. struct ieee80211_bss_conf *info, u32 changed)
  2882. {
  2883. struct mwl8k_priv *priv = hw->priv;
  2884. if (!priv->ap_fw)
  2885. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  2886. else
  2887. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  2888. }
  2889. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2890. struct netdev_hw_addr_list *mc_list)
  2891. {
  2892. struct mwl8k_cmd_pkt *cmd;
  2893. /*
  2894. * Synthesize and return a command packet that programs the
  2895. * hardware multicast address filter. At this point we don't
  2896. * know whether FIF_ALLMULTI is being requested, but if it is,
  2897. * we'll end up throwing this packet away and creating a new
  2898. * one in mwl8k_configure_filter().
  2899. */
  2900. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  2901. return (unsigned long)cmd;
  2902. }
  2903. static int
  2904. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  2905. unsigned int changed_flags,
  2906. unsigned int *total_flags)
  2907. {
  2908. struct mwl8k_priv *priv = hw->priv;
  2909. /*
  2910. * Hardware sniffer mode is mutually exclusive with STA
  2911. * operation, so refuse to enable sniffer mode if a STA
  2912. * interface is active.
  2913. */
  2914. if (!list_empty(&priv->vif_list)) {
  2915. if (net_ratelimit())
  2916. wiphy_info(hw->wiphy,
  2917. "not enabling sniffer mode because STA interface is active\n");
  2918. return 0;
  2919. }
  2920. if (!priv->sniffer_enabled) {
  2921. if (mwl8k_cmd_enable_sniffer(hw, 1))
  2922. return 0;
  2923. priv->sniffer_enabled = true;
  2924. }
  2925. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  2926. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  2927. FIF_OTHER_BSS;
  2928. return 1;
  2929. }
  2930. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  2931. {
  2932. if (!list_empty(&priv->vif_list))
  2933. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  2934. return NULL;
  2935. }
  2936. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2937. unsigned int changed_flags,
  2938. unsigned int *total_flags,
  2939. u64 multicast)
  2940. {
  2941. struct mwl8k_priv *priv = hw->priv;
  2942. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  2943. /*
  2944. * AP firmware doesn't allow fine-grained control over
  2945. * the receive filter.
  2946. */
  2947. if (priv->ap_fw) {
  2948. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2949. kfree(cmd);
  2950. return;
  2951. }
  2952. /*
  2953. * Enable hardware sniffer mode if FIF_CONTROL or
  2954. * FIF_OTHER_BSS is requested.
  2955. */
  2956. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  2957. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  2958. kfree(cmd);
  2959. return;
  2960. }
  2961. /* Clear unsupported feature flags */
  2962. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2963. if (mwl8k_fw_lock(hw)) {
  2964. kfree(cmd);
  2965. return;
  2966. }
  2967. if (priv->sniffer_enabled) {
  2968. mwl8k_cmd_enable_sniffer(hw, 0);
  2969. priv->sniffer_enabled = false;
  2970. }
  2971. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2972. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  2973. /*
  2974. * Disable the BSS filter.
  2975. */
  2976. mwl8k_cmd_set_pre_scan(hw);
  2977. } else {
  2978. struct mwl8k_vif *mwl8k_vif;
  2979. const u8 *bssid;
  2980. /*
  2981. * Enable the BSS filter.
  2982. *
  2983. * If there is an active STA interface, use that
  2984. * interface's BSSID, otherwise use a dummy one
  2985. * (where the OUI part needs to be nonzero for
  2986. * the BSSID to be accepted by POST_SCAN).
  2987. */
  2988. mwl8k_vif = mwl8k_first_vif(priv);
  2989. if (mwl8k_vif != NULL)
  2990. bssid = mwl8k_vif->vif->bss_conf.bssid;
  2991. else
  2992. bssid = "\x01\x00\x00\x00\x00\x00";
  2993. mwl8k_cmd_set_post_scan(hw, bssid);
  2994. }
  2995. }
  2996. /*
  2997. * If FIF_ALLMULTI is being requested, throw away the command
  2998. * packet that ->prepare_multicast() built and replace it with
  2999. * a command packet that enables reception of all multicast
  3000. * packets.
  3001. */
  3002. if (*total_flags & FIF_ALLMULTI) {
  3003. kfree(cmd);
  3004. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  3005. }
  3006. if (cmd != NULL) {
  3007. mwl8k_post_cmd(hw, cmd);
  3008. kfree(cmd);
  3009. }
  3010. mwl8k_fw_unlock(hw);
  3011. }
  3012. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  3013. {
  3014. return mwl8k_cmd_set_rts_threshold(hw, value);
  3015. }
  3016. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  3017. struct ieee80211_vif *vif,
  3018. struct ieee80211_sta *sta)
  3019. {
  3020. struct mwl8k_priv *priv = hw->priv;
  3021. if (priv->ap_fw)
  3022. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  3023. else
  3024. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  3025. }
  3026. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  3027. struct ieee80211_vif *vif,
  3028. struct ieee80211_sta *sta)
  3029. {
  3030. struct mwl8k_priv *priv = hw->priv;
  3031. int ret;
  3032. if (!priv->ap_fw) {
  3033. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  3034. if (ret >= 0) {
  3035. MWL8K_STA(sta)->peer_id = ret;
  3036. return 0;
  3037. }
  3038. return ret;
  3039. }
  3040. return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  3041. }
  3042. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  3043. const struct ieee80211_tx_queue_params *params)
  3044. {
  3045. struct mwl8k_priv *priv = hw->priv;
  3046. int rc;
  3047. rc = mwl8k_fw_lock(hw);
  3048. if (!rc) {
  3049. if (!priv->wmm_enabled)
  3050. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  3051. if (!rc)
  3052. rc = mwl8k_cmd_set_edca_params(hw, queue,
  3053. params->cw_min,
  3054. params->cw_max,
  3055. params->aifs,
  3056. params->txop);
  3057. mwl8k_fw_unlock(hw);
  3058. }
  3059. return rc;
  3060. }
  3061. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  3062. struct ieee80211_low_level_stats *stats)
  3063. {
  3064. return mwl8k_cmd_get_stat(hw, stats);
  3065. }
  3066. static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
  3067. struct survey_info *survey)
  3068. {
  3069. struct mwl8k_priv *priv = hw->priv;
  3070. struct ieee80211_conf *conf = &hw->conf;
  3071. if (idx != 0)
  3072. return -ENOENT;
  3073. survey->channel = conf->channel;
  3074. survey->filled = SURVEY_INFO_NOISE_DBM;
  3075. survey->noise = priv->noise;
  3076. return 0;
  3077. }
  3078. static int
  3079. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3080. enum ieee80211_ampdu_mlme_action action,
  3081. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  3082. {
  3083. switch (action) {
  3084. case IEEE80211_AMPDU_RX_START:
  3085. case IEEE80211_AMPDU_RX_STOP:
  3086. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  3087. return -ENOTSUPP;
  3088. return 0;
  3089. default:
  3090. return -ENOTSUPP;
  3091. }
  3092. }
  3093. static const struct ieee80211_ops mwl8k_ops = {
  3094. .tx = mwl8k_tx,
  3095. .start = mwl8k_start,
  3096. .stop = mwl8k_stop,
  3097. .add_interface = mwl8k_add_interface,
  3098. .remove_interface = mwl8k_remove_interface,
  3099. .config = mwl8k_config,
  3100. .bss_info_changed = mwl8k_bss_info_changed,
  3101. .prepare_multicast = mwl8k_prepare_multicast,
  3102. .configure_filter = mwl8k_configure_filter,
  3103. .set_rts_threshold = mwl8k_set_rts_threshold,
  3104. .sta_add = mwl8k_sta_add,
  3105. .sta_remove = mwl8k_sta_remove,
  3106. .conf_tx = mwl8k_conf_tx,
  3107. .get_stats = mwl8k_get_stats,
  3108. .get_survey = mwl8k_get_survey,
  3109. .ampdu_action = mwl8k_ampdu_action,
  3110. };
  3111. static void mwl8k_finalize_join_worker(struct work_struct *work)
  3112. {
  3113. struct mwl8k_priv *priv =
  3114. container_of(work, struct mwl8k_priv, finalize_join_worker);
  3115. struct sk_buff *skb = priv->beacon_skb;
  3116. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  3117. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  3118. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  3119. mgmt->u.beacon.variable, len);
  3120. int dtim_period = 1;
  3121. if (tim && tim[1] >= 2)
  3122. dtim_period = tim[3];
  3123. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  3124. dev_kfree_skb(skb);
  3125. priv->beacon_skb = NULL;
  3126. }
  3127. enum {
  3128. MWL8363 = 0,
  3129. MWL8687,
  3130. MWL8366,
  3131. };
  3132. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  3133. [MWL8363] = {
  3134. .part_name = "88w8363",
  3135. .helper_image = "mwl8k/helper_8363.fw",
  3136. .fw_image = "mwl8k/fmimage_8363.fw",
  3137. },
  3138. [MWL8687] = {
  3139. .part_name = "88w8687",
  3140. .helper_image = "mwl8k/helper_8687.fw",
  3141. .fw_image = "mwl8k/fmimage_8687.fw",
  3142. },
  3143. [MWL8366] = {
  3144. .part_name = "88w8366",
  3145. .helper_image = "mwl8k/helper_8366.fw",
  3146. .fw_image = "mwl8k/fmimage_8366.fw",
  3147. .ap_rxd_ops = &rxd_8366_ap_ops,
  3148. },
  3149. };
  3150. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  3151. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  3152. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  3153. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  3154. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  3155. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  3156. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  3157. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  3158. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  3159. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  3160. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  3161. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  3162. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  3163. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  3164. { },
  3165. };
  3166. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  3167. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  3168. const struct pci_device_id *id)
  3169. {
  3170. static int printed_version = 0;
  3171. struct ieee80211_hw *hw;
  3172. struct mwl8k_priv *priv;
  3173. int rc;
  3174. int i;
  3175. if (!printed_version) {
  3176. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  3177. printed_version = 1;
  3178. }
  3179. rc = pci_enable_device(pdev);
  3180. if (rc) {
  3181. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  3182. MWL8K_NAME);
  3183. return rc;
  3184. }
  3185. rc = pci_request_regions(pdev, MWL8K_NAME);
  3186. if (rc) {
  3187. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  3188. MWL8K_NAME);
  3189. goto err_disable_device;
  3190. }
  3191. pci_set_master(pdev);
  3192. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  3193. if (hw == NULL) {
  3194. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  3195. rc = -ENOMEM;
  3196. goto err_free_reg;
  3197. }
  3198. SET_IEEE80211_DEV(hw, &pdev->dev);
  3199. pci_set_drvdata(pdev, hw);
  3200. priv = hw->priv;
  3201. priv->hw = hw;
  3202. priv->pdev = pdev;
  3203. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  3204. priv->sram = pci_iomap(pdev, 0, 0x10000);
  3205. if (priv->sram == NULL) {
  3206. wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
  3207. goto err_iounmap;
  3208. }
  3209. /*
  3210. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  3211. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  3212. */
  3213. priv->regs = pci_iomap(pdev, 1, 0x10000);
  3214. if (priv->regs == NULL) {
  3215. priv->regs = pci_iomap(pdev, 2, 0x10000);
  3216. if (priv->regs == NULL) {
  3217. wiphy_err(hw->wiphy, "Cannot map device registers\n");
  3218. goto err_iounmap;
  3219. }
  3220. }
  3221. /* Reset firmware and hardware */
  3222. mwl8k_hw_reset(priv);
  3223. /* Ask userland hotplug daemon for the device firmware */
  3224. rc = mwl8k_request_firmware(priv);
  3225. if (rc) {
  3226. wiphy_err(hw->wiphy, "Firmware files not found\n");
  3227. goto err_stop_firmware;
  3228. }
  3229. /* Load firmware into hardware */
  3230. rc = mwl8k_load_firmware(hw);
  3231. if (rc) {
  3232. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  3233. goto err_stop_firmware;
  3234. }
  3235. /* Reclaim memory once firmware is successfully loaded */
  3236. mwl8k_release_firmware(priv);
  3237. if (priv->ap_fw) {
  3238. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  3239. if (priv->rxd_ops == NULL) {
  3240. wiphy_err(hw->wiphy,
  3241. "Driver does not have AP firmware image support for this hardware\n");
  3242. goto err_stop_firmware;
  3243. }
  3244. } else {
  3245. priv->rxd_ops = &rxd_sta_ops;
  3246. }
  3247. priv->sniffer_enabled = false;
  3248. priv->wmm_enabled = false;
  3249. priv->pending_tx_pkts = 0;
  3250. /*
  3251. * Extra headroom is the size of the required DMA header
  3252. * minus the size of the smallest 802.11 frame (CTS frame).
  3253. */
  3254. hw->extra_tx_headroom =
  3255. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  3256. hw->channel_change_time = 10;
  3257. hw->queues = MWL8K_TX_QUEUES;
  3258. /* Set rssi values to dBm */
  3259. hw->flags |= IEEE80211_HW_SIGNAL_DBM;
  3260. hw->vif_data_size = sizeof(struct mwl8k_vif);
  3261. hw->sta_data_size = sizeof(struct mwl8k_sta);
  3262. priv->macids_used = 0;
  3263. INIT_LIST_HEAD(&priv->vif_list);
  3264. /* Set default radio state and preamble */
  3265. priv->radio_on = 0;
  3266. priv->radio_short_preamble = 0;
  3267. /* Finalize join worker */
  3268. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  3269. /* TX reclaim and RX tasklets. */
  3270. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  3271. tasklet_disable(&priv->poll_tx_task);
  3272. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  3273. tasklet_disable(&priv->poll_rx_task);
  3274. /* Power management cookie */
  3275. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  3276. if (priv->cookie == NULL)
  3277. goto err_stop_firmware;
  3278. rc = mwl8k_rxq_init(hw, 0);
  3279. if (rc)
  3280. goto err_free_cookie;
  3281. rxq_refill(hw, 0, INT_MAX);
  3282. mutex_init(&priv->fw_mutex);
  3283. priv->fw_mutex_owner = NULL;
  3284. priv->fw_mutex_depth = 0;
  3285. priv->hostcmd_wait = NULL;
  3286. spin_lock_init(&priv->tx_lock);
  3287. priv->tx_wait = NULL;
  3288. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3289. rc = mwl8k_txq_init(hw, i);
  3290. if (rc)
  3291. goto err_free_queues;
  3292. }
  3293. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3294. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3295. iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
  3296. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  3297. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3298. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3299. IRQF_SHARED, MWL8K_NAME, hw);
  3300. if (rc) {
  3301. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  3302. goto err_free_queues;
  3303. }
  3304. /*
  3305. * Temporarily enable interrupts. Initial firmware host
  3306. * commands use interrupts and avoid polling. Disable
  3307. * interrupts when done.
  3308. */
  3309. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3310. /* Get config data, mac addrs etc */
  3311. if (priv->ap_fw) {
  3312. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  3313. if (!rc)
  3314. rc = mwl8k_cmd_set_hw_spec(hw);
  3315. } else {
  3316. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  3317. }
  3318. if (rc) {
  3319. wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
  3320. goto err_free_irq;
  3321. }
  3322. hw->wiphy->interface_modes = 0;
  3323. if (priv->ap_macids_supported)
  3324. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  3325. if (priv->sta_macids_supported)
  3326. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  3327. /* Turn radio off */
  3328. rc = mwl8k_cmd_radio_disable(hw);
  3329. if (rc) {
  3330. wiphy_err(hw->wiphy, "Cannot disable\n");
  3331. goto err_free_irq;
  3332. }
  3333. /* Clear MAC address */
  3334. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  3335. if (rc) {
  3336. wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
  3337. goto err_free_irq;
  3338. }
  3339. /* Disable interrupts */
  3340. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3341. free_irq(priv->pdev->irq, hw);
  3342. rc = ieee80211_register_hw(hw);
  3343. if (rc) {
  3344. wiphy_err(hw->wiphy, "Cannot register device\n");
  3345. goto err_free_queues;
  3346. }
  3347. wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
  3348. priv->device_info->part_name,
  3349. priv->hw_rev, hw->wiphy->perm_addr,
  3350. priv->ap_fw ? "AP" : "STA",
  3351. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  3352. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  3353. return 0;
  3354. err_free_irq:
  3355. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3356. free_irq(priv->pdev->irq, hw);
  3357. err_free_queues:
  3358. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3359. mwl8k_txq_deinit(hw, i);
  3360. mwl8k_rxq_deinit(hw, 0);
  3361. err_free_cookie:
  3362. if (priv->cookie != NULL)
  3363. pci_free_consistent(priv->pdev, 4,
  3364. priv->cookie, priv->cookie_dma);
  3365. err_stop_firmware:
  3366. mwl8k_hw_reset(priv);
  3367. mwl8k_release_firmware(priv);
  3368. err_iounmap:
  3369. if (priv->regs != NULL)
  3370. pci_iounmap(pdev, priv->regs);
  3371. if (priv->sram != NULL)
  3372. pci_iounmap(pdev, priv->sram);
  3373. pci_set_drvdata(pdev, NULL);
  3374. ieee80211_free_hw(hw);
  3375. err_free_reg:
  3376. pci_release_regions(pdev);
  3377. err_disable_device:
  3378. pci_disable_device(pdev);
  3379. return rc;
  3380. }
  3381. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3382. {
  3383. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3384. }
  3385. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3386. {
  3387. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3388. struct mwl8k_priv *priv;
  3389. int i;
  3390. if (hw == NULL)
  3391. return;
  3392. priv = hw->priv;
  3393. ieee80211_stop_queues(hw);
  3394. ieee80211_unregister_hw(hw);
  3395. /* Remove TX reclaim and RX tasklets. */
  3396. tasklet_kill(&priv->poll_tx_task);
  3397. tasklet_kill(&priv->poll_rx_task);
  3398. /* Stop hardware */
  3399. mwl8k_hw_reset(priv);
  3400. /* Return all skbs to mac80211 */
  3401. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3402. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3403. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3404. mwl8k_txq_deinit(hw, i);
  3405. mwl8k_rxq_deinit(hw, 0);
  3406. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  3407. pci_iounmap(pdev, priv->regs);
  3408. pci_iounmap(pdev, priv->sram);
  3409. pci_set_drvdata(pdev, NULL);
  3410. ieee80211_free_hw(hw);
  3411. pci_release_regions(pdev);
  3412. pci_disable_device(pdev);
  3413. }
  3414. static struct pci_driver mwl8k_driver = {
  3415. .name = MWL8K_NAME,
  3416. .id_table = mwl8k_pci_id_table,
  3417. .probe = mwl8k_probe,
  3418. .remove = __devexit_p(mwl8k_remove),
  3419. .shutdown = __devexit_p(mwl8k_shutdown),
  3420. };
  3421. static int __init mwl8k_init(void)
  3422. {
  3423. return pci_register_driver(&mwl8k_driver);
  3424. }
  3425. static void __exit mwl8k_exit(void)
  3426. {
  3427. pci_unregister_driver(&mwl8k_driver);
  3428. }
  3429. module_init(mwl8k_init);
  3430. module_exit(mwl8k_exit);
  3431. MODULE_DESCRIPTION(MWL8K_DESC);
  3432. MODULE_VERSION(MWL8K_VERSION);
  3433. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  3434. MODULE_LICENSE("GPL");