fw.c 11 KB

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  1. /*
  2. * Intel Wireless Multicomm 3200 WiFi driver
  3. *
  4. * Copyright (C) 2009 Intel Corporation. All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * * Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * * Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in
  14. * the documentation and/or other materials provided with the
  15. * distribution.
  16. * * Neither the name of Intel Corporation nor the names of its
  17. * contributors may be used to endorse or promote products derived
  18. * from this software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. *
  32. *
  33. * Intel Corporation <ilw@linux.intel.com>
  34. * Samuel Ortiz <samuel.ortiz@intel.com>
  35. * Zhu Yi <yi.zhu@intel.com>
  36. *
  37. */
  38. #include <linux/kernel.h>
  39. #include <linux/firmware.h>
  40. #include "iwm.h"
  41. #include "bus.h"
  42. #include "hal.h"
  43. #include "umac.h"
  44. #include "debug.h"
  45. #include "fw.h"
  46. #include "commands.h"
  47. static const char fw_barker[] = "*WESTOPFORNOONE*";
  48. /*
  49. * @op_code: Op code we're looking for.
  50. * @index: There can be several instances of the same opcode within
  51. * the firmware. Index specifies which one we're looking for.
  52. */
  53. static int iwm_fw_op_offset(struct iwm_priv *iwm, const struct firmware *fw,
  54. u16 op_code, u32 index)
  55. {
  56. int offset = -EINVAL, fw_offset;
  57. u32 op_index = 0;
  58. const u8 *fw_ptr;
  59. struct iwm_fw_hdr_rec *rec;
  60. fw_offset = 0;
  61. fw_ptr = fw->data;
  62. /* We first need to look for the firmware barker */
  63. if (memcmp(fw_ptr, fw_barker, IWM_HDR_BARKER_LEN)) {
  64. IWM_ERR(iwm, "No barker string in this FW\n");
  65. return -EINVAL;
  66. }
  67. if (fw->size < IWM_HDR_LEN) {
  68. IWM_ERR(iwm, "FW is too small (%zu)\n", fw->size);
  69. return -EINVAL;
  70. }
  71. fw_offset += IWM_HDR_BARKER_LEN;
  72. while (fw_offset < fw->size) {
  73. rec = (struct iwm_fw_hdr_rec *)(fw_ptr + fw_offset);
  74. IWM_DBG_FW(iwm, DBG, "FW: op_code: 0x%x, len: %d @ 0x%x\n",
  75. rec->op_code, rec->len, fw_offset);
  76. if (rec->op_code == IWM_HDR_REC_OP_INVALID) {
  77. IWM_DBG_FW(iwm, DBG, "Reached INVALID op code\n");
  78. break;
  79. }
  80. if (rec->op_code == op_code) {
  81. if (op_index == index) {
  82. fw_offset += sizeof(struct iwm_fw_hdr_rec);
  83. offset = fw_offset;
  84. goto out;
  85. }
  86. op_index++;
  87. }
  88. fw_offset += sizeof(struct iwm_fw_hdr_rec) + rec->len;
  89. }
  90. out:
  91. return offset;
  92. }
  93. static int iwm_load_firmware_chunk(struct iwm_priv *iwm,
  94. const struct firmware *fw,
  95. struct iwm_fw_img_desc *img_desc)
  96. {
  97. struct iwm_udma_nonwifi_cmd target_cmd;
  98. u32 chunk_size;
  99. const u8 *chunk_ptr;
  100. int ret = 0;
  101. IWM_DBG_FW(iwm, INFO, "Loading FW chunk: %d bytes @ 0x%x\n",
  102. img_desc->length, img_desc->address);
  103. target_cmd.opcode = UMAC_HDI_OUT_OPCODE_WRITE;
  104. target_cmd.handle_by_hw = 1;
  105. target_cmd.op2 = 0;
  106. target_cmd.resp = 0;
  107. target_cmd.eop = 1;
  108. chunk_size = img_desc->length;
  109. chunk_ptr = fw->data + img_desc->offset;
  110. while (chunk_size > 0) {
  111. u32 tmp_chunk_size;
  112. tmp_chunk_size = min_t(u32, chunk_size,
  113. IWM_MAX_NONWIFI_CMD_BUFF_SIZE);
  114. target_cmd.addr = cpu_to_le32(img_desc->address +
  115. (chunk_ptr - fw->data - img_desc->offset));
  116. target_cmd.op1_sz = cpu_to_le32(tmp_chunk_size);
  117. IWM_DBG_FW(iwm, DBG, "\t%d bytes @ 0x%x\n",
  118. tmp_chunk_size, target_cmd.addr);
  119. ret = iwm_hal_send_target_cmd(iwm, &target_cmd, chunk_ptr);
  120. if (ret < 0) {
  121. IWM_ERR(iwm, "Couldn't load FW chunk\n");
  122. break;
  123. }
  124. chunk_size -= tmp_chunk_size;
  125. chunk_ptr += tmp_chunk_size;
  126. }
  127. return ret;
  128. }
  129. /*
  130. * To load a fw image to the target, we basically go through the
  131. * fw, looking for OP_MEM_DESC records. Once we found one, we
  132. * pass it to iwm_load_firmware_chunk().
  133. * The OP_MEM_DESC records contain the actuall memory chunk to be
  134. * sent, but also the destination address.
  135. */
  136. static int iwm_load_img(struct iwm_priv *iwm, const char *img_name)
  137. {
  138. const struct firmware *fw;
  139. struct iwm_fw_img_desc *img_desc;
  140. struct iwm_fw_img_ver *ver;
  141. int ret = 0, fw_offset;
  142. u32 opcode_idx = 0, build_date;
  143. char *build_tag;
  144. ret = request_firmware(&fw, img_name, iwm_to_dev(iwm));
  145. if (ret) {
  146. IWM_ERR(iwm, "Request firmware failed");
  147. return ret;
  148. }
  149. IWM_DBG_FW(iwm, INFO, "Start to load FW %s\n", img_name);
  150. while (1) {
  151. fw_offset = iwm_fw_op_offset(iwm, fw,
  152. IWM_HDR_REC_OP_MEM_DESC,
  153. opcode_idx);
  154. if (fw_offset < 0)
  155. break;
  156. img_desc = (struct iwm_fw_img_desc *)(fw->data + fw_offset);
  157. ret = iwm_load_firmware_chunk(iwm, fw, img_desc);
  158. if (ret < 0)
  159. goto err_release_fw;
  160. opcode_idx++;
  161. };
  162. /* Read firmware version */
  163. fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_SW_VER, 0);
  164. if (fw_offset < 0)
  165. goto err_release_fw;
  166. ver = (struct iwm_fw_img_ver *)(fw->data + fw_offset);
  167. /* Read build tag */
  168. fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_TAG, 0);
  169. if (fw_offset < 0)
  170. goto err_release_fw;
  171. build_tag = (char *)(fw->data + fw_offset);
  172. /* Read build date */
  173. fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_DATE, 0);
  174. if (fw_offset < 0)
  175. goto err_release_fw;
  176. build_date = *(u32 *)(fw->data + fw_offset);
  177. IWM_INFO(iwm, "%s:\n", img_name);
  178. IWM_INFO(iwm, "\tVersion: %02X.%02X\n", ver->major, ver->minor);
  179. IWM_INFO(iwm, "\tBuild tag: %s\n", build_tag);
  180. IWM_INFO(iwm, "\tBuild date: %x-%x-%x\n",
  181. IWM_BUILD_YEAR(build_date), IWM_BUILD_MONTH(build_date),
  182. IWM_BUILD_DAY(build_date));
  183. if (!strcmp(img_name, iwm->bus_ops->umac_name))
  184. sprintf(iwm->umac_version, "%02X.%02X",
  185. ver->major, ver->minor);
  186. if (!strcmp(img_name, iwm->bus_ops->lmac_name))
  187. sprintf(iwm->lmac_version, "%02X.%02X",
  188. ver->major, ver->minor);
  189. err_release_fw:
  190. release_firmware(fw);
  191. return ret;
  192. }
  193. static int iwm_load_umac(struct iwm_priv *iwm)
  194. {
  195. struct iwm_udma_nonwifi_cmd target_cmd;
  196. int ret;
  197. ret = iwm_load_img(iwm, iwm->bus_ops->umac_name);
  198. if (ret < 0)
  199. return ret;
  200. /* We've loaded the UMAC, we can tell the target to jump there */
  201. target_cmd.opcode = UMAC_HDI_OUT_OPCODE_JUMP;
  202. target_cmd.addr = cpu_to_le32(UMAC_MU_FW_INST_DATA_12_ADDR);
  203. target_cmd.op1_sz = 0;
  204. target_cmd.op2 = 0;
  205. target_cmd.handle_by_hw = 0;
  206. target_cmd.resp = 1 ;
  207. target_cmd.eop = 1;
  208. ret = iwm_hal_send_target_cmd(iwm, &target_cmd, NULL);
  209. if (ret < 0)
  210. IWM_ERR(iwm, "Couldn't send JMP command\n");
  211. return ret;
  212. }
  213. static int iwm_load_lmac(struct iwm_priv *iwm, const char *img_name)
  214. {
  215. int ret;
  216. ret = iwm_load_img(iwm, img_name);
  217. if (ret < 0)
  218. return ret;
  219. return iwm_send_umac_reset(iwm,
  220. cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_CLK_EN), 0);
  221. }
  222. static int iwm_init_calib(struct iwm_priv *iwm, unsigned long cfg_bitmap,
  223. unsigned long expected_bitmap, u8 rx_iq_cmd)
  224. {
  225. /* Read RX IQ calibration result from EEPROM */
  226. if (test_bit(rx_iq_cmd, &cfg_bitmap)) {
  227. iwm_store_rxiq_calib_result(iwm);
  228. set_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->calib_done_map);
  229. }
  230. iwm_send_prio_table(iwm);
  231. iwm_send_init_calib_cfg(iwm, cfg_bitmap);
  232. while (iwm->calib_done_map != expected_bitmap) {
  233. if (iwm_notif_handle(iwm, CALIBRATION_RES_NOTIFICATION,
  234. IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT)) {
  235. IWM_DBG_FW(iwm, DBG, "Initial calibration timeout\n");
  236. return -ETIMEDOUT;
  237. }
  238. IWM_DBG_FW(iwm, DBG, "Got calibration result. calib_done_map: "
  239. "0x%lx, expected calibrations: 0x%lx\n",
  240. iwm->calib_done_map, expected_bitmap);
  241. }
  242. return 0;
  243. }
  244. /*
  245. * We currently have to load 3 FWs:
  246. * 1) The UMAC (Upper MAC).
  247. * 2) The calibration LMAC (Lower MAC).
  248. * We then send the calibration init command, so that the device can
  249. * run a first calibration round.
  250. * 3) The operational LMAC, which replaces the calibration one when it's
  251. * done with the first calibration round.
  252. *
  253. * Once those 3 FWs have been loaded, we send the periodic calibration
  254. * command, and then the device is available for regular 802.11 operations.
  255. */
  256. int iwm_load_fw(struct iwm_priv *iwm)
  257. {
  258. unsigned long init_calib_map, periodic_calib_map;
  259. unsigned long expected_calib_map;
  260. int ret;
  261. /* We first start downloading the UMAC */
  262. ret = iwm_load_umac(iwm);
  263. if (ret < 0) {
  264. IWM_ERR(iwm, "UMAC loading failed\n");
  265. return ret;
  266. }
  267. /* Handle UMAC_ALIVE notification */
  268. ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_ALIVE, IWM_SRC_UMAC,
  269. WAIT_NOTIF_TIMEOUT);
  270. if (ret) {
  271. IWM_ERR(iwm, "Handle UMAC_ALIVE failed: %d\n", ret);
  272. return ret;
  273. }
  274. /* UMAC is alive, we can download the calibration LMAC */
  275. ret = iwm_load_lmac(iwm, iwm->bus_ops->calib_lmac_name);
  276. if (ret) {
  277. IWM_ERR(iwm, "Calibration LMAC loading failed\n");
  278. return ret;
  279. }
  280. /* Handle UMAC_INIT_COMPLETE notification */
  281. ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
  282. IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
  283. if (ret) {
  284. IWM_ERR(iwm, "Handle INIT_COMPLETE failed for calibration "
  285. "LMAC: %d\n", ret);
  286. return ret;
  287. }
  288. /* Read EEPROM data */
  289. ret = iwm_eeprom_init(iwm);
  290. if (ret < 0) {
  291. IWM_ERR(iwm, "Couldn't init eeprom array\n");
  292. return ret;
  293. }
  294. init_calib_map = iwm->conf.calib_map & IWM_CALIB_MAP_INIT_MSK;
  295. expected_calib_map = iwm->conf.expected_calib_map &
  296. IWM_CALIB_MAP_INIT_MSK;
  297. periodic_calib_map = IWM_CALIB_MAP_PER_LMAC(iwm->conf.calib_map);
  298. ret = iwm_init_calib(iwm, init_calib_map, expected_calib_map,
  299. CALIB_CFG_RX_IQ_IDX);
  300. if (ret < 0) {
  301. /* Let's try the old way */
  302. ret = iwm_init_calib(iwm, expected_calib_map,
  303. expected_calib_map,
  304. PHY_CALIBRATE_RX_IQ_CMD);
  305. if (ret < 0) {
  306. IWM_ERR(iwm, "Calibration result timeout\n");
  307. goto out;
  308. }
  309. }
  310. /* Handle LMAC CALIBRATION_COMPLETE notification */
  311. ret = iwm_notif_handle(iwm, CALIBRATION_COMPLETE_NOTIFICATION,
  312. IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT);
  313. if (ret) {
  314. IWM_ERR(iwm, "Wait for CALIBRATION_COMPLETE timeout\n");
  315. goto out;
  316. }
  317. IWM_INFO(iwm, "LMAC calibration done: 0x%lx\n", iwm->calib_done_map);
  318. iwm_send_umac_reset(iwm, cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_RESET), 1);
  319. ret = iwm_notif_handle(iwm, UMAC_CMD_OPCODE_RESET, IWM_SRC_UMAC,
  320. WAIT_NOTIF_TIMEOUT);
  321. if (ret) {
  322. IWM_ERR(iwm, "Wait for UMAC RESET timeout\n");
  323. goto out;
  324. }
  325. /* Download the operational LMAC */
  326. ret = iwm_load_lmac(iwm, iwm->bus_ops->lmac_name);
  327. if (ret) {
  328. IWM_ERR(iwm, "LMAC loading failed\n");
  329. goto out;
  330. }
  331. ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
  332. IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
  333. if (ret) {
  334. IWM_ERR(iwm, "Handle INIT_COMPLETE failed for LMAC: %d\n", ret);
  335. goto out;
  336. }
  337. iwm_send_prio_table(iwm);
  338. iwm_send_calib_results(iwm);
  339. iwm_send_periodic_calib_cfg(iwm, periodic_calib_map);
  340. iwm_send_ct_kill_cfg(iwm, iwm->conf.ct_kill_entry,
  341. iwm->conf.ct_kill_exit);
  342. return 0;
  343. out:
  344. iwm_eeprom_exit(iwm);
  345. return ret;
  346. }