iwl-rx.c 9.9 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/etherdevice.h>
  30. #include <linux/slab.h>
  31. #include <net/mac80211.h>
  32. #include <asm/unaligned.h>
  33. #include "iwl-eeprom.h"
  34. #include "iwl-dev.h"
  35. #include "iwl-core.h"
  36. #include "iwl-sta.h"
  37. #include "iwl-io.h"
  38. #include "iwl-calib.h"
  39. #include "iwl-helpers.h"
  40. /************************** RX-FUNCTIONS ****************************/
  41. /*
  42. * Rx theory of operation
  43. *
  44. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  45. * each of which point to Receive Buffers to be filled by the NIC. These get
  46. * used not only for Rx frames, but for any command response or notification
  47. * from the NIC. The driver and NIC manage the Rx buffers by means
  48. * of indexes into the circular buffer.
  49. *
  50. * Rx Queue Indexes
  51. * The host/firmware share two index registers for managing the Rx buffers.
  52. *
  53. * The READ index maps to the first position that the firmware may be writing
  54. * to -- the driver can read up to (but not including) this position and get
  55. * good data.
  56. * The READ index is managed by the firmware once the card is enabled.
  57. *
  58. * The WRITE index maps to the last position the driver has read from -- the
  59. * position preceding WRITE is the last slot the firmware can place a packet.
  60. *
  61. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  62. * WRITE = READ.
  63. *
  64. * During initialization, the host sets up the READ queue position to the first
  65. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  66. *
  67. * When the firmware places a packet in a buffer, it will advance the READ index
  68. * and fire the RX interrupt. The driver can then query the READ index and
  69. * process as many packets as possible, moving the WRITE index forward as it
  70. * resets the Rx queue buffers with new memory.
  71. *
  72. * The management in the driver is as follows:
  73. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  74. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  75. * to replenish the iwl->rxq->rx_free.
  76. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  77. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  78. * 'processed' and 'read' driver indexes as well)
  79. * + A received packet is processed and handed to the kernel network stack,
  80. * detached from the iwl->rxq. The driver 'processed' index is updated.
  81. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  82. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  83. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  84. * were enough free buffers and RX_STALLED is set it is cleared.
  85. *
  86. *
  87. * Driver sequence:
  88. *
  89. * iwl_rx_queue_alloc() Allocates rx_free
  90. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  91. * iwl_rx_queue_restock
  92. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  93. * queue, updates firmware pointers, and updates
  94. * the WRITE index. If insufficient rx_free buffers
  95. * are available, schedules iwl_rx_replenish
  96. *
  97. * -- enable interrupts --
  98. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  99. * READ INDEX, detaching the SKB from the pool.
  100. * Moves the packet buffer from queue to rx_used.
  101. * Calls iwl_rx_queue_restock to refill any empty
  102. * slots.
  103. * ...
  104. *
  105. */
  106. /**
  107. * iwl_rx_queue_space - Return number of free slots available in queue.
  108. */
  109. int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  110. {
  111. int s = q->read - q->write;
  112. if (s <= 0)
  113. s += RX_QUEUE_SIZE;
  114. /* keep some buffer to not confuse full and empty queue */
  115. s -= 2;
  116. if (s < 0)
  117. s = 0;
  118. return s;
  119. }
  120. EXPORT_SYMBOL(iwl_rx_queue_space);
  121. /**
  122. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  123. */
  124. void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  125. {
  126. unsigned long flags;
  127. u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
  128. u32 reg;
  129. spin_lock_irqsave(&q->lock, flags);
  130. if (q->need_update == 0)
  131. goto exit_unlock;
  132. /* If power-saving is in use, make sure device is awake */
  133. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  134. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  135. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  136. IWL_DEBUG_INFO(priv, "Rx queue requesting wakeup, GP1 = 0x%x\n",
  137. reg);
  138. iwl_set_bit(priv, CSR_GP_CNTRL,
  139. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  140. goto exit_unlock;
  141. }
  142. q->write_actual = (q->write & ~0x7);
  143. iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
  144. /* Else device is assumed to be awake */
  145. } else {
  146. /* Device expects a multiple of 8 */
  147. q->write_actual = (q->write & ~0x7);
  148. iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
  149. }
  150. q->need_update = 0;
  151. exit_unlock:
  152. spin_unlock_irqrestore(&q->lock, flags);
  153. }
  154. EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
  155. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  156. {
  157. struct iwl_rx_queue *rxq = &priv->rxq;
  158. struct device *dev = &priv->pci_dev->dev;
  159. int i;
  160. spin_lock_init(&rxq->lock);
  161. INIT_LIST_HEAD(&rxq->rx_free);
  162. INIT_LIST_HEAD(&rxq->rx_used);
  163. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  164. rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
  165. GFP_KERNEL);
  166. if (!rxq->bd)
  167. goto err_bd;
  168. rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status),
  169. &rxq->rb_stts_dma, GFP_KERNEL);
  170. if (!rxq->rb_stts)
  171. goto err_rb;
  172. /* Fill the rx_used queue with _all_ of the Rx buffers */
  173. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  174. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  175. /* Set us so that we have processed and used all buffers, but have
  176. * not restocked the Rx queue with fresh buffers */
  177. rxq->read = rxq->write = 0;
  178. rxq->write_actual = 0;
  179. rxq->free_count = 0;
  180. rxq->need_update = 0;
  181. return 0;
  182. err_rb:
  183. dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  184. rxq->bd_dma);
  185. err_bd:
  186. return -ENOMEM;
  187. }
  188. EXPORT_SYMBOL(iwl_rx_queue_alloc);
  189. void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
  190. struct iwl_rx_mem_buffer *rxb)
  191. {
  192. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  193. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  194. if (!report->state) {
  195. IWL_DEBUG_11H(priv,
  196. "Spectrum Measure Notification: Start\n");
  197. return;
  198. }
  199. memcpy(&priv->measure_report, report, sizeof(*report));
  200. priv->measurement_status |= MEASUREMENT_READY;
  201. }
  202. EXPORT_SYMBOL(iwl_rx_spectrum_measure_notif);
  203. void iwl_recover_from_statistics(struct iwl_priv *priv,
  204. struct iwl_rx_packet *pkt)
  205. {
  206. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  207. return;
  208. if (iwl_is_any_associated(priv)) {
  209. if (priv->cfg->ops->lib->check_ack_health) {
  210. if (!priv->cfg->ops->lib->check_ack_health(
  211. priv, pkt)) {
  212. /*
  213. * low ack count detected
  214. * restart Firmware
  215. */
  216. IWL_ERR(priv, "low ack count detected, "
  217. "restart firmware\n");
  218. if (!iwl_force_reset(priv, IWL_FW_RESET, false))
  219. return;
  220. }
  221. }
  222. if (priv->cfg->ops->lib->check_plcp_health) {
  223. if (!priv->cfg->ops->lib->check_plcp_health(
  224. priv, pkt)) {
  225. /*
  226. * high plcp error detected
  227. * reset Radio
  228. */
  229. iwl_force_reset(priv, IWL_RF_RESET, false);
  230. }
  231. }
  232. }
  233. }
  234. EXPORT_SYMBOL(iwl_recover_from_statistics);
  235. /*
  236. * returns non-zero if packet should be dropped
  237. */
  238. int iwl_set_decrypted_flag(struct iwl_priv *priv,
  239. struct ieee80211_hdr *hdr,
  240. u32 decrypt_res,
  241. struct ieee80211_rx_status *stats)
  242. {
  243. u16 fc = le16_to_cpu(hdr->frame_control);
  244. /*
  245. * All contexts have the same setting here due to it being
  246. * a module parameter, so OK to check any context.
  247. */
  248. if (priv->contexts[IWL_RXON_CTX_BSS].active.filter_flags &
  249. RXON_FILTER_DIS_DECRYPT_MSK)
  250. return 0;
  251. if (!(fc & IEEE80211_FCTL_PROTECTED))
  252. return 0;
  253. IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
  254. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  255. case RX_RES_STATUS_SEC_TYPE_TKIP:
  256. /* The uCode has got a bad phase 1 Key, pushes the packet.
  257. * Decryption will be done in SW. */
  258. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  259. RX_RES_STATUS_BAD_KEY_TTAK)
  260. break;
  261. case RX_RES_STATUS_SEC_TYPE_WEP:
  262. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  263. RX_RES_STATUS_BAD_ICV_MIC) {
  264. /* bad ICV, the packet is destroyed since the
  265. * decryption is inplace, drop it */
  266. IWL_DEBUG_RX(priv, "Packet destroyed\n");
  267. return -1;
  268. }
  269. case RX_RES_STATUS_SEC_TYPE_CCMP:
  270. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  271. RX_RES_STATUS_DECRYPT_OK) {
  272. IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
  273. stats->flag |= RX_FLAG_DECRYPTED;
  274. }
  275. break;
  276. default:
  277. break;
  278. }
  279. return 0;
  280. }
  281. EXPORT_SYMBOL(iwl_set_decrypted_flag);