iwl-power.c 11 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/slab.h>
  31. #include <linux/init.h>
  32. #include <net/mac80211.h>
  33. #include "iwl-eeprom.h"
  34. #include "iwl-dev.h"
  35. #include "iwl-core.h"
  36. #include "iwl-io.h"
  37. #include "iwl-commands.h"
  38. #include "iwl-debug.h"
  39. #include "iwl-power.h"
  40. /*
  41. * Setting power level allows the card to go to sleep when not busy.
  42. *
  43. * We calculate a sleep command based on the required latency, which
  44. * we get from mac80211. In order to handle thermal throttling, we can
  45. * also use pre-defined power levels.
  46. */
  47. /*
  48. * For now, keep using power level 1 instead of automatically
  49. * adjusting ...
  50. */
  51. bool no_sleep_autoadjust = true;
  52. module_param(no_sleep_autoadjust, bool, S_IRUGO);
  53. MODULE_PARM_DESC(no_sleep_autoadjust,
  54. "don't automatically adjust sleep level "
  55. "according to maximum network latency");
  56. /*
  57. * This defines the old power levels. They are still used by default
  58. * (level 1) and for thermal throttle (levels 3 through 5)
  59. */
  60. struct iwl_power_vec_entry {
  61. struct iwl_powertable_cmd cmd;
  62. u8 no_dtim; /* number of skip dtim */
  63. };
  64. #define IWL_DTIM_RANGE_0_MAX 2
  65. #define IWL_DTIM_RANGE_1_MAX 10
  66. #define NOSLP cpu_to_le16(0), 0, 0
  67. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  68. #define TU_TO_USEC 1024
  69. #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC)
  70. #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
  71. cpu_to_le32(X1), \
  72. cpu_to_le32(X2), \
  73. cpu_to_le32(X3), \
  74. cpu_to_le32(X4)}
  75. /* default power management (not Tx power) table values */
  76. /* for DTIM period 0 through IWL_DTIM_RANGE_0_MAX */
  77. /* DTIM 0 - 2 */
  78. static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = {
  79. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 1, 2, 2, 0xFF)}, 0},
  80. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
  81. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0},
  82. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1},
  83. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 2, 4, 6, 0xFF)}, 2}
  84. };
  85. /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
  86. /* DTIM 3 - 10 */
  87. static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = {
  88. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  89. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0},
  90. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0},
  91. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1},
  92. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 6, 10, 10)}, 2}
  93. };
  94. /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
  95. /* DTIM 11 - */
  96. static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = {
  97. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  98. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  99. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  100. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  101. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  102. };
  103. static void iwl_static_sleep_cmd(struct iwl_priv *priv,
  104. struct iwl_powertable_cmd *cmd,
  105. enum iwl_power_level lvl, int period)
  106. {
  107. const struct iwl_power_vec_entry *table;
  108. int max_sleep[IWL_POWER_VEC_SIZE] = { 0 };
  109. int i;
  110. u8 skip;
  111. u32 slp_itrvl;
  112. table = range_2;
  113. if (period <= IWL_DTIM_RANGE_1_MAX)
  114. table = range_1;
  115. if (period <= IWL_DTIM_RANGE_0_MAX)
  116. table = range_0;
  117. BUG_ON(lvl < 0 || lvl >= IWL_POWER_NUM);
  118. *cmd = table[lvl].cmd;
  119. if (period == 0) {
  120. skip = 0;
  121. period = 1;
  122. for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
  123. max_sleep[i] = 1;
  124. } else {
  125. skip = table[lvl].no_dtim;
  126. for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
  127. max_sleep[i] = le32_to_cpu(cmd->sleep_interval[i]);
  128. max_sleep[IWL_POWER_VEC_SIZE - 1] = skip + 1;
  129. }
  130. slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
  131. /* figure out the listen interval based on dtim period and skip */
  132. if (slp_itrvl == 0xFF)
  133. cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
  134. cpu_to_le32(period * (skip + 1));
  135. slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
  136. if (slp_itrvl > period)
  137. cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
  138. cpu_to_le32((slp_itrvl / period) * period);
  139. if (skip)
  140. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  141. else
  142. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  143. slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
  144. if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL)
  145. cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
  146. cpu_to_le32(IWL_CONN_MAX_LISTEN_INTERVAL);
  147. /* enforce max sleep interval */
  148. for (i = IWL_POWER_VEC_SIZE - 1; i >= 0 ; i--) {
  149. if (le32_to_cpu(cmd->sleep_interval[i]) >
  150. (max_sleep[i] * period))
  151. cmd->sleep_interval[i] =
  152. cpu_to_le32(max_sleep[i] * period);
  153. if (i != (IWL_POWER_VEC_SIZE - 1)) {
  154. if (le32_to_cpu(cmd->sleep_interval[i]) >
  155. le32_to_cpu(cmd->sleep_interval[i+1]))
  156. cmd->sleep_interval[i] =
  157. cmd->sleep_interval[i+1];
  158. }
  159. }
  160. if (priv->power_data.pci_pm)
  161. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  162. else
  163. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  164. IWL_DEBUG_POWER(priv, "numSkipDtim = %u, dtimPeriod = %d\n",
  165. skip, period);
  166. IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1);
  167. }
  168. static void iwl_power_sleep_cam_cmd(struct iwl_priv *priv,
  169. struct iwl_powertable_cmd *cmd)
  170. {
  171. memset(cmd, 0, sizeof(*cmd));
  172. if (priv->power_data.pci_pm)
  173. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  174. IWL_DEBUG_POWER(priv, "Sleep command for CAM\n");
  175. }
  176. static void iwl_power_fill_sleep_cmd(struct iwl_priv *priv,
  177. struct iwl_powertable_cmd *cmd,
  178. int dynps_ms, int wakeup_period)
  179. {
  180. /*
  181. * These are the original power level 3 sleep successions. The
  182. * device may behave better with such succession and was also
  183. * only tested with that. Just like the original sleep commands,
  184. * also adjust the succession here to the wakeup_period below.
  185. * The ranges are the same as for the sleep commands, 0-2, 3-9
  186. * and >10, which is selected based on the DTIM interval for
  187. * the sleep index but here we use the wakeup period since that
  188. * is what we need to do for the latency requirements.
  189. */
  190. static const u8 slp_succ_r0[IWL_POWER_VEC_SIZE] = { 2, 2, 2, 2, 2 };
  191. static const u8 slp_succ_r1[IWL_POWER_VEC_SIZE] = { 2, 4, 6, 7, 9 };
  192. static const u8 slp_succ_r2[IWL_POWER_VEC_SIZE] = { 2, 7, 9, 9, 0xFF };
  193. const u8 *slp_succ = slp_succ_r0;
  194. int i;
  195. if (wakeup_period > IWL_DTIM_RANGE_0_MAX)
  196. slp_succ = slp_succ_r1;
  197. if (wakeup_period > IWL_DTIM_RANGE_1_MAX)
  198. slp_succ = slp_succ_r2;
  199. memset(cmd, 0, sizeof(*cmd));
  200. cmd->flags = IWL_POWER_DRIVER_ALLOW_SLEEP_MSK |
  201. IWL_POWER_FAST_PD; /* no use seeing frames for others */
  202. if (priv->power_data.pci_pm)
  203. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  204. cmd->rx_data_timeout = cpu_to_le32(1000 * dynps_ms);
  205. cmd->tx_data_timeout = cpu_to_le32(1000 * dynps_ms);
  206. for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
  207. cmd->sleep_interval[i] =
  208. cpu_to_le32(min_t(int, slp_succ[i], wakeup_period));
  209. IWL_DEBUG_POWER(priv, "Automatic sleep command\n");
  210. }
  211. static int iwl_set_power(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd)
  212. {
  213. IWL_DEBUG_POWER(priv, "Sending power/sleep command\n");
  214. IWL_DEBUG_POWER(priv, "Flags value = 0x%08X\n", cmd->flags);
  215. IWL_DEBUG_POWER(priv, "Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  216. IWL_DEBUG_POWER(priv, "Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  217. IWL_DEBUG_POWER(priv, "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  218. le32_to_cpu(cmd->sleep_interval[0]),
  219. le32_to_cpu(cmd->sleep_interval[1]),
  220. le32_to_cpu(cmd->sleep_interval[2]),
  221. le32_to_cpu(cmd->sleep_interval[3]),
  222. le32_to_cpu(cmd->sleep_interval[4]));
  223. return iwl_send_cmd_pdu(priv, POWER_TABLE_CMD,
  224. sizeof(struct iwl_powertable_cmd), cmd);
  225. }
  226. /* priv->mutex must be held */
  227. int iwl_power_update_mode(struct iwl_priv *priv, bool force)
  228. {
  229. int ret = 0;
  230. bool enabled = priv->hw->conf.flags & IEEE80211_CONF_PS;
  231. bool update_chains;
  232. struct iwl_powertable_cmd cmd;
  233. int dtimper;
  234. /* Don't update the RX chain when chain noise calibration is running */
  235. update_chains = priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE ||
  236. priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE;
  237. dtimper = priv->hw->conf.ps_dtim_period ?: 1;
  238. if (priv->cfg->base_params->broken_powersave)
  239. iwl_power_sleep_cam_cmd(priv, &cmd);
  240. else if (priv->cfg->base_params->supports_idle &&
  241. priv->hw->conf.flags & IEEE80211_CONF_IDLE)
  242. iwl_static_sleep_cmd(priv, &cmd, IWL_POWER_INDEX_5, 20);
  243. else if (priv->cfg->ops->lib->tt_ops.lower_power_detection &&
  244. priv->cfg->ops->lib->tt_ops.tt_power_mode &&
  245. priv->cfg->ops->lib->tt_ops.lower_power_detection(priv)) {
  246. /* in thermal throttling low power state */
  247. iwl_static_sleep_cmd(priv, &cmd,
  248. priv->cfg->ops->lib->tt_ops.tt_power_mode(priv), dtimper);
  249. } else if (!enabled)
  250. iwl_power_sleep_cam_cmd(priv, &cmd);
  251. else if (priv->power_data.debug_sleep_level_override >= 0)
  252. iwl_static_sleep_cmd(priv, &cmd,
  253. priv->power_data.debug_sleep_level_override,
  254. dtimper);
  255. else if (no_sleep_autoadjust)
  256. iwl_static_sleep_cmd(priv, &cmd, IWL_POWER_INDEX_1, dtimper);
  257. else
  258. iwl_power_fill_sleep_cmd(priv, &cmd,
  259. priv->hw->conf.dynamic_ps_timeout,
  260. priv->hw->conf.max_sleep_period);
  261. if (iwl_is_ready_rf(priv) &&
  262. (memcmp(&priv->power_data.sleep_cmd, &cmd, sizeof(cmd)) || force)) {
  263. if (cmd.flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK)
  264. set_bit(STATUS_POWER_PMI, &priv->status);
  265. ret = iwl_set_power(priv, &cmd);
  266. if (!ret) {
  267. if (!(cmd.flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK))
  268. clear_bit(STATUS_POWER_PMI, &priv->status);
  269. if (priv->cfg->ops->lib->update_chain_flags &&
  270. update_chains)
  271. priv->cfg->ops->lib->update_chain_flags(priv);
  272. else if (priv->cfg->ops->lib->update_chain_flags)
  273. IWL_DEBUG_POWER(priv,
  274. "Cannot update the power, chain noise "
  275. "calibration running: %d\n",
  276. priv->chain_noise_data.state);
  277. memcpy(&priv->power_data.sleep_cmd, &cmd, sizeof(cmd));
  278. } else
  279. IWL_ERR(priv, "set power fail, ret = %d", ret);
  280. }
  281. return ret;
  282. }
  283. EXPORT_SYMBOL(iwl_power_update_mode);
  284. /* initialize to default */
  285. void iwl_power_initialize(struct iwl_priv *priv)
  286. {
  287. u16 lctl = iwl_pcie_link_ctl(priv);
  288. priv->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
  289. priv->power_data.debug_sleep_level_override = -1;
  290. memset(&priv->power_data.sleep_cmd, 0,
  291. sizeof(priv->power_data.sleep_cmd));
  292. }
  293. EXPORT_SYMBOL(iwl_power_initialize);