calib.c 11 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "hw.h"
  17. #include "hw-ops.h"
  18. /* Common calibration code */
  19. #define ATH9K_NF_TOO_HIGH -60
  20. static int16_t ath9k_hw_get_nf_hist_mid(int16_t *nfCalBuffer)
  21. {
  22. int16_t nfval;
  23. int16_t sort[ATH9K_NF_CAL_HIST_MAX];
  24. int i, j;
  25. for (i = 0; i < ATH9K_NF_CAL_HIST_MAX; i++)
  26. sort[i] = nfCalBuffer[i];
  27. for (i = 0; i < ATH9K_NF_CAL_HIST_MAX - 1; i++) {
  28. for (j = 1; j < ATH9K_NF_CAL_HIST_MAX - i; j++) {
  29. if (sort[j] > sort[j - 1]) {
  30. nfval = sort[j];
  31. sort[j] = sort[j - 1];
  32. sort[j - 1] = nfval;
  33. }
  34. }
  35. }
  36. nfval = sort[(ATH9K_NF_CAL_HIST_MAX - 1) >> 1];
  37. return nfval;
  38. }
  39. static struct ath_nf_limits *ath9k_hw_get_nf_limits(struct ath_hw *ah,
  40. struct ath9k_channel *chan)
  41. {
  42. struct ath_nf_limits *limit;
  43. if (!chan || IS_CHAN_2GHZ(chan))
  44. limit = &ah->nf_2g;
  45. else
  46. limit = &ah->nf_5g;
  47. return limit;
  48. }
  49. static s16 ath9k_hw_get_default_nf(struct ath_hw *ah,
  50. struct ath9k_channel *chan)
  51. {
  52. return ath9k_hw_get_nf_limits(ah, chan)->nominal;
  53. }
  54. static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah,
  55. struct ath9k_hw_cal_data *cal,
  56. int16_t *nfarray)
  57. {
  58. struct ath_common *common = ath9k_hw_common(ah);
  59. struct ath_nf_limits *limit;
  60. struct ath9k_nfcal_hist *h;
  61. bool high_nf_mid = false;
  62. int i;
  63. h = cal->nfCalHist;
  64. limit = ath9k_hw_get_nf_limits(ah, ah->curchan);
  65. for (i = 0; i < NUM_NF_READINGS; i++) {
  66. h[i].nfCalBuffer[h[i].currIndex] = nfarray[i];
  67. if (++h[i].currIndex >= ATH9K_NF_CAL_HIST_MAX)
  68. h[i].currIndex = 0;
  69. if (h[i].invalidNFcount > 0) {
  70. h[i].invalidNFcount--;
  71. h[i].privNF = nfarray[i];
  72. } else {
  73. h[i].privNF =
  74. ath9k_hw_get_nf_hist_mid(h[i].nfCalBuffer);
  75. }
  76. if (!h[i].privNF)
  77. continue;
  78. if (h[i].privNF > limit->max) {
  79. high_nf_mid = true;
  80. ath_print(common, ATH_DBG_CALIBRATE,
  81. "NFmid[%d] (%d) > MAX (%d), %s\n",
  82. i, h[i].privNF, limit->max,
  83. (cal->nfcal_interference ?
  84. "not corrected (due to interference)" :
  85. "correcting to MAX"));
  86. /*
  87. * Normally we limit the average noise floor by the
  88. * hardware specific maximum here. However if we have
  89. * encountered stuck beacons because of interference,
  90. * we bypass this limit here in order to better deal
  91. * with our environment.
  92. */
  93. if (!cal->nfcal_interference)
  94. h[i].privNF = limit->max;
  95. }
  96. }
  97. /*
  98. * If the noise floor seems normal for all chains, assume that
  99. * there is no significant interference in the environment anymore.
  100. * Re-enable the enforcement of the NF maximum again.
  101. */
  102. if (!high_nf_mid)
  103. cal->nfcal_interference = false;
  104. }
  105. static bool ath9k_hw_get_nf_thresh(struct ath_hw *ah,
  106. enum ieee80211_band band,
  107. int16_t *nft)
  108. {
  109. switch (band) {
  110. case IEEE80211_BAND_5GHZ:
  111. *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_5);
  112. break;
  113. case IEEE80211_BAND_2GHZ:
  114. *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_2);
  115. break;
  116. default:
  117. BUG_ON(1);
  118. return false;
  119. }
  120. return true;
  121. }
  122. void ath9k_hw_reset_calibration(struct ath_hw *ah,
  123. struct ath9k_cal_list *currCal)
  124. {
  125. int i;
  126. ath9k_hw_setup_calibration(ah, currCal);
  127. currCal->calState = CAL_RUNNING;
  128. for (i = 0; i < AR5416_MAX_CHAINS; i++) {
  129. ah->meas0.sign[i] = 0;
  130. ah->meas1.sign[i] = 0;
  131. ah->meas2.sign[i] = 0;
  132. ah->meas3.sign[i] = 0;
  133. }
  134. ah->cal_samples = 0;
  135. }
  136. /* This is done for the currently configured channel */
  137. bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
  138. {
  139. struct ath_common *common = ath9k_hw_common(ah);
  140. struct ieee80211_conf *conf = &common->hw->conf;
  141. struct ath9k_cal_list *currCal = ah->cal_list_curr;
  142. if (!ah->caldata)
  143. return true;
  144. if (!AR_SREV_9100(ah) && !AR_SREV_9160_10_OR_LATER(ah))
  145. return true;
  146. if (currCal == NULL)
  147. return true;
  148. if (currCal->calState != CAL_DONE) {
  149. ath_print(common, ATH_DBG_CALIBRATE,
  150. "Calibration state incorrect, %d\n",
  151. currCal->calState);
  152. return true;
  153. }
  154. if (!ath9k_hw_iscal_supported(ah, currCal->calData->calType))
  155. return true;
  156. ath_print(common, ATH_DBG_CALIBRATE,
  157. "Resetting Cal %d state for channel %u\n",
  158. currCal->calData->calType, conf->channel->center_freq);
  159. ah->caldata->CalValid &= ~currCal->calData->calType;
  160. currCal->calState = CAL_WAITING;
  161. return false;
  162. }
  163. EXPORT_SYMBOL(ath9k_hw_reset_calvalid);
  164. void ath9k_hw_start_nfcal(struct ath_hw *ah, bool update)
  165. {
  166. if (ah->caldata)
  167. ah->caldata->nfcal_pending = true;
  168. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
  169. AR_PHY_AGC_CONTROL_ENABLE_NF);
  170. if (update)
  171. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  172. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  173. else
  174. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
  175. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  176. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
  177. }
  178. void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
  179. {
  180. struct ath9k_nfcal_hist *h = NULL;
  181. unsigned i, j;
  182. int32_t val;
  183. u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
  184. struct ath_common *common = ath9k_hw_common(ah);
  185. s16 default_nf = ath9k_hw_get_default_nf(ah, chan);
  186. if (ah->caldata)
  187. h = ah->caldata->nfCalHist;
  188. for (i = 0; i < NUM_NF_READINGS; i++) {
  189. if (chainmask & (1 << i)) {
  190. s16 nfval;
  191. if (h)
  192. nfval = h[i].privNF;
  193. else
  194. nfval = default_nf;
  195. val = REG_READ(ah, ah->nf_regs[i]);
  196. val &= 0xFFFFFE00;
  197. val |= (((u32) nfval << 1) & 0x1ff);
  198. REG_WRITE(ah, ah->nf_regs[i], val);
  199. }
  200. }
  201. /*
  202. * Load software filtered NF value into baseband internal minCCApwr
  203. * variable.
  204. */
  205. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  206. AR_PHY_AGC_CONTROL_ENABLE_NF);
  207. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  208. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  209. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
  210. /*
  211. * Wait for load to complete, should be fast, a few 10s of us.
  212. * The max delay was changed from an original 250us to 10000us
  213. * since 250us often results in NF load timeout and causes deaf
  214. * condition during stress testing 12/12/2009
  215. */
  216. for (j = 0; j < 1000; j++) {
  217. if ((REG_READ(ah, AR_PHY_AGC_CONTROL) &
  218. AR_PHY_AGC_CONTROL_NF) == 0)
  219. break;
  220. udelay(10);
  221. }
  222. /*
  223. * We timed out waiting for the noisefloor to load, probably due to an
  224. * in-progress rx. Simply return here and allow the load plenty of time
  225. * to complete before the next calibration interval. We need to avoid
  226. * trying to load -50 (which happens below) while the previous load is
  227. * still in progress as this can cause rx deafness. Instead by returning
  228. * here, the baseband nf cal will just be capped by our present
  229. * noisefloor until the next calibration timer.
  230. */
  231. if (j == 1000) {
  232. ath_print(common, ATH_DBG_ANY, "Timeout while waiting for nf "
  233. "to load: AR_PHY_AGC_CONTROL=0x%x\n",
  234. REG_READ(ah, AR_PHY_AGC_CONTROL));
  235. return;
  236. }
  237. /*
  238. * Restore maxCCAPower register parameter again so that we're not capped
  239. * by the median we just loaded. This will be initial (and max) value
  240. * of next noise floor calibration the baseband does.
  241. */
  242. ENABLE_REGWRITE_BUFFER(ah);
  243. for (i = 0; i < NUM_NF_READINGS; i++) {
  244. if (chainmask & (1 << i)) {
  245. val = REG_READ(ah, ah->nf_regs[i]);
  246. val &= 0xFFFFFE00;
  247. val |= (((u32) (-50) << 1) & 0x1ff);
  248. REG_WRITE(ah, ah->nf_regs[i], val);
  249. }
  250. }
  251. REGWRITE_BUFFER_FLUSH(ah);
  252. DISABLE_REGWRITE_BUFFER(ah);
  253. }
  254. static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf)
  255. {
  256. struct ath_common *common = ath9k_hw_common(ah);
  257. struct ath_nf_limits *limit;
  258. int i;
  259. if (IS_CHAN_2GHZ(ah->curchan))
  260. limit = &ah->nf_2g;
  261. else
  262. limit = &ah->nf_5g;
  263. for (i = 0; i < NUM_NF_READINGS; i++) {
  264. if (!nf[i])
  265. continue;
  266. ath_print(common, ATH_DBG_CALIBRATE,
  267. "NF calibrated [%s] [chain %d] is %d\n",
  268. (i >= 3 ? "ext" : "ctl"), i % 3, nf[i]);
  269. if (nf[i] > ATH9K_NF_TOO_HIGH) {
  270. ath_print(common, ATH_DBG_CALIBRATE,
  271. "NF[%d] (%d) > MAX (%d), correcting to MAX",
  272. i, nf[i], ATH9K_NF_TOO_HIGH);
  273. nf[i] = limit->max;
  274. } else if (nf[i] < limit->min) {
  275. ath_print(common, ATH_DBG_CALIBRATE,
  276. "NF[%d] (%d) < MIN (%d), correcting to NOM",
  277. i, nf[i], limit->min);
  278. nf[i] = limit->nominal;
  279. }
  280. }
  281. }
  282. bool ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan)
  283. {
  284. struct ath_common *common = ath9k_hw_common(ah);
  285. int16_t nf, nfThresh;
  286. int16_t nfarray[NUM_NF_READINGS] = { 0 };
  287. struct ath9k_nfcal_hist *h;
  288. struct ieee80211_channel *c = chan->chan;
  289. struct ath9k_hw_cal_data *caldata = ah->caldata;
  290. chan->channelFlags &= (~CHANNEL_CW_INT);
  291. if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {
  292. ath_print(common, ATH_DBG_CALIBRATE,
  293. "NF did not complete in calibration window\n");
  294. return false;
  295. }
  296. ath9k_hw_do_getnf(ah, nfarray);
  297. ath9k_hw_nf_sanitize(ah, nfarray);
  298. nf = nfarray[0];
  299. if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh)
  300. && nf > nfThresh) {
  301. ath_print(common, ATH_DBG_CALIBRATE,
  302. "noise floor failed detected; "
  303. "detected %d, threshold %d\n",
  304. nf, nfThresh);
  305. chan->channelFlags |= CHANNEL_CW_INT;
  306. }
  307. if (!caldata) {
  308. chan->noisefloor = nf;
  309. return false;
  310. }
  311. h = caldata->nfCalHist;
  312. caldata->nfcal_pending = false;
  313. ath9k_hw_update_nfcal_hist_buffer(ah, caldata, nfarray);
  314. chan->noisefloor = h[0].privNF;
  315. return true;
  316. }
  317. void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah,
  318. struct ath9k_channel *chan)
  319. {
  320. struct ath9k_nfcal_hist *h;
  321. s16 default_nf;
  322. int i, j;
  323. if (!ah->caldata)
  324. return;
  325. h = ah->caldata->nfCalHist;
  326. default_nf = ath9k_hw_get_default_nf(ah, chan);
  327. for (i = 0; i < NUM_NF_READINGS; i++) {
  328. h[i].currIndex = 0;
  329. h[i].privNF = default_nf;
  330. h[i].invalidNFcount = AR_PHY_CCA_FILTERWINDOW_LENGTH;
  331. for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) {
  332. h[i].nfCalBuffer[j] = default_nf;
  333. }
  334. }
  335. }
  336. s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan)
  337. {
  338. if (!ah->curchan || !ah->curchan->noisefloor)
  339. return ath9k_hw_get_default_nf(ah, chan);
  340. return ah->curchan->noisefloor;
  341. }
  342. EXPORT_SYMBOL(ath9k_hw_getchan_noise);
  343. void ath9k_hw_bstuck_nfcal(struct ath_hw *ah)
  344. {
  345. struct ath9k_hw_cal_data *caldata = ah->caldata;
  346. if (unlikely(!caldata))
  347. return;
  348. /*
  349. * If beacons are stuck, the most likely cause is interference.
  350. * Triggering a noise floor calibration at this point helps the
  351. * hardware adapt to a noisy environment much faster.
  352. * To ensure that we recover from stuck beacons quickly, let
  353. * the baseband update the internal NF value itself, similar to
  354. * what is being done after a full reset.
  355. */
  356. if (!caldata->nfcal_pending)
  357. ath9k_hw_start_nfcal(ah, true);
  358. else if (!(REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF))
  359. ath9k_hw_getnf(ah, ah->curchan);
  360. caldata->nfcal_interference = true;
  361. }
  362. EXPORT_SYMBOL(ath9k_hw_bstuck_nfcal);