onenand_base.c 106 KB

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  1. /*
  2. * linux/drivers/mtd/onenand/onenand_base.c
  3. *
  4. * Copyright © 2005-2009 Samsung Electronics
  5. * Copyright © 2007 Nokia Corporation
  6. *
  7. * Kyungmin Park <kyungmin.park@samsung.com>
  8. *
  9. * Credits:
  10. * Adrian Hunter <ext-adrian.hunter@nokia.com>:
  11. * auto-placement support, read-while load support, various fixes
  12. *
  13. * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
  14. * Flex-OneNAND support
  15. * Amul Kumar Saha <amul.saha at samsung.com>
  16. * OTP support
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/slab.h>
  26. #include <linux/init.h>
  27. #include <linux/sched.h>
  28. #include <linux/delay.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/jiffies.h>
  31. #include <linux/mtd/mtd.h>
  32. #include <linux/mtd/onenand.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <asm/io.h>
  35. /*
  36. * Multiblock erase if number of blocks to erase is 2 or more.
  37. * Maximum number of blocks for simultaneous erase is 64.
  38. */
  39. #define MB_ERASE_MIN_BLK_COUNT 2
  40. #define MB_ERASE_MAX_BLK_COUNT 64
  41. /* Default Flex-OneNAND boundary and lock respectively */
  42. static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
  43. module_param_array(flex_bdry, int, NULL, 0400);
  44. MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
  45. "Syntax:flex_bdry=DIE_BDRY,LOCK,..."
  46. "DIE_BDRY: SLC boundary of the die"
  47. "LOCK: Locking information for SLC boundary"
  48. " : 0->Set boundary in unlocked status"
  49. " : 1->Set boundary in locked status");
  50. /* Default OneNAND/Flex-OneNAND OTP options*/
  51. static int otp;
  52. module_param(otp, int, 0400);
  53. MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP"
  54. "Syntax : otp=LOCK_TYPE"
  55. "LOCK_TYPE : Keys issued, for specific OTP Lock type"
  56. " : 0 -> Default (No Blocks Locked)"
  57. " : 1 -> OTP Block lock"
  58. " : 2 -> 1st Block lock"
  59. " : 3 -> BOTH OTP Block and 1st Block lock");
  60. /**
  61. * onenand_oob_128 - oob info for Flex-Onenand with 4KB page
  62. * For now, we expose only 64 out of 80 ecc bytes
  63. */
  64. static struct nand_ecclayout onenand_oob_128 = {
  65. .eccbytes = 64,
  66. .eccpos = {
  67. 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
  68. 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
  69. 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
  70. 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
  71. 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
  72. 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
  73. 102, 103, 104, 105
  74. },
  75. .oobfree = {
  76. {2, 4}, {18, 4}, {34, 4}, {50, 4},
  77. {66, 4}, {82, 4}, {98, 4}, {114, 4}
  78. }
  79. };
  80. /**
  81. * onenand_oob_64 - oob info for large (2KB) page
  82. */
  83. static struct nand_ecclayout onenand_oob_64 = {
  84. .eccbytes = 20,
  85. .eccpos = {
  86. 8, 9, 10, 11, 12,
  87. 24, 25, 26, 27, 28,
  88. 40, 41, 42, 43, 44,
  89. 56, 57, 58, 59, 60,
  90. },
  91. .oobfree = {
  92. {2, 3}, {14, 2}, {18, 3}, {30, 2},
  93. {34, 3}, {46, 2}, {50, 3}, {62, 2}
  94. }
  95. };
  96. /**
  97. * onenand_oob_32 - oob info for middle (1KB) page
  98. */
  99. static struct nand_ecclayout onenand_oob_32 = {
  100. .eccbytes = 10,
  101. .eccpos = {
  102. 8, 9, 10, 11, 12,
  103. 24, 25, 26, 27, 28,
  104. },
  105. .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  106. };
  107. static const unsigned char ffchars[] = {
  108. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  109. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  110. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  111. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  112. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  113. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  114. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  115. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  116. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  117. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
  118. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  119. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
  120. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  121. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
  122. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  123. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
  124. };
  125. /**
  126. * onenand_readw - [OneNAND Interface] Read OneNAND register
  127. * @param addr address to read
  128. *
  129. * Read OneNAND register
  130. */
  131. static unsigned short onenand_readw(void __iomem *addr)
  132. {
  133. return readw(addr);
  134. }
  135. /**
  136. * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  137. * @param value value to write
  138. * @param addr address to write
  139. *
  140. * Write OneNAND register with value
  141. */
  142. static void onenand_writew(unsigned short value, void __iomem *addr)
  143. {
  144. writew(value, addr);
  145. }
  146. /**
  147. * onenand_block_address - [DEFAULT] Get block address
  148. * @param this onenand chip data structure
  149. * @param block the block
  150. * @return translated block address if DDP, otherwise same
  151. *
  152. * Setup Start Address 1 Register (F100h)
  153. */
  154. static int onenand_block_address(struct onenand_chip *this, int block)
  155. {
  156. /* Device Flash Core select, NAND Flash Block Address */
  157. if (block & this->density_mask)
  158. return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
  159. return block;
  160. }
  161. /**
  162. * onenand_bufferram_address - [DEFAULT] Get bufferram address
  163. * @param this onenand chip data structure
  164. * @param block the block
  165. * @return set DBS value if DDP, otherwise 0
  166. *
  167. * Setup Start Address 2 Register (F101h) for DDP
  168. */
  169. static int onenand_bufferram_address(struct onenand_chip *this, int block)
  170. {
  171. /* Device BufferRAM Select */
  172. if (block & this->density_mask)
  173. return ONENAND_DDP_CHIP1;
  174. return ONENAND_DDP_CHIP0;
  175. }
  176. /**
  177. * onenand_page_address - [DEFAULT] Get page address
  178. * @param page the page address
  179. * @param sector the sector address
  180. * @return combined page and sector address
  181. *
  182. * Setup Start Address 8 Register (F107h)
  183. */
  184. static int onenand_page_address(int page, int sector)
  185. {
  186. /* Flash Page Address, Flash Sector Address */
  187. int fpa, fsa;
  188. fpa = page & ONENAND_FPA_MASK;
  189. fsa = sector & ONENAND_FSA_MASK;
  190. return ((fpa << ONENAND_FPA_SHIFT) | fsa);
  191. }
  192. /**
  193. * onenand_buffer_address - [DEFAULT] Get buffer address
  194. * @param dataram1 DataRAM index
  195. * @param sectors the sector address
  196. * @param count the number of sectors
  197. * @return the start buffer value
  198. *
  199. * Setup Start Buffer Register (F200h)
  200. */
  201. static int onenand_buffer_address(int dataram1, int sectors, int count)
  202. {
  203. int bsa, bsc;
  204. /* BufferRAM Sector Address */
  205. bsa = sectors & ONENAND_BSA_MASK;
  206. if (dataram1)
  207. bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
  208. else
  209. bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
  210. /* BufferRAM Sector Count */
  211. bsc = count & ONENAND_BSC_MASK;
  212. return ((bsa << ONENAND_BSA_SHIFT) | bsc);
  213. }
  214. /**
  215. * flexonenand_block- For given address return block number
  216. * @param this - OneNAND device structure
  217. * @param addr - Address for which block number is needed
  218. */
  219. static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
  220. {
  221. unsigned boundary, blk, die = 0;
  222. if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
  223. die = 1;
  224. addr -= this->diesize[0];
  225. }
  226. boundary = this->boundary[die];
  227. blk = addr >> (this->erase_shift - 1);
  228. if (blk > boundary)
  229. blk = (blk + boundary + 1) >> 1;
  230. blk += die ? this->density_mask : 0;
  231. return blk;
  232. }
  233. inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
  234. {
  235. if (!FLEXONENAND(this))
  236. return addr >> this->erase_shift;
  237. return flexonenand_block(this, addr);
  238. }
  239. /**
  240. * flexonenand_addr - Return address of the block
  241. * @this: OneNAND device structure
  242. * @block: Block number on Flex-OneNAND
  243. *
  244. * Return address of the block
  245. */
  246. static loff_t flexonenand_addr(struct onenand_chip *this, int block)
  247. {
  248. loff_t ofs = 0;
  249. int die = 0, boundary;
  250. if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
  251. block -= this->density_mask;
  252. die = 1;
  253. ofs = this->diesize[0];
  254. }
  255. boundary = this->boundary[die];
  256. ofs += (loff_t)block << (this->erase_shift - 1);
  257. if (block > (boundary + 1))
  258. ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
  259. return ofs;
  260. }
  261. loff_t onenand_addr(struct onenand_chip *this, int block)
  262. {
  263. if (!FLEXONENAND(this))
  264. return (loff_t)block << this->erase_shift;
  265. return flexonenand_addr(this, block);
  266. }
  267. EXPORT_SYMBOL(onenand_addr);
  268. /**
  269. * onenand_get_density - [DEFAULT] Get OneNAND density
  270. * @param dev_id OneNAND device ID
  271. *
  272. * Get OneNAND density from device ID
  273. */
  274. static inline int onenand_get_density(int dev_id)
  275. {
  276. int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  277. return (density & ONENAND_DEVICE_DENSITY_MASK);
  278. }
  279. /**
  280. * flexonenand_region - [Flex-OneNAND] Return erase region of addr
  281. * @param mtd MTD device structure
  282. * @param addr address whose erase region needs to be identified
  283. */
  284. int flexonenand_region(struct mtd_info *mtd, loff_t addr)
  285. {
  286. int i;
  287. for (i = 0; i < mtd->numeraseregions; i++)
  288. if (addr < mtd->eraseregions[i].offset)
  289. break;
  290. return i - 1;
  291. }
  292. EXPORT_SYMBOL(flexonenand_region);
  293. /**
  294. * onenand_command - [DEFAULT] Send command to OneNAND device
  295. * @param mtd MTD device structure
  296. * @param cmd the command to be sent
  297. * @param addr offset to read from or write to
  298. * @param len number of bytes to read or write
  299. *
  300. * Send command to OneNAND device. This function is used for middle/large page
  301. * devices (1KB/2KB Bytes per page)
  302. */
  303. static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
  304. {
  305. struct onenand_chip *this = mtd->priv;
  306. int value, block, page;
  307. /* Address translation */
  308. switch (cmd) {
  309. case ONENAND_CMD_UNLOCK:
  310. case ONENAND_CMD_LOCK:
  311. case ONENAND_CMD_LOCK_TIGHT:
  312. case ONENAND_CMD_UNLOCK_ALL:
  313. block = -1;
  314. page = -1;
  315. break;
  316. case FLEXONENAND_CMD_PI_ACCESS:
  317. /* addr contains die index */
  318. block = addr * this->density_mask;
  319. page = -1;
  320. break;
  321. case ONENAND_CMD_ERASE:
  322. case ONENAND_CMD_MULTIBLOCK_ERASE:
  323. case ONENAND_CMD_ERASE_VERIFY:
  324. case ONENAND_CMD_BUFFERRAM:
  325. case ONENAND_CMD_OTP_ACCESS:
  326. block = onenand_block(this, addr);
  327. page = -1;
  328. break;
  329. case FLEXONENAND_CMD_READ_PI:
  330. cmd = ONENAND_CMD_READ;
  331. block = addr * this->density_mask;
  332. page = 0;
  333. break;
  334. default:
  335. block = onenand_block(this, addr);
  336. page = (int) (addr - onenand_addr(this, block)) >> this->page_shift;
  337. if (ONENAND_IS_2PLANE(this)) {
  338. /* Make the even block number */
  339. block &= ~1;
  340. /* Is it the odd plane? */
  341. if (addr & this->writesize)
  342. block++;
  343. page >>= 1;
  344. }
  345. page &= this->page_mask;
  346. break;
  347. }
  348. /* NOTE: The setting order of the registers is very important! */
  349. if (cmd == ONENAND_CMD_BUFFERRAM) {
  350. /* Select DataRAM for DDP */
  351. value = onenand_bufferram_address(this, block);
  352. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  353. if (ONENAND_IS_MLC(this) || ONENAND_IS_2PLANE(this) ||
  354. ONENAND_IS_4KB_PAGE(this))
  355. /* It is always BufferRAM0 */
  356. ONENAND_SET_BUFFERRAM0(this);
  357. else
  358. /* Switch to the next data buffer */
  359. ONENAND_SET_NEXT_BUFFERRAM(this);
  360. return 0;
  361. }
  362. if (block != -1) {
  363. /* Write 'DFS, FBA' of Flash */
  364. value = onenand_block_address(this, block);
  365. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  366. /* Select DataRAM for DDP */
  367. value = onenand_bufferram_address(this, block);
  368. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  369. }
  370. if (page != -1) {
  371. /* Now we use page size operation */
  372. int sectors = 0, count = 0;
  373. int dataram;
  374. switch (cmd) {
  375. case FLEXONENAND_CMD_RECOVER_LSB:
  376. case ONENAND_CMD_READ:
  377. case ONENAND_CMD_READOOB:
  378. if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this))
  379. /* It is always BufferRAM0 */
  380. dataram = ONENAND_SET_BUFFERRAM0(this);
  381. else
  382. dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
  383. break;
  384. default:
  385. if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
  386. cmd = ONENAND_CMD_2X_PROG;
  387. dataram = ONENAND_CURRENT_BUFFERRAM(this);
  388. break;
  389. }
  390. /* Write 'FPA, FSA' of Flash */
  391. value = onenand_page_address(page, sectors);
  392. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
  393. /* Write 'BSA, BSC' of DataRAM */
  394. value = onenand_buffer_address(dataram, sectors, count);
  395. this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
  396. }
  397. /* Interrupt clear */
  398. this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
  399. /* Write command */
  400. this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
  401. return 0;
  402. }
  403. /**
  404. * onenand_read_ecc - return ecc status
  405. * @param this onenand chip structure
  406. */
  407. static inline int onenand_read_ecc(struct onenand_chip *this)
  408. {
  409. int ecc, i, result = 0;
  410. if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this))
  411. return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
  412. for (i = 0; i < 4; i++) {
  413. ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2);
  414. if (likely(!ecc))
  415. continue;
  416. if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
  417. return ONENAND_ECC_2BIT_ALL;
  418. else
  419. result = ONENAND_ECC_1BIT_ALL;
  420. }
  421. return result;
  422. }
  423. /**
  424. * onenand_wait - [DEFAULT] wait until the command is done
  425. * @param mtd MTD device structure
  426. * @param state state to select the max. timeout value
  427. *
  428. * Wait for command done. This applies to all OneNAND command
  429. * Read can take up to 30us, erase up to 2ms and program up to 350us
  430. * according to general OneNAND specs
  431. */
  432. static int onenand_wait(struct mtd_info *mtd, int state)
  433. {
  434. struct onenand_chip * this = mtd->priv;
  435. unsigned long timeout;
  436. unsigned int flags = ONENAND_INT_MASTER;
  437. unsigned int interrupt = 0;
  438. unsigned int ctrl;
  439. /* The 20 msec is enough */
  440. timeout = jiffies + msecs_to_jiffies(20);
  441. while (time_before(jiffies, timeout)) {
  442. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  443. if (interrupt & flags)
  444. break;
  445. if (state != FL_READING && state != FL_PREPARING_ERASE)
  446. cond_resched();
  447. }
  448. /* To get correct interrupt status in timeout case */
  449. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  450. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  451. /*
  452. * In the Spec. it checks the controller status first
  453. * However if you get the correct information in case of
  454. * power off recovery (POR) test, it should read ECC status first
  455. */
  456. if (interrupt & ONENAND_INT_READ) {
  457. int ecc = onenand_read_ecc(this);
  458. if (ecc) {
  459. if (ecc & ONENAND_ECC_2BIT_ALL) {
  460. printk(KERN_ERR "%s: ECC error = 0x%04x\n",
  461. __func__, ecc);
  462. mtd->ecc_stats.failed++;
  463. return -EBADMSG;
  464. } else if (ecc & ONENAND_ECC_1BIT_ALL) {
  465. printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
  466. __func__, ecc);
  467. mtd->ecc_stats.corrected++;
  468. }
  469. }
  470. } else if (state == FL_READING) {
  471. printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
  472. __func__, ctrl, interrupt);
  473. return -EIO;
  474. }
  475. if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
  476. printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
  477. __func__, ctrl, interrupt);
  478. return -EIO;
  479. }
  480. if (!(interrupt & ONENAND_INT_MASTER)) {
  481. printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
  482. __func__, ctrl, interrupt);
  483. return -EIO;
  484. }
  485. /* If there's controller error, it's a real error */
  486. if (ctrl & ONENAND_CTRL_ERROR) {
  487. printk(KERN_ERR "%s: controller error = 0x%04x\n",
  488. __func__, ctrl);
  489. if (ctrl & ONENAND_CTRL_LOCK)
  490. printk(KERN_ERR "%s: it's locked error.\n", __func__);
  491. return -EIO;
  492. }
  493. return 0;
  494. }
  495. /*
  496. * onenand_interrupt - [DEFAULT] onenand interrupt handler
  497. * @param irq onenand interrupt number
  498. * @param dev_id interrupt data
  499. *
  500. * complete the work
  501. */
  502. static irqreturn_t onenand_interrupt(int irq, void *data)
  503. {
  504. struct onenand_chip *this = data;
  505. /* To handle shared interrupt */
  506. if (!this->complete.done)
  507. complete(&this->complete);
  508. return IRQ_HANDLED;
  509. }
  510. /*
  511. * onenand_interrupt_wait - [DEFAULT] wait until the command is done
  512. * @param mtd MTD device structure
  513. * @param state state to select the max. timeout value
  514. *
  515. * Wait for command done.
  516. */
  517. static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
  518. {
  519. struct onenand_chip *this = mtd->priv;
  520. wait_for_completion(&this->complete);
  521. return onenand_wait(mtd, state);
  522. }
  523. /*
  524. * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
  525. * @param mtd MTD device structure
  526. * @param state state to select the max. timeout value
  527. *
  528. * Try interrupt based wait (It is used one-time)
  529. */
  530. static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
  531. {
  532. struct onenand_chip *this = mtd->priv;
  533. unsigned long remain, timeout;
  534. /* We use interrupt wait first */
  535. this->wait = onenand_interrupt_wait;
  536. timeout = msecs_to_jiffies(100);
  537. remain = wait_for_completion_timeout(&this->complete, timeout);
  538. if (!remain) {
  539. printk(KERN_INFO "OneNAND: There's no interrupt. "
  540. "We use the normal wait\n");
  541. /* Release the irq */
  542. free_irq(this->irq, this);
  543. this->wait = onenand_wait;
  544. }
  545. return onenand_wait(mtd, state);
  546. }
  547. /*
  548. * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
  549. * @param mtd MTD device structure
  550. *
  551. * There's two method to wait onenand work
  552. * 1. polling - read interrupt status register
  553. * 2. interrupt - use the kernel interrupt method
  554. */
  555. static void onenand_setup_wait(struct mtd_info *mtd)
  556. {
  557. struct onenand_chip *this = mtd->priv;
  558. int syscfg;
  559. init_completion(&this->complete);
  560. if (this->irq <= 0) {
  561. this->wait = onenand_wait;
  562. return;
  563. }
  564. if (request_irq(this->irq, &onenand_interrupt,
  565. IRQF_SHARED, "onenand", this)) {
  566. /* If we can't get irq, use the normal wait */
  567. this->wait = onenand_wait;
  568. return;
  569. }
  570. /* Enable interrupt */
  571. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  572. syscfg |= ONENAND_SYS_CFG1_IOBE;
  573. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  574. this->wait = onenand_try_interrupt_wait;
  575. }
  576. /**
  577. * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
  578. * @param mtd MTD data structure
  579. * @param area BufferRAM area
  580. * @return offset given area
  581. *
  582. * Return BufferRAM offset given area
  583. */
  584. static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
  585. {
  586. struct onenand_chip *this = mtd->priv;
  587. if (ONENAND_CURRENT_BUFFERRAM(this)) {
  588. /* Note: the 'this->writesize' is a real page size */
  589. if (area == ONENAND_DATARAM)
  590. return this->writesize;
  591. if (area == ONENAND_SPARERAM)
  592. return mtd->oobsize;
  593. }
  594. return 0;
  595. }
  596. /**
  597. * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
  598. * @param mtd MTD data structure
  599. * @param area BufferRAM area
  600. * @param buffer the databuffer to put/get data
  601. * @param offset offset to read from or write to
  602. * @param count number of bytes to read/write
  603. *
  604. * Read the BufferRAM area
  605. */
  606. static int onenand_read_bufferram(struct mtd_info *mtd, int area,
  607. unsigned char *buffer, int offset, size_t count)
  608. {
  609. struct onenand_chip *this = mtd->priv;
  610. void __iomem *bufferram;
  611. bufferram = this->base + area;
  612. bufferram += onenand_bufferram_offset(mtd, area);
  613. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  614. unsigned short word;
  615. /* Align with word(16-bit) size */
  616. count--;
  617. /* Read word and save byte */
  618. word = this->read_word(bufferram + offset + count);
  619. buffer[count] = (word & 0xff);
  620. }
  621. memcpy(buffer, bufferram + offset, count);
  622. return 0;
  623. }
  624. /**
  625. * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
  626. * @param mtd MTD data structure
  627. * @param area BufferRAM area
  628. * @param buffer the databuffer to put/get data
  629. * @param offset offset to read from or write to
  630. * @param count number of bytes to read/write
  631. *
  632. * Read the BufferRAM area with Sync. Burst Mode
  633. */
  634. static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
  635. unsigned char *buffer, int offset, size_t count)
  636. {
  637. struct onenand_chip *this = mtd->priv;
  638. void __iomem *bufferram;
  639. bufferram = this->base + area;
  640. bufferram += onenand_bufferram_offset(mtd, area);
  641. this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
  642. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  643. unsigned short word;
  644. /* Align with word(16-bit) size */
  645. count--;
  646. /* Read word and save byte */
  647. word = this->read_word(bufferram + offset + count);
  648. buffer[count] = (word & 0xff);
  649. }
  650. memcpy(buffer, bufferram + offset, count);
  651. this->mmcontrol(mtd, 0);
  652. return 0;
  653. }
  654. /**
  655. * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
  656. * @param mtd MTD data structure
  657. * @param area BufferRAM area
  658. * @param buffer the databuffer to put/get data
  659. * @param offset offset to read from or write to
  660. * @param count number of bytes to read/write
  661. *
  662. * Write the BufferRAM area
  663. */
  664. static int onenand_write_bufferram(struct mtd_info *mtd, int area,
  665. const unsigned char *buffer, int offset, size_t count)
  666. {
  667. struct onenand_chip *this = mtd->priv;
  668. void __iomem *bufferram;
  669. bufferram = this->base + area;
  670. bufferram += onenand_bufferram_offset(mtd, area);
  671. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  672. unsigned short word;
  673. int byte_offset;
  674. /* Align with word(16-bit) size */
  675. count--;
  676. /* Calculate byte access offset */
  677. byte_offset = offset + count;
  678. /* Read word and save byte */
  679. word = this->read_word(bufferram + byte_offset);
  680. word = (word & ~0xff) | buffer[count];
  681. this->write_word(word, bufferram + byte_offset);
  682. }
  683. memcpy(bufferram + offset, buffer, count);
  684. return 0;
  685. }
  686. /**
  687. * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
  688. * @param mtd MTD data structure
  689. * @param addr address to check
  690. * @return blockpage address
  691. *
  692. * Get blockpage address at 2x program mode
  693. */
  694. static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
  695. {
  696. struct onenand_chip *this = mtd->priv;
  697. int blockpage, block, page;
  698. /* Calculate the even block number */
  699. block = (int) (addr >> this->erase_shift) & ~1;
  700. /* Is it the odd plane? */
  701. if (addr & this->writesize)
  702. block++;
  703. page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
  704. blockpage = (block << 7) | page;
  705. return blockpage;
  706. }
  707. /**
  708. * onenand_check_bufferram - [GENERIC] Check BufferRAM information
  709. * @param mtd MTD data structure
  710. * @param addr address to check
  711. * @return 1 if there are valid data, otherwise 0
  712. *
  713. * Check bufferram if there is data we required
  714. */
  715. static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
  716. {
  717. struct onenand_chip *this = mtd->priv;
  718. int blockpage, found = 0;
  719. unsigned int i;
  720. if (ONENAND_IS_2PLANE(this))
  721. blockpage = onenand_get_2x_blockpage(mtd, addr);
  722. else
  723. blockpage = (int) (addr >> this->page_shift);
  724. /* Is there valid data? */
  725. i = ONENAND_CURRENT_BUFFERRAM(this);
  726. if (this->bufferram[i].blockpage == blockpage)
  727. found = 1;
  728. else {
  729. /* Check another BufferRAM */
  730. i = ONENAND_NEXT_BUFFERRAM(this);
  731. if (this->bufferram[i].blockpage == blockpage) {
  732. ONENAND_SET_NEXT_BUFFERRAM(this);
  733. found = 1;
  734. }
  735. }
  736. if (found && ONENAND_IS_DDP(this)) {
  737. /* Select DataRAM for DDP */
  738. int block = onenand_block(this, addr);
  739. int value = onenand_bufferram_address(this, block);
  740. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  741. }
  742. return found;
  743. }
  744. /**
  745. * onenand_update_bufferram - [GENERIC] Update BufferRAM information
  746. * @param mtd MTD data structure
  747. * @param addr address to update
  748. * @param valid valid flag
  749. *
  750. * Update BufferRAM information
  751. */
  752. static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
  753. int valid)
  754. {
  755. struct onenand_chip *this = mtd->priv;
  756. int blockpage;
  757. unsigned int i;
  758. if (ONENAND_IS_2PLANE(this))
  759. blockpage = onenand_get_2x_blockpage(mtd, addr);
  760. else
  761. blockpage = (int) (addr >> this->page_shift);
  762. /* Invalidate another BufferRAM */
  763. i = ONENAND_NEXT_BUFFERRAM(this);
  764. if (this->bufferram[i].blockpage == blockpage)
  765. this->bufferram[i].blockpage = -1;
  766. /* Update BufferRAM */
  767. i = ONENAND_CURRENT_BUFFERRAM(this);
  768. if (valid)
  769. this->bufferram[i].blockpage = blockpage;
  770. else
  771. this->bufferram[i].blockpage = -1;
  772. }
  773. /**
  774. * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
  775. * @param mtd MTD data structure
  776. * @param addr start address to invalidate
  777. * @param len length to invalidate
  778. *
  779. * Invalidate BufferRAM information
  780. */
  781. static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
  782. unsigned int len)
  783. {
  784. struct onenand_chip *this = mtd->priv;
  785. int i;
  786. loff_t end_addr = addr + len;
  787. /* Invalidate BufferRAM */
  788. for (i = 0; i < MAX_BUFFERRAM; i++) {
  789. loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
  790. if (buf_addr >= addr && buf_addr < end_addr)
  791. this->bufferram[i].blockpage = -1;
  792. }
  793. }
  794. /**
  795. * onenand_get_device - [GENERIC] Get chip for selected access
  796. * @param mtd MTD device structure
  797. * @param new_state the state which is requested
  798. *
  799. * Get the device and lock it for exclusive access
  800. */
  801. static int onenand_get_device(struct mtd_info *mtd, int new_state)
  802. {
  803. struct onenand_chip *this = mtd->priv;
  804. DECLARE_WAITQUEUE(wait, current);
  805. /*
  806. * Grab the lock and see if the device is available
  807. */
  808. while (1) {
  809. spin_lock(&this->chip_lock);
  810. if (this->state == FL_READY) {
  811. this->state = new_state;
  812. spin_unlock(&this->chip_lock);
  813. break;
  814. }
  815. if (new_state == FL_PM_SUSPENDED) {
  816. spin_unlock(&this->chip_lock);
  817. return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
  818. }
  819. set_current_state(TASK_UNINTERRUPTIBLE);
  820. add_wait_queue(&this->wq, &wait);
  821. spin_unlock(&this->chip_lock);
  822. schedule();
  823. remove_wait_queue(&this->wq, &wait);
  824. }
  825. return 0;
  826. }
  827. /**
  828. * onenand_release_device - [GENERIC] release chip
  829. * @param mtd MTD device structure
  830. *
  831. * Deselect, release chip lock and wake up anyone waiting on the device
  832. */
  833. static void onenand_release_device(struct mtd_info *mtd)
  834. {
  835. struct onenand_chip *this = mtd->priv;
  836. /* Release the chip */
  837. spin_lock(&this->chip_lock);
  838. this->state = FL_READY;
  839. wake_up(&this->wq);
  840. spin_unlock(&this->chip_lock);
  841. }
  842. /**
  843. * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
  844. * @param mtd MTD device structure
  845. * @param buf destination address
  846. * @param column oob offset to read from
  847. * @param thislen oob length to read
  848. */
  849. static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
  850. int thislen)
  851. {
  852. struct onenand_chip *this = mtd->priv;
  853. struct nand_oobfree *free;
  854. int readcol = column;
  855. int readend = column + thislen;
  856. int lastgap = 0;
  857. unsigned int i;
  858. uint8_t *oob_buf = this->oob_buf;
  859. free = this->ecclayout->oobfree;
  860. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  861. if (readcol >= lastgap)
  862. readcol += free->offset - lastgap;
  863. if (readend >= lastgap)
  864. readend += free->offset - lastgap;
  865. lastgap = free->offset + free->length;
  866. }
  867. this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
  868. free = this->ecclayout->oobfree;
  869. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  870. int free_end = free->offset + free->length;
  871. if (free->offset < readend && free_end > readcol) {
  872. int st = max_t(int,free->offset,readcol);
  873. int ed = min_t(int,free_end,readend);
  874. int n = ed - st;
  875. memcpy(buf, oob_buf + st, n);
  876. buf += n;
  877. } else if (column == 0)
  878. break;
  879. }
  880. return 0;
  881. }
  882. /**
  883. * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
  884. * @param mtd MTD device structure
  885. * @param addr address to recover
  886. * @param status return value from onenand_wait / onenand_bbt_wait
  887. *
  888. * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
  889. * lower page address and MSB page has higher page address in paired pages.
  890. * If power off occurs during MSB page program, the paired LSB page data can
  891. * become corrupt. LSB page recovery read is a way to read LSB page though page
  892. * data are corrupted. When uncorrectable error occurs as a result of LSB page
  893. * read after power up, issue LSB page recovery read.
  894. */
  895. static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
  896. {
  897. struct onenand_chip *this = mtd->priv;
  898. int i;
  899. /* Recovery is only for Flex-OneNAND */
  900. if (!FLEXONENAND(this))
  901. return status;
  902. /* check if we failed due to uncorrectable error */
  903. if (status != -EBADMSG && status != ONENAND_BBT_READ_ECC_ERROR)
  904. return status;
  905. /* check if address lies in MLC region */
  906. i = flexonenand_region(mtd, addr);
  907. if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
  908. return status;
  909. /* We are attempting to reread, so decrement stats.failed
  910. * which was incremented by onenand_wait due to read failure
  911. */
  912. printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
  913. __func__);
  914. mtd->ecc_stats.failed--;
  915. /* Issue the LSB page recovery command */
  916. this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
  917. return this->wait(mtd, FL_READING);
  918. }
  919. /**
  920. * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
  921. * @param mtd MTD device structure
  922. * @param from offset to read from
  923. * @param ops: oob operation description structure
  924. *
  925. * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
  926. * So, read-while-load is not present.
  927. */
  928. static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
  929. struct mtd_oob_ops *ops)
  930. {
  931. struct onenand_chip *this = mtd->priv;
  932. struct mtd_ecc_stats stats;
  933. size_t len = ops->len;
  934. size_t ooblen = ops->ooblen;
  935. u_char *buf = ops->datbuf;
  936. u_char *oobbuf = ops->oobbuf;
  937. int read = 0, column, thislen;
  938. int oobread = 0, oobcolumn, thisooblen, oobsize;
  939. int ret = 0;
  940. int writesize = this->writesize;
  941. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
  942. __func__, (unsigned int) from, (int) len);
  943. if (ops->mode == MTD_OOB_AUTO)
  944. oobsize = this->ecclayout->oobavail;
  945. else
  946. oobsize = mtd->oobsize;
  947. oobcolumn = from & (mtd->oobsize - 1);
  948. /* Do not allow reads past end of device */
  949. if (from + len > mtd->size) {
  950. printk(KERN_ERR "%s: Attempt read beyond end of device\n",
  951. __func__);
  952. ops->retlen = 0;
  953. ops->oobretlen = 0;
  954. return -EINVAL;
  955. }
  956. stats = mtd->ecc_stats;
  957. while (read < len) {
  958. cond_resched();
  959. thislen = min_t(int, writesize, len - read);
  960. column = from & (writesize - 1);
  961. if (column + thislen > writesize)
  962. thislen = writesize - column;
  963. if (!onenand_check_bufferram(mtd, from)) {
  964. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  965. ret = this->wait(mtd, FL_READING);
  966. if (unlikely(ret))
  967. ret = onenand_recover_lsb(mtd, from, ret);
  968. onenand_update_bufferram(mtd, from, !ret);
  969. if (ret == -EBADMSG)
  970. ret = 0;
  971. }
  972. this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
  973. if (oobbuf) {
  974. thisooblen = oobsize - oobcolumn;
  975. thisooblen = min_t(int, thisooblen, ooblen - oobread);
  976. if (ops->mode == MTD_OOB_AUTO)
  977. onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
  978. else
  979. this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
  980. oobread += thisooblen;
  981. oobbuf += thisooblen;
  982. oobcolumn = 0;
  983. }
  984. read += thislen;
  985. if (read == len)
  986. break;
  987. from += thislen;
  988. buf += thislen;
  989. }
  990. /*
  991. * Return success, if no ECC failures, else -EBADMSG
  992. * fs driver will take care of that, because
  993. * retlen == desired len and result == -EBADMSG
  994. */
  995. ops->retlen = read;
  996. ops->oobretlen = oobread;
  997. if (ret)
  998. return ret;
  999. if (mtd->ecc_stats.failed - stats.failed)
  1000. return -EBADMSG;
  1001. return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
  1002. }
  1003. /**
  1004. * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
  1005. * @param mtd MTD device structure
  1006. * @param from offset to read from
  1007. * @param ops: oob operation description structure
  1008. *
  1009. * OneNAND read main and/or out-of-band data
  1010. */
  1011. static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
  1012. struct mtd_oob_ops *ops)
  1013. {
  1014. struct onenand_chip *this = mtd->priv;
  1015. struct mtd_ecc_stats stats;
  1016. size_t len = ops->len;
  1017. size_t ooblen = ops->ooblen;
  1018. u_char *buf = ops->datbuf;
  1019. u_char *oobbuf = ops->oobbuf;
  1020. int read = 0, column, thislen;
  1021. int oobread = 0, oobcolumn, thisooblen, oobsize;
  1022. int ret = 0, boundary = 0;
  1023. int writesize = this->writesize;
  1024. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
  1025. __func__, (unsigned int) from, (int) len);
  1026. if (ops->mode == MTD_OOB_AUTO)
  1027. oobsize = this->ecclayout->oobavail;
  1028. else
  1029. oobsize = mtd->oobsize;
  1030. oobcolumn = from & (mtd->oobsize - 1);
  1031. /* Do not allow reads past end of device */
  1032. if ((from + len) > mtd->size) {
  1033. printk(KERN_ERR "%s: Attempt read beyond end of device\n",
  1034. __func__);
  1035. ops->retlen = 0;
  1036. ops->oobretlen = 0;
  1037. return -EINVAL;
  1038. }
  1039. stats = mtd->ecc_stats;
  1040. /* Read-while-load method */
  1041. /* Do first load to bufferRAM */
  1042. if (read < len) {
  1043. if (!onenand_check_bufferram(mtd, from)) {
  1044. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  1045. ret = this->wait(mtd, FL_READING);
  1046. onenand_update_bufferram(mtd, from, !ret);
  1047. if (ret == -EBADMSG)
  1048. ret = 0;
  1049. }
  1050. }
  1051. thislen = min_t(int, writesize, len - read);
  1052. column = from & (writesize - 1);
  1053. if (column + thislen > writesize)
  1054. thislen = writesize - column;
  1055. while (!ret) {
  1056. /* If there is more to load then start next load */
  1057. from += thislen;
  1058. if (read + thislen < len) {
  1059. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  1060. /*
  1061. * Chip boundary handling in DDP
  1062. * Now we issued chip 1 read and pointed chip 1
  1063. * bufferram so we have to point chip 0 bufferram.
  1064. */
  1065. if (ONENAND_IS_DDP(this) &&
  1066. unlikely(from == (this->chipsize >> 1))) {
  1067. this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
  1068. boundary = 1;
  1069. } else
  1070. boundary = 0;
  1071. ONENAND_SET_PREV_BUFFERRAM(this);
  1072. }
  1073. /* While load is going, read from last bufferRAM */
  1074. this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
  1075. /* Read oob area if needed */
  1076. if (oobbuf) {
  1077. thisooblen = oobsize - oobcolumn;
  1078. thisooblen = min_t(int, thisooblen, ooblen - oobread);
  1079. if (ops->mode == MTD_OOB_AUTO)
  1080. onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
  1081. else
  1082. this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
  1083. oobread += thisooblen;
  1084. oobbuf += thisooblen;
  1085. oobcolumn = 0;
  1086. }
  1087. /* See if we are done */
  1088. read += thislen;
  1089. if (read == len)
  1090. break;
  1091. /* Set up for next read from bufferRAM */
  1092. if (unlikely(boundary))
  1093. this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
  1094. ONENAND_SET_NEXT_BUFFERRAM(this);
  1095. buf += thislen;
  1096. thislen = min_t(int, writesize, len - read);
  1097. column = 0;
  1098. cond_resched();
  1099. /* Now wait for load */
  1100. ret = this->wait(mtd, FL_READING);
  1101. onenand_update_bufferram(mtd, from, !ret);
  1102. if (ret == -EBADMSG)
  1103. ret = 0;
  1104. }
  1105. /*
  1106. * Return success, if no ECC failures, else -EBADMSG
  1107. * fs driver will take care of that, because
  1108. * retlen == desired len and result == -EBADMSG
  1109. */
  1110. ops->retlen = read;
  1111. ops->oobretlen = oobread;
  1112. if (ret)
  1113. return ret;
  1114. if (mtd->ecc_stats.failed - stats.failed)
  1115. return -EBADMSG;
  1116. return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
  1117. }
  1118. /**
  1119. * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
  1120. * @param mtd MTD device structure
  1121. * @param from offset to read from
  1122. * @param ops: oob operation description structure
  1123. *
  1124. * OneNAND read out-of-band data from the spare area
  1125. */
  1126. static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
  1127. struct mtd_oob_ops *ops)
  1128. {
  1129. struct onenand_chip *this = mtd->priv;
  1130. struct mtd_ecc_stats stats;
  1131. int read = 0, thislen, column, oobsize;
  1132. size_t len = ops->ooblen;
  1133. mtd_oob_mode_t mode = ops->mode;
  1134. u_char *buf = ops->oobbuf;
  1135. int ret = 0, readcmd;
  1136. from += ops->ooboffs;
  1137. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
  1138. __func__, (unsigned int) from, (int) len);
  1139. /* Initialize return length value */
  1140. ops->oobretlen = 0;
  1141. if (mode == MTD_OOB_AUTO)
  1142. oobsize = this->ecclayout->oobavail;
  1143. else
  1144. oobsize = mtd->oobsize;
  1145. column = from & (mtd->oobsize - 1);
  1146. if (unlikely(column >= oobsize)) {
  1147. printk(KERN_ERR "%s: Attempted to start read outside oob\n",
  1148. __func__);
  1149. return -EINVAL;
  1150. }
  1151. /* Do not allow reads past end of device */
  1152. if (unlikely(from >= mtd->size ||
  1153. column + len > ((mtd->size >> this->page_shift) -
  1154. (from >> this->page_shift)) * oobsize)) {
  1155. printk(KERN_ERR "%s: Attempted to read beyond end of device\n",
  1156. __func__);
  1157. return -EINVAL;
  1158. }
  1159. stats = mtd->ecc_stats;
  1160. readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1161. while (read < len) {
  1162. cond_resched();
  1163. thislen = oobsize - column;
  1164. thislen = min_t(int, thislen, len);
  1165. this->command(mtd, readcmd, from, mtd->oobsize);
  1166. onenand_update_bufferram(mtd, from, 0);
  1167. ret = this->wait(mtd, FL_READING);
  1168. if (unlikely(ret))
  1169. ret = onenand_recover_lsb(mtd, from, ret);
  1170. if (ret && ret != -EBADMSG) {
  1171. printk(KERN_ERR "%s: read failed = 0x%x\n",
  1172. __func__, ret);
  1173. break;
  1174. }
  1175. if (mode == MTD_OOB_AUTO)
  1176. onenand_transfer_auto_oob(mtd, buf, column, thislen);
  1177. else
  1178. this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
  1179. read += thislen;
  1180. if (read == len)
  1181. break;
  1182. buf += thislen;
  1183. /* Read more? */
  1184. if (read < len) {
  1185. /* Page size */
  1186. from += mtd->writesize;
  1187. column = 0;
  1188. }
  1189. }
  1190. ops->oobretlen = read;
  1191. if (ret)
  1192. return ret;
  1193. if (mtd->ecc_stats.failed - stats.failed)
  1194. return -EBADMSG;
  1195. return 0;
  1196. }
  1197. /**
  1198. * onenand_read - [MTD Interface] Read data from flash
  1199. * @param mtd MTD device structure
  1200. * @param from offset to read from
  1201. * @param len number of bytes to read
  1202. * @param retlen pointer to variable to store the number of read bytes
  1203. * @param buf the databuffer to put data
  1204. *
  1205. * Read with ecc
  1206. */
  1207. static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
  1208. size_t *retlen, u_char *buf)
  1209. {
  1210. struct onenand_chip *this = mtd->priv;
  1211. struct mtd_oob_ops ops = {
  1212. .len = len,
  1213. .ooblen = 0,
  1214. .datbuf = buf,
  1215. .oobbuf = NULL,
  1216. };
  1217. int ret;
  1218. onenand_get_device(mtd, FL_READING);
  1219. ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ?
  1220. onenand_mlc_read_ops_nolock(mtd, from, &ops) :
  1221. onenand_read_ops_nolock(mtd, from, &ops);
  1222. onenand_release_device(mtd);
  1223. *retlen = ops.retlen;
  1224. return ret;
  1225. }
  1226. /**
  1227. * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
  1228. * @param mtd: MTD device structure
  1229. * @param from: offset to read from
  1230. * @param ops: oob operation description structure
  1231. * Read main and/or out-of-band
  1232. */
  1233. static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
  1234. struct mtd_oob_ops *ops)
  1235. {
  1236. struct onenand_chip *this = mtd->priv;
  1237. int ret;
  1238. switch (ops->mode) {
  1239. case MTD_OOB_PLACE:
  1240. case MTD_OOB_AUTO:
  1241. break;
  1242. case MTD_OOB_RAW:
  1243. /* Not implemented yet */
  1244. default:
  1245. return -EINVAL;
  1246. }
  1247. onenand_get_device(mtd, FL_READING);
  1248. if (ops->datbuf)
  1249. ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ?
  1250. onenand_mlc_read_ops_nolock(mtd, from, ops) :
  1251. onenand_read_ops_nolock(mtd, from, ops);
  1252. else
  1253. ret = onenand_read_oob_nolock(mtd, from, ops);
  1254. onenand_release_device(mtd);
  1255. return ret;
  1256. }
  1257. /**
  1258. * onenand_bbt_wait - [DEFAULT] wait until the command is done
  1259. * @param mtd MTD device structure
  1260. * @param state state to select the max. timeout value
  1261. *
  1262. * Wait for command done.
  1263. */
  1264. static int onenand_bbt_wait(struct mtd_info *mtd, int state)
  1265. {
  1266. struct onenand_chip *this = mtd->priv;
  1267. unsigned long timeout;
  1268. unsigned int interrupt;
  1269. unsigned int ctrl;
  1270. /* The 20 msec is enough */
  1271. timeout = jiffies + msecs_to_jiffies(20);
  1272. while (time_before(jiffies, timeout)) {
  1273. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1274. if (interrupt & ONENAND_INT_MASTER)
  1275. break;
  1276. }
  1277. /* To get correct interrupt status in timeout case */
  1278. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1279. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  1280. if (interrupt & ONENAND_INT_READ) {
  1281. int ecc = onenand_read_ecc(this);
  1282. if (ecc & ONENAND_ECC_2BIT_ALL) {
  1283. printk(KERN_WARNING "%s: ecc error = 0x%04x, "
  1284. "controller error 0x%04x\n",
  1285. __func__, ecc, ctrl);
  1286. return ONENAND_BBT_READ_ECC_ERROR;
  1287. }
  1288. } else {
  1289. printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
  1290. __func__, ctrl, interrupt);
  1291. return ONENAND_BBT_READ_FATAL_ERROR;
  1292. }
  1293. /* Initial bad block case: 0x2400 or 0x0400 */
  1294. if (ctrl & ONENAND_CTRL_ERROR) {
  1295. printk(KERN_DEBUG "%s: controller error = 0x%04x\n",
  1296. __func__, ctrl);
  1297. return ONENAND_BBT_READ_ERROR;
  1298. }
  1299. return 0;
  1300. }
  1301. /**
  1302. * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
  1303. * @param mtd MTD device structure
  1304. * @param from offset to read from
  1305. * @param ops oob operation description structure
  1306. *
  1307. * OneNAND read out-of-band data from the spare area for bbt scan
  1308. */
  1309. int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
  1310. struct mtd_oob_ops *ops)
  1311. {
  1312. struct onenand_chip *this = mtd->priv;
  1313. int read = 0, thislen, column;
  1314. int ret = 0, readcmd;
  1315. size_t len = ops->ooblen;
  1316. u_char *buf = ops->oobbuf;
  1317. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %zi\n",
  1318. __func__, (unsigned int) from, len);
  1319. /* Initialize return value */
  1320. ops->oobretlen = 0;
  1321. /* Do not allow reads past end of device */
  1322. if (unlikely((from + len) > mtd->size)) {
  1323. printk(KERN_ERR "%s: Attempt read beyond end of device\n",
  1324. __func__);
  1325. return ONENAND_BBT_READ_FATAL_ERROR;
  1326. }
  1327. /* Grab the lock and see if the device is available */
  1328. onenand_get_device(mtd, FL_READING);
  1329. column = from & (mtd->oobsize - 1);
  1330. readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1331. while (read < len) {
  1332. cond_resched();
  1333. thislen = mtd->oobsize - column;
  1334. thislen = min_t(int, thislen, len);
  1335. this->command(mtd, readcmd, from, mtd->oobsize);
  1336. onenand_update_bufferram(mtd, from, 0);
  1337. ret = this->bbt_wait(mtd, FL_READING);
  1338. if (unlikely(ret))
  1339. ret = onenand_recover_lsb(mtd, from, ret);
  1340. if (ret)
  1341. break;
  1342. this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
  1343. read += thislen;
  1344. if (read == len)
  1345. break;
  1346. buf += thislen;
  1347. /* Read more? */
  1348. if (read < len) {
  1349. /* Update Page size */
  1350. from += this->writesize;
  1351. column = 0;
  1352. }
  1353. }
  1354. /* Deselect and wake up anyone waiting on the device */
  1355. onenand_release_device(mtd);
  1356. ops->oobretlen = read;
  1357. return ret;
  1358. }
  1359. #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
  1360. /**
  1361. * onenand_verify_oob - [GENERIC] verify the oob contents after a write
  1362. * @param mtd MTD device structure
  1363. * @param buf the databuffer to verify
  1364. * @param to offset to read from
  1365. */
  1366. static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
  1367. {
  1368. struct onenand_chip *this = mtd->priv;
  1369. u_char *oob_buf = this->oob_buf;
  1370. int status, i, readcmd;
  1371. readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1372. this->command(mtd, readcmd, to, mtd->oobsize);
  1373. onenand_update_bufferram(mtd, to, 0);
  1374. status = this->wait(mtd, FL_READING);
  1375. if (status)
  1376. return status;
  1377. this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
  1378. for (i = 0; i < mtd->oobsize; i++)
  1379. if (buf[i] != 0xFF && buf[i] != oob_buf[i])
  1380. return -EBADMSG;
  1381. return 0;
  1382. }
  1383. /**
  1384. * onenand_verify - [GENERIC] verify the chip contents after a write
  1385. * @param mtd MTD device structure
  1386. * @param buf the databuffer to verify
  1387. * @param addr offset to read from
  1388. * @param len number of bytes to read and compare
  1389. */
  1390. static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
  1391. {
  1392. struct onenand_chip *this = mtd->priv;
  1393. int ret = 0;
  1394. int thislen, column;
  1395. while (len != 0) {
  1396. thislen = min_t(int, this->writesize, len);
  1397. column = addr & (this->writesize - 1);
  1398. if (column + thislen > this->writesize)
  1399. thislen = this->writesize - column;
  1400. this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
  1401. onenand_update_bufferram(mtd, addr, 0);
  1402. ret = this->wait(mtd, FL_READING);
  1403. if (ret)
  1404. return ret;
  1405. onenand_update_bufferram(mtd, addr, 1);
  1406. this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize);
  1407. if (memcmp(buf, this->verify_buf, thislen))
  1408. return -EBADMSG;
  1409. len -= thislen;
  1410. buf += thislen;
  1411. addr += thislen;
  1412. }
  1413. return 0;
  1414. }
  1415. #else
  1416. #define onenand_verify(...) (0)
  1417. #define onenand_verify_oob(...) (0)
  1418. #endif
  1419. #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
  1420. static void onenand_panic_wait(struct mtd_info *mtd)
  1421. {
  1422. struct onenand_chip *this = mtd->priv;
  1423. unsigned int interrupt;
  1424. int i;
  1425. for (i = 0; i < 2000; i++) {
  1426. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1427. if (interrupt & ONENAND_INT_MASTER)
  1428. break;
  1429. udelay(10);
  1430. }
  1431. }
  1432. /**
  1433. * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
  1434. * @param mtd MTD device structure
  1435. * @param to offset to write to
  1436. * @param len number of bytes to write
  1437. * @param retlen pointer to variable to store the number of written bytes
  1438. * @param buf the data to write
  1439. *
  1440. * Write with ECC
  1441. */
  1442. static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
  1443. size_t *retlen, const u_char *buf)
  1444. {
  1445. struct onenand_chip *this = mtd->priv;
  1446. int column, subpage;
  1447. int written = 0;
  1448. int ret = 0;
  1449. if (this->state == FL_PM_SUSPENDED)
  1450. return -EBUSY;
  1451. /* Wait for any existing operation to clear */
  1452. onenand_panic_wait(mtd);
  1453. DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
  1454. __func__, (unsigned int) to, (int) len);
  1455. /* Initialize retlen, in case of early exit */
  1456. *retlen = 0;
  1457. /* Do not allow writes past end of device */
  1458. if (unlikely((to + len) > mtd->size)) {
  1459. printk(KERN_ERR "%s: Attempt write to past end of device\n",
  1460. __func__);
  1461. return -EINVAL;
  1462. }
  1463. /* Reject writes, which are not page aligned */
  1464. if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
  1465. printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
  1466. __func__);
  1467. return -EINVAL;
  1468. }
  1469. column = to & (mtd->writesize - 1);
  1470. /* Loop until all data write */
  1471. while (written < len) {
  1472. int thislen = min_t(int, mtd->writesize - column, len - written);
  1473. u_char *wbuf = (u_char *) buf;
  1474. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
  1475. /* Partial page write */
  1476. subpage = thislen < mtd->writesize;
  1477. if (subpage) {
  1478. memset(this->page_buf, 0xff, mtd->writesize);
  1479. memcpy(this->page_buf + column, buf, thislen);
  1480. wbuf = this->page_buf;
  1481. }
  1482. this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
  1483. this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
  1484. this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
  1485. onenand_panic_wait(mtd);
  1486. /* In partial page write we don't update bufferram */
  1487. onenand_update_bufferram(mtd, to, !ret && !subpage);
  1488. if (ONENAND_IS_2PLANE(this)) {
  1489. ONENAND_SET_BUFFERRAM1(this);
  1490. onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
  1491. }
  1492. if (ret) {
  1493. printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
  1494. break;
  1495. }
  1496. written += thislen;
  1497. if (written == len)
  1498. break;
  1499. column = 0;
  1500. to += thislen;
  1501. buf += thislen;
  1502. }
  1503. *retlen = written;
  1504. return ret;
  1505. }
  1506. /**
  1507. * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
  1508. * @param mtd MTD device structure
  1509. * @param oob_buf oob buffer
  1510. * @param buf source address
  1511. * @param column oob offset to write to
  1512. * @param thislen oob length to write
  1513. */
  1514. static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
  1515. const u_char *buf, int column, int thislen)
  1516. {
  1517. struct onenand_chip *this = mtd->priv;
  1518. struct nand_oobfree *free;
  1519. int writecol = column;
  1520. int writeend = column + thislen;
  1521. int lastgap = 0;
  1522. unsigned int i;
  1523. free = this->ecclayout->oobfree;
  1524. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  1525. if (writecol >= lastgap)
  1526. writecol += free->offset - lastgap;
  1527. if (writeend >= lastgap)
  1528. writeend += free->offset - lastgap;
  1529. lastgap = free->offset + free->length;
  1530. }
  1531. free = this->ecclayout->oobfree;
  1532. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  1533. int free_end = free->offset + free->length;
  1534. if (free->offset < writeend && free_end > writecol) {
  1535. int st = max_t(int,free->offset,writecol);
  1536. int ed = min_t(int,free_end,writeend);
  1537. int n = ed - st;
  1538. memcpy(oob_buf + st, buf, n);
  1539. buf += n;
  1540. } else if (column == 0)
  1541. break;
  1542. }
  1543. return 0;
  1544. }
  1545. /**
  1546. * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
  1547. * @param mtd MTD device structure
  1548. * @param to offset to write to
  1549. * @param ops oob operation description structure
  1550. *
  1551. * Write main and/or oob with ECC
  1552. */
  1553. static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
  1554. struct mtd_oob_ops *ops)
  1555. {
  1556. struct onenand_chip *this = mtd->priv;
  1557. int written = 0, column, thislen = 0, subpage = 0;
  1558. int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
  1559. int oobwritten = 0, oobcolumn, thisooblen, oobsize;
  1560. size_t len = ops->len;
  1561. size_t ooblen = ops->ooblen;
  1562. const u_char *buf = ops->datbuf;
  1563. const u_char *oob = ops->oobbuf;
  1564. u_char *oobbuf;
  1565. int ret = 0;
  1566. DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
  1567. __func__, (unsigned int) to, (int) len);
  1568. /* Initialize retlen, in case of early exit */
  1569. ops->retlen = 0;
  1570. ops->oobretlen = 0;
  1571. /* Do not allow writes past end of device */
  1572. if (unlikely((to + len) > mtd->size)) {
  1573. printk(KERN_ERR "%s: Attempt write to past end of device\n",
  1574. __func__);
  1575. return -EINVAL;
  1576. }
  1577. /* Reject writes, which are not page aligned */
  1578. if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
  1579. printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
  1580. __func__);
  1581. return -EINVAL;
  1582. }
  1583. /* Check zero length */
  1584. if (!len)
  1585. return 0;
  1586. if (ops->mode == MTD_OOB_AUTO)
  1587. oobsize = this->ecclayout->oobavail;
  1588. else
  1589. oobsize = mtd->oobsize;
  1590. oobcolumn = to & (mtd->oobsize - 1);
  1591. column = to & (mtd->writesize - 1);
  1592. /* Loop until all data write */
  1593. while (1) {
  1594. if (written < len) {
  1595. u_char *wbuf = (u_char *) buf;
  1596. thislen = min_t(int, mtd->writesize - column, len - written);
  1597. thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
  1598. cond_resched();
  1599. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
  1600. /* Partial page write */
  1601. subpage = thislen < mtd->writesize;
  1602. if (subpage) {
  1603. memset(this->page_buf, 0xff, mtd->writesize);
  1604. memcpy(this->page_buf + column, buf, thislen);
  1605. wbuf = this->page_buf;
  1606. }
  1607. this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
  1608. if (oob) {
  1609. oobbuf = this->oob_buf;
  1610. /* We send data to spare ram with oobsize
  1611. * to prevent byte access */
  1612. memset(oobbuf, 0xff, mtd->oobsize);
  1613. if (ops->mode == MTD_OOB_AUTO)
  1614. onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
  1615. else
  1616. memcpy(oobbuf + oobcolumn, oob, thisooblen);
  1617. oobwritten += thisooblen;
  1618. oob += thisooblen;
  1619. oobcolumn = 0;
  1620. } else
  1621. oobbuf = (u_char *) ffchars;
  1622. this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
  1623. } else
  1624. ONENAND_SET_NEXT_BUFFERRAM(this);
  1625. /*
  1626. * 2 PLANE, MLC, and Flex-OneNAND do not support
  1627. * write-while-program feature.
  1628. */
  1629. if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) {
  1630. ONENAND_SET_PREV_BUFFERRAM(this);
  1631. ret = this->wait(mtd, FL_WRITING);
  1632. /* In partial page write we don't update bufferram */
  1633. onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
  1634. if (ret) {
  1635. written -= prevlen;
  1636. printk(KERN_ERR "%s: write failed %d\n",
  1637. __func__, ret);
  1638. break;
  1639. }
  1640. if (written == len) {
  1641. /* Only check verify write turn on */
  1642. ret = onenand_verify(mtd, buf - len, to - len, len);
  1643. if (ret)
  1644. printk(KERN_ERR "%s: verify failed %d\n",
  1645. __func__, ret);
  1646. break;
  1647. }
  1648. ONENAND_SET_NEXT_BUFFERRAM(this);
  1649. }
  1650. this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
  1651. /*
  1652. * 2 PLANE, MLC, and Flex-OneNAND wait here
  1653. */
  1654. if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) {
  1655. ret = this->wait(mtd, FL_WRITING);
  1656. /* In partial page write we don't update bufferram */
  1657. onenand_update_bufferram(mtd, to, !ret && !subpage);
  1658. if (ret) {
  1659. printk(KERN_ERR "%s: write failed %d\n",
  1660. __func__, ret);
  1661. break;
  1662. }
  1663. /* Only check verify write turn on */
  1664. ret = onenand_verify(mtd, buf, to, thislen);
  1665. if (ret) {
  1666. printk(KERN_ERR "%s: verify failed %d\n",
  1667. __func__, ret);
  1668. break;
  1669. }
  1670. written += thislen;
  1671. if (written == len)
  1672. break;
  1673. } else
  1674. written += thislen;
  1675. column = 0;
  1676. prev_subpage = subpage;
  1677. prev = to;
  1678. prevlen = thislen;
  1679. to += thislen;
  1680. buf += thislen;
  1681. first = 0;
  1682. }
  1683. /* In error case, clear all bufferrams */
  1684. if (written != len)
  1685. onenand_invalidate_bufferram(mtd, 0, -1);
  1686. ops->retlen = written;
  1687. ops->oobretlen = oobwritten;
  1688. return ret;
  1689. }
  1690. /**
  1691. * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
  1692. * @param mtd MTD device structure
  1693. * @param to offset to write to
  1694. * @param len number of bytes to write
  1695. * @param retlen pointer to variable to store the number of written bytes
  1696. * @param buf the data to write
  1697. * @param mode operation mode
  1698. *
  1699. * OneNAND write out-of-band
  1700. */
  1701. static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
  1702. struct mtd_oob_ops *ops)
  1703. {
  1704. struct onenand_chip *this = mtd->priv;
  1705. int column, ret = 0, oobsize;
  1706. int written = 0, oobcmd;
  1707. u_char *oobbuf;
  1708. size_t len = ops->ooblen;
  1709. const u_char *buf = ops->oobbuf;
  1710. mtd_oob_mode_t mode = ops->mode;
  1711. to += ops->ooboffs;
  1712. DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
  1713. __func__, (unsigned int) to, (int) len);
  1714. /* Initialize retlen, in case of early exit */
  1715. ops->oobretlen = 0;
  1716. if (mode == MTD_OOB_AUTO)
  1717. oobsize = this->ecclayout->oobavail;
  1718. else
  1719. oobsize = mtd->oobsize;
  1720. column = to & (mtd->oobsize - 1);
  1721. if (unlikely(column >= oobsize)) {
  1722. printk(KERN_ERR "%s: Attempted to start write outside oob\n",
  1723. __func__);
  1724. return -EINVAL;
  1725. }
  1726. /* For compatibility with NAND: Do not allow write past end of page */
  1727. if (unlikely(column + len > oobsize)) {
  1728. printk(KERN_ERR "%s: Attempt to write past end of page\n",
  1729. __func__);
  1730. return -EINVAL;
  1731. }
  1732. /* Do not allow reads past end of device */
  1733. if (unlikely(to >= mtd->size ||
  1734. column + len > ((mtd->size >> this->page_shift) -
  1735. (to >> this->page_shift)) * oobsize)) {
  1736. printk(KERN_ERR "%s: Attempted to write past end of device\n",
  1737. __func__);
  1738. return -EINVAL;
  1739. }
  1740. oobbuf = this->oob_buf;
  1741. oobcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
  1742. /* Loop until all data write */
  1743. while (written < len) {
  1744. int thislen = min_t(int, oobsize, len - written);
  1745. cond_resched();
  1746. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
  1747. /* We send data to spare ram with oobsize
  1748. * to prevent byte access */
  1749. memset(oobbuf, 0xff, mtd->oobsize);
  1750. if (mode == MTD_OOB_AUTO)
  1751. onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
  1752. else
  1753. memcpy(oobbuf + column, buf, thislen);
  1754. this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
  1755. if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) {
  1756. /* Set main area of DataRAM to 0xff*/
  1757. memset(this->page_buf, 0xff, mtd->writesize);
  1758. this->write_bufferram(mtd, ONENAND_DATARAM,
  1759. this->page_buf, 0, mtd->writesize);
  1760. }
  1761. this->command(mtd, oobcmd, to, mtd->oobsize);
  1762. onenand_update_bufferram(mtd, to, 0);
  1763. if (ONENAND_IS_2PLANE(this)) {
  1764. ONENAND_SET_BUFFERRAM1(this);
  1765. onenand_update_bufferram(mtd, to + this->writesize, 0);
  1766. }
  1767. ret = this->wait(mtd, FL_WRITING);
  1768. if (ret) {
  1769. printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
  1770. break;
  1771. }
  1772. ret = onenand_verify_oob(mtd, oobbuf, to);
  1773. if (ret) {
  1774. printk(KERN_ERR "%s: verify failed %d\n",
  1775. __func__, ret);
  1776. break;
  1777. }
  1778. written += thislen;
  1779. if (written == len)
  1780. break;
  1781. to += mtd->writesize;
  1782. buf += thislen;
  1783. column = 0;
  1784. }
  1785. ops->oobretlen = written;
  1786. return ret;
  1787. }
  1788. /**
  1789. * onenand_write - [MTD Interface] write buffer to FLASH
  1790. * @param mtd MTD device structure
  1791. * @param to offset to write to
  1792. * @param len number of bytes to write
  1793. * @param retlen pointer to variable to store the number of written bytes
  1794. * @param buf the data to write
  1795. *
  1796. * Write with ECC
  1797. */
  1798. static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
  1799. size_t *retlen, const u_char *buf)
  1800. {
  1801. struct mtd_oob_ops ops = {
  1802. .len = len,
  1803. .ooblen = 0,
  1804. .datbuf = (u_char *) buf,
  1805. .oobbuf = NULL,
  1806. };
  1807. int ret;
  1808. onenand_get_device(mtd, FL_WRITING);
  1809. ret = onenand_write_ops_nolock(mtd, to, &ops);
  1810. onenand_release_device(mtd);
  1811. *retlen = ops.retlen;
  1812. return ret;
  1813. }
  1814. /**
  1815. * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
  1816. * @param mtd: MTD device structure
  1817. * @param to: offset to write
  1818. * @param ops: oob operation description structure
  1819. */
  1820. static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
  1821. struct mtd_oob_ops *ops)
  1822. {
  1823. int ret;
  1824. switch (ops->mode) {
  1825. case MTD_OOB_PLACE:
  1826. case MTD_OOB_AUTO:
  1827. break;
  1828. case MTD_OOB_RAW:
  1829. /* Not implemented yet */
  1830. default:
  1831. return -EINVAL;
  1832. }
  1833. onenand_get_device(mtd, FL_WRITING);
  1834. if (ops->datbuf)
  1835. ret = onenand_write_ops_nolock(mtd, to, ops);
  1836. else
  1837. ret = onenand_write_oob_nolock(mtd, to, ops);
  1838. onenand_release_device(mtd);
  1839. return ret;
  1840. }
  1841. /**
  1842. * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
  1843. * @param mtd MTD device structure
  1844. * @param ofs offset from device start
  1845. * @param allowbbt 1, if its allowed to access the bbt area
  1846. *
  1847. * Check, if the block is bad. Either by reading the bad block table or
  1848. * calling of the scan function.
  1849. */
  1850. static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
  1851. {
  1852. struct onenand_chip *this = mtd->priv;
  1853. struct bbm_info *bbm = this->bbm;
  1854. /* Return info from the table */
  1855. return bbm->isbad_bbt(mtd, ofs, allowbbt);
  1856. }
  1857. static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
  1858. struct erase_info *instr)
  1859. {
  1860. struct onenand_chip *this = mtd->priv;
  1861. loff_t addr = instr->addr;
  1862. int len = instr->len;
  1863. unsigned int block_size = (1 << this->erase_shift);
  1864. int ret = 0;
  1865. while (len) {
  1866. this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
  1867. ret = this->wait(mtd, FL_VERIFYING_ERASE);
  1868. if (ret) {
  1869. printk(KERN_ERR "%s: Failed verify, block %d\n",
  1870. __func__, onenand_block(this, addr));
  1871. instr->state = MTD_ERASE_FAILED;
  1872. instr->fail_addr = addr;
  1873. return -1;
  1874. }
  1875. len -= block_size;
  1876. addr += block_size;
  1877. }
  1878. return 0;
  1879. }
  1880. /**
  1881. * onenand_multiblock_erase - [Internal] erase block(s) using multiblock erase
  1882. * @param mtd MTD device structure
  1883. * @param instr erase instruction
  1884. * @param region erase region
  1885. *
  1886. * Erase one or more blocks up to 64 block at a time
  1887. */
  1888. static int onenand_multiblock_erase(struct mtd_info *mtd,
  1889. struct erase_info *instr,
  1890. unsigned int block_size)
  1891. {
  1892. struct onenand_chip *this = mtd->priv;
  1893. loff_t addr = instr->addr;
  1894. int len = instr->len;
  1895. int eb_count = 0;
  1896. int ret = 0;
  1897. int bdry_block = 0;
  1898. instr->state = MTD_ERASING;
  1899. if (ONENAND_IS_DDP(this)) {
  1900. loff_t bdry_addr = this->chipsize >> 1;
  1901. if (addr < bdry_addr && (addr + len) > bdry_addr)
  1902. bdry_block = bdry_addr >> this->erase_shift;
  1903. }
  1904. /* Pre-check bbs */
  1905. while (len) {
  1906. /* Check if we have a bad block, we do not erase bad blocks */
  1907. if (onenand_block_isbad_nolock(mtd, addr, 0)) {
  1908. printk(KERN_WARNING "%s: attempt to erase a bad block "
  1909. "at addr 0x%012llx\n",
  1910. __func__, (unsigned long long) addr);
  1911. instr->state = MTD_ERASE_FAILED;
  1912. return -EIO;
  1913. }
  1914. len -= block_size;
  1915. addr += block_size;
  1916. }
  1917. len = instr->len;
  1918. addr = instr->addr;
  1919. /* loop over 64 eb batches */
  1920. while (len) {
  1921. struct erase_info verify_instr = *instr;
  1922. int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
  1923. verify_instr.addr = addr;
  1924. verify_instr.len = 0;
  1925. /* do not cross chip boundary */
  1926. if (bdry_block) {
  1927. int this_block = (addr >> this->erase_shift);
  1928. if (this_block < bdry_block) {
  1929. max_eb_count = min(max_eb_count,
  1930. (bdry_block - this_block));
  1931. }
  1932. }
  1933. eb_count = 0;
  1934. while (len > block_size && eb_count < (max_eb_count - 1)) {
  1935. this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
  1936. addr, block_size);
  1937. onenand_invalidate_bufferram(mtd, addr, block_size);
  1938. ret = this->wait(mtd, FL_PREPARING_ERASE);
  1939. if (ret) {
  1940. printk(KERN_ERR "%s: Failed multiblock erase, "
  1941. "block %d\n", __func__,
  1942. onenand_block(this, addr));
  1943. instr->state = MTD_ERASE_FAILED;
  1944. instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
  1945. return -EIO;
  1946. }
  1947. len -= block_size;
  1948. addr += block_size;
  1949. eb_count++;
  1950. }
  1951. /* last block of 64-eb series */
  1952. cond_resched();
  1953. this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
  1954. onenand_invalidate_bufferram(mtd, addr, block_size);
  1955. ret = this->wait(mtd, FL_ERASING);
  1956. /* Check if it is write protected */
  1957. if (ret) {
  1958. printk(KERN_ERR "%s: Failed erase, block %d\n",
  1959. __func__, onenand_block(this, addr));
  1960. instr->state = MTD_ERASE_FAILED;
  1961. instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
  1962. return -EIO;
  1963. }
  1964. len -= block_size;
  1965. addr += block_size;
  1966. eb_count++;
  1967. /* verify */
  1968. verify_instr.len = eb_count * block_size;
  1969. if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
  1970. instr->state = verify_instr.state;
  1971. instr->fail_addr = verify_instr.fail_addr;
  1972. return -EIO;
  1973. }
  1974. }
  1975. return 0;
  1976. }
  1977. /**
  1978. * onenand_block_by_block_erase - [Internal] erase block(s) using regular erase
  1979. * @param mtd MTD device structure
  1980. * @param instr erase instruction
  1981. * @param region erase region
  1982. * @param block_size erase block size
  1983. *
  1984. * Erase one or more blocks one block at a time
  1985. */
  1986. static int onenand_block_by_block_erase(struct mtd_info *mtd,
  1987. struct erase_info *instr,
  1988. struct mtd_erase_region_info *region,
  1989. unsigned int block_size)
  1990. {
  1991. struct onenand_chip *this = mtd->priv;
  1992. loff_t addr = instr->addr;
  1993. int len = instr->len;
  1994. loff_t region_end = 0;
  1995. int ret = 0;
  1996. if (region) {
  1997. /* region is set for Flex-OneNAND */
  1998. region_end = region->offset + region->erasesize * region->numblocks;
  1999. }
  2000. instr->state = MTD_ERASING;
  2001. /* Loop through the blocks */
  2002. while (len) {
  2003. cond_resched();
  2004. /* Check if we have a bad block, we do not erase bad blocks */
  2005. if (onenand_block_isbad_nolock(mtd, addr, 0)) {
  2006. printk(KERN_WARNING "%s: attempt to erase a bad block "
  2007. "at addr 0x%012llx\n",
  2008. __func__, (unsigned long long) addr);
  2009. instr->state = MTD_ERASE_FAILED;
  2010. return -EIO;
  2011. }
  2012. this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
  2013. onenand_invalidate_bufferram(mtd, addr, block_size);
  2014. ret = this->wait(mtd, FL_ERASING);
  2015. /* Check, if it is write protected */
  2016. if (ret) {
  2017. printk(KERN_ERR "%s: Failed erase, block %d\n",
  2018. __func__, onenand_block(this, addr));
  2019. instr->state = MTD_ERASE_FAILED;
  2020. instr->fail_addr = addr;
  2021. return -EIO;
  2022. }
  2023. len -= block_size;
  2024. addr += block_size;
  2025. if (addr == region_end) {
  2026. if (!len)
  2027. break;
  2028. region++;
  2029. block_size = region->erasesize;
  2030. region_end = region->offset + region->erasesize * region->numblocks;
  2031. if (len & (block_size - 1)) {
  2032. /* FIXME: This should be handled at MTD partitioning level. */
  2033. printk(KERN_ERR "%s: Unaligned address\n",
  2034. __func__);
  2035. return -EIO;
  2036. }
  2037. }
  2038. }
  2039. return 0;
  2040. }
  2041. /**
  2042. * onenand_erase - [MTD Interface] erase block(s)
  2043. * @param mtd MTD device structure
  2044. * @param instr erase instruction
  2045. *
  2046. * Erase one or more blocks
  2047. */
  2048. static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
  2049. {
  2050. struct onenand_chip *this = mtd->priv;
  2051. unsigned int block_size;
  2052. loff_t addr = instr->addr;
  2053. loff_t len = instr->len;
  2054. int ret = 0;
  2055. struct mtd_erase_region_info *region = NULL;
  2056. loff_t region_offset = 0;
  2057. DEBUG(MTD_DEBUG_LEVEL3, "%s: start=0x%012llx, len=%llu\n", __func__,
  2058. (unsigned long long) instr->addr, (unsigned long long) instr->len);
  2059. /* Do not allow erase past end of device */
  2060. if (unlikely((len + addr) > mtd->size)) {
  2061. printk(KERN_ERR "%s: Erase past end of device\n", __func__);
  2062. return -EINVAL;
  2063. }
  2064. if (FLEXONENAND(this)) {
  2065. /* Find the eraseregion of this address */
  2066. int i = flexonenand_region(mtd, addr);
  2067. region = &mtd->eraseregions[i];
  2068. block_size = region->erasesize;
  2069. /* Start address within region must align on block boundary.
  2070. * Erase region's start offset is always block start address.
  2071. */
  2072. region_offset = region->offset;
  2073. } else
  2074. block_size = 1 << this->erase_shift;
  2075. /* Start address must align on block boundary */
  2076. if (unlikely((addr - region_offset) & (block_size - 1))) {
  2077. printk(KERN_ERR "%s: Unaligned address\n", __func__);
  2078. return -EINVAL;
  2079. }
  2080. /* Length must align on block boundary */
  2081. if (unlikely(len & (block_size - 1))) {
  2082. printk(KERN_ERR "%s: Length not block aligned\n", __func__);
  2083. return -EINVAL;
  2084. }
  2085. instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
  2086. /* Grab the lock and see if the device is available */
  2087. onenand_get_device(mtd, FL_ERASING);
  2088. if (region || instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
  2089. /* region is set for Flex-OneNAND (no mb erase) */
  2090. ret = onenand_block_by_block_erase(mtd, instr,
  2091. region, block_size);
  2092. } else {
  2093. ret = onenand_multiblock_erase(mtd, instr, block_size);
  2094. }
  2095. /* Deselect and wake up anyone waiting on the device */
  2096. onenand_release_device(mtd);
  2097. /* Do call back function */
  2098. if (!ret) {
  2099. instr->state = MTD_ERASE_DONE;
  2100. mtd_erase_callback(instr);
  2101. }
  2102. return ret;
  2103. }
  2104. /**
  2105. * onenand_sync - [MTD Interface] sync
  2106. * @param mtd MTD device structure
  2107. *
  2108. * Sync is actually a wait for chip ready function
  2109. */
  2110. static void onenand_sync(struct mtd_info *mtd)
  2111. {
  2112. DEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__);
  2113. /* Grab the lock and see if the device is available */
  2114. onenand_get_device(mtd, FL_SYNCING);
  2115. /* Release it and go back */
  2116. onenand_release_device(mtd);
  2117. }
  2118. /**
  2119. * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
  2120. * @param mtd MTD device structure
  2121. * @param ofs offset relative to mtd start
  2122. *
  2123. * Check whether the block is bad
  2124. */
  2125. static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
  2126. {
  2127. int ret;
  2128. /* Check for invalid offset */
  2129. if (ofs > mtd->size)
  2130. return -EINVAL;
  2131. onenand_get_device(mtd, FL_READING);
  2132. ret = onenand_block_isbad_nolock(mtd, ofs, 0);
  2133. onenand_release_device(mtd);
  2134. return ret;
  2135. }
  2136. /**
  2137. * onenand_default_block_markbad - [DEFAULT] mark a block bad
  2138. * @param mtd MTD device structure
  2139. * @param ofs offset from device start
  2140. *
  2141. * This is the default implementation, which can be overridden by
  2142. * a hardware specific driver.
  2143. */
  2144. static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
  2145. {
  2146. struct onenand_chip *this = mtd->priv;
  2147. struct bbm_info *bbm = this->bbm;
  2148. u_char buf[2] = {0, 0};
  2149. struct mtd_oob_ops ops = {
  2150. .mode = MTD_OOB_PLACE,
  2151. .ooblen = 2,
  2152. .oobbuf = buf,
  2153. .ooboffs = 0,
  2154. };
  2155. int block;
  2156. /* Get block number */
  2157. block = onenand_block(this, ofs);
  2158. if (bbm->bbt)
  2159. bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
  2160. /* We write two bytes, so we don't have to mess with 16-bit access */
  2161. ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
  2162. /* FIXME : What to do when marking SLC block in partition
  2163. * with MLC erasesize? For now, it is not advisable to
  2164. * create partitions containing both SLC and MLC regions.
  2165. */
  2166. return onenand_write_oob_nolock(mtd, ofs, &ops);
  2167. }
  2168. /**
  2169. * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
  2170. * @param mtd MTD device structure
  2171. * @param ofs offset relative to mtd start
  2172. *
  2173. * Mark the block as bad
  2174. */
  2175. static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
  2176. {
  2177. struct onenand_chip *this = mtd->priv;
  2178. int ret;
  2179. ret = onenand_block_isbad(mtd, ofs);
  2180. if (ret) {
  2181. /* If it was bad already, return success and do nothing */
  2182. if (ret > 0)
  2183. return 0;
  2184. return ret;
  2185. }
  2186. onenand_get_device(mtd, FL_WRITING);
  2187. ret = this->block_markbad(mtd, ofs);
  2188. onenand_release_device(mtd);
  2189. return ret;
  2190. }
  2191. /**
  2192. * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
  2193. * @param mtd MTD device structure
  2194. * @param ofs offset relative to mtd start
  2195. * @param len number of bytes to lock or unlock
  2196. * @param cmd lock or unlock command
  2197. *
  2198. * Lock or unlock one or more blocks
  2199. */
  2200. static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
  2201. {
  2202. struct onenand_chip *this = mtd->priv;
  2203. int start, end, block, value, status;
  2204. int wp_status_mask;
  2205. start = onenand_block(this, ofs);
  2206. end = onenand_block(this, ofs + len) - 1;
  2207. if (cmd == ONENAND_CMD_LOCK)
  2208. wp_status_mask = ONENAND_WP_LS;
  2209. else
  2210. wp_status_mask = ONENAND_WP_US;
  2211. /* Continuous lock scheme */
  2212. if (this->options & ONENAND_HAS_CONT_LOCK) {
  2213. /* Set start block address */
  2214. this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2215. /* Set end block address */
  2216. this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
  2217. /* Write lock command */
  2218. this->command(mtd, cmd, 0, 0);
  2219. /* There's no return value */
  2220. this->wait(mtd, FL_LOCKING);
  2221. /* Sanity check */
  2222. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  2223. & ONENAND_CTRL_ONGO)
  2224. continue;
  2225. /* Check lock status */
  2226. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  2227. if (!(status & wp_status_mask))
  2228. printk(KERN_ERR "%s: wp status = 0x%x\n",
  2229. __func__, status);
  2230. return 0;
  2231. }
  2232. /* Block lock scheme */
  2233. for (block = start; block < end + 1; block++) {
  2234. /* Set block address */
  2235. value = onenand_block_address(this, block);
  2236. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  2237. /* Select DataRAM for DDP */
  2238. value = onenand_bufferram_address(this, block);
  2239. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  2240. /* Set start block address */
  2241. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2242. /* Write lock command */
  2243. this->command(mtd, cmd, 0, 0);
  2244. /* There's no return value */
  2245. this->wait(mtd, FL_LOCKING);
  2246. /* Sanity check */
  2247. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  2248. & ONENAND_CTRL_ONGO)
  2249. continue;
  2250. /* Check lock status */
  2251. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  2252. if (!(status & wp_status_mask))
  2253. printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
  2254. __func__, block, status);
  2255. }
  2256. return 0;
  2257. }
  2258. /**
  2259. * onenand_lock - [MTD Interface] Lock block(s)
  2260. * @param mtd MTD device structure
  2261. * @param ofs offset relative to mtd start
  2262. * @param len number of bytes to unlock
  2263. *
  2264. * Lock one or more blocks
  2265. */
  2266. static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
  2267. {
  2268. int ret;
  2269. onenand_get_device(mtd, FL_LOCKING);
  2270. ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
  2271. onenand_release_device(mtd);
  2272. return ret;
  2273. }
  2274. /**
  2275. * onenand_unlock - [MTD Interface] Unlock block(s)
  2276. * @param mtd MTD device structure
  2277. * @param ofs offset relative to mtd start
  2278. * @param len number of bytes to unlock
  2279. *
  2280. * Unlock one or more blocks
  2281. */
  2282. static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
  2283. {
  2284. int ret;
  2285. onenand_get_device(mtd, FL_LOCKING);
  2286. ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
  2287. onenand_release_device(mtd);
  2288. return ret;
  2289. }
  2290. /**
  2291. * onenand_check_lock_status - [OneNAND Interface] Check lock status
  2292. * @param this onenand chip data structure
  2293. *
  2294. * Check lock status
  2295. */
  2296. static int onenand_check_lock_status(struct onenand_chip *this)
  2297. {
  2298. unsigned int value, block, status;
  2299. unsigned int end;
  2300. end = this->chipsize >> this->erase_shift;
  2301. for (block = 0; block < end; block++) {
  2302. /* Set block address */
  2303. value = onenand_block_address(this, block);
  2304. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  2305. /* Select DataRAM for DDP */
  2306. value = onenand_bufferram_address(this, block);
  2307. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  2308. /* Set start block address */
  2309. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2310. /* Check lock status */
  2311. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  2312. if (!(status & ONENAND_WP_US)) {
  2313. printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
  2314. __func__, block, status);
  2315. return 0;
  2316. }
  2317. }
  2318. return 1;
  2319. }
  2320. /**
  2321. * onenand_unlock_all - [OneNAND Interface] unlock all blocks
  2322. * @param mtd MTD device structure
  2323. *
  2324. * Unlock all blocks
  2325. */
  2326. static void onenand_unlock_all(struct mtd_info *mtd)
  2327. {
  2328. struct onenand_chip *this = mtd->priv;
  2329. loff_t ofs = 0;
  2330. loff_t len = mtd->size;
  2331. if (this->options & ONENAND_HAS_UNLOCK_ALL) {
  2332. /* Set start block address */
  2333. this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2334. /* Write unlock command */
  2335. this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
  2336. /* There's no return value */
  2337. this->wait(mtd, FL_LOCKING);
  2338. /* Sanity check */
  2339. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  2340. & ONENAND_CTRL_ONGO)
  2341. continue;
  2342. /* Don't check lock status */
  2343. if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
  2344. return;
  2345. /* Check lock status */
  2346. if (onenand_check_lock_status(this))
  2347. return;
  2348. /* Workaround for all block unlock in DDP */
  2349. if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
  2350. /* All blocks on another chip */
  2351. ofs = this->chipsize >> 1;
  2352. len = this->chipsize >> 1;
  2353. }
  2354. }
  2355. onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
  2356. }
  2357. #ifdef CONFIG_MTD_ONENAND_OTP
  2358. /**
  2359. * onenand_otp_command - Send OTP specific command to OneNAND device
  2360. * @param mtd MTD device structure
  2361. * @param cmd the command to be sent
  2362. * @param addr offset to read from or write to
  2363. * @param len number of bytes to read or write
  2364. */
  2365. static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
  2366. size_t len)
  2367. {
  2368. struct onenand_chip *this = mtd->priv;
  2369. int value, block, page;
  2370. /* Address translation */
  2371. switch (cmd) {
  2372. case ONENAND_CMD_OTP_ACCESS:
  2373. block = (int) (addr >> this->erase_shift);
  2374. page = -1;
  2375. break;
  2376. default:
  2377. block = (int) (addr >> this->erase_shift);
  2378. page = (int) (addr >> this->page_shift);
  2379. if (ONENAND_IS_2PLANE(this)) {
  2380. /* Make the even block number */
  2381. block &= ~1;
  2382. /* Is it the odd plane? */
  2383. if (addr & this->writesize)
  2384. block++;
  2385. page >>= 1;
  2386. }
  2387. page &= this->page_mask;
  2388. break;
  2389. }
  2390. if (block != -1) {
  2391. /* Write 'DFS, FBA' of Flash */
  2392. value = onenand_block_address(this, block);
  2393. this->write_word(value, this->base +
  2394. ONENAND_REG_START_ADDRESS1);
  2395. }
  2396. if (page != -1) {
  2397. /* Now we use page size operation */
  2398. int sectors = 4, count = 4;
  2399. int dataram;
  2400. switch (cmd) {
  2401. default:
  2402. if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
  2403. cmd = ONENAND_CMD_2X_PROG;
  2404. dataram = ONENAND_CURRENT_BUFFERRAM(this);
  2405. break;
  2406. }
  2407. /* Write 'FPA, FSA' of Flash */
  2408. value = onenand_page_address(page, sectors);
  2409. this->write_word(value, this->base +
  2410. ONENAND_REG_START_ADDRESS8);
  2411. /* Write 'BSA, BSC' of DataRAM */
  2412. value = onenand_buffer_address(dataram, sectors, count);
  2413. this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
  2414. }
  2415. /* Interrupt clear */
  2416. this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
  2417. /* Write command */
  2418. this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
  2419. return 0;
  2420. }
  2421. /**
  2422. * onenand_otp_write_oob_nolock - [Internal] OneNAND write out-of-band, specific to OTP
  2423. * @param mtd MTD device structure
  2424. * @param to offset to write to
  2425. * @param len number of bytes to write
  2426. * @param retlen pointer to variable to store the number of written bytes
  2427. * @param buf the data to write
  2428. *
  2429. * OneNAND write out-of-band only for OTP
  2430. */
  2431. static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
  2432. struct mtd_oob_ops *ops)
  2433. {
  2434. struct onenand_chip *this = mtd->priv;
  2435. int column, ret = 0, oobsize;
  2436. int written = 0;
  2437. u_char *oobbuf;
  2438. size_t len = ops->ooblen;
  2439. const u_char *buf = ops->oobbuf;
  2440. int block, value, status;
  2441. to += ops->ooboffs;
  2442. /* Initialize retlen, in case of early exit */
  2443. ops->oobretlen = 0;
  2444. oobsize = mtd->oobsize;
  2445. column = to & (mtd->oobsize - 1);
  2446. oobbuf = this->oob_buf;
  2447. /* Loop until all data write */
  2448. while (written < len) {
  2449. int thislen = min_t(int, oobsize, len - written);
  2450. cond_resched();
  2451. block = (int) (to >> this->erase_shift);
  2452. /*
  2453. * Write 'DFS, FBA' of Flash
  2454. * Add: F100h DQ=DFS, FBA
  2455. */
  2456. value = onenand_block_address(this, block);
  2457. this->write_word(value, this->base +
  2458. ONENAND_REG_START_ADDRESS1);
  2459. /*
  2460. * Select DataRAM for DDP
  2461. * Add: F101h DQ=DBS
  2462. */
  2463. value = onenand_bufferram_address(this, block);
  2464. this->write_word(value, this->base +
  2465. ONENAND_REG_START_ADDRESS2);
  2466. ONENAND_SET_NEXT_BUFFERRAM(this);
  2467. /*
  2468. * Enter OTP access mode
  2469. */
  2470. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2471. this->wait(mtd, FL_OTPING);
  2472. /* We send data to spare ram with oobsize
  2473. * to prevent byte access */
  2474. memcpy(oobbuf + column, buf, thislen);
  2475. /*
  2476. * Write Data into DataRAM
  2477. * Add: 8th Word
  2478. * in sector0/spare/page0
  2479. * DQ=XXFCh
  2480. */
  2481. this->write_bufferram(mtd, ONENAND_SPARERAM,
  2482. oobbuf, 0, mtd->oobsize);
  2483. onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
  2484. onenand_update_bufferram(mtd, to, 0);
  2485. if (ONENAND_IS_2PLANE(this)) {
  2486. ONENAND_SET_BUFFERRAM1(this);
  2487. onenand_update_bufferram(mtd, to + this->writesize, 0);
  2488. }
  2489. ret = this->wait(mtd, FL_WRITING);
  2490. if (ret) {
  2491. printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
  2492. break;
  2493. }
  2494. /* Exit OTP access mode */
  2495. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2496. this->wait(mtd, FL_RESETING);
  2497. status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  2498. status &= 0x60;
  2499. if (status == 0x60) {
  2500. printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
  2501. printk(KERN_DEBUG "1st Block\tLOCKED\n");
  2502. printk(KERN_DEBUG "OTP Block\tLOCKED\n");
  2503. } else if (status == 0x20) {
  2504. printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
  2505. printk(KERN_DEBUG "1st Block\tLOCKED\n");
  2506. printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
  2507. } else if (status == 0x40) {
  2508. printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
  2509. printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
  2510. printk(KERN_DEBUG "OTP Block\tLOCKED\n");
  2511. } else {
  2512. printk(KERN_DEBUG "Reboot to check\n");
  2513. }
  2514. written += thislen;
  2515. if (written == len)
  2516. break;
  2517. to += mtd->writesize;
  2518. buf += thislen;
  2519. column = 0;
  2520. }
  2521. ops->oobretlen = written;
  2522. return ret;
  2523. }
  2524. /* Internal OTP operation */
  2525. typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
  2526. size_t *retlen, u_char *buf);
  2527. /**
  2528. * do_otp_read - [DEFAULT] Read OTP block area
  2529. * @param mtd MTD device structure
  2530. * @param from The offset to read
  2531. * @param len number of bytes to read
  2532. * @param retlen pointer to variable to store the number of readbytes
  2533. * @param buf the databuffer to put/get data
  2534. *
  2535. * Read OTP block area.
  2536. */
  2537. static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
  2538. size_t *retlen, u_char *buf)
  2539. {
  2540. struct onenand_chip *this = mtd->priv;
  2541. struct mtd_oob_ops ops = {
  2542. .len = len,
  2543. .ooblen = 0,
  2544. .datbuf = buf,
  2545. .oobbuf = NULL,
  2546. };
  2547. int ret;
  2548. /* Enter OTP access mode */
  2549. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2550. this->wait(mtd, FL_OTPING);
  2551. ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ?
  2552. onenand_mlc_read_ops_nolock(mtd, from, &ops) :
  2553. onenand_read_ops_nolock(mtd, from, &ops);
  2554. /* Exit OTP access mode */
  2555. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2556. this->wait(mtd, FL_RESETING);
  2557. return ret;
  2558. }
  2559. /**
  2560. * do_otp_write - [DEFAULT] Write OTP block area
  2561. * @param mtd MTD device structure
  2562. * @param to The offset to write
  2563. * @param len number of bytes to write
  2564. * @param retlen pointer to variable to store the number of write bytes
  2565. * @param buf the databuffer to put/get data
  2566. *
  2567. * Write OTP block area.
  2568. */
  2569. static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
  2570. size_t *retlen, u_char *buf)
  2571. {
  2572. struct onenand_chip *this = mtd->priv;
  2573. unsigned char *pbuf = buf;
  2574. int ret;
  2575. struct mtd_oob_ops ops;
  2576. /* Force buffer page aligned */
  2577. if (len < mtd->writesize) {
  2578. memcpy(this->page_buf, buf, len);
  2579. memset(this->page_buf + len, 0xff, mtd->writesize - len);
  2580. pbuf = this->page_buf;
  2581. len = mtd->writesize;
  2582. }
  2583. /* Enter OTP access mode */
  2584. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2585. this->wait(mtd, FL_OTPING);
  2586. ops.len = len;
  2587. ops.ooblen = 0;
  2588. ops.datbuf = pbuf;
  2589. ops.oobbuf = NULL;
  2590. ret = onenand_write_ops_nolock(mtd, to, &ops);
  2591. *retlen = ops.retlen;
  2592. /* Exit OTP access mode */
  2593. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2594. this->wait(mtd, FL_RESETING);
  2595. return ret;
  2596. }
  2597. /**
  2598. * do_otp_lock - [DEFAULT] Lock OTP block area
  2599. * @param mtd MTD device structure
  2600. * @param from The offset to lock
  2601. * @param len number of bytes to lock
  2602. * @param retlen pointer to variable to store the number of lock bytes
  2603. * @param buf the databuffer to put/get data
  2604. *
  2605. * Lock OTP block area.
  2606. */
  2607. static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
  2608. size_t *retlen, u_char *buf)
  2609. {
  2610. struct onenand_chip *this = mtd->priv;
  2611. struct mtd_oob_ops ops;
  2612. int ret;
  2613. if (FLEXONENAND(this)) {
  2614. /* Enter OTP access mode */
  2615. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2616. this->wait(mtd, FL_OTPING);
  2617. /*
  2618. * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
  2619. * main area of page 49.
  2620. */
  2621. ops.len = mtd->writesize;
  2622. ops.ooblen = 0;
  2623. ops.datbuf = buf;
  2624. ops.oobbuf = NULL;
  2625. ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
  2626. *retlen = ops.retlen;
  2627. /* Exit OTP access mode */
  2628. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2629. this->wait(mtd, FL_RESETING);
  2630. } else {
  2631. ops.mode = MTD_OOB_PLACE;
  2632. ops.ooblen = len;
  2633. ops.oobbuf = buf;
  2634. ops.ooboffs = 0;
  2635. ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
  2636. *retlen = ops.oobretlen;
  2637. }
  2638. return ret;
  2639. }
  2640. /**
  2641. * onenand_otp_walk - [DEFAULT] Handle OTP operation
  2642. * @param mtd MTD device structure
  2643. * @param from The offset to read/write
  2644. * @param len number of bytes to read/write
  2645. * @param retlen pointer to variable to store the number of read bytes
  2646. * @param buf the databuffer to put/get data
  2647. * @param action do given action
  2648. * @param mode specify user and factory
  2649. *
  2650. * Handle OTP operation.
  2651. */
  2652. static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
  2653. size_t *retlen, u_char *buf,
  2654. otp_op_t action, int mode)
  2655. {
  2656. struct onenand_chip *this = mtd->priv;
  2657. int otp_pages;
  2658. int density;
  2659. int ret = 0;
  2660. *retlen = 0;
  2661. density = onenand_get_density(this->device_id);
  2662. if (density < ONENAND_DEVICE_DENSITY_512Mb)
  2663. otp_pages = 20;
  2664. else
  2665. otp_pages = 50;
  2666. if (mode == MTD_OTP_FACTORY) {
  2667. from += mtd->writesize * otp_pages;
  2668. otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
  2669. }
  2670. /* Check User/Factory boundary */
  2671. if (mode == MTD_OTP_USER) {
  2672. if (mtd->writesize * otp_pages < from + len)
  2673. return 0;
  2674. } else {
  2675. if (mtd->writesize * otp_pages < len)
  2676. return 0;
  2677. }
  2678. onenand_get_device(mtd, FL_OTPING);
  2679. while (len > 0 && otp_pages > 0) {
  2680. if (!action) { /* OTP Info functions */
  2681. struct otp_info *otpinfo;
  2682. len -= sizeof(struct otp_info);
  2683. if (len <= 0) {
  2684. ret = -ENOSPC;
  2685. break;
  2686. }
  2687. otpinfo = (struct otp_info *) buf;
  2688. otpinfo->start = from;
  2689. otpinfo->length = mtd->writesize;
  2690. otpinfo->locked = 0;
  2691. from += mtd->writesize;
  2692. buf += sizeof(struct otp_info);
  2693. *retlen += sizeof(struct otp_info);
  2694. } else {
  2695. size_t tmp_retlen;
  2696. ret = action(mtd, from, len, &tmp_retlen, buf);
  2697. buf += tmp_retlen;
  2698. len -= tmp_retlen;
  2699. *retlen += tmp_retlen;
  2700. if (ret)
  2701. break;
  2702. }
  2703. otp_pages--;
  2704. }
  2705. onenand_release_device(mtd);
  2706. return ret;
  2707. }
  2708. /**
  2709. * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
  2710. * @param mtd MTD device structure
  2711. * @param buf the databuffer to put/get data
  2712. * @param len number of bytes to read
  2713. *
  2714. * Read factory OTP info.
  2715. */
  2716. static int onenand_get_fact_prot_info(struct mtd_info *mtd,
  2717. struct otp_info *buf, size_t len)
  2718. {
  2719. size_t retlen;
  2720. int ret;
  2721. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
  2722. return ret ? : retlen;
  2723. }
  2724. /**
  2725. * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
  2726. * @param mtd MTD device structure
  2727. * @param from The offset to read
  2728. * @param len number of bytes to read
  2729. * @param retlen pointer to variable to store the number of read bytes
  2730. * @param buf the databuffer to put/get data
  2731. *
  2732. * Read factory OTP area.
  2733. */
  2734. static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
  2735. size_t len, size_t *retlen, u_char *buf)
  2736. {
  2737. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
  2738. }
  2739. /**
  2740. * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
  2741. * @param mtd MTD device structure
  2742. * @param buf the databuffer to put/get data
  2743. * @param len number of bytes to read
  2744. *
  2745. * Read user OTP info.
  2746. */
  2747. static int onenand_get_user_prot_info(struct mtd_info *mtd,
  2748. struct otp_info *buf, size_t len)
  2749. {
  2750. size_t retlen;
  2751. int ret;
  2752. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
  2753. return ret ? : retlen;
  2754. }
  2755. /**
  2756. * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
  2757. * @param mtd MTD device structure
  2758. * @param from The offset to read
  2759. * @param len number of bytes to read
  2760. * @param retlen pointer to variable to store the number of read bytes
  2761. * @param buf the databuffer to put/get data
  2762. *
  2763. * Read user OTP area.
  2764. */
  2765. static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
  2766. size_t len, size_t *retlen, u_char *buf)
  2767. {
  2768. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
  2769. }
  2770. /**
  2771. * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
  2772. * @param mtd MTD device structure
  2773. * @param from The offset to write
  2774. * @param len number of bytes to write
  2775. * @param retlen pointer to variable to store the number of write bytes
  2776. * @param buf the databuffer to put/get data
  2777. *
  2778. * Write user OTP area.
  2779. */
  2780. static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
  2781. size_t len, size_t *retlen, u_char *buf)
  2782. {
  2783. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
  2784. }
  2785. /**
  2786. * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
  2787. * @param mtd MTD device structure
  2788. * @param from The offset to lock
  2789. * @param len number of bytes to unlock
  2790. *
  2791. * Write lock mark on spare area in page 0 in OTP block
  2792. */
  2793. static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
  2794. size_t len)
  2795. {
  2796. struct onenand_chip *this = mtd->priv;
  2797. u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
  2798. size_t retlen;
  2799. int ret;
  2800. unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
  2801. memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
  2802. : mtd->oobsize);
  2803. /*
  2804. * Write lock mark to 8th word of sector0 of page0 of the spare0.
  2805. * We write 16 bytes spare area instead of 2 bytes.
  2806. * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
  2807. * main area of page 49.
  2808. */
  2809. from = 0;
  2810. len = FLEXONENAND(this) ? mtd->writesize : 16;
  2811. /*
  2812. * Note: OTP lock operation
  2813. * OTP block : 0xXXFC XX 1111 1100
  2814. * 1st block : 0xXXF3 (If chip support) XX 1111 0011
  2815. * Both : 0xXXF0 (If chip support) XX 1111 0000
  2816. */
  2817. if (FLEXONENAND(this))
  2818. otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
  2819. /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
  2820. if (otp == 1)
  2821. buf[otp_lock_offset] = 0xFC;
  2822. else if (otp == 2)
  2823. buf[otp_lock_offset] = 0xF3;
  2824. else if (otp == 3)
  2825. buf[otp_lock_offset] = 0xF0;
  2826. else if (otp != 0)
  2827. printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
  2828. ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
  2829. return ret ? : retlen;
  2830. }
  2831. #endif /* CONFIG_MTD_ONENAND_OTP */
  2832. /**
  2833. * onenand_check_features - Check and set OneNAND features
  2834. * @param mtd MTD data structure
  2835. *
  2836. * Check and set OneNAND features
  2837. * - lock scheme
  2838. * - two plane
  2839. */
  2840. static void onenand_check_features(struct mtd_info *mtd)
  2841. {
  2842. struct onenand_chip *this = mtd->priv;
  2843. unsigned int density, process;
  2844. /* Lock scheme depends on density and process */
  2845. density = onenand_get_density(this->device_id);
  2846. process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
  2847. /* Lock scheme */
  2848. switch (density) {
  2849. case ONENAND_DEVICE_DENSITY_4Gb:
  2850. if (ONENAND_IS_DDP(this))
  2851. this->options |= ONENAND_HAS_2PLANE;
  2852. else
  2853. this->options |= ONENAND_HAS_4KB_PAGE;
  2854. case ONENAND_DEVICE_DENSITY_2Gb:
  2855. /* 2Gb DDP does not have 2 plane */
  2856. if (!ONENAND_IS_DDP(this))
  2857. this->options |= ONENAND_HAS_2PLANE;
  2858. this->options |= ONENAND_HAS_UNLOCK_ALL;
  2859. case ONENAND_DEVICE_DENSITY_1Gb:
  2860. /* A-Die has all block unlock */
  2861. if (process)
  2862. this->options |= ONENAND_HAS_UNLOCK_ALL;
  2863. break;
  2864. default:
  2865. /* Some OneNAND has continuous lock scheme */
  2866. if (!process)
  2867. this->options |= ONENAND_HAS_CONT_LOCK;
  2868. break;
  2869. }
  2870. if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this))
  2871. this->options &= ~ONENAND_HAS_2PLANE;
  2872. if (FLEXONENAND(this)) {
  2873. this->options &= ~ONENAND_HAS_CONT_LOCK;
  2874. this->options |= ONENAND_HAS_UNLOCK_ALL;
  2875. }
  2876. if (this->options & ONENAND_HAS_CONT_LOCK)
  2877. printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
  2878. if (this->options & ONENAND_HAS_UNLOCK_ALL)
  2879. printk(KERN_DEBUG "Chip support all block unlock\n");
  2880. if (this->options & ONENAND_HAS_2PLANE)
  2881. printk(KERN_DEBUG "Chip has 2 plane\n");
  2882. if (this->options & ONENAND_HAS_4KB_PAGE)
  2883. printk(KERN_DEBUG "Chip has 4KiB pagesize\n");
  2884. }
  2885. /**
  2886. * onenand_print_device_info - Print device & version ID
  2887. * @param device device ID
  2888. * @param version version ID
  2889. *
  2890. * Print device & version ID
  2891. */
  2892. static void onenand_print_device_info(int device, int version)
  2893. {
  2894. int vcc, demuxed, ddp, density, flexonenand;
  2895. vcc = device & ONENAND_DEVICE_VCC_MASK;
  2896. demuxed = device & ONENAND_DEVICE_IS_DEMUX;
  2897. ddp = device & ONENAND_DEVICE_IS_DDP;
  2898. density = onenand_get_density(device);
  2899. flexonenand = device & DEVICE_IS_FLEXONENAND;
  2900. printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
  2901. demuxed ? "" : "Muxed ",
  2902. flexonenand ? "Flex-" : "",
  2903. ddp ? "(DDP)" : "",
  2904. (16 << density),
  2905. vcc ? "2.65/3.3" : "1.8",
  2906. device);
  2907. printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
  2908. }
  2909. static const struct onenand_manufacturers onenand_manuf_ids[] = {
  2910. {ONENAND_MFR_SAMSUNG, "Samsung"},
  2911. {ONENAND_MFR_NUMONYX, "Numonyx"},
  2912. };
  2913. /**
  2914. * onenand_check_maf - Check manufacturer ID
  2915. * @param manuf manufacturer ID
  2916. *
  2917. * Check manufacturer ID
  2918. */
  2919. static int onenand_check_maf(int manuf)
  2920. {
  2921. int size = ARRAY_SIZE(onenand_manuf_ids);
  2922. char *name;
  2923. int i;
  2924. for (i = 0; i < size; i++)
  2925. if (manuf == onenand_manuf_ids[i].id)
  2926. break;
  2927. if (i < size)
  2928. name = onenand_manuf_ids[i].name;
  2929. else
  2930. name = "Unknown";
  2931. printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
  2932. return (i == size);
  2933. }
  2934. /**
  2935. * flexonenand_get_boundary - Reads the SLC boundary
  2936. * @param onenand_info - onenand info structure
  2937. **/
  2938. static int flexonenand_get_boundary(struct mtd_info *mtd)
  2939. {
  2940. struct onenand_chip *this = mtd->priv;
  2941. unsigned die, bdry;
  2942. int ret, syscfg, locked;
  2943. /* Disable ECC */
  2944. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  2945. this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
  2946. for (die = 0; die < this->dies; die++) {
  2947. this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
  2948. this->wait(mtd, FL_SYNCING);
  2949. this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
  2950. ret = this->wait(mtd, FL_READING);
  2951. bdry = this->read_word(this->base + ONENAND_DATARAM);
  2952. if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
  2953. locked = 0;
  2954. else
  2955. locked = 1;
  2956. this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
  2957. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2958. ret = this->wait(mtd, FL_RESETING);
  2959. printk(KERN_INFO "Die %d boundary: %d%s\n", die,
  2960. this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
  2961. }
  2962. /* Enable ECC */
  2963. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  2964. return 0;
  2965. }
  2966. /**
  2967. * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
  2968. * boundary[], diesize[], mtd->size, mtd->erasesize
  2969. * @param mtd - MTD device structure
  2970. */
  2971. static void flexonenand_get_size(struct mtd_info *mtd)
  2972. {
  2973. struct onenand_chip *this = mtd->priv;
  2974. int die, i, eraseshift, density;
  2975. int blksperdie, maxbdry;
  2976. loff_t ofs;
  2977. density = onenand_get_density(this->device_id);
  2978. blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
  2979. blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
  2980. maxbdry = blksperdie - 1;
  2981. eraseshift = this->erase_shift - 1;
  2982. mtd->numeraseregions = this->dies << 1;
  2983. /* This fills up the device boundary */
  2984. flexonenand_get_boundary(mtd);
  2985. die = ofs = 0;
  2986. i = -1;
  2987. for (; die < this->dies; die++) {
  2988. if (!die || this->boundary[die-1] != maxbdry) {
  2989. i++;
  2990. mtd->eraseregions[i].offset = ofs;
  2991. mtd->eraseregions[i].erasesize = 1 << eraseshift;
  2992. mtd->eraseregions[i].numblocks =
  2993. this->boundary[die] + 1;
  2994. ofs += mtd->eraseregions[i].numblocks << eraseshift;
  2995. eraseshift++;
  2996. } else {
  2997. mtd->numeraseregions -= 1;
  2998. mtd->eraseregions[i].numblocks +=
  2999. this->boundary[die] + 1;
  3000. ofs += (this->boundary[die] + 1) << (eraseshift - 1);
  3001. }
  3002. if (this->boundary[die] != maxbdry) {
  3003. i++;
  3004. mtd->eraseregions[i].offset = ofs;
  3005. mtd->eraseregions[i].erasesize = 1 << eraseshift;
  3006. mtd->eraseregions[i].numblocks = maxbdry ^
  3007. this->boundary[die];
  3008. ofs += mtd->eraseregions[i].numblocks << eraseshift;
  3009. eraseshift--;
  3010. } else
  3011. mtd->numeraseregions -= 1;
  3012. }
  3013. /* Expose MLC erase size except when all blocks are SLC */
  3014. mtd->erasesize = 1 << this->erase_shift;
  3015. if (mtd->numeraseregions == 1)
  3016. mtd->erasesize >>= 1;
  3017. printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
  3018. for (i = 0; i < mtd->numeraseregions; i++)
  3019. printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x,"
  3020. " numblocks: %04u]\n",
  3021. (unsigned int) mtd->eraseregions[i].offset,
  3022. mtd->eraseregions[i].erasesize,
  3023. mtd->eraseregions[i].numblocks);
  3024. for (die = 0, mtd->size = 0; die < this->dies; die++) {
  3025. this->diesize[die] = (loff_t)blksperdie << this->erase_shift;
  3026. this->diesize[die] -= (loff_t)(this->boundary[die] + 1)
  3027. << (this->erase_shift - 1);
  3028. mtd->size += this->diesize[die];
  3029. }
  3030. }
  3031. /**
  3032. * flexonenand_check_blocks_erased - Check if blocks are erased
  3033. * @param mtd_info - mtd info structure
  3034. * @param start - first erase block to check
  3035. * @param end - last erase block to check
  3036. *
  3037. * Converting an unerased block from MLC to SLC
  3038. * causes byte values to change. Since both data and its ECC
  3039. * have changed, reads on the block give uncorrectable error.
  3040. * This might lead to the block being detected as bad.
  3041. *
  3042. * Avoid this by ensuring that the block to be converted is
  3043. * erased.
  3044. */
  3045. static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end)
  3046. {
  3047. struct onenand_chip *this = mtd->priv;
  3048. int i, ret;
  3049. int block;
  3050. struct mtd_oob_ops ops = {
  3051. .mode = MTD_OOB_PLACE,
  3052. .ooboffs = 0,
  3053. .ooblen = mtd->oobsize,
  3054. .datbuf = NULL,
  3055. .oobbuf = this->oob_buf,
  3056. };
  3057. loff_t addr;
  3058. printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
  3059. for (block = start; block <= end; block++) {
  3060. addr = flexonenand_addr(this, block);
  3061. if (onenand_block_isbad_nolock(mtd, addr, 0))
  3062. continue;
  3063. /*
  3064. * Since main area write results in ECC write to spare,
  3065. * it is sufficient to check only ECC bytes for change.
  3066. */
  3067. ret = onenand_read_oob_nolock(mtd, addr, &ops);
  3068. if (ret)
  3069. return ret;
  3070. for (i = 0; i < mtd->oobsize; i++)
  3071. if (this->oob_buf[i] != 0xff)
  3072. break;
  3073. if (i != mtd->oobsize) {
  3074. printk(KERN_WARNING "%s: Block %d not erased.\n",
  3075. __func__, block);
  3076. return 1;
  3077. }
  3078. }
  3079. return 0;
  3080. }
  3081. /**
  3082. * flexonenand_set_boundary - Writes the SLC boundary
  3083. * @param mtd - mtd info structure
  3084. */
  3085. int flexonenand_set_boundary(struct mtd_info *mtd, int die,
  3086. int boundary, int lock)
  3087. {
  3088. struct onenand_chip *this = mtd->priv;
  3089. int ret, density, blksperdie, old, new, thisboundary;
  3090. loff_t addr;
  3091. /* Change only once for SDP Flex-OneNAND */
  3092. if (die && (!ONENAND_IS_DDP(this)))
  3093. return 0;
  3094. /* boundary value of -1 indicates no required change */
  3095. if (boundary < 0 || boundary == this->boundary[die])
  3096. return 0;
  3097. density = onenand_get_density(this->device_id);
  3098. blksperdie = ((16 << density) << 20) >> this->erase_shift;
  3099. blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
  3100. if (boundary >= blksperdie) {
  3101. printk(KERN_ERR "%s: Invalid boundary value. "
  3102. "Boundary not changed.\n", __func__);
  3103. return -EINVAL;
  3104. }
  3105. /* Check if converting blocks are erased */
  3106. old = this->boundary[die] + (die * this->density_mask);
  3107. new = boundary + (die * this->density_mask);
  3108. ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
  3109. if (ret) {
  3110. printk(KERN_ERR "%s: Please erase blocks "
  3111. "before boundary change\n", __func__);
  3112. return ret;
  3113. }
  3114. this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
  3115. this->wait(mtd, FL_SYNCING);
  3116. /* Check is boundary is locked */
  3117. this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
  3118. ret = this->wait(mtd, FL_READING);
  3119. thisboundary = this->read_word(this->base + ONENAND_DATARAM);
  3120. if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
  3121. printk(KERN_ERR "%s: boundary locked\n", __func__);
  3122. ret = 1;
  3123. goto out;
  3124. }
  3125. printk(KERN_INFO "Changing die %d boundary: %d%s\n",
  3126. die, boundary, lock ? "(Locked)" : "(Unlocked)");
  3127. addr = die ? this->diesize[0] : 0;
  3128. boundary &= FLEXONENAND_PI_MASK;
  3129. boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
  3130. this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
  3131. ret = this->wait(mtd, FL_ERASING);
  3132. if (ret) {
  3133. printk(KERN_ERR "%s: Failed PI erase for Die %d\n",
  3134. __func__, die);
  3135. goto out;
  3136. }
  3137. this->write_word(boundary, this->base + ONENAND_DATARAM);
  3138. this->command(mtd, ONENAND_CMD_PROG, addr, 0);
  3139. ret = this->wait(mtd, FL_WRITING);
  3140. if (ret) {
  3141. printk(KERN_ERR "%s: Failed PI write for Die %d\n",
  3142. __func__, die);
  3143. goto out;
  3144. }
  3145. this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
  3146. ret = this->wait(mtd, FL_WRITING);
  3147. out:
  3148. this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
  3149. this->wait(mtd, FL_RESETING);
  3150. if (!ret)
  3151. /* Recalculate device size on boundary change*/
  3152. flexonenand_get_size(mtd);
  3153. return ret;
  3154. }
  3155. /**
  3156. * onenand_probe - [OneNAND Interface] Probe the OneNAND device
  3157. * @param mtd MTD device structure
  3158. *
  3159. * OneNAND detection method:
  3160. * Compare the values from command with ones from register
  3161. */
  3162. static int onenand_probe(struct mtd_info *mtd)
  3163. {
  3164. struct onenand_chip *this = mtd->priv;
  3165. int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
  3166. int density;
  3167. int syscfg;
  3168. /* Save system configuration 1 */
  3169. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  3170. /* Clear Sync. Burst Read mode to read BootRAM */
  3171. this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1);
  3172. /* Send the command for reading device ID from BootRAM */
  3173. this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
  3174. /* Read manufacturer and device IDs from BootRAM */
  3175. bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
  3176. bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
  3177. /* Reset OneNAND to read default register values */
  3178. this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
  3179. /* Wait reset */
  3180. this->wait(mtd, FL_RESETING);
  3181. /* Restore system configuration 1 */
  3182. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  3183. /* Workaround */
  3184. if (syscfg & ONENAND_SYS_CFG1_SYNC_WRITE) {
  3185. bram_maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
  3186. bram_dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
  3187. }
  3188. /* Check manufacturer ID */
  3189. if (onenand_check_maf(bram_maf_id))
  3190. return -ENXIO;
  3191. /* Read manufacturer and device IDs from Register */
  3192. maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
  3193. dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
  3194. ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
  3195. this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
  3196. /* Check OneNAND device */
  3197. if (maf_id != bram_maf_id || dev_id != bram_dev_id)
  3198. return -ENXIO;
  3199. /* Flash device information */
  3200. onenand_print_device_info(dev_id, ver_id);
  3201. this->device_id = dev_id;
  3202. this->version_id = ver_id;
  3203. /* Check OneNAND features */
  3204. onenand_check_features(mtd);
  3205. density = onenand_get_density(dev_id);
  3206. if (FLEXONENAND(this)) {
  3207. this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
  3208. /* Maximum possible erase regions */
  3209. mtd->numeraseregions = this->dies << 1;
  3210. mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info)
  3211. * (this->dies << 1), GFP_KERNEL);
  3212. if (!mtd->eraseregions)
  3213. return -ENOMEM;
  3214. }
  3215. /*
  3216. * For Flex-OneNAND, chipsize represents maximum possible device size.
  3217. * mtd->size represents the actual device size.
  3218. */
  3219. this->chipsize = (16 << density) << 20;
  3220. /* OneNAND page size & block size */
  3221. /* The data buffer size is equal to page size */
  3222. mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
  3223. /* We use the full BufferRAM */
  3224. if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this))
  3225. mtd->writesize <<= 1;
  3226. mtd->oobsize = mtd->writesize >> 5;
  3227. /* Pages per a block are always 64 in OneNAND */
  3228. mtd->erasesize = mtd->writesize << 6;
  3229. /*
  3230. * Flex-OneNAND SLC area has 64 pages per block.
  3231. * Flex-OneNAND MLC area has 128 pages per block.
  3232. * Expose MLC erase size to find erase_shift and page_mask.
  3233. */
  3234. if (FLEXONENAND(this))
  3235. mtd->erasesize <<= 1;
  3236. this->erase_shift = ffs(mtd->erasesize) - 1;
  3237. this->page_shift = ffs(mtd->writesize) - 1;
  3238. this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
  3239. /* Set density mask. it is used for DDP */
  3240. if (ONENAND_IS_DDP(this))
  3241. this->density_mask = this->chipsize >> (this->erase_shift + 1);
  3242. /* It's real page size */
  3243. this->writesize = mtd->writesize;
  3244. /* REVISIT: Multichip handling */
  3245. if (FLEXONENAND(this))
  3246. flexonenand_get_size(mtd);
  3247. else
  3248. mtd->size = this->chipsize;
  3249. /*
  3250. * We emulate the 4KiB page and 256KiB erase block size
  3251. * But oobsize is still 64 bytes.
  3252. * It is only valid if you turn on 2X program support,
  3253. * Otherwise it will be ignored by compiler.
  3254. */
  3255. if (ONENAND_IS_2PLANE(this)) {
  3256. mtd->writesize <<= 1;
  3257. mtd->erasesize <<= 1;
  3258. }
  3259. return 0;
  3260. }
  3261. /**
  3262. * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
  3263. * @param mtd MTD device structure
  3264. */
  3265. static int onenand_suspend(struct mtd_info *mtd)
  3266. {
  3267. return onenand_get_device(mtd, FL_PM_SUSPENDED);
  3268. }
  3269. /**
  3270. * onenand_resume - [MTD Interface] Resume the OneNAND flash
  3271. * @param mtd MTD device structure
  3272. */
  3273. static void onenand_resume(struct mtd_info *mtd)
  3274. {
  3275. struct onenand_chip *this = mtd->priv;
  3276. if (this->state == FL_PM_SUSPENDED)
  3277. onenand_release_device(mtd);
  3278. else
  3279. printk(KERN_ERR "%s: resume() called for the chip which is not "
  3280. "in suspended state\n", __func__);
  3281. }
  3282. /**
  3283. * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
  3284. * @param mtd MTD device structure
  3285. * @param maxchips Number of chips to scan for
  3286. *
  3287. * This fills out all the not initialized function pointers
  3288. * with the defaults.
  3289. * The flash ID is read and the mtd/chip structures are
  3290. * filled with the appropriate values.
  3291. */
  3292. int onenand_scan(struct mtd_info *mtd, int maxchips)
  3293. {
  3294. int i, ret;
  3295. struct onenand_chip *this = mtd->priv;
  3296. if (!this->read_word)
  3297. this->read_word = onenand_readw;
  3298. if (!this->write_word)
  3299. this->write_word = onenand_writew;
  3300. if (!this->command)
  3301. this->command = onenand_command;
  3302. if (!this->wait)
  3303. onenand_setup_wait(mtd);
  3304. if (!this->bbt_wait)
  3305. this->bbt_wait = onenand_bbt_wait;
  3306. if (!this->unlock_all)
  3307. this->unlock_all = onenand_unlock_all;
  3308. if (!this->read_bufferram)
  3309. this->read_bufferram = onenand_read_bufferram;
  3310. if (!this->write_bufferram)
  3311. this->write_bufferram = onenand_write_bufferram;
  3312. if (!this->block_markbad)
  3313. this->block_markbad = onenand_default_block_markbad;
  3314. if (!this->scan_bbt)
  3315. this->scan_bbt = onenand_default_bbt;
  3316. if (onenand_probe(mtd))
  3317. return -ENXIO;
  3318. /* Set Sync. Burst Read after probing */
  3319. if (this->mmcontrol) {
  3320. printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
  3321. this->read_bufferram = onenand_sync_read_bufferram;
  3322. }
  3323. /* Allocate buffers, if necessary */
  3324. if (!this->page_buf) {
  3325. this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
  3326. if (!this->page_buf) {
  3327. printk(KERN_ERR "%s: Can't allocate page_buf\n",
  3328. __func__);
  3329. return -ENOMEM;
  3330. }
  3331. #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
  3332. this->verify_buf = kzalloc(mtd->writesize, GFP_KERNEL);
  3333. if (!this->verify_buf) {
  3334. kfree(this->page_buf);
  3335. return -ENOMEM;
  3336. }
  3337. #endif
  3338. this->options |= ONENAND_PAGEBUF_ALLOC;
  3339. }
  3340. if (!this->oob_buf) {
  3341. this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
  3342. if (!this->oob_buf) {
  3343. printk(KERN_ERR "%s: Can't allocate oob_buf\n",
  3344. __func__);
  3345. if (this->options & ONENAND_PAGEBUF_ALLOC) {
  3346. this->options &= ~ONENAND_PAGEBUF_ALLOC;
  3347. kfree(this->page_buf);
  3348. }
  3349. return -ENOMEM;
  3350. }
  3351. this->options |= ONENAND_OOBBUF_ALLOC;
  3352. }
  3353. this->state = FL_READY;
  3354. init_waitqueue_head(&this->wq);
  3355. spin_lock_init(&this->chip_lock);
  3356. /*
  3357. * Allow subpage writes up to oobsize.
  3358. */
  3359. switch (mtd->oobsize) {
  3360. case 128:
  3361. this->ecclayout = &onenand_oob_128;
  3362. mtd->subpage_sft = 0;
  3363. break;
  3364. case 64:
  3365. this->ecclayout = &onenand_oob_64;
  3366. mtd->subpage_sft = 2;
  3367. break;
  3368. case 32:
  3369. this->ecclayout = &onenand_oob_32;
  3370. mtd->subpage_sft = 1;
  3371. break;
  3372. default:
  3373. printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
  3374. __func__, mtd->oobsize);
  3375. mtd->subpage_sft = 0;
  3376. /* To prevent kernel oops */
  3377. this->ecclayout = &onenand_oob_32;
  3378. break;
  3379. }
  3380. this->subpagesize = mtd->writesize >> mtd->subpage_sft;
  3381. /*
  3382. * The number of bytes available for a client to place data into
  3383. * the out of band area
  3384. */
  3385. this->ecclayout->oobavail = 0;
  3386. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
  3387. this->ecclayout->oobfree[i].length; i++)
  3388. this->ecclayout->oobavail +=
  3389. this->ecclayout->oobfree[i].length;
  3390. mtd->oobavail = this->ecclayout->oobavail;
  3391. mtd->ecclayout = this->ecclayout;
  3392. /* Fill in remaining MTD driver data */
  3393. mtd->type = MTD_NANDFLASH;
  3394. mtd->flags = MTD_CAP_NANDFLASH;
  3395. mtd->erase = onenand_erase;
  3396. mtd->point = NULL;
  3397. mtd->unpoint = NULL;
  3398. mtd->read = onenand_read;
  3399. mtd->write = onenand_write;
  3400. mtd->read_oob = onenand_read_oob;
  3401. mtd->write_oob = onenand_write_oob;
  3402. mtd->panic_write = onenand_panic_write;
  3403. #ifdef CONFIG_MTD_ONENAND_OTP
  3404. mtd->get_fact_prot_info = onenand_get_fact_prot_info;
  3405. mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
  3406. mtd->get_user_prot_info = onenand_get_user_prot_info;
  3407. mtd->read_user_prot_reg = onenand_read_user_prot_reg;
  3408. mtd->write_user_prot_reg = onenand_write_user_prot_reg;
  3409. mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
  3410. #endif
  3411. mtd->sync = onenand_sync;
  3412. mtd->lock = onenand_lock;
  3413. mtd->unlock = onenand_unlock;
  3414. mtd->suspend = onenand_suspend;
  3415. mtd->resume = onenand_resume;
  3416. mtd->block_isbad = onenand_block_isbad;
  3417. mtd->block_markbad = onenand_block_markbad;
  3418. mtd->owner = THIS_MODULE;
  3419. /* Unlock whole block */
  3420. this->unlock_all(mtd);
  3421. ret = this->scan_bbt(mtd);
  3422. if ((!FLEXONENAND(this)) || ret)
  3423. return ret;
  3424. /* Change Flex-OneNAND boundaries if required */
  3425. for (i = 0; i < MAX_DIES; i++)
  3426. flexonenand_set_boundary(mtd, i, flex_bdry[2 * i],
  3427. flex_bdry[(2 * i) + 1]);
  3428. return 0;
  3429. }
  3430. /**
  3431. * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
  3432. * @param mtd MTD device structure
  3433. */
  3434. void onenand_release(struct mtd_info *mtd)
  3435. {
  3436. struct onenand_chip *this = mtd->priv;
  3437. #ifdef CONFIG_MTD_PARTITIONS
  3438. /* Deregister partitions */
  3439. del_mtd_partitions (mtd);
  3440. #endif
  3441. /* Deregister the device */
  3442. del_mtd_device (mtd);
  3443. /* Free bad block table memory, if allocated */
  3444. if (this->bbm) {
  3445. struct bbm_info *bbm = this->bbm;
  3446. kfree(bbm->bbt);
  3447. kfree(this->bbm);
  3448. }
  3449. /* Buffers allocated by onenand_scan */
  3450. if (this->options & ONENAND_PAGEBUF_ALLOC) {
  3451. kfree(this->page_buf);
  3452. #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
  3453. kfree(this->verify_buf);
  3454. #endif
  3455. }
  3456. if (this->options & ONENAND_OOBBUF_ALLOC)
  3457. kfree(this->oob_buf);
  3458. kfree(mtd->eraseregions);
  3459. }
  3460. EXPORT_SYMBOL_GPL(onenand_scan);
  3461. EXPORT_SYMBOL_GPL(onenand_release);
  3462. MODULE_LICENSE("GPL");
  3463. MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
  3464. MODULE_DESCRIPTION("Generic OneNAND flash driver code");