ab3550-core.c 30 KB

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  1. /*
  2. * Copyright (C) 2007-2010 ST-Ericsson
  3. * License terms: GNU General Public License (GPL) version 2
  4. * Low-level core for exclusive access to the AB3550 IC on the I2C bus
  5. * and some basic chip-configuration.
  6. * Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
  7. * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com>
  8. * Author: Mattias Wallin <mattias.wallin@stericsson.com>
  9. * Author: Rickard Andersson <rickard.andersson@stericsson.com>
  10. */
  11. #include <linux/i2c.h>
  12. #include <linux/mutex.h>
  13. #include <linux/err.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/slab.h>
  16. #include <linux/device.h>
  17. #include <linux/irq.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/random.h>
  20. #include <linux/workqueue.h>
  21. #include <linux/debugfs.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/uaccess.h>
  24. #include <linux/mfd/abx500.h>
  25. #include <linux/list.h>
  26. #include <linux/bitops.h>
  27. #include <linux/spinlock.h>
  28. #include <linux/mfd/core.h>
  29. #define AB3550_NAME_STRING "ab3550"
  30. #define AB3550_ID_FORMAT_STRING "AB3550 %s"
  31. #define AB3550_NUM_BANKS 2
  32. #define AB3550_NUM_EVENT_REG 5
  33. /* These are the only registers inside AB3550 used in this main file */
  34. /* Chip ID register */
  35. #define AB3550_CID_REG 0x20
  36. /* Interrupt event registers */
  37. #define AB3550_EVENT_BANK 0
  38. #define AB3550_EVENT_REG 0x22
  39. /* Read/write operation values. */
  40. #define AB3550_PERM_RD (0x01)
  41. #define AB3550_PERM_WR (0x02)
  42. /* Read/write permissions. */
  43. #define AB3550_PERM_RO (AB3550_PERM_RD)
  44. #define AB3550_PERM_RW (AB3550_PERM_RD | AB3550_PERM_WR)
  45. /**
  46. * struct ab3550
  47. * @access_mutex: lock out concurrent accesses to the AB registers
  48. * @i2c_client: I2C client for this chip
  49. * @chip_name: name of this chip variant
  50. * @chip_id: 8 bit chip ID for this chip variant
  51. * @mask_work: a worker for writing to mask registers
  52. * @event_lock: a lock to protect the event_mask
  53. * @event_mask: a local copy of the mask event registers
  54. * @startup_events: a copy of the first reading of the event registers
  55. * @startup_events_read: whether the first events have been read
  56. */
  57. struct ab3550 {
  58. struct mutex access_mutex;
  59. struct i2c_client *i2c_client[AB3550_NUM_BANKS];
  60. char chip_name[32];
  61. u8 chip_id;
  62. struct work_struct mask_work;
  63. spinlock_t event_lock;
  64. u8 event_mask[AB3550_NUM_EVENT_REG];
  65. u8 startup_events[AB3550_NUM_EVENT_REG];
  66. bool startup_events_read;
  67. #ifdef CONFIG_DEBUG_FS
  68. unsigned int debug_bank;
  69. unsigned int debug_address;
  70. #endif
  71. };
  72. /**
  73. * struct ab3550_reg_range
  74. * @first: the first address of the range
  75. * @last: the last address of the range
  76. * @perm: access permissions for the range
  77. */
  78. struct ab3550_reg_range {
  79. u8 first;
  80. u8 last;
  81. u8 perm;
  82. };
  83. /**
  84. * struct ab3550_reg_ranges
  85. * @count: the number of ranges in the list
  86. * @range: the list of register ranges
  87. */
  88. struct ab3550_reg_ranges {
  89. u8 count;
  90. const struct ab3550_reg_range *range;
  91. };
  92. /*
  93. * Permissible register ranges for reading and writing per device and bank.
  94. *
  95. * The ranges must be listed in increasing address order, and no overlaps are
  96. * allowed. It is assumed that write permission implies read permission
  97. * (i.e. only RO and RW permissions should be used). Ranges with write
  98. * permission must not be split up.
  99. */
  100. #define NO_RANGE {.count = 0, .range = NULL,}
  101. static struct
  102. ab3550_reg_ranges ab3550_reg_ranges[AB3550_NUM_DEVICES][AB3550_NUM_BANKS] = {
  103. [AB3550_DEVID_DAC] = {
  104. NO_RANGE,
  105. {
  106. .count = 2,
  107. .range = (struct ab3550_reg_range[]) {
  108. {
  109. .first = 0xb0,
  110. .last = 0xba,
  111. .perm = AB3550_PERM_RW,
  112. },
  113. {
  114. .first = 0xbc,
  115. .last = 0xc3,
  116. .perm = AB3550_PERM_RW,
  117. },
  118. },
  119. },
  120. },
  121. [AB3550_DEVID_LEDS] = {
  122. NO_RANGE,
  123. {
  124. .count = 2,
  125. .range = (struct ab3550_reg_range[]) {
  126. {
  127. .first = 0x5a,
  128. .last = 0x88,
  129. .perm = AB3550_PERM_RW,
  130. },
  131. {
  132. .first = 0x8a,
  133. .last = 0xad,
  134. .perm = AB3550_PERM_RW,
  135. },
  136. }
  137. },
  138. },
  139. [AB3550_DEVID_POWER] = {
  140. {
  141. .count = 1,
  142. .range = (struct ab3550_reg_range[]) {
  143. {
  144. .first = 0x21,
  145. .last = 0x21,
  146. .perm = AB3550_PERM_RO,
  147. },
  148. }
  149. },
  150. NO_RANGE,
  151. },
  152. [AB3550_DEVID_REGULATORS] = {
  153. {
  154. .count = 1,
  155. .range = (struct ab3550_reg_range[]) {
  156. {
  157. .first = 0x69,
  158. .last = 0xa3,
  159. .perm = AB3550_PERM_RW,
  160. },
  161. }
  162. },
  163. {
  164. .count = 1,
  165. .range = (struct ab3550_reg_range[]) {
  166. {
  167. .first = 0x14,
  168. .last = 0x16,
  169. .perm = AB3550_PERM_RW,
  170. },
  171. }
  172. },
  173. },
  174. [AB3550_DEVID_SIM] = {
  175. {
  176. .count = 1,
  177. .range = (struct ab3550_reg_range[]) {
  178. {
  179. .first = 0x21,
  180. .last = 0x21,
  181. .perm = AB3550_PERM_RO,
  182. },
  183. }
  184. },
  185. {
  186. .count = 1,
  187. .range = (struct ab3550_reg_range[]) {
  188. {
  189. .first = 0x14,
  190. .last = 0x17,
  191. .perm = AB3550_PERM_RW,
  192. },
  193. }
  194. },
  195. },
  196. [AB3550_DEVID_UART] = {
  197. NO_RANGE,
  198. NO_RANGE,
  199. },
  200. [AB3550_DEVID_RTC] = {
  201. {
  202. .count = 1,
  203. .range = (struct ab3550_reg_range[]) {
  204. {
  205. .first = 0x00,
  206. .last = 0x0c,
  207. .perm = AB3550_PERM_RW,
  208. },
  209. }
  210. },
  211. NO_RANGE,
  212. },
  213. [AB3550_DEVID_CHARGER] = {
  214. {
  215. .count = 2,
  216. .range = (struct ab3550_reg_range[]) {
  217. {
  218. .first = 0x10,
  219. .last = 0x1a,
  220. .perm = AB3550_PERM_RW,
  221. },
  222. {
  223. .first = 0x21,
  224. .last = 0x21,
  225. .perm = AB3550_PERM_RO,
  226. },
  227. }
  228. },
  229. NO_RANGE,
  230. },
  231. [AB3550_DEVID_ADC] = {
  232. NO_RANGE,
  233. {
  234. .count = 1,
  235. .range = (struct ab3550_reg_range[]) {
  236. {
  237. .first = 0x20,
  238. .last = 0x56,
  239. .perm = AB3550_PERM_RW,
  240. },
  241. }
  242. },
  243. },
  244. [AB3550_DEVID_FUELGAUGE] = {
  245. {
  246. .count = 1,
  247. .range = (struct ab3550_reg_range[]) {
  248. {
  249. .first = 0x21,
  250. .last = 0x21,
  251. .perm = AB3550_PERM_RO,
  252. },
  253. }
  254. },
  255. {
  256. .count = 1,
  257. .range = (struct ab3550_reg_range[]) {
  258. {
  259. .first = 0x00,
  260. .last = 0x0e,
  261. .perm = AB3550_PERM_RW,
  262. },
  263. }
  264. },
  265. },
  266. [AB3550_DEVID_VIBRATOR] = {
  267. NO_RANGE,
  268. {
  269. .count = 1,
  270. .range = (struct ab3550_reg_range[]) {
  271. {
  272. .first = 0x10,
  273. .last = 0x13,
  274. .perm = AB3550_PERM_RW,
  275. },
  276. }
  277. },
  278. },
  279. [AB3550_DEVID_CODEC] = {
  280. {
  281. .count = 2,
  282. .range = (struct ab3550_reg_range[]) {
  283. {
  284. .first = 0x31,
  285. .last = 0x63,
  286. .perm = AB3550_PERM_RW,
  287. },
  288. {
  289. .first = 0x65,
  290. .last = 0x68,
  291. .perm = AB3550_PERM_RW,
  292. },
  293. }
  294. },
  295. NO_RANGE,
  296. },
  297. };
  298. static struct mfd_cell ab3550_devs[AB3550_NUM_DEVICES] = {
  299. [AB3550_DEVID_DAC] = {
  300. .name = "ab3550-dac",
  301. .id = AB3550_DEVID_DAC,
  302. .num_resources = 0,
  303. },
  304. [AB3550_DEVID_LEDS] = {
  305. .name = "ab3550-leds",
  306. .id = AB3550_DEVID_LEDS,
  307. },
  308. [AB3550_DEVID_POWER] = {
  309. .name = "ab3550-power",
  310. .id = AB3550_DEVID_POWER,
  311. },
  312. [AB3550_DEVID_REGULATORS] = {
  313. .name = "ab3550-regulators",
  314. .id = AB3550_DEVID_REGULATORS,
  315. },
  316. [AB3550_DEVID_SIM] = {
  317. .name = "ab3550-sim",
  318. .id = AB3550_DEVID_SIM,
  319. },
  320. [AB3550_DEVID_UART] = {
  321. .name = "ab3550-uart",
  322. .id = AB3550_DEVID_UART,
  323. },
  324. [AB3550_DEVID_RTC] = {
  325. .name = "ab3550-rtc",
  326. .id = AB3550_DEVID_RTC,
  327. },
  328. [AB3550_DEVID_CHARGER] = {
  329. .name = "ab3550-charger",
  330. .id = AB3550_DEVID_CHARGER,
  331. },
  332. [AB3550_DEVID_ADC] = {
  333. .name = "ab3550-adc",
  334. .id = AB3550_DEVID_ADC,
  335. .num_resources = 10,
  336. .resources = (struct resource[]) {
  337. {
  338. .name = "TRIGGER-0",
  339. .flags = IORESOURCE_IRQ,
  340. .start = 16,
  341. .end = 16,
  342. },
  343. {
  344. .name = "TRIGGER-1",
  345. .flags = IORESOURCE_IRQ,
  346. .start = 17,
  347. .end = 17,
  348. },
  349. {
  350. .name = "TRIGGER-2",
  351. .flags = IORESOURCE_IRQ,
  352. .start = 18,
  353. .end = 18,
  354. },
  355. {
  356. .name = "TRIGGER-3",
  357. .flags = IORESOURCE_IRQ,
  358. .start = 19,
  359. .end = 19,
  360. },
  361. {
  362. .name = "TRIGGER-4",
  363. .flags = IORESOURCE_IRQ,
  364. .start = 20,
  365. .end = 20,
  366. },
  367. {
  368. .name = "TRIGGER-5",
  369. .flags = IORESOURCE_IRQ,
  370. .start = 21,
  371. .end = 21,
  372. },
  373. {
  374. .name = "TRIGGER-6",
  375. .flags = IORESOURCE_IRQ,
  376. .start = 22,
  377. .end = 22,
  378. },
  379. {
  380. .name = "TRIGGER-7",
  381. .flags = IORESOURCE_IRQ,
  382. .start = 23,
  383. .end = 23,
  384. },
  385. {
  386. .name = "TRIGGER-VBAT-TXON",
  387. .flags = IORESOURCE_IRQ,
  388. .start = 13,
  389. .end = 13,
  390. },
  391. {
  392. .name = "TRIGGER-VBAT",
  393. .flags = IORESOURCE_IRQ,
  394. .start = 12,
  395. .end = 12,
  396. },
  397. },
  398. },
  399. [AB3550_DEVID_FUELGAUGE] = {
  400. .name = "ab3550-fuelgauge",
  401. .id = AB3550_DEVID_FUELGAUGE,
  402. },
  403. [AB3550_DEVID_VIBRATOR] = {
  404. .name = "ab3550-vibrator",
  405. .id = AB3550_DEVID_VIBRATOR,
  406. },
  407. [AB3550_DEVID_CODEC] = {
  408. .name = "ab3550-codec",
  409. .id = AB3550_DEVID_CODEC,
  410. },
  411. };
  412. /*
  413. * I2C transactions with error messages.
  414. */
  415. static int ab3550_i2c_master_send(struct ab3550 *ab, u8 bank, u8 *data,
  416. u8 count)
  417. {
  418. int err;
  419. err = i2c_master_send(ab->i2c_client[bank], data, count);
  420. if (err < 0) {
  421. dev_err(&ab->i2c_client[0]->dev, "send error: %d\n", err);
  422. return err;
  423. }
  424. return 0;
  425. }
  426. static int ab3550_i2c_master_recv(struct ab3550 *ab, u8 bank, u8 *data,
  427. u8 count)
  428. {
  429. int err;
  430. err = i2c_master_recv(ab->i2c_client[bank], data, count);
  431. if (err < 0) {
  432. dev_err(&ab->i2c_client[0]->dev, "receive error: %d\n", err);
  433. return err;
  434. }
  435. return 0;
  436. }
  437. /*
  438. * Functionality for getting/setting register values.
  439. */
  440. static int get_register_interruptible(struct ab3550 *ab, u8 bank, u8 reg,
  441. u8 *value)
  442. {
  443. int err;
  444. err = mutex_lock_interruptible(&ab->access_mutex);
  445. if (err)
  446. return err;
  447. err = ab3550_i2c_master_send(ab, bank, &reg, 1);
  448. if (!err)
  449. err = ab3550_i2c_master_recv(ab, bank, value, 1);
  450. mutex_unlock(&ab->access_mutex);
  451. return err;
  452. }
  453. static int get_register_page_interruptible(struct ab3550 *ab, u8 bank,
  454. u8 first_reg, u8 *regvals, u8 numregs)
  455. {
  456. int err;
  457. err = mutex_lock_interruptible(&ab->access_mutex);
  458. if (err)
  459. return err;
  460. err = ab3550_i2c_master_send(ab, bank, &first_reg, 1);
  461. if (!err)
  462. err = ab3550_i2c_master_recv(ab, bank, regvals, numregs);
  463. mutex_unlock(&ab->access_mutex);
  464. return err;
  465. }
  466. static int mask_and_set_register_interruptible(struct ab3550 *ab, u8 bank,
  467. u8 reg, u8 bitmask, u8 bitvalues)
  468. {
  469. int err = 0;
  470. if (likely(bitmask)) {
  471. u8 reg_bits[2] = {reg, 0};
  472. err = mutex_lock_interruptible(&ab->access_mutex);
  473. if (err)
  474. return err;
  475. if (bitmask == 0xFF) /* No need to read in this case. */
  476. reg_bits[1] = bitvalues;
  477. else { /* Read and modify the register value. */
  478. u8 bits;
  479. err = ab3550_i2c_master_send(ab, bank, &reg, 1);
  480. if (err)
  481. goto unlock_and_return;
  482. err = ab3550_i2c_master_recv(ab, bank, &bits, 1);
  483. if (err)
  484. goto unlock_and_return;
  485. reg_bits[1] = ((~bitmask & bits) |
  486. (bitmask & bitvalues));
  487. }
  488. /* Write the new value. */
  489. err = ab3550_i2c_master_send(ab, bank, reg_bits, 2);
  490. unlock_and_return:
  491. mutex_unlock(&ab->access_mutex);
  492. }
  493. return err;
  494. }
  495. /*
  496. * Read/write permission checking functions.
  497. */
  498. static bool page_write_allowed(const struct ab3550_reg_ranges *ranges,
  499. u8 first_reg, u8 last_reg)
  500. {
  501. u8 i;
  502. if (last_reg < first_reg)
  503. return false;
  504. for (i = 0; i < ranges->count; i++) {
  505. if (first_reg < ranges->range[i].first)
  506. break;
  507. if ((last_reg <= ranges->range[i].last) &&
  508. (ranges->range[i].perm & AB3550_PERM_WR))
  509. return true;
  510. }
  511. return false;
  512. }
  513. static bool reg_write_allowed(const struct ab3550_reg_ranges *ranges, u8 reg)
  514. {
  515. return page_write_allowed(ranges, reg, reg);
  516. }
  517. static bool page_read_allowed(const struct ab3550_reg_ranges *ranges,
  518. u8 first_reg, u8 last_reg)
  519. {
  520. u8 i;
  521. if (last_reg < first_reg)
  522. return false;
  523. /* Find the range (if it exists in the list) that includes first_reg. */
  524. for (i = 0; i < ranges->count; i++) {
  525. if (first_reg < ranges->range[i].first)
  526. return false;
  527. if (first_reg <= ranges->range[i].last)
  528. break;
  529. }
  530. /* Make sure that the entire range up to and including last_reg is
  531. * readable. This may span several of the ranges in the list.
  532. */
  533. while ((i < ranges->count) &&
  534. (ranges->range[i].perm & AB3550_PERM_RD)) {
  535. if (last_reg <= ranges->range[i].last)
  536. return true;
  537. if ((++i >= ranges->count) ||
  538. (ranges->range[i].first !=
  539. (ranges->range[i - 1].last + 1))) {
  540. break;
  541. }
  542. }
  543. return false;
  544. }
  545. static bool reg_read_allowed(const struct ab3550_reg_ranges *ranges, u8 reg)
  546. {
  547. return page_read_allowed(ranges, reg, reg);
  548. }
  549. /*
  550. * The exported register access functionality.
  551. */
  552. int ab3550_get_chip_id(struct device *dev)
  553. {
  554. struct ab3550 *ab = dev_get_drvdata(dev->parent);
  555. return (int)ab->chip_id;
  556. }
  557. int ab3550_mask_and_set_register_interruptible(struct device *dev, u8 bank,
  558. u8 reg, u8 bitmask, u8 bitvalues)
  559. {
  560. struct ab3550 *ab;
  561. struct platform_device *pdev = to_platform_device(dev);
  562. if ((AB3550_NUM_BANKS <= bank) ||
  563. !reg_write_allowed(&ab3550_reg_ranges[pdev->id][bank], reg))
  564. return -EINVAL;
  565. ab = dev_get_drvdata(dev->parent);
  566. return mask_and_set_register_interruptible(ab, bank, reg,
  567. bitmask, bitvalues);
  568. }
  569. int ab3550_set_register_interruptible(struct device *dev, u8 bank, u8 reg,
  570. u8 value)
  571. {
  572. return ab3550_mask_and_set_register_interruptible(dev, bank, reg, 0xFF,
  573. value);
  574. }
  575. int ab3550_get_register_interruptible(struct device *dev, u8 bank, u8 reg,
  576. u8 *value)
  577. {
  578. struct ab3550 *ab;
  579. struct platform_device *pdev = to_platform_device(dev);
  580. if ((AB3550_NUM_BANKS <= bank) ||
  581. !reg_read_allowed(&ab3550_reg_ranges[pdev->id][bank], reg))
  582. return -EINVAL;
  583. ab = dev_get_drvdata(dev->parent);
  584. return get_register_interruptible(ab, bank, reg, value);
  585. }
  586. int ab3550_get_register_page_interruptible(struct device *dev, u8 bank,
  587. u8 first_reg, u8 *regvals, u8 numregs)
  588. {
  589. struct ab3550 *ab;
  590. struct platform_device *pdev = to_platform_device(dev);
  591. if ((AB3550_NUM_BANKS <= bank) ||
  592. !page_read_allowed(&ab3550_reg_ranges[pdev->id][bank],
  593. first_reg, (first_reg + numregs - 1)))
  594. return -EINVAL;
  595. ab = dev_get_drvdata(dev->parent);
  596. return get_register_page_interruptible(ab, bank, first_reg, regvals,
  597. numregs);
  598. }
  599. int ab3550_event_registers_startup_state_get(struct device *dev, u8 *event)
  600. {
  601. struct ab3550 *ab;
  602. ab = dev_get_drvdata(dev->parent);
  603. if (!ab->startup_events_read)
  604. return -EAGAIN; /* Try again later */
  605. memcpy(event, ab->startup_events, AB3550_NUM_EVENT_REG);
  606. return 0;
  607. }
  608. int ab3550_startup_irq_enabled(struct device *dev, unsigned int irq)
  609. {
  610. struct ab3550 *ab;
  611. struct ab3550_platform_data *plf_data;
  612. bool val;
  613. ab = get_irq_chip_data(irq);
  614. plf_data = ab->i2c_client[0]->dev.platform_data;
  615. irq -= plf_data->irq.base;
  616. val = ((ab->startup_events[irq / 8] & BIT(irq % 8)) != 0);
  617. return val;
  618. }
  619. static struct abx500_ops ab3550_ops = {
  620. .get_chip_id = ab3550_get_chip_id,
  621. .get_register = ab3550_get_register_interruptible,
  622. .set_register = ab3550_set_register_interruptible,
  623. .get_register_page = ab3550_get_register_page_interruptible,
  624. .set_register_page = NULL,
  625. .mask_and_set_register = ab3550_mask_and_set_register_interruptible,
  626. .event_registers_startup_state_get =
  627. ab3550_event_registers_startup_state_get,
  628. .startup_irq_enabled = ab3550_startup_irq_enabled,
  629. };
  630. static irqreturn_t ab3550_irq_handler(int irq, void *data)
  631. {
  632. struct ab3550 *ab = data;
  633. int err;
  634. unsigned int i;
  635. u8 e[AB3550_NUM_EVENT_REG];
  636. u8 *events;
  637. unsigned long flags;
  638. events = (ab->startup_events_read ? e : ab->startup_events);
  639. err = get_register_page_interruptible(ab, AB3550_EVENT_BANK,
  640. AB3550_EVENT_REG, events, AB3550_NUM_EVENT_REG);
  641. if (err)
  642. goto err_event_rd;
  643. if (!ab->startup_events_read) {
  644. dev_info(&ab->i2c_client[0]->dev,
  645. "startup events 0x%x,0x%x,0x%x,0x%x,0x%x\n",
  646. ab->startup_events[0], ab->startup_events[1],
  647. ab->startup_events[2], ab->startup_events[3],
  648. ab->startup_events[4]);
  649. ab->startup_events_read = true;
  650. goto out;
  651. }
  652. /* The two highest bits in event[4] are not used. */
  653. events[4] &= 0x3f;
  654. spin_lock_irqsave(&ab->event_lock, flags);
  655. for (i = 0; i < AB3550_NUM_EVENT_REG; i++)
  656. events[i] &= ~ab->event_mask[i];
  657. spin_unlock_irqrestore(&ab->event_lock, flags);
  658. for (i = 0; i < AB3550_NUM_EVENT_REG; i++) {
  659. u8 bit;
  660. u8 event_reg;
  661. dev_dbg(&ab->i2c_client[0]->dev, "IRQ Event[%d]: 0x%2x\n",
  662. i, events[i]);
  663. event_reg = events[i];
  664. for (bit = 0; event_reg; bit++, event_reg /= 2) {
  665. if (event_reg % 2) {
  666. unsigned int irq;
  667. struct ab3550_platform_data *plf_data;
  668. plf_data = ab->i2c_client[0]->dev.platform_data;
  669. irq = plf_data->irq.base + (i * 8) + bit;
  670. handle_nested_irq(irq);
  671. }
  672. }
  673. }
  674. out:
  675. return IRQ_HANDLED;
  676. err_event_rd:
  677. dev_dbg(&ab->i2c_client[0]->dev, "error reading event registers\n");
  678. return IRQ_HANDLED;
  679. }
  680. #ifdef CONFIG_DEBUG_FS
  681. static struct ab3550_reg_ranges debug_ranges[AB3550_NUM_BANKS] = {
  682. {
  683. .count = 6,
  684. .range = (struct ab3550_reg_range[]) {
  685. {
  686. .first = 0x00,
  687. .last = 0x0e,
  688. },
  689. {
  690. .first = 0x10,
  691. .last = 0x1a,
  692. },
  693. {
  694. .first = 0x1e,
  695. .last = 0x4f,
  696. },
  697. {
  698. .first = 0x51,
  699. .last = 0x63,
  700. },
  701. {
  702. .first = 0x65,
  703. .last = 0xa3,
  704. },
  705. {
  706. .first = 0xa5,
  707. .last = 0xa8,
  708. },
  709. }
  710. },
  711. {
  712. .count = 8,
  713. .range = (struct ab3550_reg_range[]) {
  714. {
  715. .first = 0x00,
  716. .last = 0x0e,
  717. },
  718. {
  719. .first = 0x10,
  720. .last = 0x17,
  721. },
  722. {
  723. .first = 0x1a,
  724. .last = 0x1c,
  725. },
  726. {
  727. .first = 0x20,
  728. .last = 0x56,
  729. },
  730. {
  731. .first = 0x5a,
  732. .last = 0x88,
  733. },
  734. {
  735. .first = 0x8a,
  736. .last = 0xad,
  737. },
  738. {
  739. .first = 0xb0,
  740. .last = 0xba,
  741. },
  742. {
  743. .first = 0xbc,
  744. .last = 0xc3,
  745. },
  746. }
  747. },
  748. };
  749. static int ab3550_registers_print(struct seq_file *s, void *p)
  750. {
  751. struct ab3550 *ab = s->private;
  752. int bank;
  753. seq_printf(s, AB3550_NAME_STRING " register values:\n");
  754. for (bank = 0; bank < AB3550_NUM_BANKS; bank++) {
  755. unsigned int i;
  756. seq_printf(s, " bank %d:\n", bank);
  757. for (i = 0; i < debug_ranges[bank].count; i++) {
  758. u8 reg;
  759. for (reg = debug_ranges[bank].range[i].first;
  760. reg <= debug_ranges[bank].range[i].last;
  761. reg++) {
  762. u8 value;
  763. get_register_interruptible(ab, bank, reg,
  764. &value);
  765. seq_printf(s, " [%d/0x%02X]: 0x%02X\n", bank,
  766. reg, value);
  767. }
  768. }
  769. }
  770. return 0;
  771. }
  772. static int ab3550_registers_open(struct inode *inode, struct file *file)
  773. {
  774. return single_open(file, ab3550_registers_print, inode->i_private);
  775. }
  776. static const struct file_operations ab3550_registers_fops = {
  777. .open = ab3550_registers_open,
  778. .read = seq_read,
  779. .llseek = seq_lseek,
  780. .release = single_release,
  781. .owner = THIS_MODULE,
  782. };
  783. static int ab3550_bank_print(struct seq_file *s, void *p)
  784. {
  785. struct ab3550 *ab = s->private;
  786. seq_printf(s, "%d\n", ab->debug_bank);
  787. return 0;
  788. }
  789. static int ab3550_bank_open(struct inode *inode, struct file *file)
  790. {
  791. return single_open(file, ab3550_bank_print, inode->i_private);
  792. }
  793. static ssize_t ab3550_bank_write(struct file *file,
  794. const char __user *user_buf,
  795. size_t count, loff_t *ppos)
  796. {
  797. struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
  798. char buf[32];
  799. int buf_size;
  800. unsigned long user_bank;
  801. int err;
  802. /* Get userspace string and assure termination */
  803. buf_size = min(count, (sizeof(buf) - 1));
  804. if (copy_from_user(buf, user_buf, buf_size))
  805. return -EFAULT;
  806. buf[buf_size] = 0;
  807. err = strict_strtoul(buf, 0, &user_bank);
  808. if (err)
  809. return -EINVAL;
  810. if (user_bank >= AB3550_NUM_BANKS) {
  811. dev_err(&ab->i2c_client[0]->dev,
  812. "debugfs error input > number of banks\n");
  813. return -EINVAL;
  814. }
  815. ab->debug_bank = user_bank;
  816. return buf_size;
  817. }
  818. static int ab3550_address_print(struct seq_file *s, void *p)
  819. {
  820. struct ab3550 *ab = s->private;
  821. seq_printf(s, "0x%02X\n", ab->debug_address);
  822. return 0;
  823. }
  824. static int ab3550_address_open(struct inode *inode, struct file *file)
  825. {
  826. return single_open(file, ab3550_address_print, inode->i_private);
  827. }
  828. static ssize_t ab3550_address_write(struct file *file,
  829. const char __user *user_buf,
  830. size_t count, loff_t *ppos)
  831. {
  832. struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
  833. char buf[32];
  834. int buf_size;
  835. unsigned long user_address;
  836. int err;
  837. /* Get userspace string and assure termination */
  838. buf_size = min(count, (sizeof(buf) - 1));
  839. if (copy_from_user(buf, user_buf, buf_size))
  840. return -EFAULT;
  841. buf[buf_size] = 0;
  842. err = strict_strtoul(buf, 0, &user_address);
  843. if (err)
  844. return -EINVAL;
  845. if (user_address > 0xff) {
  846. dev_err(&ab->i2c_client[0]->dev,
  847. "debugfs error input > 0xff\n");
  848. return -EINVAL;
  849. }
  850. ab->debug_address = user_address;
  851. return buf_size;
  852. }
  853. static int ab3550_val_print(struct seq_file *s, void *p)
  854. {
  855. struct ab3550 *ab = s->private;
  856. int err;
  857. u8 regvalue;
  858. err = get_register_interruptible(ab, (u8)ab->debug_bank,
  859. (u8)ab->debug_address, &regvalue);
  860. if (err)
  861. return -EINVAL;
  862. seq_printf(s, "0x%02X\n", regvalue);
  863. return 0;
  864. }
  865. static int ab3550_val_open(struct inode *inode, struct file *file)
  866. {
  867. return single_open(file, ab3550_val_print, inode->i_private);
  868. }
  869. static ssize_t ab3550_val_write(struct file *file,
  870. const char __user *user_buf,
  871. size_t count, loff_t *ppos)
  872. {
  873. struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
  874. char buf[32];
  875. int buf_size;
  876. unsigned long user_val;
  877. int err;
  878. u8 regvalue;
  879. /* Get userspace string and assure termination */
  880. buf_size = min(count, (sizeof(buf)-1));
  881. if (copy_from_user(buf, user_buf, buf_size))
  882. return -EFAULT;
  883. buf[buf_size] = 0;
  884. err = strict_strtoul(buf, 0, &user_val);
  885. if (err)
  886. return -EINVAL;
  887. if (user_val > 0xff) {
  888. dev_err(&ab->i2c_client[0]->dev,
  889. "debugfs error input > 0xff\n");
  890. return -EINVAL;
  891. }
  892. err = mask_and_set_register_interruptible(
  893. ab, (u8)ab->debug_bank,
  894. (u8)ab->debug_address, 0xFF, (u8)user_val);
  895. if (err)
  896. return -EINVAL;
  897. get_register_interruptible(ab, (u8)ab->debug_bank,
  898. (u8)ab->debug_address, &regvalue);
  899. if (err)
  900. return -EINVAL;
  901. return buf_size;
  902. }
  903. static const struct file_operations ab3550_bank_fops = {
  904. .open = ab3550_bank_open,
  905. .write = ab3550_bank_write,
  906. .read = seq_read,
  907. .llseek = seq_lseek,
  908. .release = single_release,
  909. .owner = THIS_MODULE,
  910. };
  911. static const struct file_operations ab3550_address_fops = {
  912. .open = ab3550_address_open,
  913. .write = ab3550_address_write,
  914. .read = seq_read,
  915. .llseek = seq_lseek,
  916. .release = single_release,
  917. .owner = THIS_MODULE,
  918. };
  919. static const struct file_operations ab3550_val_fops = {
  920. .open = ab3550_val_open,
  921. .write = ab3550_val_write,
  922. .read = seq_read,
  923. .llseek = seq_lseek,
  924. .release = single_release,
  925. .owner = THIS_MODULE,
  926. };
  927. static struct dentry *ab3550_dir;
  928. static struct dentry *ab3550_reg_file;
  929. static struct dentry *ab3550_bank_file;
  930. static struct dentry *ab3550_address_file;
  931. static struct dentry *ab3550_val_file;
  932. static inline void ab3550_setup_debugfs(struct ab3550 *ab)
  933. {
  934. ab->debug_bank = 0;
  935. ab->debug_address = 0x00;
  936. ab3550_dir = debugfs_create_dir(AB3550_NAME_STRING, NULL);
  937. if (!ab3550_dir)
  938. goto exit_no_debugfs;
  939. ab3550_reg_file = debugfs_create_file("all-registers",
  940. S_IRUGO, ab3550_dir, ab, &ab3550_registers_fops);
  941. if (!ab3550_reg_file)
  942. goto exit_destroy_dir;
  943. ab3550_bank_file = debugfs_create_file("register-bank",
  944. (S_IRUGO | S_IWUGO), ab3550_dir, ab, &ab3550_bank_fops);
  945. if (!ab3550_bank_file)
  946. goto exit_destroy_reg;
  947. ab3550_address_file = debugfs_create_file("register-address",
  948. (S_IRUGO | S_IWUGO), ab3550_dir, ab, &ab3550_address_fops);
  949. if (!ab3550_address_file)
  950. goto exit_destroy_bank;
  951. ab3550_val_file = debugfs_create_file("register-value",
  952. (S_IRUGO | S_IWUGO), ab3550_dir, ab, &ab3550_val_fops);
  953. if (!ab3550_val_file)
  954. goto exit_destroy_address;
  955. return;
  956. exit_destroy_address:
  957. debugfs_remove(ab3550_address_file);
  958. exit_destroy_bank:
  959. debugfs_remove(ab3550_bank_file);
  960. exit_destroy_reg:
  961. debugfs_remove(ab3550_reg_file);
  962. exit_destroy_dir:
  963. debugfs_remove(ab3550_dir);
  964. exit_no_debugfs:
  965. dev_err(&ab->i2c_client[0]->dev, "failed to create debugfs entries.\n");
  966. return;
  967. }
  968. static inline void ab3550_remove_debugfs(void)
  969. {
  970. debugfs_remove(ab3550_val_file);
  971. debugfs_remove(ab3550_address_file);
  972. debugfs_remove(ab3550_bank_file);
  973. debugfs_remove(ab3550_reg_file);
  974. debugfs_remove(ab3550_dir);
  975. }
  976. #else /* !CONFIG_DEBUG_FS */
  977. static inline void ab3550_setup_debugfs(struct ab3550 *ab)
  978. {
  979. }
  980. static inline void ab3550_remove_debugfs(void)
  981. {
  982. }
  983. #endif
  984. /*
  985. * Basic set-up, datastructure creation/destruction and I2C interface.
  986. * This sets up a default config in the AB3550 chip so that it
  987. * will work as expected.
  988. */
  989. static int __init ab3550_setup(struct ab3550 *ab)
  990. {
  991. int err = 0;
  992. int i;
  993. struct ab3550_platform_data *plf_data;
  994. struct abx500_init_settings *settings;
  995. plf_data = ab->i2c_client[0]->dev.platform_data;
  996. settings = plf_data->init_settings;
  997. for (i = 0; i < plf_data->init_settings_sz; i++) {
  998. err = mask_and_set_register_interruptible(ab,
  999. settings[i].bank,
  1000. settings[i].reg,
  1001. 0xFF, settings[i].setting);
  1002. if (err)
  1003. goto exit_no_setup;
  1004. /* If event mask register update the event mask in ab3550 */
  1005. if ((settings[i].bank == 0) &&
  1006. (AB3550_IMR1 <= settings[i].reg) &&
  1007. (settings[i].reg <= AB3550_IMR5)) {
  1008. ab->event_mask[settings[i].reg - AB3550_IMR1] =
  1009. settings[i].setting;
  1010. }
  1011. }
  1012. exit_no_setup:
  1013. return err;
  1014. }
  1015. static void ab3550_mask_work(struct work_struct *work)
  1016. {
  1017. struct ab3550 *ab = container_of(work, struct ab3550, mask_work);
  1018. int i;
  1019. unsigned long flags;
  1020. u8 mask[AB3550_NUM_EVENT_REG];
  1021. spin_lock_irqsave(&ab->event_lock, flags);
  1022. for (i = 0; i < AB3550_NUM_EVENT_REG; i++)
  1023. mask[i] = ab->event_mask[i];
  1024. spin_unlock_irqrestore(&ab->event_lock, flags);
  1025. for (i = 0; i < AB3550_NUM_EVENT_REG; i++) {
  1026. int err;
  1027. err = mask_and_set_register_interruptible(ab, 0,
  1028. (AB3550_IMR1 + i), ~0, mask[i]);
  1029. if (err)
  1030. dev_err(&ab->i2c_client[0]->dev,
  1031. "ab3550_mask_work failed 0x%x,0x%x\n",
  1032. (AB3550_IMR1 + i), mask[i]);
  1033. }
  1034. }
  1035. static void ab3550_mask(unsigned int irq)
  1036. {
  1037. unsigned long flags;
  1038. struct ab3550 *ab;
  1039. struct ab3550_platform_data *plf_data;
  1040. ab = get_irq_chip_data(irq);
  1041. plf_data = ab->i2c_client[0]->dev.platform_data;
  1042. irq -= plf_data->irq.base;
  1043. spin_lock_irqsave(&ab->event_lock, flags);
  1044. ab->event_mask[irq / 8] |= BIT(irq % 8);
  1045. spin_unlock_irqrestore(&ab->event_lock, flags);
  1046. schedule_work(&ab->mask_work);
  1047. }
  1048. static void ab3550_unmask(unsigned int irq)
  1049. {
  1050. unsigned long flags;
  1051. struct ab3550 *ab;
  1052. struct ab3550_platform_data *plf_data;
  1053. ab = get_irq_chip_data(irq);
  1054. plf_data = ab->i2c_client[0]->dev.platform_data;
  1055. irq -= plf_data->irq.base;
  1056. spin_lock_irqsave(&ab->event_lock, flags);
  1057. ab->event_mask[irq / 8] &= ~BIT(irq % 8);
  1058. spin_unlock_irqrestore(&ab->event_lock, flags);
  1059. schedule_work(&ab->mask_work);
  1060. }
  1061. static void noop(unsigned int irq)
  1062. {
  1063. }
  1064. static struct irq_chip ab3550_irq_chip = {
  1065. .name = "ab3550-core", /* Keep the same name as the request */
  1066. .startup = NULL, /* defaults to enable */
  1067. .shutdown = NULL, /* defaults to disable */
  1068. .enable = NULL, /* defaults to unmask */
  1069. .disable = ab3550_mask, /* No default to mask in chip.c */
  1070. .ack = noop,
  1071. .mask = ab3550_mask,
  1072. .unmask = ab3550_unmask,
  1073. .end = NULL,
  1074. };
  1075. struct ab_family_id {
  1076. u8 id;
  1077. char *name;
  1078. };
  1079. static const struct ab_family_id ids[] __initdata = {
  1080. /* AB3550 */
  1081. {
  1082. .id = AB3550_P1A,
  1083. .name = "P1A"
  1084. },
  1085. /* Terminator */
  1086. {
  1087. .id = 0x00,
  1088. }
  1089. };
  1090. static int __init ab3550_probe(struct i2c_client *client,
  1091. const struct i2c_device_id *id)
  1092. {
  1093. struct ab3550 *ab;
  1094. struct ab3550_platform_data *ab3550_plf_data =
  1095. client->dev.platform_data;
  1096. int err;
  1097. int i;
  1098. int num_i2c_clients = 0;
  1099. ab = kzalloc(sizeof(struct ab3550), GFP_KERNEL);
  1100. if (!ab) {
  1101. dev_err(&client->dev,
  1102. "could not allocate " AB3550_NAME_STRING " device\n");
  1103. return -ENOMEM;
  1104. }
  1105. /* Initialize data structure */
  1106. mutex_init(&ab->access_mutex);
  1107. spin_lock_init(&ab->event_lock);
  1108. ab->i2c_client[0] = client;
  1109. i2c_set_clientdata(client, ab);
  1110. /* Read chip ID register */
  1111. err = get_register_interruptible(ab, 0, AB3550_CID_REG, &ab->chip_id);
  1112. if (err) {
  1113. dev_err(&client->dev, "could not communicate with the analog "
  1114. "baseband chip\n");
  1115. goto exit_no_detect;
  1116. }
  1117. for (i = 0; ids[i].id != 0x0; i++) {
  1118. if (ids[i].id == ab->chip_id) {
  1119. snprintf(&ab->chip_name[0], sizeof(ab->chip_name) - 1,
  1120. AB3550_ID_FORMAT_STRING, ids[i].name);
  1121. break;
  1122. }
  1123. }
  1124. if (ids[i].id == 0x0) {
  1125. dev_err(&client->dev, "unknown analog baseband chip id: 0x%x\n",
  1126. ab->chip_id);
  1127. dev_err(&client->dev, "driver not started!\n");
  1128. goto exit_no_detect;
  1129. }
  1130. dev_info(&client->dev, "detected AB chip: %s\n", &ab->chip_name[0]);
  1131. /* Attach other dummy I2C clients. */
  1132. while (++num_i2c_clients < AB3550_NUM_BANKS) {
  1133. ab->i2c_client[num_i2c_clients] =
  1134. i2c_new_dummy(client->adapter,
  1135. (client->addr + num_i2c_clients));
  1136. if (!ab->i2c_client[num_i2c_clients]) {
  1137. err = -ENOMEM;
  1138. goto exit_no_dummy_client;
  1139. }
  1140. strlcpy(ab->i2c_client[num_i2c_clients]->name, id->name,
  1141. sizeof(ab->i2c_client[num_i2c_clients]->name));
  1142. }
  1143. err = ab3550_setup(ab);
  1144. if (err)
  1145. goto exit_no_setup;
  1146. INIT_WORK(&ab->mask_work, ab3550_mask_work);
  1147. for (i = 0; i < ab3550_plf_data->irq.count; i++) {
  1148. unsigned int irq;
  1149. irq = ab3550_plf_data->irq.base + i;
  1150. set_irq_chip_data(irq, ab);
  1151. set_irq_chip_and_handler(irq, &ab3550_irq_chip,
  1152. handle_simple_irq);
  1153. set_irq_nested_thread(irq, 1);
  1154. #ifdef CONFIG_ARM
  1155. set_irq_flags(irq, IRQF_VALID);
  1156. #else
  1157. set_irq_noprobe(irq);
  1158. #endif
  1159. }
  1160. err = request_threaded_irq(client->irq, NULL, ab3550_irq_handler,
  1161. IRQF_ONESHOT, "ab3550-core", ab);
  1162. /* This real unpredictable IRQ is of course sampled for entropy */
  1163. rand_initialize_irq(client->irq);
  1164. if (err)
  1165. goto exit_no_irq;
  1166. err = abx500_register_ops(&client->dev, &ab3550_ops);
  1167. if (err)
  1168. goto exit_no_ops;
  1169. /* Set up and register the platform devices. */
  1170. for (i = 0; i < AB3550_NUM_DEVICES; i++) {
  1171. ab3550_devs[i].platform_data = ab3550_plf_data->dev_data[i];
  1172. ab3550_devs[i].data_size = ab3550_plf_data->dev_data_sz[i];
  1173. }
  1174. err = mfd_add_devices(&client->dev, 0, ab3550_devs,
  1175. ARRAY_SIZE(ab3550_devs), NULL,
  1176. ab3550_plf_data->irq.base);
  1177. ab3550_setup_debugfs(ab);
  1178. return 0;
  1179. exit_no_ops:
  1180. exit_no_irq:
  1181. exit_no_setup:
  1182. exit_no_dummy_client:
  1183. /* Unregister the dummy i2c clients. */
  1184. while (--num_i2c_clients)
  1185. i2c_unregister_device(ab->i2c_client[num_i2c_clients]);
  1186. exit_no_detect:
  1187. kfree(ab);
  1188. return err;
  1189. }
  1190. static int __exit ab3550_remove(struct i2c_client *client)
  1191. {
  1192. struct ab3550 *ab = i2c_get_clientdata(client);
  1193. int num_i2c_clients = AB3550_NUM_BANKS;
  1194. mfd_remove_devices(&client->dev);
  1195. ab3550_remove_debugfs();
  1196. while (--num_i2c_clients)
  1197. i2c_unregister_device(ab->i2c_client[num_i2c_clients]);
  1198. /*
  1199. * At this point, all subscribers should have unregistered
  1200. * their notifiers so deactivate IRQ
  1201. */
  1202. free_irq(client->irq, ab);
  1203. kfree(ab);
  1204. return 0;
  1205. }
  1206. static const struct i2c_device_id ab3550_id[] = {
  1207. {AB3550_NAME_STRING, 0},
  1208. {}
  1209. };
  1210. MODULE_DEVICE_TABLE(i2c, ab3550_id);
  1211. static struct i2c_driver ab3550_driver = {
  1212. .driver = {
  1213. .name = AB3550_NAME_STRING,
  1214. .owner = THIS_MODULE,
  1215. },
  1216. .id_table = ab3550_id,
  1217. .probe = ab3550_probe,
  1218. .remove = __exit_p(ab3550_remove),
  1219. };
  1220. static int __init ab3550_i2c_init(void)
  1221. {
  1222. return i2c_add_driver(&ab3550_driver);
  1223. }
  1224. static void __exit ab3550_i2c_exit(void)
  1225. {
  1226. i2c_del_driver(&ab3550_driver);
  1227. }
  1228. subsys_initcall(ab3550_i2c_init);
  1229. module_exit(ab3550_i2c_exit);
  1230. MODULE_AUTHOR("Mattias Wallin <mattias.wallin@stericsson.com>");
  1231. MODULE_DESCRIPTION("AB3550 core driver");
  1232. MODULE_LICENSE("GPL");