dm1105.c 24 KB

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  1. /*
  2. * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
  3. *
  4. * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. */
  21. #include <linux/i2c.h>
  22. #include <linux/init.h>
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/proc_fs.h>
  26. #include <linux/pci.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/input.h>
  29. #include <linux/slab.h>
  30. #include <media/ir-core.h>
  31. #include "demux.h"
  32. #include "dmxdev.h"
  33. #include "dvb_demux.h"
  34. #include "dvb_frontend.h"
  35. #include "dvb_net.h"
  36. #include "dvbdev.h"
  37. #include "dvb-pll.h"
  38. #include "stv0299.h"
  39. #include "stv0288.h"
  40. #include "stb6000.h"
  41. #include "si21xx.h"
  42. #include "cx24116.h"
  43. #include "z0194a.h"
  44. #include "ds3000.h"
  45. #define MODULE_NAME "dm1105"
  46. #define UNSET (-1U)
  47. #define DM1105_BOARD_NOAUTO UNSET
  48. #define DM1105_BOARD_UNKNOWN 0
  49. #define DM1105_BOARD_DVBWORLD_2002 1
  50. #define DM1105_BOARD_DVBWORLD_2004 2
  51. #define DM1105_BOARD_AXESS_DM05 3
  52. /* ----------------------------------------------- */
  53. /*
  54. * PCI ID's
  55. */
  56. #ifndef PCI_VENDOR_ID_TRIGEM
  57. #define PCI_VENDOR_ID_TRIGEM 0x109f
  58. #endif
  59. #ifndef PCI_VENDOR_ID_AXESS
  60. #define PCI_VENDOR_ID_AXESS 0x195d
  61. #endif
  62. #ifndef PCI_DEVICE_ID_DM1105
  63. #define PCI_DEVICE_ID_DM1105 0x036f
  64. #endif
  65. #ifndef PCI_DEVICE_ID_DW2002
  66. #define PCI_DEVICE_ID_DW2002 0x2002
  67. #endif
  68. #ifndef PCI_DEVICE_ID_DW2004
  69. #define PCI_DEVICE_ID_DW2004 0x2004
  70. #endif
  71. #ifndef PCI_DEVICE_ID_DM05
  72. #define PCI_DEVICE_ID_DM05 0x1105
  73. #endif
  74. /* ----------------------------------------------- */
  75. /* sdmc dm1105 registers */
  76. /* TS Control */
  77. #define DM1105_TSCTR 0x00
  78. #define DM1105_DTALENTH 0x04
  79. /* GPIO Interface */
  80. #define DM1105_GPIOVAL 0x08
  81. #define DM1105_GPIOCTR 0x0c
  82. /* PID serial number */
  83. #define DM1105_PIDN 0x10
  84. /* Odd-even secret key select */
  85. #define DM1105_CWSEL 0x14
  86. /* Host Command Interface */
  87. #define DM1105_HOST_CTR 0x18
  88. #define DM1105_HOST_AD 0x1c
  89. /* PCI Interface */
  90. #define DM1105_CR 0x30
  91. #define DM1105_RST 0x34
  92. #define DM1105_STADR 0x38
  93. #define DM1105_RLEN 0x3c
  94. #define DM1105_WRP 0x40
  95. #define DM1105_INTCNT 0x44
  96. #define DM1105_INTMAK 0x48
  97. #define DM1105_INTSTS 0x4c
  98. /* CW Value */
  99. #define DM1105_ODD 0x50
  100. #define DM1105_EVEN 0x58
  101. /* PID Value */
  102. #define DM1105_PID 0x60
  103. /* IR Control */
  104. #define DM1105_IRCTR 0x64
  105. #define DM1105_IRMODE 0x68
  106. #define DM1105_SYSTEMCODE 0x6c
  107. #define DM1105_IRCODE 0x70
  108. /* Unknown Values */
  109. #define DM1105_ENCRYPT 0x74
  110. #define DM1105_VER 0x7c
  111. /* I2C Interface */
  112. #define DM1105_I2CCTR 0x80
  113. #define DM1105_I2CSTS 0x81
  114. #define DM1105_I2CDAT 0x82
  115. #define DM1105_I2C_RA 0x83
  116. /* ----------------------------------------------- */
  117. /* Interrupt Mask Bits */
  118. #define INTMAK_TSIRQM 0x01
  119. #define INTMAK_HIRQM 0x04
  120. #define INTMAK_IRM 0x08
  121. #define INTMAK_ALLMASK (INTMAK_TSIRQM | \
  122. INTMAK_HIRQM | \
  123. INTMAK_IRM)
  124. #define INTMAK_NONEMASK 0x00
  125. /* Interrupt Status Bits */
  126. #define INTSTS_TSIRQ 0x01
  127. #define INTSTS_HIRQ 0x04
  128. #define INTSTS_IR 0x08
  129. /* IR Control Bits */
  130. #define DM1105_IR_EN 0x01
  131. #define DM1105_SYS_CHK 0x02
  132. #define DM1105_REP_FLG 0x08
  133. /* EEPROM addr */
  134. #define IIC_24C01_addr 0xa0
  135. /* Max board count */
  136. #define DM1105_MAX 0x04
  137. #define DRIVER_NAME "dm1105"
  138. #define DM1105_DMA_PACKETS 47
  139. #define DM1105_DMA_PACKET_LENGTH (128*4)
  140. #define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
  141. /* GPIO's for LNB power control */
  142. #define DM1105_LNB_MASK 0x00000000
  143. #define DM1105_LNB_OFF 0x00020000
  144. #define DM1105_LNB_13V 0x00010100
  145. #define DM1105_LNB_18V 0x00000100
  146. /* GPIO's for LNB power control for Axess DM05 */
  147. #define DM05_LNB_MASK 0x00000000
  148. #define DM05_LNB_OFF 0x00020000/* actually 13v */
  149. #define DM05_LNB_13V 0x00020000
  150. #define DM05_LNB_18V 0x00030000
  151. static unsigned int card[] = {[0 ... 3] = UNSET };
  152. module_param_array(card, int, NULL, 0444);
  153. MODULE_PARM_DESC(card, "card type");
  154. static int ir_debug;
  155. module_param(ir_debug, int, 0644);
  156. MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
  157. static unsigned int dm1105_devcount;
  158. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  159. struct dm1105_board {
  160. char *name;
  161. };
  162. struct dm1105_subid {
  163. u16 subvendor;
  164. u16 subdevice;
  165. u32 card;
  166. };
  167. static const struct dm1105_board dm1105_boards[] = {
  168. [DM1105_BOARD_UNKNOWN] = {
  169. .name = "UNKNOWN/GENERIC",
  170. },
  171. [DM1105_BOARD_DVBWORLD_2002] = {
  172. .name = "DVBWorld PCI 2002",
  173. },
  174. [DM1105_BOARD_DVBWORLD_2004] = {
  175. .name = "DVBWorld PCI 2004",
  176. },
  177. [DM1105_BOARD_AXESS_DM05] = {
  178. .name = "Axess/EasyTv DM05",
  179. },
  180. };
  181. static const struct dm1105_subid dm1105_subids[] = {
  182. {
  183. .subvendor = 0x0000,
  184. .subdevice = 0x2002,
  185. .card = DM1105_BOARD_DVBWORLD_2002,
  186. }, {
  187. .subvendor = 0x0001,
  188. .subdevice = 0x2002,
  189. .card = DM1105_BOARD_DVBWORLD_2002,
  190. }, {
  191. .subvendor = 0x0000,
  192. .subdevice = 0x2004,
  193. .card = DM1105_BOARD_DVBWORLD_2004,
  194. }, {
  195. .subvendor = 0x0001,
  196. .subdevice = 0x2004,
  197. .card = DM1105_BOARD_DVBWORLD_2004,
  198. }, {
  199. .subvendor = 0x195d,
  200. .subdevice = 0x1105,
  201. .card = DM1105_BOARD_AXESS_DM05,
  202. },
  203. };
  204. static void dm1105_card_list(struct pci_dev *pci)
  205. {
  206. int i;
  207. if (0 == pci->subsystem_vendor &&
  208. 0 == pci->subsystem_device) {
  209. printk(KERN_ERR
  210. "dm1105: Your board has no valid PCI Subsystem ID\n"
  211. "dm1105: and thus can't be autodetected\n"
  212. "dm1105: Please pass card=<n> insmod option to\n"
  213. "dm1105: workaround that. Redirect complaints to\n"
  214. "dm1105: the vendor of the TV card. Best regards,\n"
  215. "dm1105: -- tux\n");
  216. } else {
  217. printk(KERN_ERR
  218. "dm1105: Your board isn't known (yet) to the driver.\n"
  219. "dm1105: You can try to pick one of the existing\n"
  220. "dm1105: card configs via card=<n> insmod option.\n"
  221. "dm1105: Updating to the latest version might help\n"
  222. "dm1105: as well.\n");
  223. }
  224. printk(KERN_ERR "Here is a list of valid choices for the card=<n> "
  225. "insmod option:\n");
  226. for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
  227. printk(KERN_ERR "dm1105: card=%d -> %s\n",
  228. i, dm1105_boards[i].name);
  229. }
  230. /* infrared remote control */
  231. struct infrared {
  232. struct input_dev *input_dev;
  233. char input_phys[32];
  234. struct work_struct work;
  235. u32 ir_command;
  236. };
  237. struct dm1105_dev {
  238. /* pci */
  239. struct pci_dev *pdev;
  240. u8 __iomem *io_mem;
  241. /* ir */
  242. struct infrared ir;
  243. /* dvb */
  244. struct dmx_frontend hw_frontend;
  245. struct dmx_frontend mem_frontend;
  246. struct dmxdev dmxdev;
  247. struct dvb_adapter dvb_adapter;
  248. struct dvb_demux demux;
  249. struct dvb_frontend *fe;
  250. struct dvb_net dvbnet;
  251. unsigned int full_ts_users;
  252. unsigned int boardnr;
  253. int nr;
  254. /* i2c */
  255. struct i2c_adapter i2c_adap;
  256. /* irq */
  257. struct work_struct work;
  258. struct workqueue_struct *wq;
  259. char wqn[16];
  260. /* dma */
  261. dma_addr_t dma_addr;
  262. unsigned char *ts_buf;
  263. u32 wrp;
  264. u32 nextwrp;
  265. u32 buffer_size;
  266. unsigned int PacketErrorCount;
  267. unsigned int dmarst;
  268. spinlock_t lock;
  269. };
  270. #define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg]))
  271. #define dm_readb(reg) inb(dm_io_mem(reg))
  272. #define dm_writeb(reg, value) outb((value), (dm_io_mem(reg)))
  273. #define dm_readw(reg) inw(dm_io_mem(reg))
  274. #define dm_writew(reg, value) outw((value), (dm_io_mem(reg)))
  275. #define dm_readl(reg) inl(dm_io_mem(reg))
  276. #define dm_writel(reg, value) outl((value), (dm_io_mem(reg)))
  277. #define dm_andorl(reg, mask, value) \
  278. outl((inl(dm_io_mem(reg)) & ~(mask)) |\
  279. ((value) & (mask)), (dm_io_mem(reg)))
  280. #define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit))
  281. #define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
  282. static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
  283. struct i2c_msg *msgs, int num)
  284. {
  285. struct dm1105_dev *dev ;
  286. int addr, rc, i, j, k, len, byte, data;
  287. u8 status;
  288. dev = i2c_adap->algo_data;
  289. for (i = 0; i < num; i++) {
  290. dm_writeb(DM1105_I2CCTR, 0x00);
  291. if (msgs[i].flags & I2C_M_RD) {
  292. /* read bytes */
  293. addr = msgs[i].addr << 1;
  294. addr |= 1;
  295. dm_writeb(DM1105_I2CDAT, addr);
  296. for (byte = 0; byte < msgs[i].len; byte++)
  297. dm_writeb(DM1105_I2CDAT + byte + 1, 0);
  298. dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
  299. for (j = 0; j < 55; j++) {
  300. mdelay(10);
  301. status = dm_readb(DM1105_I2CSTS);
  302. if ((status & 0xc0) == 0x40)
  303. break;
  304. }
  305. if (j >= 55)
  306. return -1;
  307. for (byte = 0; byte < msgs[i].len; byte++) {
  308. rc = dm_readb(DM1105_I2CDAT + byte + 1);
  309. if (rc < 0)
  310. goto err;
  311. msgs[i].buf[byte] = rc;
  312. }
  313. } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
  314. /* prepaired for cx24116 firmware */
  315. /* Write in small blocks */
  316. len = msgs[i].len - 1;
  317. k = 1;
  318. do {
  319. dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
  320. dm_writeb(DM1105_I2CDAT + 1, 0xf7);
  321. for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
  322. data = msgs[i].buf[k + byte];
  323. dm_writeb(DM1105_I2CDAT + byte + 2, data);
  324. }
  325. dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
  326. for (j = 0; j < 25; j++) {
  327. mdelay(10);
  328. status = dm_readb(DM1105_I2CSTS);
  329. if ((status & 0xc0) == 0x40)
  330. break;
  331. }
  332. if (j >= 25)
  333. return -1;
  334. k += 48;
  335. len -= 48;
  336. } while (len > 0);
  337. } else {
  338. /* write bytes */
  339. dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
  340. for (byte = 0; byte < msgs[i].len; byte++) {
  341. data = msgs[i].buf[byte];
  342. dm_writeb(DM1105_I2CDAT + byte + 1, data);
  343. }
  344. dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
  345. for (j = 0; j < 25; j++) {
  346. mdelay(10);
  347. status = dm_readb(DM1105_I2CSTS);
  348. if ((status & 0xc0) == 0x40)
  349. break;
  350. }
  351. if (j >= 25)
  352. return -1;
  353. }
  354. }
  355. return num;
  356. err:
  357. return rc;
  358. }
  359. static u32 functionality(struct i2c_adapter *adap)
  360. {
  361. return I2C_FUNC_I2C;
  362. }
  363. static struct i2c_algorithm dm1105_algo = {
  364. .master_xfer = dm1105_i2c_xfer,
  365. .functionality = functionality,
  366. };
  367. static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
  368. {
  369. return container_of(feed->demux, struct dm1105_dev, demux);
  370. }
  371. static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
  372. {
  373. return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
  374. }
  375. static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  376. {
  377. struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
  378. u32 lnb_mask, lnb_13v, lnb_18v, lnb_off;
  379. switch (dev->boardnr) {
  380. case DM1105_BOARD_AXESS_DM05:
  381. lnb_mask = DM05_LNB_MASK;
  382. lnb_off = DM05_LNB_OFF;
  383. lnb_13v = DM05_LNB_13V;
  384. lnb_18v = DM05_LNB_18V;
  385. break;
  386. case DM1105_BOARD_DVBWORLD_2002:
  387. case DM1105_BOARD_DVBWORLD_2004:
  388. default:
  389. lnb_mask = DM1105_LNB_MASK;
  390. lnb_off = DM1105_LNB_OFF;
  391. lnb_13v = DM1105_LNB_13V;
  392. lnb_18v = DM1105_LNB_18V;
  393. }
  394. dm_writel(DM1105_GPIOCTR, lnb_mask);
  395. if (voltage == SEC_VOLTAGE_18)
  396. dm_writel(DM1105_GPIOVAL, lnb_18v);
  397. else if (voltage == SEC_VOLTAGE_13)
  398. dm_writel(DM1105_GPIOVAL, lnb_13v);
  399. else
  400. dm_writel(DM1105_GPIOVAL, lnb_off);
  401. return 0;
  402. }
  403. static void dm1105_set_dma_addr(struct dm1105_dev *dev)
  404. {
  405. dm_writel(DM1105_STADR, cpu_to_le32(dev->dma_addr));
  406. }
  407. static int __devinit dm1105_dma_map(struct dm1105_dev *dev)
  408. {
  409. dev->ts_buf = pci_alloc_consistent(dev->pdev,
  410. 6 * DM1105_DMA_BYTES,
  411. &dev->dma_addr);
  412. return !dev->ts_buf;
  413. }
  414. static void dm1105_dma_unmap(struct dm1105_dev *dev)
  415. {
  416. pci_free_consistent(dev->pdev,
  417. 6 * DM1105_DMA_BYTES,
  418. dev->ts_buf,
  419. dev->dma_addr);
  420. }
  421. static void dm1105_enable_irqs(struct dm1105_dev *dev)
  422. {
  423. dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
  424. dm_writeb(DM1105_CR, 1);
  425. }
  426. static void dm1105_disable_irqs(struct dm1105_dev *dev)
  427. {
  428. dm_writeb(DM1105_INTMAK, INTMAK_IRM);
  429. dm_writeb(DM1105_CR, 0);
  430. }
  431. static int dm1105_start_feed(struct dvb_demux_feed *f)
  432. {
  433. struct dm1105_dev *dev = feed_to_dm1105_dev(f);
  434. if (dev->full_ts_users++ == 0)
  435. dm1105_enable_irqs(dev);
  436. return 0;
  437. }
  438. static int dm1105_stop_feed(struct dvb_demux_feed *f)
  439. {
  440. struct dm1105_dev *dev = feed_to_dm1105_dev(f);
  441. if (--dev->full_ts_users == 0)
  442. dm1105_disable_irqs(dev);
  443. return 0;
  444. }
  445. /* ir work handler */
  446. static void dm1105_emit_key(struct work_struct *work)
  447. {
  448. struct infrared *ir = container_of(work, struct infrared, work);
  449. u32 ircom = ir->ir_command;
  450. u8 data;
  451. if (ir_debug)
  452. printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
  453. data = (ircom >> 8) & 0x7f;
  454. ir_keydown(ir->input_dev, data, 0);
  455. }
  456. /* work handler */
  457. static void dm1105_dmx_buffer(struct work_struct *work)
  458. {
  459. struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
  460. unsigned int nbpackets;
  461. u32 oldwrp = dev->wrp;
  462. u32 nextwrp = dev->nextwrp;
  463. if (!((dev->ts_buf[oldwrp] == 0x47) &&
  464. (dev->ts_buf[oldwrp + 188] == 0x47) &&
  465. (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
  466. dev->PacketErrorCount++;
  467. /* bad packet found */
  468. if ((dev->PacketErrorCount >= 2) &&
  469. (dev->dmarst == 0)) {
  470. dm_writeb(DM1105_RST, 1);
  471. dev->wrp = 0;
  472. dev->PacketErrorCount = 0;
  473. dev->dmarst = 0;
  474. return;
  475. }
  476. }
  477. if (nextwrp < oldwrp) {
  478. memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
  479. nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
  480. } else
  481. nbpackets = (nextwrp - oldwrp) / 188;
  482. dev->wrp = nextwrp;
  483. dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
  484. }
  485. static irqreturn_t dm1105_irq(int irq, void *dev_id)
  486. {
  487. struct dm1105_dev *dev = dev_id;
  488. /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
  489. unsigned int intsts = dm_readb(DM1105_INTSTS);
  490. dm_writeb(DM1105_INTSTS, intsts);
  491. switch (intsts) {
  492. case INTSTS_TSIRQ:
  493. case (INTSTS_TSIRQ | INTSTS_IR):
  494. dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
  495. queue_work(dev->wq, &dev->work);
  496. break;
  497. case INTSTS_IR:
  498. dev->ir.ir_command = dm_readl(DM1105_IRCODE);
  499. schedule_work(&dev->ir.work);
  500. break;
  501. }
  502. return IRQ_HANDLED;
  503. }
  504. int __devinit dm1105_ir_init(struct dm1105_dev *dm1105)
  505. {
  506. struct input_dev *input_dev;
  507. char *ir_codes = RC_MAP_DM1105_NEC;
  508. int err = -ENOMEM;
  509. input_dev = input_allocate_device();
  510. if (!input_dev)
  511. return -ENOMEM;
  512. dm1105->ir.input_dev = input_dev;
  513. snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
  514. "pci-%s/ir0", pci_name(dm1105->pdev));
  515. input_dev->name = "DVB on-card IR receiver";
  516. input_dev->phys = dm1105->ir.input_phys;
  517. input_dev->id.bustype = BUS_PCI;
  518. input_dev->id.version = 1;
  519. if (dm1105->pdev->subsystem_vendor) {
  520. input_dev->id.vendor = dm1105->pdev->subsystem_vendor;
  521. input_dev->id.product = dm1105->pdev->subsystem_device;
  522. } else {
  523. input_dev->id.vendor = dm1105->pdev->vendor;
  524. input_dev->id.product = dm1105->pdev->device;
  525. }
  526. input_dev->dev.parent = &dm1105->pdev->dev;
  527. INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
  528. err = ir_input_register(input_dev, ir_codes, NULL, MODULE_NAME);
  529. if (err < 0) {
  530. input_free_device(input_dev);
  531. return err;
  532. }
  533. return 0;
  534. }
  535. void __devexit dm1105_ir_exit(struct dm1105_dev *dm1105)
  536. {
  537. ir_input_unregister(dm1105->ir.input_dev);
  538. }
  539. static int __devinit dm1105_hw_init(struct dm1105_dev *dev)
  540. {
  541. dm1105_disable_irqs(dev);
  542. dm_writeb(DM1105_HOST_CTR, 0);
  543. /*DATALEN 188,*/
  544. dm_writeb(DM1105_DTALENTH, 188);
  545. /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
  546. dm_writew(DM1105_TSCTR, 0xc10a);
  547. /* map DMA and set address */
  548. dm1105_dma_map(dev);
  549. dm1105_set_dma_addr(dev);
  550. /* big buffer */
  551. dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
  552. dm_writeb(DM1105_INTCNT, 47);
  553. /* IR NEC mode enable */
  554. dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
  555. dm_writeb(DM1105_IRMODE, 0);
  556. dm_writew(DM1105_SYSTEMCODE, 0);
  557. return 0;
  558. }
  559. static void dm1105_hw_exit(struct dm1105_dev *dev)
  560. {
  561. dm1105_disable_irqs(dev);
  562. /* IR disable */
  563. dm_writeb(DM1105_IRCTR, 0);
  564. dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
  565. dm1105_dma_unmap(dev);
  566. }
  567. static struct stv0299_config sharp_z0194a_config = {
  568. .demod_address = 0x68,
  569. .inittab = sharp_z0194a_inittab,
  570. .mclk = 88000000UL,
  571. .invert = 1,
  572. .skip_reinit = 0,
  573. .lock_output = STV0299_LOCKOUTPUT_1,
  574. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  575. .min_delay_ms = 100,
  576. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  577. };
  578. static struct stv0288_config earda_config = {
  579. .demod_address = 0x68,
  580. .min_delay_ms = 100,
  581. };
  582. static struct si21xx_config serit_config = {
  583. .demod_address = 0x68,
  584. .min_delay_ms = 100,
  585. };
  586. static struct cx24116_config serit_sp2633_config = {
  587. .demod_address = 0x55,
  588. };
  589. static struct ds3000_config dvbworld_ds3000_config = {
  590. .demod_address = 0x68,
  591. };
  592. static int __devinit frontend_init(struct dm1105_dev *dev)
  593. {
  594. int ret;
  595. switch (dev->boardnr) {
  596. case DM1105_BOARD_DVBWORLD_2004:
  597. dev->fe = dvb_attach(
  598. cx24116_attach, &serit_sp2633_config,
  599. &dev->i2c_adap);
  600. if (dev->fe) {
  601. dev->fe->ops.set_voltage = dm1105_set_voltage;
  602. break;
  603. }
  604. dev->fe = dvb_attach(
  605. ds3000_attach, &dvbworld_ds3000_config,
  606. &dev->i2c_adap);
  607. if (dev->fe)
  608. dev->fe->ops.set_voltage = dm1105_set_voltage;
  609. break;
  610. case DM1105_BOARD_DVBWORLD_2002:
  611. case DM1105_BOARD_AXESS_DM05:
  612. default:
  613. dev->fe = dvb_attach(
  614. stv0299_attach, &sharp_z0194a_config,
  615. &dev->i2c_adap);
  616. if (dev->fe) {
  617. dev->fe->ops.set_voltage = dm1105_set_voltage;
  618. dvb_attach(dvb_pll_attach, dev->fe, 0x60,
  619. &dev->i2c_adap, DVB_PLL_OPERA1);
  620. break;
  621. }
  622. dev->fe = dvb_attach(
  623. stv0288_attach, &earda_config,
  624. &dev->i2c_adap);
  625. if (dev->fe) {
  626. dev->fe->ops.set_voltage = dm1105_set_voltage;
  627. dvb_attach(stb6000_attach, dev->fe, 0x61,
  628. &dev->i2c_adap);
  629. break;
  630. }
  631. dev->fe = dvb_attach(
  632. si21xx_attach, &serit_config,
  633. &dev->i2c_adap);
  634. if (dev->fe)
  635. dev->fe->ops.set_voltage = dm1105_set_voltage;
  636. }
  637. if (!dev->fe) {
  638. dev_err(&dev->pdev->dev, "could not attach frontend\n");
  639. return -ENODEV;
  640. }
  641. ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
  642. if (ret < 0) {
  643. if (dev->fe->ops.release)
  644. dev->fe->ops.release(dev->fe);
  645. dev->fe = NULL;
  646. return ret;
  647. }
  648. return 0;
  649. }
  650. static void __devinit dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
  651. {
  652. static u8 command[1] = { 0x28 };
  653. struct i2c_msg msg[] = {
  654. {
  655. .addr = IIC_24C01_addr >> 1,
  656. .flags = 0,
  657. .buf = command,
  658. .len = 1
  659. }, {
  660. .addr = IIC_24C01_addr >> 1,
  661. .flags = I2C_M_RD,
  662. .buf = mac,
  663. .len = 6
  664. },
  665. };
  666. dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
  667. dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
  668. }
  669. static int __devinit dm1105_probe(struct pci_dev *pdev,
  670. const struct pci_device_id *ent)
  671. {
  672. struct dm1105_dev *dev;
  673. struct dvb_adapter *dvb_adapter;
  674. struct dvb_demux *dvbdemux;
  675. struct dmx_demux *dmx;
  676. int ret = -ENOMEM;
  677. int i;
  678. dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
  679. if (!dev)
  680. return -ENOMEM;
  681. /* board config */
  682. dev->nr = dm1105_devcount;
  683. dev->boardnr = UNSET;
  684. if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
  685. dev->boardnr = card[dev->nr];
  686. for (i = 0; UNSET == dev->boardnr &&
  687. i < ARRAY_SIZE(dm1105_subids); i++)
  688. if (pdev->subsystem_vendor ==
  689. dm1105_subids[i].subvendor &&
  690. pdev->subsystem_device ==
  691. dm1105_subids[i].subdevice)
  692. dev->boardnr = dm1105_subids[i].card;
  693. if (UNSET == dev->boardnr) {
  694. dev->boardnr = DM1105_BOARD_UNKNOWN;
  695. dm1105_card_list(pdev);
  696. }
  697. dm1105_devcount++;
  698. dev->pdev = pdev;
  699. dev->buffer_size = 5 * DM1105_DMA_BYTES;
  700. dev->PacketErrorCount = 0;
  701. dev->dmarst = 0;
  702. ret = pci_enable_device(pdev);
  703. if (ret < 0)
  704. goto err_kfree;
  705. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  706. if (ret < 0)
  707. goto err_pci_disable_device;
  708. pci_set_master(pdev);
  709. ret = pci_request_regions(pdev, DRIVER_NAME);
  710. if (ret < 0)
  711. goto err_pci_disable_device;
  712. dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
  713. if (!dev->io_mem) {
  714. ret = -EIO;
  715. goto err_pci_release_regions;
  716. }
  717. spin_lock_init(&dev->lock);
  718. pci_set_drvdata(pdev, dev);
  719. ret = dm1105_hw_init(dev);
  720. if (ret < 0)
  721. goto err_pci_iounmap;
  722. /* i2c */
  723. i2c_set_adapdata(&dev->i2c_adap, dev);
  724. strcpy(dev->i2c_adap.name, DRIVER_NAME);
  725. dev->i2c_adap.owner = THIS_MODULE;
  726. dev->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
  727. dev->i2c_adap.dev.parent = &pdev->dev;
  728. dev->i2c_adap.algo = &dm1105_algo;
  729. dev->i2c_adap.algo_data = dev;
  730. ret = i2c_add_adapter(&dev->i2c_adap);
  731. if (ret < 0)
  732. goto err_dm1105_hw_exit;
  733. /* dvb */
  734. ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
  735. THIS_MODULE, &pdev->dev, adapter_nr);
  736. if (ret < 0)
  737. goto err_i2c_del_adapter;
  738. dvb_adapter = &dev->dvb_adapter;
  739. dm1105_read_mac(dev, dvb_adapter->proposed_mac);
  740. dvbdemux = &dev->demux;
  741. dvbdemux->filternum = 256;
  742. dvbdemux->feednum = 256;
  743. dvbdemux->start_feed = dm1105_start_feed;
  744. dvbdemux->stop_feed = dm1105_stop_feed;
  745. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
  746. DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
  747. ret = dvb_dmx_init(dvbdemux);
  748. if (ret < 0)
  749. goto err_dvb_unregister_adapter;
  750. dmx = &dvbdemux->dmx;
  751. dev->dmxdev.filternum = 256;
  752. dev->dmxdev.demux = dmx;
  753. dev->dmxdev.capabilities = 0;
  754. ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
  755. if (ret < 0)
  756. goto err_dvb_dmx_release;
  757. dev->hw_frontend.source = DMX_FRONTEND_0;
  758. ret = dmx->add_frontend(dmx, &dev->hw_frontend);
  759. if (ret < 0)
  760. goto err_dvb_dmxdev_release;
  761. dev->mem_frontend.source = DMX_MEMORY_FE;
  762. ret = dmx->add_frontend(dmx, &dev->mem_frontend);
  763. if (ret < 0)
  764. goto err_remove_hw_frontend;
  765. ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
  766. if (ret < 0)
  767. goto err_remove_mem_frontend;
  768. ret = frontend_init(dev);
  769. if (ret < 0)
  770. goto err_disconnect_frontend;
  771. dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
  772. dm1105_ir_init(dev);
  773. INIT_WORK(&dev->work, dm1105_dmx_buffer);
  774. sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
  775. dev->wq = create_singlethread_workqueue(dev->wqn);
  776. if (!dev->wq)
  777. goto err_dvb_net;
  778. ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
  779. DRIVER_NAME, dev);
  780. if (ret < 0)
  781. goto err_workqueue;
  782. return 0;
  783. err_workqueue:
  784. destroy_workqueue(dev->wq);
  785. err_dvb_net:
  786. dvb_net_release(&dev->dvbnet);
  787. err_disconnect_frontend:
  788. dmx->disconnect_frontend(dmx);
  789. err_remove_mem_frontend:
  790. dmx->remove_frontend(dmx, &dev->mem_frontend);
  791. err_remove_hw_frontend:
  792. dmx->remove_frontend(dmx, &dev->hw_frontend);
  793. err_dvb_dmxdev_release:
  794. dvb_dmxdev_release(&dev->dmxdev);
  795. err_dvb_dmx_release:
  796. dvb_dmx_release(dvbdemux);
  797. err_dvb_unregister_adapter:
  798. dvb_unregister_adapter(dvb_adapter);
  799. err_i2c_del_adapter:
  800. i2c_del_adapter(&dev->i2c_adap);
  801. err_dm1105_hw_exit:
  802. dm1105_hw_exit(dev);
  803. err_pci_iounmap:
  804. pci_iounmap(pdev, dev->io_mem);
  805. err_pci_release_regions:
  806. pci_release_regions(pdev);
  807. err_pci_disable_device:
  808. pci_disable_device(pdev);
  809. err_kfree:
  810. pci_set_drvdata(pdev, NULL);
  811. kfree(dev);
  812. return ret;
  813. }
  814. static void __devexit dm1105_remove(struct pci_dev *pdev)
  815. {
  816. struct dm1105_dev *dev = pci_get_drvdata(pdev);
  817. struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
  818. struct dvb_demux *dvbdemux = &dev->demux;
  819. struct dmx_demux *dmx = &dvbdemux->dmx;
  820. dm1105_ir_exit(dev);
  821. dmx->close(dmx);
  822. dvb_net_release(&dev->dvbnet);
  823. if (dev->fe)
  824. dvb_unregister_frontend(dev->fe);
  825. dmx->disconnect_frontend(dmx);
  826. dmx->remove_frontend(dmx, &dev->mem_frontend);
  827. dmx->remove_frontend(dmx, &dev->hw_frontend);
  828. dvb_dmxdev_release(&dev->dmxdev);
  829. dvb_dmx_release(dvbdemux);
  830. dvb_unregister_adapter(dvb_adapter);
  831. if (&dev->i2c_adap)
  832. i2c_del_adapter(&dev->i2c_adap);
  833. dm1105_hw_exit(dev);
  834. synchronize_irq(pdev->irq);
  835. free_irq(pdev->irq, dev);
  836. pci_iounmap(pdev, dev->io_mem);
  837. pci_release_regions(pdev);
  838. pci_disable_device(pdev);
  839. pci_set_drvdata(pdev, NULL);
  840. dm1105_devcount--;
  841. kfree(dev);
  842. }
  843. static struct pci_device_id dm1105_id_table[] __devinitdata = {
  844. {
  845. .vendor = PCI_VENDOR_ID_TRIGEM,
  846. .device = PCI_DEVICE_ID_DM1105,
  847. .subvendor = PCI_ANY_ID,
  848. .subdevice = PCI_ANY_ID,
  849. }, {
  850. .vendor = PCI_VENDOR_ID_AXESS,
  851. .device = PCI_DEVICE_ID_DM05,
  852. .subvendor = PCI_ANY_ID,
  853. .subdevice = PCI_ANY_ID,
  854. }, {
  855. /* empty */
  856. },
  857. };
  858. MODULE_DEVICE_TABLE(pci, dm1105_id_table);
  859. static struct pci_driver dm1105_driver = {
  860. .name = DRIVER_NAME,
  861. .id_table = dm1105_id_table,
  862. .probe = dm1105_probe,
  863. .remove = __devexit_p(dm1105_remove),
  864. };
  865. static int __init dm1105_init(void)
  866. {
  867. return pci_register_driver(&dm1105_driver);
  868. }
  869. static void __exit dm1105_exit(void)
  870. {
  871. pci_unregister_driver(&dm1105_driver);
  872. }
  873. module_init(dm1105_init);
  874. module_exit(dm1105_exit);
  875. MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
  876. MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
  877. MODULE_LICENSE("GPL");