qib_qp.c 31 KB

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  1. /*
  2. * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
  3. * All rights reserved.
  4. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #include <linux/err.h>
  35. #include <linux/vmalloc.h>
  36. #include "qib.h"
  37. #define BITS_PER_PAGE (PAGE_SIZE*BITS_PER_BYTE)
  38. #define BITS_PER_PAGE_MASK (BITS_PER_PAGE-1)
  39. static inline unsigned mk_qpn(struct qib_qpn_table *qpt,
  40. struct qpn_map *map, unsigned off)
  41. {
  42. return (map - qpt->map) * BITS_PER_PAGE + off;
  43. }
  44. static inline unsigned find_next_offset(struct qib_qpn_table *qpt,
  45. struct qpn_map *map, unsigned off,
  46. unsigned r)
  47. {
  48. if (qpt->mask) {
  49. off++;
  50. if ((off & qpt->mask) >> 1 != r)
  51. off = ((off & qpt->mask) ?
  52. (off | qpt->mask) + 1 : off) | (r << 1);
  53. } else
  54. off = find_next_zero_bit(map->page, BITS_PER_PAGE, off);
  55. return off;
  56. }
  57. /*
  58. * Convert the AETH credit code into the number of credits.
  59. */
  60. static u32 credit_table[31] = {
  61. 0, /* 0 */
  62. 1, /* 1 */
  63. 2, /* 2 */
  64. 3, /* 3 */
  65. 4, /* 4 */
  66. 6, /* 5 */
  67. 8, /* 6 */
  68. 12, /* 7 */
  69. 16, /* 8 */
  70. 24, /* 9 */
  71. 32, /* A */
  72. 48, /* B */
  73. 64, /* C */
  74. 96, /* D */
  75. 128, /* E */
  76. 192, /* F */
  77. 256, /* 10 */
  78. 384, /* 11 */
  79. 512, /* 12 */
  80. 768, /* 13 */
  81. 1024, /* 14 */
  82. 1536, /* 15 */
  83. 2048, /* 16 */
  84. 3072, /* 17 */
  85. 4096, /* 18 */
  86. 6144, /* 19 */
  87. 8192, /* 1A */
  88. 12288, /* 1B */
  89. 16384, /* 1C */
  90. 24576, /* 1D */
  91. 32768 /* 1E */
  92. };
  93. static void get_map_page(struct qib_qpn_table *qpt, struct qpn_map *map)
  94. {
  95. unsigned long page = get_zeroed_page(GFP_KERNEL);
  96. /*
  97. * Free the page if someone raced with us installing it.
  98. */
  99. spin_lock(&qpt->lock);
  100. if (map->page)
  101. free_page(page);
  102. else
  103. map->page = (void *)page;
  104. spin_unlock(&qpt->lock);
  105. }
  106. /*
  107. * Allocate the next available QPN or
  108. * zero/one for QP type IB_QPT_SMI/IB_QPT_GSI.
  109. */
  110. static int alloc_qpn(struct qib_devdata *dd, struct qib_qpn_table *qpt,
  111. enum ib_qp_type type, u8 port)
  112. {
  113. u32 i, offset, max_scan, qpn;
  114. struct qpn_map *map;
  115. u32 ret;
  116. int r;
  117. if (type == IB_QPT_SMI || type == IB_QPT_GSI) {
  118. unsigned n;
  119. ret = type == IB_QPT_GSI;
  120. n = 1 << (ret + 2 * (port - 1));
  121. spin_lock(&qpt->lock);
  122. if (qpt->flags & n)
  123. ret = -EINVAL;
  124. else
  125. qpt->flags |= n;
  126. spin_unlock(&qpt->lock);
  127. goto bail;
  128. }
  129. r = smp_processor_id();
  130. if (r >= dd->n_krcv_queues)
  131. r %= dd->n_krcv_queues;
  132. qpn = qpt->last + 1;
  133. if (qpn >= QPN_MAX)
  134. qpn = 2;
  135. if (qpt->mask && ((qpn & qpt->mask) >> 1) != r)
  136. qpn = ((qpn & qpt->mask) ? (qpn | qpt->mask) + 1 : qpn) |
  137. (r << 1);
  138. offset = qpn & BITS_PER_PAGE_MASK;
  139. map = &qpt->map[qpn / BITS_PER_PAGE];
  140. max_scan = qpt->nmaps - !offset;
  141. for (i = 0;;) {
  142. if (unlikely(!map->page)) {
  143. get_map_page(qpt, map);
  144. if (unlikely(!map->page))
  145. break;
  146. }
  147. do {
  148. if (!test_and_set_bit(offset, map->page)) {
  149. qpt->last = qpn;
  150. ret = qpn;
  151. goto bail;
  152. }
  153. offset = find_next_offset(qpt, map, offset, r);
  154. qpn = mk_qpn(qpt, map, offset);
  155. /*
  156. * This test differs from alloc_pidmap().
  157. * If find_next_offset() does find a zero
  158. * bit, we don't need to check for QPN
  159. * wrapping around past our starting QPN.
  160. * We just need to be sure we don't loop
  161. * forever.
  162. */
  163. } while (offset < BITS_PER_PAGE && qpn < QPN_MAX);
  164. /*
  165. * In order to keep the number of pages allocated to a
  166. * minimum, we scan the all existing pages before increasing
  167. * the size of the bitmap table.
  168. */
  169. if (++i > max_scan) {
  170. if (qpt->nmaps == QPNMAP_ENTRIES)
  171. break;
  172. map = &qpt->map[qpt->nmaps++];
  173. offset = qpt->mask ? (r << 1) : 0;
  174. } else if (map < &qpt->map[qpt->nmaps]) {
  175. ++map;
  176. offset = qpt->mask ? (r << 1) : 0;
  177. } else {
  178. map = &qpt->map[0];
  179. offset = qpt->mask ? (r << 1) : 2;
  180. }
  181. qpn = mk_qpn(qpt, map, offset);
  182. }
  183. ret = -ENOMEM;
  184. bail:
  185. return ret;
  186. }
  187. static void free_qpn(struct qib_qpn_table *qpt, u32 qpn)
  188. {
  189. struct qpn_map *map;
  190. map = qpt->map + qpn / BITS_PER_PAGE;
  191. if (map->page)
  192. clear_bit(qpn & BITS_PER_PAGE_MASK, map->page);
  193. }
  194. /*
  195. * Put the QP into the hash table.
  196. * The hash table holds a reference to the QP.
  197. */
  198. static void insert_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  199. {
  200. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  201. unsigned n = qp->ibqp.qp_num % dev->qp_table_size;
  202. unsigned long flags;
  203. spin_lock_irqsave(&dev->qpt_lock, flags);
  204. if (qp->ibqp.qp_num == 0)
  205. ibp->qp0 = qp;
  206. else if (qp->ibqp.qp_num == 1)
  207. ibp->qp1 = qp;
  208. else {
  209. qp->next = dev->qp_table[n];
  210. dev->qp_table[n] = qp;
  211. }
  212. atomic_inc(&qp->refcount);
  213. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  214. }
  215. /*
  216. * Remove the QP from the table so it can't be found asynchronously by
  217. * the receive interrupt routine.
  218. */
  219. static void remove_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  220. {
  221. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  222. struct qib_qp *q, **qpp;
  223. unsigned long flags;
  224. qpp = &dev->qp_table[qp->ibqp.qp_num % dev->qp_table_size];
  225. spin_lock_irqsave(&dev->qpt_lock, flags);
  226. if (ibp->qp0 == qp) {
  227. ibp->qp0 = NULL;
  228. atomic_dec(&qp->refcount);
  229. } else if (ibp->qp1 == qp) {
  230. ibp->qp1 = NULL;
  231. atomic_dec(&qp->refcount);
  232. } else
  233. for (; (q = *qpp) != NULL; qpp = &q->next)
  234. if (q == qp) {
  235. *qpp = qp->next;
  236. qp->next = NULL;
  237. atomic_dec(&qp->refcount);
  238. break;
  239. }
  240. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  241. }
  242. /**
  243. * qib_free_all_qps - check for QPs still in use
  244. * @qpt: the QP table to empty
  245. *
  246. * There should not be any QPs still in use.
  247. * Free memory for table.
  248. */
  249. unsigned qib_free_all_qps(struct qib_devdata *dd)
  250. {
  251. struct qib_ibdev *dev = &dd->verbs_dev;
  252. unsigned long flags;
  253. struct qib_qp *qp;
  254. unsigned n, qp_inuse = 0;
  255. for (n = 0; n < dd->num_pports; n++) {
  256. struct qib_ibport *ibp = &dd->pport[n].ibport_data;
  257. if (!qib_mcast_tree_empty(ibp))
  258. qp_inuse++;
  259. if (ibp->qp0)
  260. qp_inuse++;
  261. if (ibp->qp1)
  262. qp_inuse++;
  263. }
  264. spin_lock_irqsave(&dev->qpt_lock, flags);
  265. for (n = 0; n < dev->qp_table_size; n++) {
  266. qp = dev->qp_table[n];
  267. dev->qp_table[n] = NULL;
  268. for (; qp; qp = qp->next)
  269. qp_inuse++;
  270. }
  271. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  272. return qp_inuse;
  273. }
  274. /**
  275. * qib_lookup_qpn - return the QP with the given QPN
  276. * @qpt: the QP table
  277. * @qpn: the QP number to look up
  278. *
  279. * The caller is responsible for decrementing the QP reference count
  280. * when done.
  281. */
  282. struct qib_qp *qib_lookup_qpn(struct qib_ibport *ibp, u32 qpn)
  283. {
  284. struct qib_ibdev *dev = &ppd_from_ibp(ibp)->dd->verbs_dev;
  285. unsigned long flags;
  286. struct qib_qp *qp;
  287. spin_lock_irqsave(&dev->qpt_lock, flags);
  288. if (qpn == 0)
  289. qp = ibp->qp0;
  290. else if (qpn == 1)
  291. qp = ibp->qp1;
  292. else
  293. for (qp = dev->qp_table[qpn % dev->qp_table_size]; qp;
  294. qp = qp->next)
  295. if (qp->ibqp.qp_num == qpn)
  296. break;
  297. if (qp)
  298. atomic_inc(&qp->refcount);
  299. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  300. return qp;
  301. }
  302. /**
  303. * qib_reset_qp - initialize the QP state to the reset state
  304. * @qp: the QP to reset
  305. * @type: the QP type
  306. */
  307. static void qib_reset_qp(struct qib_qp *qp, enum ib_qp_type type)
  308. {
  309. qp->remote_qpn = 0;
  310. qp->qkey = 0;
  311. qp->qp_access_flags = 0;
  312. atomic_set(&qp->s_dma_busy, 0);
  313. qp->s_flags &= QIB_S_SIGNAL_REQ_WR;
  314. qp->s_hdrwords = 0;
  315. qp->s_wqe = NULL;
  316. qp->s_draining = 0;
  317. qp->s_next_psn = 0;
  318. qp->s_last_psn = 0;
  319. qp->s_sending_psn = 0;
  320. qp->s_sending_hpsn = 0;
  321. qp->s_psn = 0;
  322. qp->r_psn = 0;
  323. qp->r_msn = 0;
  324. if (type == IB_QPT_RC) {
  325. qp->s_state = IB_OPCODE_RC_SEND_LAST;
  326. qp->r_state = IB_OPCODE_RC_SEND_LAST;
  327. } else {
  328. qp->s_state = IB_OPCODE_UC_SEND_LAST;
  329. qp->r_state = IB_OPCODE_UC_SEND_LAST;
  330. }
  331. qp->s_ack_state = IB_OPCODE_RC_ACKNOWLEDGE;
  332. qp->r_nak_state = 0;
  333. qp->r_aflags = 0;
  334. qp->r_flags = 0;
  335. qp->s_head = 0;
  336. qp->s_tail = 0;
  337. qp->s_cur = 0;
  338. qp->s_acked = 0;
  339. qp->s_last = 0;
  340. qp->s_ssn = 1;
  341. qp->s_lsn = 0;
  342. qp->s_mig_state = IB_MIG_MIGRATED;
  343. memset(qp->s_ack_queue, 0, sizeof(qp->s_ack_queue));
  344. qp->r_head_ack_queue = 0;
  345. qp->s_tail_ack_queue = 0;
  346. qp->s_num_rd_atomic = 0;
  347. if (qp->r_rq.wq) {
  348. qp->r_rq.wq->head = 0;
  349. qp->r_rq.wq->tail = 0;
  350. }
  351. qp->r_sge.num_sge = 0;
  352. }
  353. static void clear_mr_refs(struct qib_qp *qp, int clr_sends)
  354. {
  355. unsigned n;
  356. if (test_and_clear_bit(QIB_R_REWIND_SGE, &qp->r_aflags))
  357. while (qp->s_rdma_read_sge.num_sge) {
  358. atomic_dec(&qp->s_rdma_read_sge.sge.mr->refcount);
  359. if (--qp->s_rdma_read_sge.num_sge)
  360. qp->s_rdma_read_sge.sge =
  361. *qp->s_rdma_read_sge.sg_list++;
  362. }
  363. while (qp->r_sge.num_sge) {
  364. atomic_dec(&qp->r_sge.sge.mr->refcount);
  365. if (--qp->r_sge.num_sge)
  366. qp->r_sge.sge = *qp->r_sge.sg_list++;
  367. }
  368. if (clr_sends) {
  369. while (qp->s_last != qp->s_head) {
  370. struct qib_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  371. unsigned i;
  372. for (i = 0; i < wqe->wr.num_sge; i++) {
  373. struct qib_sge *sge = &wqe->sg_list[i];
  374. atomic_dec(&sge->mr->refcount);
  375. }
  376. if (qp->ibqp.qp_type == IB_QPT_UD ||
  377. qp->ibqp.qp_type == IB_QPT_SMI ||
  378. qp->ibqp.qp_type == IB_QPT_GSI)
  379. atomic_dec(&to_iah(wqe->wr.wr.ud.ah)->refcount);
  380. if (++qp->s_last >= qp->s_size)
  381. qp->s_last = 0;
  382. }
  383. if (qp->s_rdma_mr) {
  384. atomic_dec(&qp->s_rdma_mr->refcount);
  385. qp->s_rdma_mr = NULL;
  386. }
  387. }
  388. if (qp->ibqp.qp_type != IB_QPT_RC)
  389. return;
  390. for (n = 0; n < ARRAY_SIZE(qp->s_ack_queue); n++) {
  391. struct qib_ack_entry *e = &qp->s_ack_queue[n];
  392. if (e->opcode == IB_OPCODE_RC_RDMA_READ_REQUEST &&
  393. e->rdma_sge.mr) {
  394. atomic_dec(&e->rdma_sge.mr->refcount);
  395. e->rdma_sge.mr = NULL;
  396. }
  397. }
  398. }
  399. /**
  400. * qib_error_qp - put a QP into the error state
  401. * @qp: the QP to put into the error state
  402. * @err: the receive completion error to signal if a RWQE is active
  403. *
  404. * Flushes both send and receive work queues.
  405. * Returns true if last WQE event should be generated.
  406. * The QP s_lock should be held and interrupts disabled.
  407. * If we are already in error state, just return.
  408. */
  409. int qib_error_qp(struct qib_qp *qp, enum ib_wc_status err)
  410. {
  411. struct qib_ibdev *dev = to_idev(qp->ibqp.device);
  412. struct ib_wc wc;
  413. int ret = 0;
  414. if (qp->state == IB_QPS_ERR || qp->state == IB_QPS_RESET)
  415. goto bail;
  416. qp->state = IB_QPS_ERR;
  417. if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) {
  418. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR);
  419. del_timer(&qp->s_timer);
  420. }
  421. spin_lock(&dev->pending_lock);
  422. if (!list_empty(&qp->iowait) && !(qp->s_flags & QIB_S_BUSY)) {
  423. qp->s_flags &= ~QIB_S_ANY_WAIT_IO;
  424. list_del_init(&qp->iowait);
  425. }
  426. spin_unlock(&dev->pending_lock);
  427. if (!(qp->s_flags & QIB_S_BUSY)) {
  428. qp->s_hdrwords = 0;
  429. if (qp->s_rdma_mr) {
  430. atomic_dec(&qp->s_rdma_mr->refcount);
  431. qp->s_rdma_mr = NULL;
  432. }
  433. if (qp->s_tx) {
  434. qib_put_txreq(qp->s_tx);
  435. qp->s_tx = NULL;
  436. }
  437. }
  438. /* Schedule the sending tasklet to drain the send work queue. */
  439. if (qp->s_last != qp->s_head)
  440. qib_schedule_send(qp);
  441. clear_mr_refs(qp, 0);
  442. memset(&wc, 0, sizeof(wc));
  443. wc.qp = &qp->ibqp;
  444. wc.opcode = IB_WC_RECV;
  445. if (test_and_clear_bit(QIB_R_WRID_VALID, &qp->r_aflags)) {
  446. wc.wr_id = qp->r_wr_id;
  447. wc.status = err;
  448. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  449. }
  450. wc.status = IB_WC_WR_FLUSH_ERR;
  451. if (qp->r_rq.wq) {
  452. struct qib_rwq *wq;
  453. u32 head;
  454. u32 tail;
  455. spin_lock(&qp->r_rq.lock);
  456. /* sanity check pointers before trusting them */
  457. wq = qp->r_rq.wq;
  458. head = wq->head;
  459. if (head >= qp->r_rq.size)
  460. head = 0;
  461. tail = wq->tail;
  462. if (tail >= qp->r_rq.size)
  463. tail = 0;
  464. while (tail != head) {
  465. wc.wr_id = get_rwqe_ptr(&qp->r_rq, tail)->wr_id;
  466. if (++tail >= qp->r_rq.size)
  467. tail = 0;
  468. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  469. }
  470. wq->tail = tail;
  471. spin_unlock(&qp->r_rq.lock);
  472. } else if (qp->ibqp.event_handler)
  473. ret = 1;
  474. bail:
  475. return ret;
  476. }
  477. /**
  478. * qib_modify_qp - modify the attributes of a queue pair
  479. * @ibqp: the queue pair who's attributes we're modifying
  480. * @attr: the new attributes
  481. * @attr_mask: the mask of attributes to modify
  482. * @udata: user data for libibverbs.so
  483. *
  484. * Returns 0 on success, otherwise returns an errno.
  485. */
  486. int qib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  487. int attr_mask, struct ib_udata *udata)
  488. {
  489. struct qib_ibdev *dev = to_idev(ibqp->device);
  490. struct qib_qp *qp = to_iqp(ibqp);
  491. enum ib_qp_state cur_state, new_state;
  492. struct ib_event ev;
  493. int lastwqe = 0;
  494. int mig = 0;
  495. int ret;
  496. u32 pmtu = 0; /* for gcc warning only */
  497. spin_lock_irq(&qp->r_lock);
  498. spin_lock(&qp->s_lock);
  499. cur_state = attr_mask & IB_QP_CUR_STATE ?
  500. attr->cur_qp_state : qp->state;
  501. new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
  502. if (!ib_modify_qp_is_ok(cur_state, new_state, ibqp->qp_type,
  503. attr_mask))
  504. goto inval;
  505. if (attr_mask & IB_QP_AV) {
  506. if (attr->ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  507. goto inval;
  508. if (qib_check_ah(qp->ibqp.device, &attr->ah_attr))
  509. goto inval;
  510. }
  511. if (attr_mask & IB_QP_ALT_PATH) {
  512. if (attr->alt_ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  513. goto inval;
  514. if (qib_check_ah(qp->ibqp.device, &attr->alt_ah_attr))
  515. goto inval;
  516. if (attr->alt_pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  517. goto inval;
  518. }
  519. if (attr_mask & IB_QP_PKEY_INDEX)
  520. if (attr->pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  521. goto inval;
  522. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  523. if (attr->min_rnr_timer > 31)
  524. goto inval;
  525. if (attr_mask & IB_QP_PORT)
  526. if (qp->ibqp.qp_type == IB_QPT_SMI ||
  527. qp->ibqp.qp_type == IB_QPT_GSI ||
  528. attr->port_num == 0 ||
  529. attr->port_num > ibqp->device->phys_port_cnt)
  530. goto inval;
  531. if (attr_mask & IB_QP_DEST_QPN)
  532. if (attr->dest_qp_num > QIB_QPN_MASK)
  533. goto inval;
  534. if (attr_mask & IB_QP_RETRY_CNT)
  535. if (attr->retry_cnt > 7)
  536. goto inval;
  537. if (attr_mask & IB_QP_RNR_RETRY)
  538. if (attr->rnr_retry > 7)
  539. goto inval;
  540. /*
  541. * Don't allow invalid path_mtu values. OK to set greater
  542. * than the active mtu (or even the max_cap, if we have tuned
  543. * that to a small mtu. We'll set qp->path_mtu
  544. * to the lesser of requested attribute mtu and active,
  545. * for packetizing messages.
  546. * Note that the QP port has to be set in INIT and MTU in RTR.
  547. */
  548. if (attr_mask & IB_QP_PATH_MTU) {
  549. struct qib_devdata *dd = dd_from_dev(dev);
  550. int mtu, pidx = qp->port_num - 1;
  551. mtu = ib_mtu_enum_to_int(attr->path_mtu);
  552. if (mtu == -1)
  553. goto inval;
  554. if (mtu > dd->pport[pidx].ibmtu) {
  555. switch (dd->pport[pidx].ibmtu) {
  556. case 4096:
  557. pmtu = IB_MTU_4096;
  558. break;
  559. case 2048:
  560. pmtu = IB_MTU_2048;
  561. break;
  562. case 1024:
  563. pmtu = IB_MTU_1024;
  564. break;
  565. case 512:
  566. pmtu = IB_MTU_512;
  567. break;
  568. case 256:
  569. pmtu = IB_MTU_256;
  570. break;
  571. default:
  572. pmtu = IB_MTU_2048;
  573. }
  574. } else
  575. pmtu = attr->path_mtu;
  576. }
  577. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  578. if (attr->path_mig_state == IB_MIG_REARM) {
  579. if (qp->s_mig_state == IB_MIG_ARMED)
  580. goto inval;
  581. if (new_state != IB_QPS_RTS)
  582. goto inval;
  583. } else if (attr->path_mig_state == IB_MIG_MIGRATED) {
  584. if (qp->s_mig_state == IB_MIG_REARM)
  585. goto inval;
  586. if (new_state != IB_QPS_RTS && new_state != IB_QPS_SQD)
  587. goto inval;
  588. if (qp->s_mig_state == IB_MIG_ARMED)
  589. mig = 1;
  590. } else
  591. goto inval;
  592. }
  593. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  594. if (attr->max_dest_rd_atomic > QIB_MAX_RDMA_ATOMIC)
  595. goto inval;
  596. switch (new_state) {
  597. case IB_QPS_RESET:
  598. if (qp->state != IB_QPS_RESET) {
  599. qp->state = IB_QPS_RESET;
  600. spin_lock(&dev->pending_lock);
  601. if (!list_empty(&qp->iowait))
  602. list_del_init(&qp->iowait);
  603. spin_unlock(&dev->pending_lock);
  604. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  605. spin_unlock(&qp->s_lock);
  606. spin_unlock_irq(&qp->r_lock);
  607. /* Stop the sending work queue and retry timer */
  608. cancel_work_sync(&qp->s_work);
  609. del_timer_sync(&qp->s_timer);
  610. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  611. if (qp->s_tx) {
  612. qib_put_txreq(qp->s_tx);
  613. qp->s_tx = NULL;
  614. }
  615. remove_qp(dev, qp);
  616. wait_event(qp->wait, !atomic_read(&qp->refcount));
  617. spin_lock_irq(&qp->r_lock);
  618. spin_lock(&qp->s_lock);
  619. clear_mr_refs(qp, 1);
  620. qib_reset_qp(qp, ibqp->qp_type);
  621. }
  622. break;
  623. case IB_QPS_RTR:
  624. /* Allow event to retrigger if QP set to RTR more than once */
  625. qp->r_flags &= ~QIB_R_COMM_EST;
  626. qp->state = new_state;
  627. break;
  628. case IB_QPS_SQD:
  629. qp->s_draining = qp->s_last != qp->s_cur;
  630. qp->state = new_state;
  631. break;
  632. case IB_QPS_SQE:
  633. if (qp->ibqp.qp_type == IB_QPT_RC)
  634. goto inval;
  635. qp->state = new_state;
  636. break;
  637. case IB_QPS_ERR:
  638. lastwqe = qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  639. break;
  640. default:
  641. qp->state = new_state;
  642. break;
  643. }
  644. if (attr_mask & IB_QP_PKEY_INDEX)
  645. qp->s_pkey_index = attr->pkey_index;
  646. if (attr_mask & IB_QP_PORT)
  647. qp->port_num = attr->port_num;
  648. if (attr_mask & IB_QP_DEST_QPN)
  649. qp->remote_qpn = attr->dest_qp_num;
  650. if (attr_mask & IB_QP_SQ_PSN) {
  651. qp->s_next_psn = attr->sq_psn & QIB_PSN_MASK;
  652. qp->s_psn = qp->s_next_psn;
  653. qp->s_sending_psn = qp->s_next_psn;
  654. qp->s_last_psn = qp->s_next_psn - 1;
  655. qp->s_sending_hpsn = qp->s_last_psn;
  656. }
  657. if (attr_mask & IB_QP_RQ_PSN)
  658. qp->r_psn = attr->rq_psn & QIB_PSN_MASK;
  659. if (attr_mask & IB_QP_ACCESS_FLAGS)
  660. qp->qp_access_flags = attr->qp_access_flags;
  661. if (attr_mask & IB_QP_AV) {
  662. qp->remote_ah_attr = attr->ah_attr;
  663. qp->s_srate = attr->ah_attr.static_rate;
  664. }
  665. if (attr_mask & IB_QP_ALT_PATH) {
  666. qp->alt_ah_attr = attr->alt_ah_attr;
  667. qp->s_alt_pkey_index = attr->alt_pkey_index;
  668. }
  669. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  670. qp->s_mig_state = attr->path_mig_state;
  671. if (mig) {
  672. qp->remote_ah_attr = qp->alt_ah_attr;
  673. qp->port_num = qp->alt_ah_attr.port_num;
  674. qp->s_pkey_index = qp->s_alt_pkey_index;
  675. }
  676. }
  677. if (attr_mask & IB_QP_PATH_MTU)
  678. qp->path_mtu = pmtu;
  679. if (attr_mask & IB_QP_RETRY_CNT) {
  680. qp->s_retry_cnt = attr->retry_cnt;
  681. qp->s_retry = attr->retry_cnt;
  682. }
  683. if (attr_mask & IB_QP_RNR_RETRY) {
  684. qp->s_rnr_retry_cnt = attr->rnr_retry;
  685. qp->s_rnr_retry = attr->rnr_retry;
  686. }
  687. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  688. qp->r_min_rnr_timer = attr->min_rnr_timer;
  689. if (attr_mask & IB_QP_TIMEOUT)
  690. qp->timeout = attr->timeout;
  691. if (attr_mask & IB_QP_QKEY)
  692. qp->qkey = attr->qkey;
  693. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  694. qp->r_max_rd_atomic = attr->max_dest_rd_atomic;
  695. if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC)
  696. qp->s_max_rd_atomic = attr->max_rd_atomic;
  697. spin_unlock(&qp->s_lock);
  698. spin_unlock_irq(&qp->r_lock);
  699. if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
  700. insert_qp(dev, qp);
  701. if (lastwqe) {
  702. ev.device = qp->ibqp.device;
  703. ev.element.qp = &qp->ibqp;
  704. ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
  705. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  706. }
  707. if (mig) {
  708. ev.device = qp->ibqp.device;
  709. ev.element.qp = &qp->ibqp;
  710. ev.event = IB_EVENT_PATH_MIG;
  711. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  712. }
  713. ret = 0;
  714. goto bail;
  715. inval:
  716. spin_unlock(&qp->s_lock);
  717. spin_unlock_irq(&qp->r_lock);
  718. ret = -EINVAL;
  719. bail:
  720. return ret;
  721. }
  722. int qib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  723. int attr_mask, struct ib_qp_init_attr *init_attr)
  724. {
  725. struct qib_qp *qp = to_iqp(ibqp);
  726. attr->qp_state = qp->state;
  727. attr->cur_qp_state = attr->qp_state;
  728. attr->path_mtu = qp->path_mtu;
  729. attr->path_mig_state = qp->s_mig_state;
  730. attr->qkey = qp->qkey;
  731. attr->rq_psn = qp->r_psn & QIB_PSN_MASK;
  732. attr->sq_psn = qp->s_next_psn & QIB_PSN_MASK;
  733. attr->dest_qp_num = qp->remote_qpn;
  734. attr->qp_access_flags = qp->qp_access_flags;
  735. attr->cap.max_send_wr = qp->s_size - 1;
  736. attr->cap.max_recv_wr = qp->ibqp.srq ? 0 : qp->r_rq.size - 1;
  737. attr->cap.max_send_sge = qp->s_max_sge;
  738. attr->cap.max_recv_sge = qp->r_rq.max_sge;
  739. attr->cap.max_inline_data = 0;
  740. attr->ah_attr = qp->remote_ah_attr;
  741. attr->alt_ah_attr = qp->alt_ah_attr;
  742. attr->pkey_index = qp->s_pkey_index;
  743. attr->alt_pkey_index = qp->s_alt_pkey_index;
  744. attr->en_sqd_async_notify = 0;
  745. attr->sq_draining = qp->s_draining;
  746. attr->max_rd_atomic = qp->s_max_rd_atomic;
  747. attr->max_dest_rd_atomic = qp->r_max_rd_atomic;
  748. attr->min_rnr_timer = qp->r_min_rnr_timer;
  749. attr->port_num = qp->port_num;
  750. attr->timeout = qp->timeout;
  751. attr->retry_cnt = qp->s_retry_cnt;
  752. attr->rnr_retry = qp->s_rnr_retry_cnt;
  753. attr->alt_port_num = qp->alt_ah_attr.port_num;
  754. attr->alt_timeout = qp->alt_timeout;
  755. init_attr->event_handler = qp->ibqp.event_handler;
  756. init_attr->qp_context = qp->ibqp.qp_context;
  757. init_attr->send_cq = qp->ibqp.send_cq;
  758. init_attr->recv_cq = qp->ibqp.recv_cq;
  759. init_attr->srq = qp->ibqp.srq;
  760. init_attr->cap = attr->cap;
  761. if (qp->s_flags & QIB_S_SIGNAL_REQ_WR)
  762. init_attr->sq_sig_type = IB_SIGNAL_REQ_WR;
  763. else
  764. init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
  765. init_attr->qp_type = qp->ibqp.qp_type;
  766. init_attr->port_num = qp->port_num;
  767. return 0;
  768. }
  769. /**
  770. * qib_compute_aeth - compute the AETH (syndrome + MSN)
  771. * @qp: the queue pair to compute the AETH for
  772. *
  773. * Returns the AETH.
  774. */
  775. __be32 qib_compute_aeth(struct qib_qp *qp)
  776. {
  777. u32 aeth = qp->r_msn & QIB_MSN_MASK;
  778. if (qp->ibqp.srq) {
  779. /*
  780. * Shared receive queues don't generate credits.
  781. * Set the credit field to the invalid value.
  782. */
  783. aeth |= QIB_AETH_CREDIT_INVAL << QIB_AETH_CREDIT_SHIFT;
  784. } else {
  785. u32 min, max, x;
  786. u32 credits;
  787. struct qib_rwq *wq = qp->r_rq.wq;
  788. u32 head;
  789. u32 tail;
  790. /* sanity check pointers before trusting them */
  791. head = wq->head;
  792. if (head >= qp->r_rq.size)
  793. head = 0;
  794. tail = wq->tail;
  795. if (tail >= qp->r_rq.size)
  796. tail = 0;
  797. /*
  798. * Compute the number of credits available (RWQEs).
  799. * XXX Not holding the r_rq.lock here so there is a small
  800. * chance that the pair of reads are not atomic.
  801. */
  802. credits = head - tail;
  803. if ((int)credits < 0)
  804. credits += qp->r_rq.size;
  805. /*
  806. * Binary search the credit table to find the code to
  807. * use.
  808. */
  809. min = 0;
  810. max = 31;
  811. for (;;) {
  812. x = (min + max) / 2;
  813. if (credit_table[x] == credits)
  814. break;
  815. if (credit_table[x] > credits)
  816. max = x;
  817. else if (min == x)
  818. break;
  819. else
  820. min = x;
  821. }
  822. aeth |= x << QIB_AETH_CREDIT_SHIFT;
  823. }
  824. return cpu_to_be32(aeth);
  825. }
  826. /**
  827. * qib_create_qp - create a queue pair for a device
  828. * @ibpd: the protection domain who's device we create the queue pair for
  829. * @init_attr: the attributes of the queue pair
  830. * @udata: user data for libibverbs.so
  831. *
  832. * Returns the queue pair on success, otherwise returns an errno.
  833. *
  834. * Called by the ib_create_qp() core verbs function.
  835. */
  836. struct ib_qp *qib_create_qp(struct ib_pd *ibpd,
  837. struct ib_qp_init_attr *init_attr,
  838. struct ib_udata *udata)
  839. {
  840. struct qib_qp *qp;
  841. int err;
  842. struct qib_swqe *swq = NULL;
  843. struct qib_ibdev *dev;
  844. struct qib_devdata *dd;
  845. size_t sz;
  846. size_t sg_list_sz;
  847. struct ib_qp *ret;
  848. if (init_attr->cap.max_send_sge > ib_qib_max_sges ||
  849. init_attr->cap.max_send_wr > ib_qib_max_qp_wrs) {
  850. ret = ERR_PTR(-EINVAL);
  851. goto bail;
  852. }
  853. /* Check receive queue parameters if no SRQ is specified. */
  854. if (!init_attr->srq) {
  855. if (init_attr->cap.max_recv_sge > ib_qib_max_sges ||
  856. init_attr->cap.max_recv_wr > ib_qib_max_qp_wrs) {
  857. ret = ERR_PTR(-EINVAL);
  858. goto bail;
  859. }
  860. if (init_attr->cap.max_send_sge +
  861. init_attr->cap.max_send_wr +
  862. init_attr->cap.max_recv_sge +
  863. init_attr->cap.max_recv_wr == 0) {
  864. ret = ERR_PTR(-EINVAL);
  865. goto bail;
  866. }
  867. }
  868. switch (init_attr->qp_type) {
  869. case IB_QPT_SMI:
  870. case IB_QPT_GSI:
  871. if (init_attr->port_num == 0 ||
  872. init_attr->port_num > ibpd->device->phys_port_cnt) {
  873. ret = ERR_PTR(-EINVAL);
  874. goto bail;
  875. }
  876. case IB_QPT_UC:
  877. case IB_QPT_RC:
  878. case IB_QPT_UD:
  879. sz = sizeof(struct qib_sge) *
  880. init_attr->cap.max_send_sge +
  881. sizeof(struct qib_swqe);
  882. swq = vmalloc((init_attr->cap.max_send_wr + 1) * sz);
  883. if (swq == NULL) {
  884. ret = ERR_PTR(-ENOMEM);
  885. goto bail;
  886. }
  887. sz = sizeof(*qp);
  888. sg_list_sz = 0;
  889. if (init_attr->srq) {
  890. struct qib_srq *srq = to_isrq(init_attr->srq);
  891. if (srq->rq.max_sge > 1)
  892. sg_list_sz = sizeof(*qp->r_sg_list) *
  893. (srq->rq.max_sge - 1);
  894. } else if (init_attr->cap.max_recv_sge > 1)
  895. sg_list_sz = sizeof(*qp->r_sg_list) *
  896. (init_attr->cap.max_recv_sge - 1);
  897. qp = kzalloc(sz + sg_list_sz, GFP_KERNEL);
  898. if (!qp) {
  899. ret = ERR_PTR(-ENOMEM);
  900. goto bail_swq;
  901. }
  902. if (init_attr->srq)
  903. sz = 0;
  904. else {
  905. qp->r_rq.size = init_attr->cap.max_recv_wr + 1;
  906. qp->r_rq.max_sge = init_attr->cap.max_recv_sge;
  907. sz = (sizeof(struct ib_sge) * qp->r_rq.max_sge) +
  908. sizeof(struct qib_rwqe);
  909. qp->r_rq.wq = vmalloc_user(sizeof(struct qib_rwq) +
  910. qp->r_rq.size * sz);
  911. if (!qp->r_rq.wq) {
  912. ret = ERR_PTR(-ENOMEM);
  913. goto bail_qp;
  914. }
  915. }
  916. /*
  917. * ib_create_qp() will initialize qp->ibqp
  918. * except for qp->ibqp.qp_num.
  919. */
  920. spin_lock_init(&qp->r_lock);
  921. spin_lock_init(&qp->s_lock);
  922. spin_lock_init(&qp->r_rq.lock);
  923. atomic_set(&qp->refcount, 0);
  924. init_waitqueue_head(&qp->wait);
  925. init_waitqueue_head(&qp->wait_dma);
  926. init_timer(&qp->s_timer);
  927. qp->s_timer.data = (unsigned long)qp;
  928. INIT_WORK(&qp->s_work, qib_do_send);
  929. INIT_LIST_HEAD(&qp->iowait);
  930. INIT_LIST_HEAD(&qp->rspwait);
  931. qp->state = IB_QPS_RESET;
  932. qp->s_wq = swq;
  933. qp->s_size = init_attr->cap.max_send_wr + 1;
  934. qp->s_max_sge = init_attr->cap.max_send_sge;
  935. if (init_attr->sq_sig_type == IB_SIGNAL_REQ_WR)
  936. qp->s_flags = QIB_S_SIGNAL_REQ_WR;
  937. dev = to_idev(ibpd->device);
  938. dd = dd_from_dev(dev);
  939. err = alloc_qpn(dd, &dev->qpn_table, init_attr->qp_type,
  940. init_attr->port_num);
  941. if (err < 0) {
  942. ret = ERR_PTR(err);
  943. vfree(qp->r_rq.wq);
  944. goto bail_qp;
  945. }
  946. qp->ibqp.qp_num = err;
  947. qp->port_num = init_attr->port_num;
  948. qp->processor_id = smp_processor_id();
  949. qib_reset_qp(qp, init_attr->qp_type);
  950. break;
  951. default:
  952. /* Don't support raw QPs */
  953. ret = ERR_PTR(-ENOSYS);
  954. goto bail;
  955. }
  956. init_attr->cap.max_inline_data = 0;
  957. /*
  958. * Return the address of the RWQ as the offset to mmap.
  959. * See qib_mmap() for details.
  960. */
  961. if (udata && udata->outlen >= sizeof(__u64)) {
  962. if (!qp->r_rq.wq) {
  963. __u64 offset = 0;
  964. err = ib_copy_to_udata(udata, &offset,
  965. sizeof(offset));
  966. if (err) {
  967. ret = ERR_PTR(err);
  968. goto bail_ip;
  969. }
  970. } else {
  971. u32 s = sizeof(struct qib_rwq) + qp->r_rq.size * sz;
  972. qp->ip = qib_create_mmap_info(dev, s,
  973. ibpd->uobject->context,
  974. qp->r_rq.wq);
  975. if (!qp->ip) {
  976. ret = ERR_PTR(-ENOMEM);
  977. goto bail_ip;
  978. }
  979. err = ib_copy_to_udata(udata, &(qp->ip->offset),
  980. sizeof(qp->ip->offset));
  981. if (err) {
  982. ret = ERR_PTR(err);
  983. goto bail_ip;
  984. }
  985. }
  986. }
  987. spin_lock(&dev->n_qps_lock);
  988. if (dev->n_qps_allocated == ib_qib_max_qps) {
  989. spin_unlock(&dev->n_qps_lock);
  990. ret = ERR_PTR(-ENOMEM);
  991. goto bail_ip;
  992. }
  993. dev->n_qps_allocated++;
  994. spin_unlock(&dev->n_qps_lock);
  995. if (qp->ip) {
  996. spin_lock_irq(&dev->pending_lock);
  997. list_add(&qp->ip->pending_mmaps, &dev->pending_mmaps);
  998. spin_unlock_irq(&dev->pending_lock);
  999. }
  1000. ret = &qp->ibqp;
  1001. goto bail;
  1002. bail_ip:
  1003. if (qp->ip)
  1004. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1005. else
  1006. vfree(qp->r_rq.wq);
  1007. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1008. bail_qp:
  1009. kfree(qp);
  1010. bail_swq:
  1011. vfree(swq);
  1012. bail:
  1013. return ret;
  1014. }
  1015. /**
  1016. * qib_destroy_qp - destroy a queue pair
  1017. * @ibqp: the queue pair to destroy
  1018. *
  1019. * Returns 0 on success.
  1020. *
  1021. * Note that this can be called while the QP is actively sending or
  1022. * receiving!
  1023. */
  1024. int qib_destroy_qp(struct ib_qp *ibqp)
  1025. {
  1026. struct qib_qp *qp = to_iqp(ibqp);
  1027. struct qib_ibdev *dev = to_idev(ibqp->device);
  1028. /* Make sure HW and driver activity is stopped. */
  1029. spin_lock_irq(&qp->s_lock);
  1030. if (qp->state != IB_QPS_RESET) {
  1031. qp->state = IB_QPS_RESET;
  1032. spin_lock(&dev->pending_lock);
  1033. if (!list_empty(&qp->iowait))
  1034. list_del_init(&qp->iowait);
  1035. spin_unlock(&dev->pending_lock);
  1036. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  1037. spin_unlock_irq(&qp->s_lock);
  1038. cancel_work_sync(&qp->s_work);
  1039. del_timer_sync(&qp->s_timer);
  1040. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  1041. if (qp->s_tx) {
  1042. qib_put_txreq(qp->s_tx);
  1043. qp->s_tx = NULL;
  1044. }
  1045. remove_qp(dev, qp);
  1046. wait_event(qp->wait, !atomic_read(&qp->refcount));
  1047. clear_mr_refs(qp, 1);
  1048. } else
  1049. spin_unlock_irq(&qp->s_lock);
  1050. /* all user's cleaned up, mark it available */
  1051. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1052. spin_lock(&dev->n_qps_lock);
  1053. dev->n_qps_allocated--;
  1054. spin_unlock(&dev->n_qps_lock);
  1055. if (qp->ip)
  1056. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1057. else
  1058. vfree(qp->r_rq.wq);
  1059. vfree(qp->s_wq);
  1060. kfree(qp);
  1061. return 0;
  1062. }
  1063. /**
  1064. * qib_init_qpn_table - initialize the QP number table for a device
  1065. * @qpt: the QPN table
  1066. */
  1067. void qib_init_qpn_table(struct qib_devdata *dd, struct qib_qpn_table *qpt)
  1068. {
  1069. spin_lock_init(&qpt->lock);
  1070. qpt->last = 1; /* start with QPN 2 */
  1071. qpt->nmaps = 1;
  1072. qpt->mask = dd->qpn_mask;
  1073. }
  1074. /**
  1075. * qib_free_qpn_table - free the QP number table for a device
  1076. * @qpt: the QPN table
  1077. */
  1078. void qib_free_qpn_table(struct qib_qpn_table *qpt)
  1079. {
  1080. int i;
  1081. for (i = 0; i < ARRAY_SIZE(qpt->map); i++)
  1082. if (qpt->map[i].page)
  1083. free_page((unsigned long) qpt->map[i].page);
  1084. }
  1085. /**
  1086. * qib_get_credit - flush the send work queue of a QP
  1087. * @qp: the qp who's send work queue to flush
  1088. * @aeth: the Acknowledge Extended Transport Header
  1089. *
  1090. * The QP s_lock should be held.
  1091. */
  1092. void qib_get_credit(struct qib_qp *qp, u32 aeth)
  1093. {
  1094. u32 credit = (aeth >> QIB_AETH_CREDIT_SHIFT) & QIB_AETH_CREDIT_MASK;
  1095. /*
  1096. * If the credit is invalid, we can send
  1097. * as many packets as we like. Otherwise, we have to
  1098. * honor the credit field.
  1099. */
  1100. if (credit == QIB_AETH_CREDIT_INVAL) {
  1101. if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1102. qp->s_flags |= QIB_S_UNLIMITED_CREDIT;
  1103. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1104. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1105. qib_schedule_send(qp);
  1106. }
  1107. }
  1108. } else if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1109. /* Compute new LSN (i.e., MSN + credit) */
  1110. credit = (aeth + credit_table[credit]) & QIB_MSN_MASK;
  1111. if (qib_cmp24(credit, qp->s_lsn) > 0) {
  1112. qp->s_lsn = credit;
  1113. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1114. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1115. qib_schedule_send(qp);
  1116. }
  1117. }
  1118. }
  1119. }