vmwgfx_kms.c 26 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_kms.h"
  28. /* Might need a hrtimer here? */
  29. #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
  30. static int vmw_surface_dmabuf_pin(struct vmw_framebuffer *vfb);
  31. static int vmw_surface_dmabuf_unpin(struct vmw_framebuffer *vfb);
  32. void vmw_display_unit_cleanup(struct vmw_display_unit *du)
  33. {
  34. if (du->cursor_surface)
  35. vmw_surface_unreference(&du->cursor_surface);
  36. if (du->cursor_dmabuf)
  37. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  38. drm_crtc_cleanup(&du->crtc);
  39. drm_encoder_cleanup(&du->encoder);
  40. drm_connector_cleanup(&du->connector);
  41. }
  42. /*
  43. * Display Unit Cursor functions
  44. */
  45. int vmw_cursor_update_image(struct vmw_private *dev_priv,
  46. u32 *image, u32 width, u32 height,
  47. u32 hotspotX, u32 hotspotY)
  48. {
  49. struct {
  50. u32 cmd;
  51. SVGAFifoCmdDefineAlphaCursor cursor;
  52. } *cmd;
  53. u32 image_size = width * height * 4;
  54. u32 cmd_size = sizeof(*cmd) + image_size;
  55. if (!image)
  56. return -EINVAL;
  57. cmd = vmw_fifo_reserve(dev_priv, cmd_size);
  58. if (unlikely(cmd == NULL)) {
  59. DRM_ERROR("Fifo reserve failed.\n");
  60. return -ENOMEM;
  61. }
  62. memset(cmd, 0, sizeof(*cmd));
  63. memcpy(&cmd[1], image, image_size);
  64. cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
  65. cmd->cursor.id = cpu_to_le32(0);
  66. cmd->cursor.width = cpu_to_le32(width);
  67. cmd->cursor.height = cpu_to_le32(height);
  68. cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
  69. cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
  70. vmw_fifo_commit(dev_priv, cmd_size);
  71. return 0;
  72. }
  73. void vmw_cursor_update_position(struct vmw_private *dev_priv,
  74. bool show, int x, int y)
  75. {
  76. __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
  77. uint32_t count;
  78. iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
  79. iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
  80. iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
  81. count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  82. iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  83. }
  84. int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
  85. uint32_t handle, uint32_t width, uint32_t height)
  86. {
  87. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  88. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  89. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  90. struct vmw_surface *surface = NULL;
  91. struct vmw_dma_buffer *dmabuf = NULL;
  92. int ret;
  93. if (handle) {
  94. ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
  95. handle, &surface);
  96. if (!ret) {
  97. if (!surface->snooper.image) {
  98. DRM_ERROR("surface not suitable for cursor\n");
  99. return -EINVAL;
  100. }
  101. } else {
  102. ret = vmw_user_dmabuf_lookup(tfile,
  103. handle, &dmabuf);
  104. if (ret) {
  105. DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
  106. return -EINVAL;
  107. }
  108. }
  109. }
  110. /* takedown old cursor */
  111. if (du->cursor_surface) {
  112. du->cursor_surface->snooper.crtc = NULL;
  113. vmw_surface_unreference(&du->cursor_surface);
  114. }
  115. if (du->cursor_dmabuf)
  116. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  117. /* setup new image */
  118. if (surface) {
  119. /* vmw_user_surface_lookup takes one reference */
  120. du->cursor_surface = surface;
  121. du->cursor_surface->snooper.crtc = crtc;
  122. du->cursor_age = du->cursor_surface->snooper.age;
  123. vmw_cursor_update_image(dev_priv, surface->snooper.image,
  124. 64, 64, du->hotspot_x, du->hotspot_y);
  125. } else if (dmabuf) {
  126. struct ttm_bo_kmap_obj map;
  127. unsigned long kmap_offset;
  128. unsigned long kmap_num;
  129. void *virtual;
  130. bool dummy;
  131. /* vmw_user_surface_lookup takes one reference */
  132. du->cursor_dmabuf = dmabuf;
  133. kmap_offset = 0;
  134. kmap_num = (64*64*4) >> PAGE_SHIFT;
  135. ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
  136. if (unlikely(ret != 0)) {
  137. DRM_ERROR("reserve failed\n");
  138. return -EINVAL;
  139. }
  140. ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
  141. if (unlikely(ret != 0))
  142. goto err_unreserve;
  143. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  144. vmw_cursor_update_image(dev_priv, virtual, 64, 64,
  145. du->hotspot_x, du->hotspot_y);
  146. ttm_bo_kunmap(&map);
  147. err_unreserve:
  148. ttm_bo_unreserve(&dmabuf->base);
  149. } else {
  150. vmw_cursor_update_position(dev_priv, false, 0, 0);
  151. return 0;
  152. }
  153. vmw_cursor_update_position(dev_priv, true, du->cursor_x, du->cursor_y);
  154. return 0;
  155. }
  156. int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
  157. {
  158. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  159. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  160. bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
  161. du->cursor_x = x + crtc->x;
  162. du->cursor_y = y + crtc->y;
  163. vmw_cursor_update_position(dev_priv, shown,
  164. du->cursor_x, du->cursor_y);
  165. return 0;
  166. }
  167. void vmw_kms_cursor_snoop(struct vmw_surface *srf,
  168. struct ttm_object_file *tfile,
  169. struct ttm_buffer_object *bo,
  170. SVGA3dCmdHeader *header)
  171. {
  172. struct ttm_bo_kmap_obj map;
  173. unsigned long kmap_offset;
  174. unsigned long kmap_num;
  175. SVGA3dCopyBox *box;
  176. unsigned box_count;
  177. void *virtual;
  178. bool dummy;
  179. struct vmw_dma_cmd {
  180. SVGA3dCmdHeader header;
  181. SVGA3dCmdSurfaceDMA dma;
  182. } *cmd;
  183. int ret;
  184. cmd = container_of(header, struct vmw_dma_cmd, header);
  185. /* No snooper installed */
  186. if (!srf->snooper.image)
  187. return;
  188. if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
  189. DRM_ERROR("face and mipmap for cursors should never != 0\n");
  190. return;
  191. }
  192. if (cmd->header.size < 64) {
  193. DRM_ERROR("at least one full copy box must be given\n");
  194. return;
  195. }
  196. box = (SVGA3dCopyBox *)&cmd[1];
  197. box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
  198. sizeof(SVGA3dCopyBox);
  199. if (cmd->dma.guest.pitch != (64 * 4) ||
  200. cmd->dma.guest.ptr.offset % PAGE_SIZE ||
  201. box->x != 0 || box->y != 0 || box->z != 0 ||
  202. box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
  203. box->w != 64 || box->h != 64 || box->d != 1 ||
  204. box_count != 1) {
  205. /* TODO handle none page aligned offsets */
  206. /* TODO handle partial uploads and pitch != 256 */
  207. /* TODO handle more then one copy (size != 64) */
  208. DRM_ERROR("lazy programer, cant handle wierd stuff\n");
  209. return;
  210. }
  211. kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
  212. kmap_num = (64*64*4) >> PAGE_SHIFT;
  213. ret = ttm_bo_reserve(bo, true, false, false, 0);
  214. if (unlikely(ret != 0)) {
  215. DRM_ERROR("reserve failed\n");
  216. return;
  217. }
  218. ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
  219. if (unlikely(ret != 0))
  220. goto err_unreserve;
  221. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  222. memcpy(srf->snooper.image, virtual, 64*64*4);
  223. srf->snooper.age++;
  224. /* we can't call this function from this function since execbuf has
  225. * reserved fifo space.
  226. *
  227. * if (srf->snooper.crtc)
  228. * vmw_ldu_crtc_cursor_update_image(dev_priv,
  229. * srf->snooper.image, 64, 64,
  230. * du->hotspot_x, du->hotspot_y);
  231. */
  232. ttm_bo_kunmap(&map);
  233. err_unreserve:
  234. ttm_bo_unreserve(bo);
  235. }
  236. void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
  237. {
  238. struct drm_device *dev = dev_priv->dev;
  239. struct vmw_display_unit *du;
  240. struct drm_crtc *crtc;
  241. mutex_lock(&dev->mode_config.mutex);
  242. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  243. du = vmw_crtc_to_du(crtc);
  244. if (!du->cursor_surface ||
  245. du->cursor_age == du->cursor_surface->snooper.age)
  246. continue;
  247. du->cursor_age = du->cursor_surface->snooper.age;
  248. vmw_cursor_update_image(dev_priv,
  249. du->cursor_surface->snooper.image,
  250. 64, 64, du->hotspot_x, du->hotspot_y);
  251. }
  252. mutex_unlock(&dev->mode_config.mutex);
  253. }
  254. /*
  255. * Generic framebuffer code
  256. */
  257. int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
  258. struct drm_file *file_priv,
  259. unsigned int *handle)
  260. {
  261. if (handle)
  262. handle = 0;
  263. return 0;
  264. }
  265. /*
  266. * Surface framebuffer code
  267. */
  268. #define vmw_framebuffer_to_vfbs(x) \
  269. container_of(x, struct vmw_framebuffer_surface, base.base)
  270. struct vmw_framebuffer_surface {
  271. struct vmw_framebuffer base;
  272. struct vmw_surface *surface;
  273. struct vmw_dma_buffer *buffer;
  274. struct delayed_work d_work;
  275. struct mutex work_lock;
  276. bool present_fs;
  277. };
  278. void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
  279. {
  280. struct vmw_framebuffer_surface *vfb =
  281. vmw_framebuffer_to_vfbs(framebuffer);
  282. cancel_delayed_work_sync(&vfb->d_work);
  283. drm_framebuffer_cleanup(framebuffer);
  284. vmw_surface_unreference(&vfb->surface);
  285. kfree(framebuffer);
  286. }
  287. static void vmw_framebuffer_present_fs_callback(struct work_struct *work)
  288. {
  289. struct delayed_work *d_work =
  290. container_of(work, struct delayed_work, work);
  291. struct vmw_framebuffer_surface *vfbs =
  292. container_of(d_work, struct vmw_framebuffer_surface, d_work);
  293. struct vmw_surface *surf = vfbs->surface;
  294. struct drm_framebuffer *framebuffer = &vfbs->base.base;
  295. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  296. struct {
  297. SVGA3dCmdHeader header;
  298. SVGA3dCmdPresent body;
  299. SVGA3dCopyRect cr;
  300. } *cmd;
  301. mutex_lock(&vfbs->work_lock);
  302. if (!vfbs->present_fs)
  303. goto out_unlock;
  304. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  305. if (unlikely(cmd == NULL))
  306. goto out_resched;
  307. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_PRESENT);
  308. cmd->header.size = cpu_to_le32(sizeof(cmd->body) + sizeof(cmd->cr));
  309. cmd->body.sid = cpu_to_le32(surf->res.id);
  310. cmd->cr.x = cpu_to_le32(0);
  311. cmd->cr.y = cpu_to_le32(0);
  312. cmd->cr.srcx = cmd->cr.x;
  313. cmd->cr.srcy = cmd->cr.y;
  314. cmd->cr.w = cpu_to_le32(framebuffer->width);
  315. cmd->cr.h = cpu_to_le32(framebuffer->height);
  316. vfbs->present_fs = false;
  317. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  318. out_resched:
  319. /**
  320. * Will not re-add if already pending.
  321. */
  322. schedule_delayed_work(&vfbs->d_work, VMWGFX_PRESENT_RATE);
  323. out_unlock:
  324. mutex_unlock(&vfbs->work_lock);
  325. }
  326. int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
  327. unsigned flags, unsigned color,
  328. struct drm_clip_rect *clips,
  329. unsigned num_clips)
  330. {
  331. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  332. struct vmw_framebuffer_surface *vfbs =
  333. vmw_framebuffer_to_vfbs(framebuffer);
  334. struct vmw_surface *surf = vfbs->surface;
  335. struct drm_clip_rect norect;
  336. SVGA3dCopyRect *cr;
  337. int i, inc = 1;
  338. struct {
  339. SVGA3dCmdHeader header;
  340. SVGA3dCmdPresent body;
  341. SVGA3dCopyRect cr;
  342. } *cmd;
  343. if (!num_clips ||
  344. !(dev_priv->fifo.capabilities &
  345. SVGA_FIFO_CAP_SCREEN_OBJECT)) {
  346. int ret;
  347. mutex_lock(&vfbs->work_lock);
  348. vfbs->present_fs = true;
  349. ret = schedule_delayed_work(&vfbs->d_work, VMWGFX_PRESENT_RATE);
  350. mutex_unlock(&vfbs->work_lock);
  351. if (ret) {
  352. /**
  353. * No work pending, Force immediate present.
  354. */
  355. vmw_framebuffer_present_fs_callback(&vfbs->d_work.work);
  356. }
  357. return 0;
  358. }
  359. if (!num_clips) {
  360. num_clips = 1;
  361. clips = &norect;
  362. norect.x1 = norect.y1 = 0;
  363. norect.x2 = framebuffer->width;
  364. norect.y2 = framebuffer->height;
  365. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  366. num_clips /= 2;
  367. inc = 2; /* skip source rects */
  368. }
  369. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) + (num_clips - 1) * sizeof(cmd->cr));
  370. if (unlikely(cmd == NULL)) {
  371. DRM_ERROR("Fifo reserve failed.\n");
  372. return -ENOMEM;
  373. }
  374. memset(cmd, 0, sizeof(*cmd));
  375. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_PRESENT);
  376. cmd->header.size = cpu_to_le32(sizeof(cmd->body) + num_clips * sizeof(cmd->cr));
  377. cmd->body.sid = cpu_to_le32(surf->res.id);
  378. for (i = 0, cr = &cmd->cr; i < num_clips; i++, cr++, clips += inc) {
  379. cr->x = cpu_to_le16(clips->x1);
  380. cr->y = cpu_to_le16(clips->y1);
  381. cr->srcx = cr->x;
  382. cr->srcy = cr->y;
  383. cr->w = cpu_to_le16(clips->x2 - clips->x1);
  384. cr->h = cpu_to_le16(clips->y2 - clips->y1);
  385. }
  386. vmw_fifo_commit(dev_priv, sizeof(*cmd) + (num_clips - 1) * sizeof(cmd->cr));
  387. return 0;
  388. }
  389. static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
  390. .destroy = vmw_framebuffer_surface_destroy,
  391. .dirty = vmw_framebuffer_surface_dirty,
  392. .create_handle = vmw_framebuffer_create_handle,
  393. };
  394. int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
  395. struct vmw_surface *surface,
  396. struct vmw_framebuffer **out,
  397. unsigned width, unsigned height)
  398. {
  399. struct drm_device *dev = dev_priv->dev;
  400. struct vmw_framebuffer_surface *vfbs;
  401. int ret;
  402. vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
  403. if (!vfbs) {
  404. ret = -ENOMEM;
  405. goto out_err1;
  406. }
  407. ret = drm_framebuffer_init(dev, &vfbs->base.base,
  408. &vmw_framebuffer_surface_funcs);
  409. if (ret)
  410. goto out_err2;
  411. if (!vmw_surface_reference(surface)) {
  412. DRM_ERROR("failed to reference surface %p\n", surface);
  413. goto out_err3;
  414. }
  415. /* XXX get the first 3 from the surface info */
  416. vfbs->base.base.bits_per_pixel = 32;
  417. vfbs->base.base.pitch = width * 32 / 4;
  418. vfbs->base.base.depth = 24;
  419. vfbs->base.base.width = width;
  420. vfbs->base.base.height = height;
  421. vfbs->base.pin = &vmw_surface_dmabuf_pin;
  422. vfbs->base.unpin = &vmw_surface_dmabuf_unpin;
  423. vfbs->surface = surface;
  424. mutex_init(&vfbs->work_lock);
  425. INIT_DELAYED_WORK(&vfbs->d_work, &vmw_framebuffer_present_fs_callback);
  426. *out = &vfbs->base;
  427. return 0;
  428. out_err3:
  429. drm_framebuffer_cleanup(&vfbs->base.base);
  430. out_err2:
  431. kfree(vfbs);
  432. out_err1:
  433. return ret;
  434. }
  435. /*
  436. * Dmabuf framebuffer code
  437. */
  438. #define vmw_framebuffer_to_vfbd(x) \
  439. container_of(x, struct vmw_framebuffer_dmabuf, base.base)
  440. struct vmw_framebuffer_dmabuf {
  441. struct vmw_framebuffer base;
  442. struct vmw_dma_buffer *buffer;
  443. };
  444. void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
  445. {
  446. struct vmw_framebuffer_dmabuf *vfbd =
  447. vmw_framebuffer_to_vfbd(framebuffer);
  448. drm_framebuffer_cleanup(framebuffer);
  449. vmw_dmabuf_unreference(&vfbd->buffer);
  450. kfree(vfbd);
  451. }
  452. int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
  453. unsigned flags, unsigned color,
  454. struct drm_clip_rect *clips,
  455. unsigned num_clips)
  456. {
  457. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  458. struct drm_clip_rect norect;
  459. struct {
  460. uint32_t header;
  461. SVGAFifoCmdUpdate body;
  462. } *cmd;
  463. int i, increment = 1;
  464. if (!num_clips) {
  465. num_clips = 1;
  466. clips = &norect;
  467. norect.x1 = norect.y1 = 0;
  468. norect.x2 = framebuffer->width;
  469. norect.y2 = framebuffer->height;
  470. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  471. num_clips /= 2;
  472. increment = 2;
  473. }
  474. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) * num_clips);
  475. if (unlikely(cmd == NULL)) {
  476. DRM_ERROR("Fifo reserve failed.\n");
  477. return -ENOMEM;
  478. }
  479. for (i = 0; i < num_clips; i++, clips += increment) {
  480. cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
  481. cmd[i].body.x = cpu_to_le32(clips->x1);
  482. cmd[i].body.y = cpu_to_le32(clips->y1);
  483. cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
  484. cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
  485. }
  486. vmw_fifo_commit(dev_priv, sizeof(*cmd) * num_clips);
  487. return 0;
  488. }
  489. static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
  490. .destroy = vmw_framebuffer_dmabuf_destroy,
  491. .dirty = vmw_framebuffer_dmabuf_dirty,
  492. .create_handle = vmw_framebuffer_create_handle,
  493. };
  494. static int vmw_surface_dmabuf_pin(struct vmw_framebuffer *vfb)
  495. {
  496. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  497. struct vmw_framebuffer_surface *vfbs =
  498. vmw_framebuffer_to_vfbs(&vfb->base);
  499. unsigned long size = vfbs->base.base.pitch * vfbs->base.base.height;
  500. int ret;
  501. vfbs->buffer = kzalloc(sizeof(*vfbs->buffer), GFP_KERNEL);
  502. if (unlikely(vfbs->buffer == NULL))
  503. return -ENOMEM;
  504. vmw_overlay_pause_all(dev_priv);
  505. ret = vmw_dmabuf_init(dev_priv, vfbs->buffer, size,
  506. &vmw_vram_ne_placement,
  507. false, &vmw_dmabuf_bo_free);
  508. vmw_overlay_resume_all(dev_priv);
  509. return ret;
  510. }
  511. static int vmw_surface_dmabuf_unpin(struct vmw_framebuffer *vfb)
  512. {
  513. struct ttm_buffer_object *bo;
  514. struct vmw_framebuffer_surface *vfbs =
  515. vmw_framebuffer_to_vfbs(&vfb->base);
  516. bo = &vfbs->buffer->base;
  517. ttm_bo_unref(&bo);
  518. vfbs->buffer = NULL;
  519. return 0;
  520. }
  521. static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
  522. {
  523. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  524. struct vmw_framebuffer_dmabuf *vfbd =
  525. vmw_framebuffer_to_vfbd(&vfb->base);
  526. int ret;
  527. vmw_overlay_pause_all(dev_priv);
  528. ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer);
  529. vmw_overlay_resume_all(dev_priv);
  530. WARN_ON(ret != 0);
  531. return 0;
  532. }
  533. static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
  534. {
  535. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  536. struct vmw_framebuffer_dmabuf *vfbd =
  537. vmw_framebuffer_to_vfbd(&vfb->base);
  538. if (!vfbd->buffer) {
  539. WARN_ON(!vfbd->buffer);
  540. return 0;
  541. }
  542. return vmw_dmabuf_from_vram(dev_priv, vfbd->buffer);
  543. }
  544. int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
  545. struct vmw_dma_buffer *dmabuf,
  546. struct vmw_framebuffer **out,
  547. unsigned width, unsigned height)
  548. {
  549. struct drm_device *dev = dev_priv->dev;
  550. struct vmw_framebuffer_dmabuf *vfbd;
  551. int ret;
  552. vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
  553. if (!vfbd) {
  554. ret = -ENOMEM;
  555. goto out_err1;
  556. }
  557. ret = drm_framebuffer_init(dev, &vfbd->base.base,
  558. &vmw_framebuffer_dmabuf_funcs);
  559. if (ret)
  560. goto out_err2;
  561. if (!vmw_dmabuf_reference(dmabuf)) {
  562. DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
  563. goto out_err3;
  564. }
  565. /* XXX get the first 3 from the surface info */
  566. vfbd->base.base.bits_per_pixel = 32;
  567. vfbd->base.base.pitch = width * vfbd->base.base.bits_per_pixel / 8;
  568. vfbd->base.base.depth = 24;
  569. vfbd->base.base.width = width;
  570. vfbd->base.base.height = height;
  571. vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
  572. vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
  573. vfbd->buffer = dmabuf;
  574. *out = &vfbd->base;
  575. return 0;
  576. out_err3:
  577. drm_framebuffer_cleanup(&vfbd->base.base);
  578. out_err2:
  579. kfree(vfbd);
  580. out_err1:
  581. return ret;
  582. }
  583. /*
  584. * Generic Kernel modesetting functions
  585. */
  586. static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
  587. struct drm_file *file_priv,
  588. struct drm_mode_fb_cmd *mode_cmd)
  589. {
  590. struct vmw_private *dev_priv = vmw_priv(dev);
  591. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  592. struct vmw_framebuffer *vfb = NULL;
  593. struct vmw_surface *surface = NULL;
  594. struct vmw_dma_buffer *bo = NULL;
  595. int ret;
  596. ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
  597. mode_cmd->handle, &surface);
  598. if (ret)
  599. goto try_dmabuf;
  600. if (!surface->scanout)
  601. goto err_not_scanout;
  602. ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
  603. mode_cmd->width, mode_cmd->height);
  604. /* vmw_user_surface_lookup takes one ref so does new_fb */
  605. vmw_surface_unreference(&surface);
  606. if (ret) {
  607. DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
  608. return NULL;
  609. }
  610. return &vfb->base;
  611. try_dmabuf:
  612. DRM_INFO("%s: trying buffer\n", __func__);
  613. ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo);
  614. if (ret) {
  615. DRM_ERROR("failed to find buffer: %i\n", ret);
  616. return NULL;
  617. }
  618. ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
  619. mode_cmd->width, mode_cmd->height);
  620. /* vmw_user_dmabuf_lookup takes one ref so does new_fb */
  621. vmw_dmabuf_unreference(&bo);
  622. if (ret) {
  623. DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
  624. return NULL;
  625. }
  626. return &vfb->base;
  627. err_not_scanout:
  628. DRM_ERROR("surface not marked as scanout\n");
  629. /* vmw_user_surface_lookup takes one ref */
  630. vmw_surface_unreference(&surface);
  631. return NULL;
  632. }
  633. static struct drm_mode_config_funcs vmw_kms_funcs = {
  634. .fb_create = vmw_kms_fb_create,
  635. };
  636. int vmw_kms_init(struct vmw_private *dev_priv)
  637. {
  638. struct drm_device *dev = dev_priv->dev;
  639. int ret;
  640. drm_mode_config_init(dev);
  641. dev->mode_config.funcs = &vmw_kms_funcs;
  642. dev->mode_config.min_width = 1;
  643. dev->mode_config.min_height = 1;
  644. /* assumed largest fb size */
  645. dev->mode_config.max_width = 8192;
  646. dev->mode_config.max_height = 8192;
  647. ret = vmw_kms_init_legacy_display_system(dev_priv);
  648. return 0;
  649. }
  650. int vmw_kms_close(struct vmw_private *dev_priv)
  651. {
  652. /*
  653. * Docs says we should take the lock before calling this function
  654. * but since it destroys encoders and our destructor calls
  655. * drm_encoder_cleanup which takes the lock we deadlock.
  656. */
  657. drm_mode_config_cleanup(dev_priv->dev);
  658. vmw_kms_close_legacy_display_system(dev_priv);
  659. return 0;
  660. }
  661. int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
  662. struct drm_file *file_priv)
  663. {
  664. struct drm_vmw_cursor_bypass_arg *arg = data;
  665. struct vmw_display_unit *du;
  666. struct drm_mode_object *obj;
  667. struct drm_crtc *crtc;
  668. int ret = 0;
  669. mutex_lock(&dev->mode_config.mutex);
  670. if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
  671. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  672. du = vmw_crtc_to_du(crtc);
  673. du->hotspot_x = arg->xhot;
  674. du->hotspot_y = arg->yhot;
  675. }
  676. mutex_unlock(&dev->mode_config.mutex);
  677. return 0;
  678. }
  679. obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
  680. if (!obj) {
  681. ret = -EINVAL;
  682. goto out;
  683. }
  684. crtc = obj_to_crtc(obj);
  685. du = vmw_crtc_to_du(crtc);
  686. du->hotspot_x = arg->xhot;
  687. du->hotspot_y = arg->yhot;
  688. out:
  689. mutex_unlock(&dev->mode_config.mutex);
  690. return ret;
  691. }
  692. void vmw_kms_write_svga(struct vmw_private *vmw_priv,
  693. unsigned width, unsigned height, unsigned pitch,
  694. unsigned bbp, unsigned depth)
  695. {
  696. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  697. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
  698. else if (vmw_fifo_have_pitchlock(vmw_priv))
  699. iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  700. vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
  701. vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
  702. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bbp);
  703. vmw_write(vmw_priv, SVGA_REG_DEPTH, depth);
  704. vmw_write(vmw_priv, SVGA_REG_RED_MASK, 0x00ff0000);
  705. vmw_write(vmw_priv, SVGA_REG_GREEN_MASK, 0x0000ff00);
  706. vmw_write(vmw_priv, SVGA_REG_BLUE_MASK, 0x000000ff);
  707. }
  708. int vmw_kms_save_vga(struct vmw_private *vmw_priv)
  709. {
  710. struct vmw_vga_topology_state *save;
  711. uint32_t i;
  712. vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
  713. vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
  714. vmw_priv->vga_depth = vmw_read(vmw_priv, SVGA_REG_DEPTH);
  715. vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
  716. vmw_priv->vga_pseudo = vmw_read(vmw_priv, SVGA_REG_PSEUDOCOLOR);
  717. vmw_priv->vga_red_mask = vmw_read(vmw_priv, SVGA_REG_RED_MASK);
  718. vmw_priv->vga_blue_mask = vmw_read(vmw_priv, SVGA_REG_BLUE_MASK);
  719. vmw_priv->vga_green_mask = vmw_read(vmw_priv, SVGA_REG_GREEN_MASK);
  720. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  721. vmw_priv->vga_pitchlock =
  722. vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
  723. else if (vmw_fifo_have_pitchlock(vmw_priv))
  724. vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
  725. SVGA_FIFO_PITCHLOCK);
  726. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  727. return 0;
  728. vmw_priv->num_displays = vmw_read(vmw_priv,
  729. SVGA_REG_NUM_GUEST_DISPLAYS);
  730. for (i = 0; i < vmw_priv->num_displays; ++i) {
  731. save = &vmw_priv->vga_save[i];
  732. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  733. save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
  734. save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
  735. save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
  736. save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
  737. save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
  738. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  739. }
  740. return 0;
  741. }
  742. int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
  743. {
  744. struct vmw_vga_topology_state *save;
  745. uint32_t i;
  746. vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
  747. vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
  748. vmw_write(vmw_priv, SVGA_REG_DEPTH, vmw_priv->vga_depth);
  749. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
  750. vmw_write(vmw_priv, SVGA_REG_PSEUDOCOLOR, vmw_priv->vga_pseudo);
  751. vmw_write(vmw_priv, SVGA_REG_RED_MASK, vmw_priv->vga_red_mask);
  752. vmw_write(vmw_priv, SVGA_REG_GREEN_MASK, vmw_priv->vga_green_mask);
  753. vmw_write(vmw_priv, SVGA_REG_BLUE_MASK, vmw_priv->vga_blue_mask);
  754. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  755. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
  756. vmw_priv->vga_pitchlock);
  757. else if (vmw_fifo_have_pitchlock(vmw_priv))
  758. iowrite32(vmw_priv->vga_pitchlock,
  759. vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  760. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  761. return 0;
  762. for (i = 0; i < vmw_priv->num_displays; ++i) {
  763. save = &vmw_priv->vga_save[i];
  764. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  765. vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
  766. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
  767. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
  768. vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
  769. vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
  770. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  771. }
  772. return 0;
  773. }
  774. int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
  775. struct drm_file *file_priv)
  776. {
  777. struct vmw_private *dev_priv = vmw_priv(dev);
  778. struct drm_vmw_update_layout_arg *arg =
  779. (struct drm_vmw_update_layout_arg *)data;
  780. struct vmw_master *vmaster = vmw_master(file_priv->master);
  781. void __user *user_rects;
  782. struct drm_vmw_rect *rects;
  783. unsigned rects_size;
  784. int ret;
  785. ret = ttm_read_lock(&vmaster->lock, true);
  786. if (unlikely(ret != 0))
  787. return ret;
  788. if (!arg->num_outputs) {
  789. struct drm_vmw_rect def_rect = {0, 0, 800, 600};
  790. vmw_kms_ldu_update_layout(dev_priv, 1, &def_rect);
  791. goto out_unlock;
  792. }
  793. rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
  794. rects = kzalloc(rects_size, GFP_KERNEL);
  795. if (unlikely(!rects)) {
  796. ret = -ENOMEM;
  797. goto out_unlock;
  798. }
  799. user_rects = (void __user *)(unsigned long)arg->rects;
  800. ret = copy_from_user(rects, user_rects, rects_size);
  801. if (unlikely(ret != 0)) {
  802. DRM_ERROR("Failed to get rects.\n");
  803. ret = -EFAULT;
  804. goto out_free;
  805. }
  806. vmw_kms_ldu_update_layout(dev_priv, arg->num_outputs, rects);
  807. out_free:
  808. kfree(rects);
  809. out_unlock:
  810. ttm_read_unlock(&vmaster->lock);
  811. return ret;
  812. }