radeon_mode.h 18 KB

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  1. /*
  2. * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  3. * VA Linux Systems Inc., Fremont, California.
  4. * Copyright 2008 Red Hat Inc.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Original Authors:
  25. * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
  26. *
  27. * Kernel port Author: Dave Airlie
  28. */
  29. #ifndef RADEON_MODE_H
  30. #define RADEON_MODE_H
  31. #include <drm_crtc.h>
  32. #include <drm_mode.h>
  33. #include <drm_edid.h>
  34. #include <drm_dp_helper.h>
  35. #include <drm_fixed.h>
  36. #include <linux/i2c.h>
  37. #include <linux/i2c-id.h>
  38. #include <linux/i2c-algo-bit.h>
  39. struct radeon_bo;
  40. struct radeon_device;
  41. #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
  42. #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
  43. #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
  44. #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
  45. enum radeon_rmx_type {
  46. RMX_OFF,
  47. RMX_FULL,
  48. RMX_CENTER,
  49. RMX_ASPECT
  50. };
  51. enum radeon_tv_std {
  52. TV_STD_NTSC,
  53. TV_STD_PAL,
  54. TV_STD_PAL_M,
  55. TV_STD_PAL_60,
  56. TV_STD_NTSC_J,
  57. TV_STD_SCART_PAL,
  58. TV_STD_SECAM,
  59. TV_STD_PAL_CN,
  60. TV_STD_PAL_N,
  61. };
  62. enum radeon_hpd_id {
  63. RADEON_HPD_1 = 0,
  64. RADEON_HPD_2,
  65. RADEON_HPD_3,
  66. RADEON_HPD_4,
  67. RADEON_HPD_5,
  68. RADEON_HPD_6,
  69. RADEON_HPD_NONE = 0xff,
  70. };
  71. /* radeon gpio-based i2c
  72. * 1. "mask" reg and bits
  73. * grabs the gpio pins for software use
  74. * 0=not held 1=held
  75. * 2. "a" reg and bits
  76. * output pin value
  77. * 0=low 1=high
  78. * 3. "en" reg and bits
  79. * sets the pin direction
  80. * 0=input 1=output
  81. * 4. "y" reg and bits
  82. * input pin value
  83. * 0=low 1=high
  84. */
  85. struct radeon_i2c_bus_rec {
  86. bool valid;
  87. /* id used by atom */
  88. uint8_t i2c_id;
  89. /* id used by atom */
  90. enum radeon_hpd_id hpd;
  91. /* can be used with hw i2c engine */
  92. bool hw_capable;
  93. /* uses multi-media i2c engine */
  94. bool mm_i2c;
  95. /* regs and bits */
  96. uint32_t mask_clk_reg;
  97. uint32_t mask_data_reg;
  98. uint32_t a_clk_reg;
  99. uint32_t a_data_reg;
  100. uint32_t en_clk_reg;
  101. uint32_t en_data_reg;
  102. uint32_t y_clk_reg;
  103. uint32_t y_data_reg;
  104. uint32_t mask_clk_mask;
  105. uint32_t mask_data_mask;
  106. uint32_t a_clk_mask;
  107. uint32_t a_data_mask;
  108. uint32_t en_clk_mask;
  109. uint32_t en_data_mask;
  110. uint32_t y_clk_mask;
  111. uint32_t y_data_mask;
  112. };
  113. struct radeon_tmds_pll {
  114. uint32_t freq;
  115. uint32_t value;
  116. };
  117. #define RADEON_MAX_BIOS_CONNECTOR 16
  118. /* pll flags */
  119. #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
  120. #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
  121. #define RADEON_PLL_USE_REF_DIV (1 << 2)
  122. #define RADEON_PLL_LEGACY (1 << 3)
  123. #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
  124. #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
  125. #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
  126. #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
  127. #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
  128. #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
  129. #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
  130. #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
  131. #define RADEON_PLL_USE_POST_DIV (1 << 12)
  132. #define RADEON_PLL_IS_LCD (1 << 13)
  133. /* pll algo */
  134. enum radeon_pll_algo {
  135. PLL_ALGO_LEGACY,
  136. PLL_ALGO_NEW
  137. };
  138. struct radeon_pll {
  139. /* reference frequency */
  140. uint32_t reference_freq;
  141. /* fixed dividers */
  142. uint32_t reference_div;
  143. uint32_t post_div;
  144. /* pll in/out limits */
  145. uint32_t pll_in_min;
  146. uint32_t pll_in_max;
  147. uint32_t pll_out_min;
  148. uint32_t pll_out_max;
  149. uint32_t lcd_pll_out_min;
  150. uint32_t lcd_pll_out_max;
  151. uint32_t best_vco;
  152. /* divider limits */
  153. uint32_t min_ref_div;
  154. uint32_t max_ref_div;
  155. uint32_t min_post_div;
  156. uint32_t max_post_div;
  157. uint32_t min_feedback_div;
  158. uint32_t max_feedback_div;
  159. uint32_t min_frac_feedback_div;
  160. uint32_t max_frac_feedback_div;
  161. /* flags for the current clock */
  162. uint32_t flags;
  163. /* pll id */
  164. uint32_t id;
  165. /* pll algo */
  166. enum radeon_pll_algo algo;
  167. };
  168. struct radeon_i2c_chan {
  169. struct i2c_adapter adapter;
  170. struct drm_device *dev;
  171. union {
  172. struct i2c_algo_bit_data bit;
  173. struct i2c_algo_dp_aux_data dp;
  174. } algo;
  175. struct radeon_i2c_bus_rec rec;
  176. };
  177. /* mostly for macs, but really any system without connector tables */
  178. enum radeon_connector_table {
  179. CT_NONE,
  180. CT_GENERIC,
  181. CT_IBOOK,
  182. CT_POWERBOOK_EXTERNAL,
  183. CT_POWERBOOK_INTERNAL,
  184. CT_POWERBOOK_VGA,
  185. CT_MINI_EXTERNAL,
  186. CT_MINI_INTERNAL,
  187. CT_IMAC_G5_ISIGHT,
  188. CT_EMAC,
  189. CT_RN50_POWER,
  190. };
  191. enum radeon_dvo_chip {
  192. DVO_SIL164,
  193. DVO_SIL1178,
  194. };
  195. struct radeon_fbdev;
  196. struct radeon_mode_info {
  197. struct atom_context *atom_context;
  198. struct card_info *atom_card_info;
  199. enum radeon_connector_table connector_table;
  200. bool mode_config_initialized;
  201. struct radeon_crtc *crtcs[6];
  202. /* DVI-I properties */
  203. struct drm_property *coherent_mode_property;
  204. /* DAC enable load detect */
  205. struct drm_property *load_detect_property;
  206. /* TV standard load detect */
  207. struct drm_property *tv_std_property;
  208. /* legacy TMDS PLL detect */
  209. struct drm_property *tmds_pll_property;
  210. /* hardcoded DFP edid from BIOS */
  211. struct edid *bios_hardcoded_edid;
  212. /* pointer to fbdev info structure */
  213. struct radeon_fbdev *rfbdev;
  214. };
  215. #define MAX_H_CODE_TIMING_LEN 32
  216. #define MAX_V_CODE_TIMING_LEN 32
  217. /* need to store these as reading
  218. back code tables is excessive */
  219. struct radeon_tv_regs {
  220. uint32_t tv_uv_adr;
  221. uint32_t timing_cntl;
  222. uint32_t hrestart;
  223. uint32_t vrestart;
  224. uint32_t frestart;
  225. uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
  226. uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
  227. };
  228. struct radeon_crtc {
  229. struct drm_crtc base;
  230. int crtc_id;
  231. u16 lut_r[256], lut_g[256], lut_b[256];
  232. bool enabled;
  233. bool can_tile;
  234. uint32_t crtc_offset;
  235. struct drm_gem_object *cursor_bo;
  236. uint64_t cursor_addr;
  237. int cursor_width;
  238. int cursor_height;
  239. uint32_t legacy_display_base_addr;
  240. uint32_t legacy_cursor_offset;
  241. enum radeon_rmx_type rmx_type;
  242. fixed20_12 vsc;
  243. fixed20_12 hsc;
  244. struct drm_display_mode native_mode;
  245. int pll_id;
  246. };
  247. struct radeon_encoder_primary_dac {
  248. /* legacy primary dac */
  249. uint32_t ps2_pdac_adj;
  250. };
  251. struct radeon_encoder_lvds {
  252. /* legacy lvds */
  253. uint16_t panel_vcc_delay;
  254. uint8_t panel_pwr_delay;
  255. uint8_t panel_digon_delay;
  256. uint8_t panel_blon_delay;
  257. uint16_t panel_ref_divider;
  258. uint8_t panel_post_divider;
  259. uint16_t panel_fb_divider;
  260. bool use_bios_dividers;
  261. uint32_t lvds_gen_cntl;
  262. /* panel mode */
  263. struct drm_display_mode native_mode;
  264. };
  265. struct radeon_encoder_tv_dac {
  266. /* legacy tv dac */
  267. uint32_t ps2_tvdac_adj;
  268. uint32_t ntsc_tvdac_adj;
  269. uint32_t pal_tvdac_adj;
  270. int h_pos;
  271. int v_pos;
  272. int h_size;
  273. int supported_tv_stds;
  274. bool tv_on;
  275. enum radeon_tv_std tv_std;
  276. struct radeon_tv_regs tv;
  277. };
  278. struct radeon_encoder_int_tmds {
  279. /* legacy int tmds */
  280. struct radeon_tmds_pll tmds_pll[4];
  281. };
  282. struct radeon_encoder_ext_tmds {
  283. /* tmds over dvo */
  284. struct radeon_i2c_chan *i2c_bus;
  285. uint8_t slave_addr;
  286. enum radeon_dvo_chip dvo_chip;
  287. };
  288. /* spread spectrum */
  289. struct radeon_atom_ss {
  290. uint16_t percentage;
  291. uint8_t type;
  292. uint8_t step;
  293. uint8_t delay;
  294. uint8_t range;
  295. uint8_t refdiv;
  296. };
  297. struct radeon_encoder_atom_dig {
  298. /* atom dig */
  299. bool coherent_mode;
  300. int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */
  301. /* atom lvds */
  302. uint32_t lvds_misc;
  303. uint16_t panel_pwr_delay;
  304. enum radeon_pll_algo pll_algo;
  305. struct radeon_atom_ss *ss;
  306. /* panel mode */
  307. struct drm_display_mode native_mode;
  308. };
  309. struct radeon_encoder_atom_dac {
  310. enum radeon_tv_std tv_std;
  311. };
  312. struct radeon_encoder {
  313. struct drm_encoder base;
  314. uint32_t encoder_id;
  315. uint32_t devices;
  316. uint32_t active_device;
  317. uint32_t flags;
  318. uint32_t pixel_clock;
  319. enum radeon_rmx_type rmx_type;
  320. struct drm_display_mode native_mode;
  321. void *enc_priv;
  322. int audio_polling_active;
  323. int hdmi_offset;
  324. int hdmi_config_offset;
  325. int hdmi_audio_workaround;
  326. int hdmi_buffer_status;
  327. };
  328. struct radeon_connector_atom_dig {
  329. uint32_t igp_lane_info;
  330. bool linkb;
  331. /* displayport */
  332. struct radeon_i2c_chan *dp_i2c_bus;
  333. u8 dpcd[8];
  334. u8 dp_sink_type;
  335. int dp_clock;
  336. int dp_lane_count;
  337. };
  338. struct radeon_gpio_rec {
  339. bool valid;
  340. u8 id;
  341. u32 reg;
  342. u32 mask;
  343. };
  344. struct radeon_hpd {
  345. enum radeon_hpd_id hpd;
  346. u8 plugged_state;
  347. struct radeon_gpio_rec gpio;
  348. };
  349. struct radeon_connector {
  350. struct drm_connector base;
  351. uint32_t connector_id;
  352. uint32_t devices;
  353. struct radeon_i2c_chan *ddc_bus;
  354. /* some systems have a an hdmi and vga port with a shared ddc line */
  355. bool shared_ddc;
  356. bool use_digital;
  357. /* we need to mind the EDID between detect
  358. and get modes due to analog/digital/tvencoder */
  359. struct edid *edid;
  360. void *con_priv;
  361. bool dac_load_detect;
  362. uint16_t connector_object_id;
  363. struct radeon_hpd hpd;
  364. };
  365. struct radeon_framebuffer {
  366. struct drm_framebuffer base;
  367. struct drm_gem_object *obj;
  368. };
  369. extern enum radeon_tv_std
  370. radeon_combios_get_tv_info(struct radeon_device *rdev);
  371. extern enum radeon_tv_std
  372. radeon_atombios_get_tv_info(struct radeon_device *rdev);
  373. extern void radeon_connector_hotplug(struct drm_connector *connector);
  374. extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
  375. extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
  376. struct drm_display_mode *mode);
  377. extern void radeon_dp_set_link_config(struct drm_connector *connector,
  378. struct drm_display_mode *mode);
  379. extern void dp_link_train(struct drm_encoder *encoder,
  380. struct drm_connector *connector);
  381. extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
  382. extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
  383. extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action);
  384. extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
  385. int action, uint8_t lane_num,
  386. uint8_t lane_set);
  387. extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
  388. uint8_t write_byte, uint8_t *read_byte);
  389. extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
  390. struct radeon_i2c_bus_rec *rec,
  391. const char *name);
  392. extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
  393. struct radeon_i2c_bus_rec *rec,
  394. const char *name);
  395. extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
  396. extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
  397. u8 slave_addr,
  398. u8 addr,
  399. u8 *val);
  400. extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
  401. u8 slave_addr,
  402. u8 addr,
  403. u8 val);
  404. extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
  405. extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
  406. extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
  407. extern void radeon_compute_pll(struct radeon_pll *pll,
  408. uint64_t freq,
  409. uint32_t *dot_clock_p,
  410. uint32_t *fb_div_p,
  411. uint32_t *frac_fb_div_p,
  412. uint32_t *ref_div_p,
  413. uint32_t *post_div_p);
  414. extern void radeon_setup_encoder_clones(struct drm_device *dev);
  415. struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
  416. struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  417. struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  418. struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
  419. struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
  420. extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
  421. extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
  422. extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
  423. extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
  424. extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
  425. extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  426. struct drm_framebuffer *old_fb);
  427. extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
  428. struct drm_display_mode *mode,
  429. struct drm_display_mode *adjusted_mode,
  430. int x, int y,
  431. struct drm_framebuffer *old_fb);
  432. extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
  433. extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  434. struct drm_framebuffer *old_fb);
  435. extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
  436. struct drm_file *file_priv,
  437. uint32_t handle,
  438. uint32_t width,
  439. uint32_t height);
  440. extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
  441. int x, int y);
  442. extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
  443. extern struct edid *
  444. radeon_combios_get_hardcoded_edid(struct radeon_device *rdev);
  445. extern bool radeon_atom_get_clock_info(struct drm_device *dev);
  446. extern bool radeon_combios_get_clock_info(struct drm_device *dev);
  447. extern struct radeon_encoder_atom_dig *
  448. radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
  449. extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
  450. struct radeon_encoder_int_tmds *tmds);
  451. extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
  452. struct radeon_encoder_int_tmds *tmds);
  453. extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
  454. struct radeon_encoder_int_tmds *tmds);
  455. extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
  456. struct radeon_encoder_ext_tmds *tmds);
  457. extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
  458. struct radeon_encoder_ext_tmds *tmds);
  459. extern struct radeon_encoder_primary_dac *
  460. radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
  461. extern struct radeon_encoder_tv_dac *
  462. radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
  463. extern struct radeon_encoder_lvds *
  464. radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
  465. extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
  466. extern struct radeon_encoder_tv_dac *
  467. radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
  468. extern struct radeon_encoder_primary_dac *
  469. radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
  470. extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
  471. extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
  472. extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
  473. extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
  474. extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
  475. extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
  476. extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
  477. extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
  478. extern void
  479. radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  480. extern void
  481. radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  482. extern void
  483. radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  484. extern void
  485. radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  486. extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
  487. u16 blue, int regno);
  488. extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
  489. u16 *blue, int regno);
  490. void radeon_framebuffer_init(struct drm_device *dev,
  491. struct radeon_framebuffer *rfb,
  492. struct drm_mode_fb_cmd *mode_cmd,
  493. struct drm_gem_object *obj);
  494. int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
  495. bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
  496. bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
  497. void radeon_atombios_init_crtc(struct drm_device *dev,
  498. struct radeon_crtc *radeon_crtc);
  499. void radeon_legacy_init_crtc(struct drm_device *dev,
  500. struct radeon_crtc *radeon_crtc);
  501. void radeon_get_clock_info(struct drm_device *dev);
  502. extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
  503. extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
  504. void radeon_enc_destroy(struct drm_encoder *encoder);
  505. void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
  506. void radeon_combios_asic_init(struct drm_device *dev);
  507. extern int radeon_static_clocks_init(struct drm_device *dev);
  508. bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
  509. struct drm_display_mode *mode,
  510. struct drm_display_mode *adjusted_mode);
  511. void radeon_panel_mode_fixup(struct drm_encoder *encoder,
  512. struct drm_display_mode *adjusted_mode);
  513. void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
  514. /* legacy tv */
  515. void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
  516. uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
  517. uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
  518. void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
  519. uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
  520. uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
  521. void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
  522. uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
  523. uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
  524. void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
  525. struct drm_display_mode *mode,
  526. struct drm_display_mode *adjusted_mode);
  527. /* fbdev layer */
  528. int radeon_fbdev_init(struct radeon_device *rdev);
  529. void radeon_fbdev_fini(struct radeon_device *rdev);
  530. void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
  531. int radeon_fbdev_total_size(struct radeon_device *rdev);
  532. bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
  533. void radeon_fb_output_poll_changed(struct radeon_device *rdev);
  534. #endif