i915_drv.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619
  1. /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
  2. */
  3. /*
  4. *
  5. * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
  6. * All Rights Reserved.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a
  9. * copy of this software and associated documentation files (the
  10. * "Software"), to deal in the Software without restriction, including
  11. * without limitation the rights to use, copy, modify, merge, publish,
  12. * distribute, sub license, and/or sell copies of the Software, and to
  13. * permit persons to whom the Software is furnished to do so, subject to
  14. * the following conditions:
  15. *
  16. * The above copyright notice and this permission notice (including the
  17. * next paragraph) shall be included in all copies or substantial portions
  18. * of the Software.
  19. *
  20. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21. * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  24. * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25. * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26. * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27. *
  28. */
  29. #include <linux/device.h>
  30. #include "drmP.h"
  31. #include "drm.h"
  32. #include "i915_drm.h"
  33. #include "i915_drv.h"
  34. #include <linux/console.h>
  35. #include "drm_crtc_helper.h"
  36. static int i915_modeset = -1;
  37. module_param_named(modeset, i915_modeset, int, 0400);
  38. unsigned int i915_fbpercrtc = 0;
  39. module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
  40. unsigned int i915_powersave = 1;
  41. module_param_named(powersave, i915_powersave, int, 0400);
  42. unsigned int i915_lvds_downclock = 0;
  43. module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
  44. static struct drm_driver driver;
  45. extern int intel_agp_enabled;
  46. #define INTEL_VGA_DEVICE(id, info) { \
  47. .class = PCI_CLASS_DISPLAY_VGA << 8, \
  48. .class_mask = 0xffff00, \
  49. .vendor = 0x8086, \
  50. .device = id, \
  51. .subvendor = PCI_ANY_ID, \
  52. .subdevice = PCI_ANY_ID, \
  53. .driver_data = (unsigned long) info }
  54. static const struct intel_device_info intel_i830_info = {
  55. .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
  56. };
  57. static const struct intel_device_info intel_845g_info = {
  58. .is_i8xx = 1,
  59. };
  60. static const struct intel_device_info intel_i85x_info = {
  61. .is_i8xx = 1, .is_i85x = 1, .is_mobile = 1,
  62. .cursor_needs_physical = 1,
  63. };
  64. static const struct intel_device_info intel_i865g_info = {
  65. .is_i8xx = 1,
  66. };
  67. static const struct intel_device_info intel_i915g_info = {
  68. .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
  69. };
  70. static const struct intel_device_info intel_i915gm_info = {
  71. .is_i9xx = 1, .is_mobile = 1,
  72. .cursor_needs_physical = 1,
  73. };
  74. static const struct intel_device_info intel_i945g_info = {
  75. .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
  76. };
  77. static const struct intel_device_info intel_i945gm_info = {
  78. .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1,
  79. .has_hotplug = 1, .cursor_needs_physical = 1,
  80. };
  81. static const struct intel_device_info intel_i965g_info = {
  82. .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
  83. };
  84. static const struct intel_device_info intel_i965gm_info = {
  85. .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
  86. .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
  87. .has_hotplug = 1,
  88. };
  89. static const struct intel_device_info intel_g33_info = {
  90. .is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  91. .has_hotplug = 1,
  92. };
  93. static const struct intel_device_info intel_g45_info = {
  94. .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  95. .has_pipe_cxsr = 1,
  96. .has_hotplug = 1,
  97. };
  98. static const struct intel_device_info intel_gm45_info = {
  99. .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
  100. .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
  101. .has_pipe_cxsr = 1,
  102. .has_hotplug = 1,
  103. };
  104. static const struct intel_device_info intel_pineview_info = {
  105. .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
  106. .need_gfx_hws = 1,
  107. .has_hotplug = 1,
  108. };
  109. static const struct intel_device_info intel_ironlake_d_info = {
  110. .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  111. .has_pipe_cxsr = 1,
  112. .has_hotplug = 1,
  113. };
  114. static const struct intel_device_info intel_ironlake_m_info = {
  115. .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
  116. .need_gfx_hws = 1, .has_rc6 = 1,
  117. .has_hotplug = 1,
  118. };
  119. static const struct intel_device_info intel_sandybridge_d_info = {
  120. .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  121. .has_hotplug = 1, .is_gen6 = 1,
  122. };
  123. static const struct intel_device_info intel_sandybridge_m_info = {
  124. .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  125. .has_hotplug = 1, .is_gen6 = 1,
  126. };
  127. static const struct pci_device_id pciidlist[] = {
  128. INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
  129. INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
  130. INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
  131. INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
  132. INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
  133. INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
  134. INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
  135. INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
  136. INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
  137. INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
  138. INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
  139. INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
  140. INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
  141. INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
  142. INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
  143. INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
  144. INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
  145. INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
  146. INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
  147. INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
  148. INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
  149. INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
  150. INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
  151. INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
  152. INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
  153. INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
  154. INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
  155. INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
  156. INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
  157. INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
  158. INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
  159. INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
  160. {0, 0, 0}
  161. };
  162. #if defined(CONFIG_DRM_I915_KMS)
  163. MODULE_DEVICE_TABLE(pci, pciidlist);
  164. #endif
  165. #define INTEL_PCH_DEVICE_ID_MASK 0xff00
  166. #define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00
  167. void intel_detect_pch (struct drm_device *dev)
  168. {
  169. struct drm_i915_private *dev_priv = dev->dev_private;
  170. struct pci_dev *pch;
  171. /*
  172. * The reason to probe ISA bridge instead of Dev31:Fun0 is to
  173. * make graphics device passthrough work easy for VMM, that only
  174. * need to expose ISA bridge to let driver know the real hardware
  175. * underneath. This is a requirement from virtualization team.
  176. */
  177. pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
  178. if (pch) {
  179. if (pch->vendor == PCI_VENDOR_ID_INTEL) {
  180. int id;
  181. id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
  182. if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
  183. dev_priv->pch_type = PCH_CPT;
  184. DRM_DEBUG_KMS("Found CougarPoint PCH\n");
  185. }
  186. }
  187. pci_dev_put(pch);
  188. }
  189. }
  190. static int i915_drm_freeze(struct drm_device *dev)
  191. {
  192. struct drm_i915_private *dev_priv = dev->dev_private;
  193. pci_save_state(dev->pdev);
  194. /* If KMS is active, we do the leavevt stuff here */
  195. if (drm_core_check_feature(dev, DRIVER_MODESET)) {
  196. int error = i915_gem_idle(dev);
  197. if (error) {
  198. dev_err(&dev->pdev->dev,
  199. "GEM idle failed, resume might fail\n");
  200. return error;
  201. }
  202. drm_irq_uninstall(dev);
  203. }
  204. i915_save_state(dev);
  205. intel_opregion_free(dev, 1);
  206. /* Modeset on resume, not lid events */
  207. dev_priv->modeset_on_lid = 0;
  208. return 0;
  209. }
  210. int i915_suspend(struct drm_device *dev, pm_message_t state)
  211. {
  212. int error;
  213. if (!dev || !dev->dev_private) {
  214. DRM_ERROR("dev: %p\n", dev);
  215. DRM_ERROR("DRM not initialized, aborting suspend.\n");
  216. return -ENODEV;
  217. }
  218. if (state.event == PM_EVENT_PRETHAW)
  219. return 0;
  220. error = i915_drm_freeze(dev);
  221. if (error)
  222. return error;
  223. if (state.event == PM_EVENT_SUSPEND) {
  224. /* Shut down the device */
  225. pci_disable_device(dev->pdev);
  226. pci_set_power_state(dev->pdev, PCI_D3hot);
  227. }
  228. return 0;
  229. }
  230. static int i915_drm_thaw(struct drm_device *dev)
  231. {
  232. struct drm_i915_private *dev_priv = dev->dev_private;
  233. int error = 0;
  234. i915_restore_state(dev);
  235. intel_opregion_init(dev, 1);
  236. /* KMS EnterVT equivalent */
  237. if (drm_core_check_feature(dev, DRIVER_MODESET)) {
  238. mutex_lock(&dev->struct_mutex);
  239. dev_priv->mm.suspended = 0;
  240. error = i915_gem_init_ringbuffer(dev);
  241. mutex_unlock(&dev->struct_mutex);
  242. drm_irq_install(dev);
  243. /* Resume the modeset for every activated CRTC */
  244. drm_helper_resume_force_mode(dev);
  245. }
  246. dev_priv->modeset_on_lid = 0;
  247. return error;
  248. }
  249. int i915_resume(struct drm_device *dev)
  250. {
  251. if (pci_enable_device(dev->pdev))
  252. return -EIO;
  253. pci_set_master(dev->pdev);
  254. return i915_drm_thaw(dev);
  255. }
  256. /**
  257. * i965_reset - reset chip after a hang
  258. * @dev: drm device to reset
  259. * @flags: reset domains
  260. *
  261. * Reset the chip. Useful if a hang is detected. Returns zero on successful
  262. * reset or otherwise an error code.
  263. *
  264. * Procedure is fairly simple:
  265. * - reset the chip using the reset reg
  266. * - re-init context state
  267. * - re-init hardware status page
  268. * - re-init ring buffer
  269. * - re-init interrupt state
  270. * - re-init display
  271. */
  272. int i965_reset(struct drm_device *dev, u8 flags)
  273. {
  274. drm_i915_private_t *dev_priv = dev->dev_private;
  275. unsigned long timeout;
  276. u8 gdrst;
  277. /*
  278. * We really should only reset the display subsystem if we actually
  279. * need to
  280. */
  281. bool need_display = true;
  282. mutex_lock(&dev->struct_mutex);
  283. /*
  284. * Clear request list
  285. */
  286. i915_gem_retire_requests(dev, &dev_priv->render_ring);
  287. if (need_display)
  288. i915_save_display(dev);
  289. if (IS_I965G(dev) || IS_G4X(dev)) {
  290. /*
  291. * Set the domains we want to reset, then the reset bit (bit 0).
  292. * Clear the reset bit after a while and wait for hardware status
  293. * bit (bit 1) to be set
  294. */
  295. pci_read_config_byte(dev->pdev, GDRST, &gdrst);
  296. pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
  297. udelay(50);
  298. pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
  299. /* ...we don't want to loop forever though, 500ms should be plenty */
  300. timeout = jiffies + msecs_to_jiffies(500);
  301. do {
  302. udelay(100);
  303. pci_read_config_byte(dev->pdev, GDRST, &gdrst);
  304. } while ((gdrst & 0x1) && time_after(timeout, jiffies));
  305. if (gdrst & 0x1) {
  306. WARN(true, "i915: Failed to reset chip\n");
  307. mutex_unlock(&dev->struct_mutex);
  308. return -EIO;
  309. }
  310. } else {
  311. DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
  312. mutex_unlock(&dev->struct_mutex);
  313. return -ENODEV;
  314. }
  315. /* Ok, now get things going again... */
  316. /*
  317. * Everything depends on having the GTT running, so we need to start
  318. * there. Fortunately we don't need to do this unless we reset the
  319. * chip at a PCI level.
  320. *
  321. * Next we need to restore the context, but we don't use those
  322. * yet either...
  323. *
  324. * Ring buffer needs to be re-initialized in the KMS case, or if X
  325. * was running at the time of the reset (i.e. we weren't VT
  326. * switched away).
  327. */
  328. if (drm_core_check_feature(dev, DRIVER_MODESET) ||
  329. !dev_priv->mm.suspended) {
  330. struct intel_ring_buffer *ring = &dev_priv->render_ring;
  331. dev_priv->mm.suspended = 0;
  332. ring->init(dev, ring);
  333. mutex_unlock(&dev->struct_mutex);
  334. drm_irq_uninstall(dev);
  335. drm_irq_install(dev);
  336. mutex_lock(&dev->struct_mutex);
  337. }
  338. /*
  339. * Display needs restore too...
  340. */
  341. if (need_display)
  342. i915_restore_display(dev);
  343. mutex_unlock(&dev->struct_mutex);
  344. return 0;
  345. }
  346. static int __devinit
  347. i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  348. {
  349. return drm_get_dev(pdev, ent, &driver);
  350. }
  351. static void
  352. i915_pci_remove(struct pci_dev *pdev)
  353. {
  354. struct drm_device *dev = pci_get_drvdata(pdev);
  355. drm_put_dev(dev);
  356. }
  357. static int i915_pm_suspend(struct device *dev)
  358. {
  359. struct pci_dev *pdev = to_pci_dev(dev);
  360. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  361. int error;
  362. if (!drm_dev || !drm_dev->dev_private) {
  363. dev_err(dev, "DRM not initialized, aborting suspend.\n");
  364. return -ENODEV;
  365. }
  366. error = i915_drm_freeze(drm_dev);
  367. if (error)
  368. return error;
  369. pci_disable_device(pdev);
  370. pci_set_power_state(pdev, PCI_D3hot);
  371. return 0;
  372. }
  373. static int i915_pm_resume(struct device *dev)
  374. {
  375. struct pci_dev *pdev = to_pci_dev(dev);
  376. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  377. return i915_resume(drm_dev);
  378. }
  379. static int i915_pm_freeze(struct device *dev)
  380. {
  381. struct pci_dev *pdev = to_pci_dev(dev);
  382. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  383. if (!drm_dev || !drm_dev->dev_private) {
  384. dev_err(dev, "DRM not initialized, aborting suspend.\n");
  385. return -ENODEV;
  386. }
  387. return i915_drm_freeze(drm_dev);
  388. }
  389. static int i915_pm_thaw(struct device *dev)
  390. {
  391. struct pci_dev *pdev = to_pci_dev(dev);
  392. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  393. return i915_drm_thaw(drm_dev);
  394. }
  395. static int i915_pm_poweroff(struct device *dev)
  396. {
  397. struct pci_dev *pdev = to_pci_dev(dev);
  398. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  399. return i915_drm_freeze(drm_dev);
  400. }
  401. const struct dev_pm_ops i915_pm_ops = {
  402. .suspend = i915_pm_suspend,
  403. .resume = i915_pm_resume,
  404. .freeze = i915_pm_freeze,
  405. .thaw = i915_pm_thaw,
  406. .poweroff = i915_pm_poweroff,
  407. .restore = i915_pm_resume,
  408. };
  409. static struct vm_operations_struct i915_gem_vm_ops = {
  410. .fault = i915_gem_fault,
  411. .open = drm_gem_vm_open,
  412. .close = drm_gem_vm_close,
  413. };
  414. static struct drm_driver driver = {
  415. /* don't use mtrr's here, the Xserver or user space app should
  416. * deal with them for intel hardware.
  417. */
  418. .driver_features =
  419. DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
  420. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
  421. .load = i915_driver_load,
  422. .unload = i915_driver_unload,
  423. .open = i915_driver_open,
  424. .lastclose = i915_driver_lastclose,
  425. .preclose = i915_driver_preclose,
  426. .postclose = i915_driver_postclose,
  427. /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
  428. .suspend = i915_suspend,
  429. .resume = i915_resume,
  430. .device_is_agp = i915_driver_device_is_agp,
  431. .enable_vblank = i915_enable_vblank,
  432. .disable_vblank = i915_disable_vblank,
  433. .irq_preinstall = i915_driver_irq_preinstall,
  434. .irq_postinstall = i915_driver_irq_postinstall,
  435. .irq_uninstall = i915_driver_irq_uninstall,
  436. .irq_handler = i915_driver_irq_handler,
  437. .reclaim_buffers = drm_core_reclaim_buffers,
  438. .get_map_ofs = drm_core_get_map_ofs,
  439. .get_reg_ofs = drm_core_get_reg_ofs,
  440. .master_create = i915_master_create,
  441. .master_destroy = i915_master_destroy,
  442. #if defined(CONFIG_DEBUG_FS)
  443. .debugfs_init = i915_debugfs_init,
  444. .debugfs_cleanup = i915_debugfs_cleanup,
  445. #endif
  446. .gem_init_object = i915_gem_init_object,
  447. .gem_free_object = i915_gem_free_object,
  448. .gem_vm_ops = &i915_gem_vm_ops,
  449. .ioctls = i915_ioctls,
  450. .fops = {
  451. .owner = THIS_MODULE,
  452. .open = drm_open,
  453. .release = drm_release,
  454. .unlocked_ioctl = drm_ioctl,
  455. .mmap = drm_gem_mmap,
  456. .poll = drm_poll,
  457. .fasync = drm_fasync,
  458. .read = drm_read,
  459. #ifdef CONFIG_COMPAT
  460. .compat_ioctl = i915_compat_ioctl,
  461. #endif
  462. },
  463. .pci_driver = {
  464. .name = DRIVER_NAME,
  465. .id_table = pciidlist,
  466. .probe = i915_pci_probe,
  467. .remove = i915_pci_remove,
  468. .driver.pm = &i915_pm_ops,
  469. },
  470. .name = DRIVER_NAME,
  471. .desc = DRIVER_DESC,
  472. .date = DRIVER_DATE,
  473. .major = DRIVER_MAJOR,
  474. .minor = DRIVER_MINOR,
  475. .patchlevel = DRIVER_PATCHLEVEL,
  476. };
  477. static int __init i915_init(void)
  478. {
  479. if (!intel_agp_enabled) {
  480. DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
  481. return -ENODEV;
  482. }
  483. driver.num_ioctls = i915_max_ioctl;
  484. i915_gem_shrinker_init();
  485. /*
  486. * If CONFIG_DRM_I915_KMS is set, default to KMS unless
  487. * explicitly disabled with the module pararmeter.
  488. *
  489. * Otherwise, just follow the parameter (defaulting to off).
  490. *
  491. * Allow optional vga_text_mode_force boot option to override
  492. * the default behavior.
  493. */
  494. #if defined(CONFIG_DRM_I915_KMS)
  495. if (i915_modeset != 0)
  496. driver.driver_features |= DRIVER_MODESET;
  497. #endif
  498. if (i915_modeset == 1)
  499. driver.driver_features |= DRIVER_MODESET;
  500. #ifdef CONFIG_VGA_CONSOLE
  501. if (vgacon_text_force() && i915_modeset == -1)
  502. driver.driver_features &= ~DRIVER_MODESET;
  503. #endif
  504. if (!(driver.driver_features & DRIVER_MODESET)) {
  505. driver.suspend = i915_suspend;
  506. driver.resume = i915_resume;
  507. }
  508. return drm_init(&driver);
  509. }
  510. static void __exit i915_exit(void)
  511. {
  512. i915_gem_shrinker_exit();
  513. drm_exit(&driver);
  514. }
  515. module_init(i915_init);
  516. module_exit(i915_exit);
  517. MODULE_AUTHOR(DRIVER_AUTHOR);
  518. MODULE_DESCRIPTION(DRIVER_DESC);
  519. MODULE_LICENSE("GPL and additional rights");