ep8248e.c 8.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336
  1. /*
  2. * Embedded Planet EP8248E support
  3. *
  4. * Copyright 2007 Freescale Semiconductor, Inc.
  5. * Author: Scott Wood <scottwood@freescale.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/fsl_devices.h>
  15. #include <linux/mdio-bitbang.h>
  16. #include <linux/of_mdio.h>
  17. #include <linux/slab.h>
  18. #include <linux/of_platform.h>
  19. #include <asm/io.h>
  20. #include <asm/cpm2.h>
  21. #include <asm/udbg.h>
  22. #include <asm/machdep.h>
  23. #include <asm/time.h>
  24. #include <asm/mpc8260.h>
  25. #include <asm/prom.h>
  26. #include <sysdev/fsl_soc.h>
  27. #include <sysdev/cpm2_pic.h>
  28. #include "pq2.h"
  29. static u8 __iomem *ep8248e_bcsr;
  30. static struct device_node *ep8248e_bcsr_node;
  31. #define BCSR7_SCC2_ENABLE 0x10
  32. #define BCSR8_PHY1_ENABLE 0x80
  33. #define BCSR8_PHY1_POWER 0x40
  34. #define BCSR8_PHY2_ENABLE 0x20
  35. #define BCSR8_PHY2_POWER 0x10
  36. #define BCSR8_MDIO_READ 0x04
  37. #define BCSR8_MDIO_CLOCK 0x02
  38. #define BCSR8_MDIO_DATA 0x01
  39. #define BCSR9_USB_ENABLE 0x80
  40. #define BCSR9_USB_POWER 0x40
  41. #define BCSR9_USB_HOST 0x20
  42. #define BCSR9_USB_FULL_SPEED_TARGET 0x10
  43. static void __init ep8248e_pic_init(void)
  44. {
  45. struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
  46. if (!np) {
  47. printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
  48. return;
  49. }
  50. cpm2_pic_init(np);
  51. of_node_put(np);
  52. }
  53. static void ep8248e_set_mdc(struct mdiobb_ctrl *ctrl, int level)
  54. {
  55. if (level)
  56. setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK);
  57. else
  58. clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK);
  59. /* Read back to flush the write. */
  60. in_8(&ep8248e_bcsr[8]);
  61. }
  62. static void ep8248e_set_mdio_dir(struct mdiobb_ctrl *ctrl, int output)
  63. {
  64. if (output)
  65. clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ);
  66. else
  67. setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ);
  68. /* Read back to flush the write. */
  69. in_8(&ep8248e_bcsr[8]);
  70. }
  71. static void ep8248e_set_mdio_data(struct mdiobb_ctrl *ctrl, int data)
  72. {
  73. if (data)
  74. setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA);
  75. else
  76. clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA);
  77. /* Read back to flush the write. */
  78. in_8(&ep8248e_bcsr[8]);
  79. }
  80. static int ep8248e_get_mdio_data(struct mdiobb_ctrl *ctrl)
  81. {
  82. return in_8(&ep8248e_bcsr[8]) & BCSR8_MDIO_DATA;
  83. }
  84. static const struct mdiobb_ops ep8248e_mdio_ops = {
  85. .set_mdc = ep8248e_set_mdc,
  86. .set_mdio_dir = ep8248e_set_mdio_dir,
  87. .set_mdio_data = ep8248e_set_mdio_data,
  88. .get_mdio_data = ep8248e_get_mdio_data,
  89. .owner = THIS_MODULE,
  90. };
  91. static struct mdiobb_ctrl ep8248e_mdio_ctrl = {
  92. .ops = &ep8248e_mdio_ops,
  93. };
  94. static int __devinit ep8248e_mdio_probe(struct of_device *ofdev,
  95. const struct of_device_id *match)
  96. {
  97. struct mii_bus *bus;
  98. struct resource res;
  99. struct device_node *node;
  100. int ret;
  101. node = of_get_parent(ofdev->dev.of_node);
  102. of_node_put(node);
  103. if (node != ep8248e_bcsr_node)
  104. return -ENODEV;
  105. ret = of_address_to_resource(ofdev->dev.of_node, 0, &res);
  106. if (ret)
  107. return ret;
  108. bus = alloc_mdio_bitbang(&ep8248e_mdio_ctrl);
  109. if (!bus)
  110. return -ENOMEM;
  111. bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
  112. if (bus->irq == NULL) {
  113. ret = -ENOMEM;
  114. goto err_free_bus;
  115. }
  116. bus->name = "ep8248e-mdio-bitbang";
  117. bus->parent = &ofdev->dev;
  118. snprintf(bus->id, MII_BUS_ID_SIZE, "%x", res.start);
  119. ret = of_mdiobus_register(bus, ofdev->dev.of_node);
  120. if (ret)
  121. goto err_free_irq;
  122. return 0;
  123. err_free_irq:
  124. kfree(bus->irq);
  125. err_free_bus:
  126. free_mdio_bitbang(bus);
  127. return ret;
  128. }
  129. static int ep8248e_mdio_remove(struct of_device *ofdev)
  130. {
  131. BUG();
  132. return 0;
  133. }
  134. static const struct of_device_id ep8248e_mdio_match[] = {
  135. {
  136. .compatible = "fsl,ep8248e-mdio-bitbang",
  137. },
  138. {},
  139. };
  140. static struct of_platform_driver ep8248e_mdio_driver = {
  141. .driver = {
  142. .name = "ep8248e-mdio-bitbang",
  143. .owner = THIS_MODULE,
  144. .of_match_table = ep8248e_mdio_match,
  145. },
  146. .probe = ep8248e_mdio_probe,
  147. .remove = ep8248e_mdio_remove,
  148. };
  149. struct cpm_pin {
  150. int port, pin, flags;
  151. };
  152. static __initdata struct cpm_pin ep8248e_pins[] = {
  153. /* SMC1 */
  154. {2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  155. {2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  156. /* SCC1 */
  157. {2, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  158. {2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  159. {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  160. {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  161. {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  162. /* FCC1 */
  163. {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  164. {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  165. {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  166. {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  167. {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  168. {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  169. {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  170. {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  171. {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  172. {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  173. {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  174. {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  175. {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  176. {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  177. {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  178. {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  179. /* FCC2 */
  180. {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  181. {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  182. {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  183. {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  184. {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  185. {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  186. {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  187. {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  188. {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  189. {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  190. {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  191. {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  192. {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  193. {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  194. {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  195. {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  196. /* I2C */
  197. {4, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  198. {4, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  199. /* USB */
  200. {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  201. {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  202. {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  203. {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  204. {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  205. {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  206. {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  207. };
  208. static void __init init_ioports(void)
  209. {
  210. int i;
  211. for (i = 0; i < ARRAY_SIZE(ep8248e_pins); i++) {
  212. const struct cpm_pin *pin = &ep8248e_pins[i];
  213. cpm2_set_pin(pin->port, pin->pin, pin->flags);
  214. }
  215. cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7);
  216. cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
  217. cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
  218. cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_TX); /* USB */
  219. cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
  220. cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
  221. cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
  222. cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
  223. }
  224. static void __init ep8248e_setup_arch(void)
  225. {
  226. if (ppc_md.progress)
  227. ppc_md.progress("ep8248e_setup_arch()", 0);
  228. cpm2_reset();
  229. /* When this is set, snooping CPM DMA from RAM causes
  230. * machine checks. See erratum SIU18.
  231. */
  232. clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
  233. ep8248e_bcsr_node =
  234. of_find_compatible_node(NULL, NULL, "fsl,ep8248e-bcsr");
  235. if (!ep8248e_bcsr_node) {
  236. printk(KERN_ERR "No bcsr in device tree\n");
  237. return;
  238. }
  239. ep8248e_bcsr = of_iomap(ep8248e_bcsr_node, 0);
  240. if (!ep8248e_bcsr) {
  241. printk(KERN_ERR "Cannot map BCSR registers\n");
  242. of_node_put(ep8248e_bcsr_node);
  243. ep8248e_bcsr_node = NULL;
  244. return;
  245. }
  246. setbits8(&ep8248e_bcsr[7], BCSR7_SCC2_ENABLE);
  247. setbits8(&ep8248e_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER |
  248. BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER);
  249. init_ioports();
  250. if (ppc_md.progress)
  251. ppc_md.progress("ep8248e_setup_arch(), finish", 0);
  252. }
  253. static __initdata struct of_device_id of_bus_ids[] = {
  254. { .compatible = "simple-bus", },
  255. { .compatible = "fsl,ep8248e-bcsr", },
  256. {},
  257. };
  258. static int __init declare_of_platform_devices(void)
  259. {
  260. of_platform_bus_probe(NULL, of_bus_ids, NULL);
  261. of_register_platform_driver(&ep8248e_mdio_driver);
  262. return 0;
  263. }
  264. machine_device_initcall(ep8248e, declare_of_platform_devices);
  265. /*
  266. * Called very early, device-tree isn't unflattened
  267. */
  268. static int __init ep8248e_probe(void)
  269. {
  270. unsigned long root = of_get_flat_dt_root();
  271. return of_flat_dt_is_compatible(root, "fsl,ep8248e");
  272. }
  273. define_machine(ep8248e)
  274. {
  275. .name = "Embedded Planet EP8248E",
  276. .probe = ep8248e_probe,
  277. .setup_arch = ep8248e_setup_arch,
  278. .init_IRQ = ep8248e_pic_init,
  279. .get_irq = cpm2_get_irq,
  280. .calibrate_decr = generic_calibrate_decr,
  281. .restart = pq2_restart,
  282. .progress = udbg_progress,
  283. };