setup-common.c 17 KB

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  1. /*
  2. * Common boot and setup code for both 32-bit and 64-bit.
  3. * Extracted from arch/powerpc/kernel/setup_64.c.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/module.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/ioport.h>
  24. #include <linux/console.h>
  25. #include <linux/screen_info.h>
  26. #include <linux/root_dev.h>
  27. #include <linux/notifier.h>
  28. #include <linux/cpu.h>
  29. #include <linux/unistd.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_8250.h>
  32. #include <linux/debugfs.h>
  33. #include <linux/percpu.h>
  34. #include <linux/memblock.h>
  35. #include <linux/of_platform.h>
  36. #include <asm/io.h>
  37. #include <asm/paca.h>
  38. #include <asm/prom.h>
  39. #include <asm/processor.h>
  40. #include <asm/vdso_datapage.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/smp.h>
  43. #include <asm/elf.h>
  44. #include <asm/machdep.h>
  45. #include <asm/time.h>
  46. #include <asm/cputable.h>
  47. #include <asm/sections.h>
  48. #include <asm/firmware.h>
  49. #include <asm/btext.h>
  50. #include <asm/nvram.h>
  51. #include <asm/setup.h>
  52. #include <asm/system.h>
  53. #include <asm/rtas.h>
  54. #include <asm/iommu.h>
  55. #include <asm/serial.h>
  56. #include <asm/cache.h>
  57. #include <asm/page.h>
  58. #include <asm/mmu.h>
  59. #include <asm/xmon.h>
  60. #include <asm/cputhreads.h>
  61. #include <mm/mmu_decl.h>
  62. #include "setup.h"
  63. #ifdef DEBUG
  64. #include <asm/udbg.h>
  65. #define DBG(fmt...) udbg_printf(fmt)
  66. #else
  67. #define DBG(fmt...)
  68. #endif
  69. /* The main machine-dep calls structure
  70. */
  71. struct machdep_calls ppc_md;
  72. EXPORT_SYMBOL(ppc_md);
  73. struct machdep_calls *machine_id;
  74. EXPORT_SYMBOL(machine_id);
  75. unsigned long klimit = (unsigned long) _end;
  76. char cmd_line[COMMAND_LINE_SIZE];
  77. /*
  78. * This still seems to be needed... -- paulus
  79. */
  80. struct screen_info screen_info = {
  81. .orig_x = 0,
  82. .orig_y = 25,
  83. .orig_video_cols = 80,
  84. .orig_video_lines = 25,
  85. .orig_video_isVGA = 1,
  86. .orig_video_points = 16
  87. };
  88. #ifdef __DO_IRQ_CANON
  89. /* XXX should go elsewhere eventually */
  90. int ppc_do_canonicalize_irqs;
  91. EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
  92. #endif
  93. /* also used by kexec */
  94. void machine_shutdown(void)
  95. {
  96. if (ppc_md.machine_shutdown)
  97. ppc_md.machine_shutdown();
  98. }
  99. void machine_restart(char *cmd)
  100. {
  101. machine_shutdown();
  102. if (ppc_md.restart)
  103. ppc_md.restart(cmd);
  104. #ifdef CONFIG_SMP
  105. smp_send_stop();
  106. #endif
  107. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  108. local_irq_disable();
  109. while (1) ;
  110. }
  111. void machine_power_off(void)
  112. {
  113. machine_shutdown();
  114. if (ppc_md.power_off)
  115. ppc_md.power_off();
  116. #ifdef CONFIG_SMP
  117. smp_send_stop();
  118. #endif
  119. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  120. local_irq_disable();
  121. while (1) ;
  122. }
  123. /* Used by the G5 thermal driver */
  124. EXPORT_SYMBOL_GPL(machine_power_off);
  125. void (*pm_power_off)(void) = machine_power_off;
  126. EXPORT_SYMBOL_GPL(pm_power_off);
  127. void machine_halt(void)
  128. {
  129. machine_shutdown();
  130. if (ppc_md.halt)
  131. ppc_md.halt();
  132. #ifdef CONFIG_SMP
  133. smp_send_stop();
  134. #endif
  135. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  136. local_irq_disable();
  137. while (1) ;
  138. }
  139. #ifdef CONFIG_TAU
  140. extern u32 cpu_temp(unsigned long cpu);
  141. extern u32 cpu_temp_both(unsigned long cpu);
  142. #endif /* CONFIG_TAU */
  143. #ifdef CONFIG_SMP
  144. DEFINE_PER_CPU(unsigned int, cpu_pvr);
  145. #endif
  146. static void show_cpuinfo_summary(struct seq_file *m)
  147. {
  148. struct device_node *root;
  149. const char *model = NULL;
  150. #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
  151. unsigned long bogosum = 0;
  152. int i;
  153. for_each_online_cpu(i)
  154. bogosum += loops_per_jiffy;
  155. seq_printf(m, "total bogomips\t: %lu.%02lu\n",
  156. bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
  157. #endif /* CONFIG_SMP && CONFIG_PPC32 */
  158. seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
  159. if (ppc_md.name)
  160. seq_printf(m, "platform\t: %s\n", ppc_md.name);
  161. root = of_find_node_by_path("/");
  162. if (root)
  163. model = of_get_property(root, "model", NULL);
  164. if (model)
  165. seq_printf(m, "model\t\t: %s\n", model);
  166. of_node_put(root);
  167. if (ppc_md.show_cpuinfo != NULL)
  168. ppc_md.show_cpuinfo(m);
  169. #ifdef CONFIG_PPC32
  170. /* Display the amount of memory */
  171. seq_printf(m, "Memory\t\t: %d MB\n",
  172. (unsigned int)(total_memory / (1024 * 1024)));
  173. #endif
  174. }
  175. static int show_cpuinfo(struct seq_file *m, void *v)
  176. {
  177. unsigned long cpu_id = (unsigned long)v - 1;
  178. unsigned int pvr;
  179. unsigned short maj;
  180. unsigned short min;
  181. /* We only show online cpus: disable preempt (overzealous, I
  182. * knew) to prevent cpu going down. */
  183. preempt_disable();
  184. if (!cpu_online(cpu_id)) {
  185. preempt_enable();
  186. return 0;
  187. }
  188. #ifdef CONFIG_SMP
  189. pvr = per_cpu(cpu_pvr, cpu_id);
  190. #else
  191. pvr = mfspr(SPRN_PVR);
  192. #endif
  193. maj = (pvr >> 8) & 0xFF;
  194. min = pvr & 0xFF;
  195. seq_printf(m, "processor\t: %lu\n", cpu_id);
  196. seq_printf(m, "cpu\t\t: ");
  197. if (cur_cpu_spec->pvr_mask)
  198. seq_printf(m, "%s", cur_cpu_spec->cpu_name);
  199. else
  200. seq_printf(m, "unknown (%08x)", pvr);
  201. #ifdef CONFIG_ALTIVEC
  202. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  203. seq_printf(m, ", altivec supported");
  204. #endif /* CONFIG_ALTIVEC */
  205. seq_printf(m, "\n");
  206. #ifdef CONFIG_TAU
  207. if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
  208. #ifdef CONFIG_TAU_AVERAGE
  209. /* more straightforward, but potentially misleading */
  210. seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
  211. cpu_temp(cpu_id));
  212. #else
  213. /* show the actual temp sensor range */
  214. u32 temp;
  215. temp = cpu_temp_both(cpu_id);
  216. seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
  217. temp & 0xff, temp >> 16);
  218. #endif
  219. }
  220. #endif /* CONFIG_TAU */
  221. /*
  222. * Assume here that all clock rates are the same in a
  223. * smp system. -- Cort
  224. */
  225. if (ppc_proc_freq)
  226. seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
  227. ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
  228. if (ppc_md.show_percpuinfo != NULL)
  229. ppc_md.show_percpuinfo(m, cpu_id);
  230. /* If we are a Freescale core do a simple check so
  231. * we dont have to keep adding cases in the future */
  232. if (PVR_VER(pvr) & 0x8000) {
  233. switch (PVR_VER(pvr)) {
  234. case 0x8000: /* 7441/7450/7451, Voyager */
  235. case 0x8001: /* 7445/7455, Apollo 6 */
  236. case 0x8002: /* 7447/7457, Apollo 7 */
  237. case 0x8003: /* 7447A, Apollo 7 PM */
  238. case 0x8004: /* 7448, Apollo 8 */
  239. case 0x800c: /* 7410, Nitro */
  240. maj = ((pvr >> 8) & 0xF);
  241. min = PVR_MIN(pvr);
  242. break;
  243. default: /* e500/book-e */
  244. maj = PVR_MAJ(pvr);
  245. min = PVR_MIN(pvr);
  246. break;
  247. }
  248. } else {
  249. switch (PVR_VER(pvr)) {
  250. case 0x0020: /* 403 family */
  251. maj = PVR_MAJ(pvr) + 1;
  252. min = PVR_MIN(pvr);
  253. break;
  254. case 0x1008: /* 740P/750P ?? */
  255. maj = ((pvr >> 8) & 0xFF) - 1;
  256. min = pvr & 0xFF;
  257. break;
  258. default:
  259. maj = (pvr >> 8) & 0xFF;
  260. min = pvr & 0xFF;
  261. break;
  262. }
  263. }
  264. seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
  265. maj, min, PVR_VER(pvr), PVR_REV(pvr));
  266. #ifdef CONFIG_PPC32
  267. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  268. loops_per_jiffy / (500000/HZ),
  269. (loops_per_jiffy / (5000/HZ)) % 100);
  270. #endif
  271. #ifdef CONFIG_SMP
  272. seq_printf(m, "\n");
  273. #endif
  274. preempt_enable();
  275. /* If this is the last cpu, print the summary */
  276. if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
  277. show_cpuinfo_summary(m);
  278. return 0;
  279. }
  280. static void *c_start(struct seq_file *m, loff_t *pos)
  281. {
  282. if (*pos == 0) /* just in case, cpu 0 is not the first */
  283. *pos = cpumask_first(cpu_online_mask);
  284. else
  285. *pos = cpumask_next(*pos - 1, cpu_online_mask);
  286. if ((*pos) < nr_cpu_ids)
  287. return (void *)(unsigned long)(*pos + 1);
  288. return NULL;
  289. }
  290. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  291. {
  292. (*pos)++;
  293. return c_start(m, pos);
  294. }
  295. static void c_stop(struct seq_file *m, void *v)
  296. {
  297. }
  298. const struct seq_operations cpuinfo_op = {
  299. .start =c_start,
  300. .next = c_next,
  301. .stop = c_stop,
  302. .show = show_cpuinfo,
  303. };
  304. void __init check_for_initrd(void)
  305. {
  306. #ifdef CONFIG_BLK_DEV_INITRD
  307. DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
  308. initrd_start, initrd_end);
  309. /* If we were passed an initrd, set the ROOT_DEV properly if the values
  310. * look sensible. If not, clear initrd reference.
  311. */
  312. if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
  313. initrd_end > initrd_start)
  314. ROOT_DEV = Root_RAM0;
  315. else
  316. initrd_start = initrd_end = 0;
  317. if (initrd_start)
  318. printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
  319. DBG(" <- check_for_initrd()\n");
  320. #endif /* CONFIG_BLK_DEV_INITRD */
  321. }
  322. #ifdef CONFIG_SMP
  323. int threads_per_core, threads_shift;
  324. cpumask_t threads_core_mask;
  325. static void __init cpu_init_thread_core_maps(int tpc)
  326. {
  327. int i;
  328. threads_per_core = tpc;
  329. threads_core_mask = CPU_MASK_NONE;
  330. /* This implementation only supports power of 2 number of threads
  331. * for simplicity and performance
  332. */
  333. threads_shift = ilog2(tpc);
  334. BUG_ON(tpc != (1 << threads_shift));
  335. for (i = 0; i < tpc; i++)
  336. cpu_set(i, threads_core_mask);
  337. printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
  338. tpc, tpc > 1 ? "s" : "");
  339. printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
  340. }
  341. /**
  342. * setup_cpu_maps - initialize the following cpu maps:
  343. * cpu_possible_mask
  344. * cpu_present_mask
  345. *
  346. * Having the possible map set up early allows us to restrict allocations
  347. * of things like irqstacks to num_possible_cpus() rather than NR_CPUS.
  348. *
  349. * We do not initialize the online map here; cpus set their own bits in
  350. * cpu_online_mask as they come up.
  351. *
  352. * This function is valid only for Open Firmware systems. finish_device_tree
  353. * must be called before using this.
  354. *
  355. * While we're here, we may as well set the "physical" cpu ids in the paca.
  356. *
  357. * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
  358. */
  359. void __init smp_setup_cpu_maps(void)
  360. {
  361. struct device_node *dn = NULL;
  362. int cpu = 0;
  363. int nthreads = 1;
  364. DBG("smp_setup_cpu_maps()\n");
  365. while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < NR_CPUS) {
  366. const int *intserv;
  367. int j, len;
  368. DBG(" * %s...\n", dn->full_name);
  369. intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
  370. &len);
  371. if (intserv) {
  372. nthreads = len / sizeof(int);
  373. DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
  374. nthreads);
  375. } else {
  376. DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
  377. intserv = of_get_property(dn, "reg", NULL);
  378. if (!intserv)
  379. intserv = &cpu; /* assume logical == phys */
  380. }
  381. for (j = 0; j < nthreads && cpu < NR_CPUS; j++) {
  382. DBG(" thread %d -> cpu %d (hard id %d)\n",
  383. j, cpu, intserv[j]);
  384. set_cpu_present(cpu, true);
  385. set_hard_smp_processor_id(cpu, intserv[j]);
  386. set_cpu_possible(cpu, true);
  387. cpu++;
  388. }
  389. }
  390. /* If no SMT supported, nthreads is forced to 1 */
  391. if (!cpu_has_feature(CPU_FTR_SMT)) {
  392. DBG(" SMT disabled ! nthreads forced to 1\n");
  393. nthreads = 1;
  394. }
  395. #ifdef CONFIG_PPC64
  396. /*
  397. * On pSeries LPAR, we need to know how many cpus
  398. * could possibly be added to this partition.
  399. */
  400. if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
  401. (dn = of_find_node_by_path("/rtas"))) {
  402. int num_addr_cell, num_size_cell, maxcpus;
  403. const unsigned int *ireg;
  404. num_addr_cell = of_n_addr_cells(dn);
  405. num_size_cell = of_n_size_cells(dn);
  406. ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
  407. if (!ireg)
  408. goto out;
  409. maxcpus = ireg[num_addr_cell + num_size_cell];
  410. /* Double maxcpus for processors which have SMT capability */
  411. if (cpu_has_feature(CPU_FTR_SMT))
  412. maxcpus *= nthreads;
  413. if (maxcpus > NR_CPUS) {
  414. printk(KERN_WARNING
  415. "Partition configured for %d cpus, "
  416. "operating system maximum is %d.\n",
  417. maxcpus, NR_CPUS);
  418. maxcpus = NR_CPUS;
  419. } else
  420. printk(KERN_INFO "Partition configured for %d cpus.\n",
  421. maxcpus);
  422. for (cpu = 0; cpu < maxcpus; cpu++)
  423. set_cpu_possible(cpu, true);
  424. out:
  425. of_node_put(dn);
  426. }
  427. vdso_data->processorCount = num_present_cpus();
  428. #endif /* CONFIG_PPC64 */
  429. /* Initialize CPU <=> thread mapping/
  430. *
  431. * WARNING: We assume that the number of threads is the same for
  432. * every CPU in the system. If that is not the case, then some code
  433. * here will have to be reworked
  434. */
  435. cpu_init_thread_core_maps(nthreads);
  436. free_unused_pacas();
  437. }
  438. #endif /* CONFIG_SMP */
  439. #ifdef CONFIG_PCSPKR_PLATFORM
  440. static __init int add_pcspkr(void)
  441. {
  442. struct device_node *np;
  443. struct platform_device *pd;
  444. int ret;
  445. np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
  446. of_node_put(np);
  447. if (!np)
  448. return -ENODEV;
  449. pd = platform_device_alloc("pcspkr", -1);
  450. if (!pd)
  451. return -ENOMEM;
  452. ret = platform_device_add(pd);
  453. if (ret)
  454. platform_device_put(pd);
  455. return ret;
  456. }
  457. device_initcall(add_pcspkr);
  458. #endif /* CONFIG_PCSPKR_PLATFORM */
  459. void probe_machine(void)
  460. {
  461. extern struct machdep_calls __machine_desc_start;
  462. extern struct machdep_calls __machine_desc_end;
  463. /*
  464. * Iterate all ppc_md structures until we find the proper
  465. * one for the current machine type
  466. */
  467. DBG("Probing machine type ...\n");
  468. for (machine_id = &__machine_desc_start;
  469. machine_id < &__machine_desc_end;
  470. machine_id++) {
  471. DBG(" %s ...", machine_id->name);
  472. memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
  473. if (ppc_md.probe()) {
  474. DBG(" match !\n");
  475. break;
  476. }
  477. DBG("\n");
  478. }
  479. /* What can we do if we didn't find ? */
  480. if (machine_id >= &__machine_desc_end) {
  481. DBG("No suitable machine found !\n");
  482. for (;;);
  483. }
  484. printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
  485. }
  486. /* Match a class of boards, not a specific device configuration. */
  487. int check_legacy_ioport(unsigned long base_port)
  488. {
  489. struct device_node *parent, *np = NULL;
  490. int ret = -ENODEV;
  491. switch(base_port) {
  492. case I8042_DATA_REG:
  493. if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
  494. np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
  495. if (np) {
  496. parent = of_get_parent(np);
  497. of_node_put(np);
  498. np = parent;
  499. break;
  500. }
  501. np = of_find_node_by_type(NULL, "8042");
  502. /* Pegasos has no device_type on its 8042 node, look for the
  503. * name instead */
  504. if (!np)
  505. np = of_find_node_by_name(NULL, "8042");
  506. break;
  507. case FDC_BASE: /* FDC1 */
  508. np = of_find_node_by_type(NULL, "fdc");
  509. break;
  510. #ifdef CONFIG_PPC_PREP
  511. case _PIDXR:
  512. case _PNPWRP:
  513. case PNPBIOS_BASE:
  514. /* implement me */
  515. #endif
  516. default:
  517. /* ipmi is supposed to fail here */
  518. break;
  519. }
  520. if (!np)
  521. return ret;
  522. parent = of_get_parent(np);
  523. if (parent) {
  524. if (strcmp(parent->type, "isa") == 0)
  525. ret = 0;
  526. of_node_put(parent);
  527. }
  528. of_node_put(np);
  529. return ret;
  530. }
  531. EXPORT_SYMBOL(check_legacy_ioport);
  532. static int ppc_panic_event(struct notifier_block *this,
  533. unsigned long event, void *ptr)
  534. {
  535. ppc_md.panic(ptr); /* May not return */
  536. return NOTIFY_DONE;
  537. }
  538. static struct notifier_block ppc_panic_block = {
  539. .notifier_call = ppc_panic_event,
  540. .priority = INT_MIN /* may not return; must be done last */
  541. };
  542. void __init setup_panic(void)
  543. {
  544. atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
  545. }
  546. #ifdef CONFIG_CHECK_CACHE_COHERENCY
  547. /*
  548. * For platforms that have configurable cache-coherency. This function
  549. * checks that the cache coherency setting of the kernel matches the setting
  550. * left by the firmware, as indicated in the device tree. Since a mismatch
  551. * will eventually result in DMA failures, we print * and error and call
  552. * BUG() in that case.
  553. */
  554. #ifdef CONFIG_NOT_COHERENT_CACHE
  555. #define KERNEL_COHERENCY 0
  556. #else
  557. #define KERNEL_COHERENCY 1
  558. #endif
  559. static int __init check_cache_coherency(void)
  560. {
  561. struct device_node *np;
  562. const void *prop;
  563. int devtree_coherency;
  564. np = of_find_node_by_path("/");
  565. prop = of_get_property(np, "coherency-off", NULL);
  566. of_node_put(np);
  567. devtree_coherency = prop ? 0 : 1;
  568. if (devtree_coherency != KERNEL_COHERENCY) {
  569. printk(KERN_ERR
  570. "kernel coherency:%s != device tree_coherency:%s\n",
  571. KERNEL_COHERENCY ? "on" : "off",
  572. devtree_coherency ? "on" : "off");
  573. BUG();
  574. }
  575. return 0;
  576. }
  577. late_initcall(check_cache_coherency);
  578. #endif /* CONFIG_CHECK_CACHE_COHERENCY */
  579. #ifdef CONFIG_DEBUG_FS
  580. struct dentry *powerpc_debugfs_root;
  581. EXPORT_SYMBOL(powerpc_debugfs_root);
  582. static int powerpc_debugfs_init(void)
  583. {
  584. powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
  585. return powerpc_debugfs_root == NULL;
  586. }
  587. arch_initcall(powerpc_debugfs_init);
  588. #endif
  589. static int ppc_dflt_bus_notify(struct notifier_block *nb,
  590. unsigned long action, void *data)
  591. {
  592. struct device *dev = data;
  593. /* We are only intereted in device addition */
  594. if (action != BUS_NOTIFY_ADD_DEVICE)
  595. return 0;
  596. set_dma_ops(dev, &dma_direct_ops);
  597. return NOTIFY_DONE;
  598. }
  599. static struct notifier_block ppc_dflt_plat_bus_notifier = {
  600. .notifier_call = ppc_dflt_bus_notify,
  601. .priority = INT_MAX,
  602. };
  603. static struct notifier_block ppc_dflt_of_bus_notifier = {
  604. .notifier_call = ppc_dflt_bus_notify,
  605. .priority = INT_MAX,
  606. };
  607. static int __init setup_bus_notifier(void)
  608. {
  609. bus_register_notifier(&platform_bus_type, &ppc_dflt_plat_bus_notifier);
  610. bus_register_notifier(&of_platform_bus_type, &ppc_dflt_of_bus_notifier);
  611. return 0;
  612. }
  613. arch_initcall(setup_bus_notifier);