bfin_gpio.c 30 KB

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  1. /*
  2. * GPIO Abstraction Layer
  3. *
  4. * Copyright 2006-2009 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later
  7. */
  8. #include <linux/delay.h>
  9. #include <linux/module.h>
  10. #include <linux/err.h>
  11. #include <linux/proc_fs.h>
  12. #include <asm/blackfin.h>
  13. #include <asm/gpio.h>
  14. #include <asm/portmux.h>
  15. #include <linux/irq.h>
  16. #if ANOMALY_05000311 || ANOMALY_05000323
  17. enum {
  18. AWA_data = SYSCR,
  19. AWA_data_clear = SYSCR,
  20. AWA_data_set = SYSCR,
  21. AWA_toggle = SYSCR,
  22. AWA_maska = BFIN_UART_SCR,
  23. AWA_maska_clear = BFIN_UART_SCR,
  24. AWA_maska_set = BFIN_UART_SCR,
  25. AWA_maska_toggle = BFIN_UART_SCR,
  26. AWA_maskb = BFIN_UART_GCTL,
  27. AWA_maskb_clear = BFIN_UART_GCTL,
  28. AWA_maskb_set = BFIN_UART_GCTL,
  29. AWA_maskb_toggle = BFIN_UART_GCTL,
  30. AWA_dir = SPORT1_STAT,
  31. AWA_polar = SPORT1_STAT,
  32. AWA_edge = SPORT1_STAT,
  33. AWA_both = SPORT1_STAT,
  34. #if ANOMALY_05000311
  35. AWA_inen = TIMER_ENABLE,
  36. #elif ANOMALY_05000323
  37. AWA_inen = DMA1_1_CONFIG,
  38. #endif
  39. };
  40. /* Anomaly Workaround */
  41. #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
  42. #else
  43. #define AWA_DUMMY_READ(...) do { } while (0)
  44. #endif
  45. static struct gpio_port_t * const gpio_array[] = {
  46. #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
  47. (struct gpio_port_t *) FIO_FLAG_D,
  48. #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  49. (struct gpio_port_t *) PORTFIO,
  50. (struct gpio_port_t *) PORTGIO,
  51. (struct gpio_port_t *) PORTHIO,
  52. #elif defined(BF561_FAMILY)
  53. (struct gpio_port_t *) FIO0_FLAG_D,
  54. (struct gpio_port_t *) FIO1_FLAG_D,
  55. (struct gpio_port_t *) FIO2_FLAG_D,
  56. #elif defined(CONFIG_BF54x)
  57. (struct gpio_port_t *)PORTA_FER,
  58. (struct gpio_port_t *)PORTB_FER,
  59. (struct gpio_port_t *)PORTC_FER,
  60. (struct gpio_port_t *)PORTD_FER,
  61. (struct gpio_port_t *)PORTE_FER,
  62. (struct gpio_port_t *)PORTF_FER,
  63. (struct gpio_port_t *)PORTG_FER,
  64. (struct gpio_port_t *)PORTH_FER,
  65. (struct gpio_port_t *)PORTI_FER,
  66. (struct gpio_port_t *)PORTJ_FER,
  67. #else
  68. # error no gpio arrays defined
  69. #endif
  70. };
  71. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  72. static unsigned short * const port_fer[] = {
  73. (unsigned short *) PORTF_FER,
  74. (unsigned short *) PORTG_FER,
  75. (unsigned short *) PORTH_FER,
  76. };
  77. # if !defined(BF537_FAMILY)
  78. static unsigned short * const port_mux[] = {
  79. (unsigned short *) PORTF_MUX,
  80. (unsigned short *) PORTG_MUX,
  81. (unsigned short *) PORTH_MUX,
  82. };
  83. static const
  84. u8 pmux_offset[][16] = {
  85. # if defined(CONFIG_BF52x)
  86. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
  87. { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
  88. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
  89. # elif defined(CONFIG_BF51x)
  90. { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
  91. { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
  92. { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
  93. # endif
  94. };
  95. # endif
  96. #elif defined(BF538_FAMILY)
  97. static unsigned short * const port_fer[] = {
  98. (unsigned short *) PORTCIO_FER,
  99. (unsigned short *) PORTDIO_FER,
  100. (unsigned short *) PORTEIO_FER,
  101. };
  102. #endif
  103. static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
  104. static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
  105. static unsigned short reserved_gpio_irq_map[GPIO_BANK_NUM];
  106. #define RESOURCE_LABEL_SIZE 16
  107. static struct str_ident {
  108. char name[RESOURCE_LABEL_SIZE];
  109. } str_ident[MAX_RESOURCES];
  110. #if defined(CONFIG_PM)
  111. static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
  112. #endif
  113. inline int check_gpio(unsigned gpio)
  114. {
  115. #if defined(CONFIG_BF54x)
  116. if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
  117. || gpio == GPIO_PH14 || gpio == GPIO_PH15
  118. || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
  119. return -EINVAL;
  120. #endif
  121. if (gpio >= MAX_BLACKFIN_GPIOS)
  122. return -EINVAL;
  123. return 0;
  124. }
  125. static void gpio_error(unsigned gpio)
  126. {
  127. printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
  128. }
  129. static void set_label(unsigned short ident, const char *label)
  130. {
  131. if (label) {
  132. strncpy(str_ident[ident].name, label,
  133. RESOURCE_LABEL_SIZE);
  134. str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
  135. }
  136. }
  137. static char *get_label(unsigned short ident)
  138. {
  139. return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
  140. }
  141. static int cmp_label(unsigned short ident, const char *label)
  142. {
  143. if (label == NULL) {
  144. dump_stack();
  145. printk(KERN_ERR "Please provide none-null label\n");
  146. }
  147. if (label)
  148. return strcmp(str_ident[ident].name, label);
  149. else
  150. return -EINVAL;
  151. }
  152. static void port_setup(unsigned gpio, unsigned short usage)
  153. {
  154. #if defined(BF538_FAMILY)
  155. /*
  156. * BF538/9 Port C,D and E are special.
  157. * Inverted PORT_FER polarity on CDE and no PORF_FER on F
  158. * Regular PORT F GPIOs are handled here, CDE are exclusively
  159. * managed by GPIOLIB
  160. */
  161. if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
  162. return;
  163. gpio -= MAX_BLACKFIN_GPIOS;
  164. if (usage == GPIO_USAGE)
  165. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  166. else
  167. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  168. SSYNC();
  169. return;
  170. #endif
  171. if (check_gpio(gpio))
  172. return;
  173. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  174. if (usage == GPIO_USAGE)
  175. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  176. else
  177. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  178. SSYNC();
  179. #elif defined(CONFIG_BF54x)
  180. if (usage == GPIO_USAGE)
  181. gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
  182. else
  183. gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
  184. SSYNC();
  185. #endif
  186. }
  187. #ifdef BF537_FAMILY
  188. static struct {
  189. unsigned short res;
  190. unsigned short offset;
  191. } port_mux_lut[] = {
  192. {.res = P_PPI0_D13, .offset = 11},
  193. {.res = P_PPI0_D14, .offset = 11},
  194. {.res = P_PPI0_D15, .offset = 11},
  195. {.res = P_SPORT1_TFS, .offset = 11},
  196. {.res = P_SPORT1_TSCLK, .offset = 11},
  197. {.res = P_SPORT1_DTPRI, .offset = 11},
  198. {.res = P_PPI0_D10, .offset = 10},
  199. {.res = P_PPI0_D11, .offset = 10},
  200. {.res = P_PPI0_D12, .offset = 10},
  201. {.res = P_SPORT1_RSCLK, .offset = 10},
  202. {.res = P_SPORT1_RFS, .offset = 10},
  203. {.res = P_SPORT1_DRPRI, .offset = 10},
  204. {.res = P_PPI0_D8, .offset = 9},
  205. {.res = P_PPI0_D9, .offset = 9},
  206. {.res = P_SPORT1_DRSEC, .offset = 9},
  207. {.res = P_SPORT1_DTSEC, .offset = 9},
  208. {.res = P_TMR2, .offset = 8},
  209. {.res = P_PPI0_FS3, .offset = 8},
  210. {.res = P_TMR3, .offset = 7},
  211. {.res = P_SPI0_SSEL4, .offset = 7},
  212. {.res = P_TMR4, .offset = 6},
  213. {.res = P_SPI0_SSEL5, .offset = 6},
  214. {.res = P_TMR5, .offset = 5},
  215. {.res = P_SPI0_SSEL6, .offset = 5},
  216. {.res = P_UART1_RX, .offset = 4},
  217. {.res = P_UART1_TX, .offset = 4},
  218. {.res = P_TMR6, .offset = 4},
  219. {.res = P_TMR7, .offset = 4},
  220. {.res = P_UART0_RX, .offset = 3},
  221. {.res = P_UART0_TX, .offset = 3},
  222. {.res = P_DMAR0, .offset = 3},
  223. {.res = P_DMAR1, .offset = 3},
  224. {.res = P_SPORT0_DTSEC, .offset = 1},
  225. {.res = P_SPORT0_DRSEC, .offset = 1},
  226. {.res = P_CAN0_RX, .offset = 1},
  227. {.res = P_CAN0_TX, .offset = 1},
  228. {.res = P_SPI0_SSEL7, .offset = 1},
  229. {.res = P_SPORT0_TFS, .offset = 0},
  230. {.res = P_SPORT0_DTPRI, .offset = 0},
  231. {.res = P_SPI0_SSEL2, .offset = 0},
  232. {.res = P_SPI0_SSEL3, .offset = 0},
  233. };
  234. static void portmux_setup(unsigned short per)
  235. {
  236. u16 y, offset, muxreg;
  237. u16 function = P_FUNCT2MUX(per);
  238. for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
  239. if (port_mux_lut[y].res == per) {
  240. /* SET PORTMUX REG */
  241. offset = port_mux_lut[y].offset;
  242. muxreg = bfin_read_PORT_MUX();
  243. if (offset != 1)
  244. muxreg &= ~(1 << offset);
  245. else
  246. muxreg &= ~(3 << 1);
  247. muxreg |= (function << offset);
  248. bfin_write_PORT_MUX(muxreg);
  249. }
  250. }
  251. }
  252. #elif defined(CONFIG_BF54x)
  253. inline void portmux_setup(unsigned short per)
  254. {
  255. u32 pmux;
  256. u16 ident = P_IDENT(per);
  257. u16 function = P_FUNCT2MUX(per);
  258. pmux = gpio_array[gpio_bank(ident)]->port_mux;
  259. pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
  260. pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
  261. gpio_array[gpio_bank(ident)]->port_mux = pmux;
  262. }
  263. inline u16 get_portmux(unsigned short per)
  264. {
  265. u32 pmux;
  266. u16 ident = P_IDENT(per);
  267. pmux = gpio_array[gpio_bank(ident)]->port_mux;
  268. return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
  269. }
  270. #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  271. inline void portmux_setup(unsigned short per)
  272. {
  273. u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
  274. u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
  275. pmux = *port_mux[gpio_bank(ident)];
  276. pmux &= ~(3 << offset);
  277. pmux |= (function & 3) << offset;
  278. *port_mux[gpio_bank(ident)] = pmux;
  279. SSYNC();
  280. }
  281. #else
  282. # define portmux_setup(...) do { } while (0)
  283. #endif
  284. #ifndef CONFIG_BF54x
  285. /***********************************************************
  286. *
  287. * FUNCTIONS: Blackfin General Purpose Ports Access Functions
  288. *
  289. * INPUTS/OUTPUTS:
  290. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  291. *
  292. *
  293. * DESCRIPTION: These functions abstract direct register access
  294. * to Blackfin processor General Purpose
  295. * Ports Regsiters
  296. *
  297. * CAUTION: These functions do not belong to the GPIO Driver API
  298. *************************************************************
  299. * MODIFICATION HISTORY :
  300. **************************************************************/
  301. /* Set a specific bit */
  302. #define SET_GPIO(name) \
  303. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  304. { \
  305. unsigned long flags; \
  306. local_irq_save_hw(flags); \
  307. if (arg) \
  308. gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
  309. else \
  310. gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
  311. AWA_DUMMY_READ(name); \
  312. local_irq_restore_hw(flags); \
  313. } \
  314. EXPORT_SYMBOL(set_gpio_ ## name);
  315. SET_GPIO(dir) /* set_gpio_dir() */
  316. SET_GPIO(inen) /* set_gpio_inen() */
  317. SET_GPIO(polar) /* set_gpio_polar() */
  318. SET_GPIO(edge) /* set_gpio_edge() */
  319. SET_GPIO(both) /* set_gpio_both() */
  320. #define SET_GPIO_SC(name) \
  321. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  322. { \
  323. unsigned long flags; \
  324. if (ANOMALY_05000311 || ANOMALY_05000323) \
  325. local_irq_save_hw(flags); \
  326. if (arg) \
  327. gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  328. else \
  329. gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  330. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  331. AWA_DUMMY_READ(name); \
  332. local_irq_restore_hw(flags); \
  333. } \
  334. } \
  335. EXPORT_SYMBOL(set_gpio_ ## name);
  336. SET_GPIO_SC(maska)
  337. SET_GPIO_SC(maskb)
  338. SET_GPIO_SC(data)
  339. void set_gpio_toggle(unsigned gpio)
  340. {
  341. unsigned long flags;
  342. if (ANOMALY_05000311 || ANOMALY_05000323)
  343. local_irq_save_hw(flags);
  344. gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  345. if (ANOMALY_05000311 || ANOMALY_05000323) {
  346. AWA_DUMMY_READ(toggle);
  347. local_irq_restore_hw(flags);
  348. }
  349. }
  350. EXPORT_SYMBOL(set_gpio_toggle);
  351. /*Set current PORT date (16-bit word)*/
  352. #define SET_GPIO_P(name) \
  353. void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
  354. { \
  355. unsigned long flags; \
  356. if (ANOMALY_05000311 || ANOMALY_05000323) \
  357. local_irq_save_hw(flags); \
  358. gpio_array[gpio_bank(gpio)]->name = arg; \
  359. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  360. AWA_DUMMY_READ(name); \
  361. local_irq_restore_hw(flags); \
  362. } \
  363. } \
  364. EXPORT_SYMBOL(set_gpiop_ ## name);
  365. SET_GPIO_P(data)
  366. SET_GPIO_P(dir)
  367. SET_GPIO_P(inen)
  368. SET_GPIO_P(polar)
  369. SET_GPIO_P(edge)
  370. SET_GPIO_P(both)
  371. SET_GPIO_P(maska)
  372. SET_GPIO_P(maskb)
  373. /* Get a specific bit */
  374. #define GET_GPIO(name) \
  375. unsigned short get_gpio_ ## name(unsigned gpio) \
  376. { \
  377. unsigned long flags; \
  378. unsigned short ret; \
  379. if (ANOMALY_05000311 || ANOMALY_05000323) \
  380. local_irq_save_hw(flags); \
  381. ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
  382. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  383. AWA_DUMMY_READ(name); \
  384. local_irq_restore_hw(flags); \
  385. } \
  386. return ret; \
  387. } \
  388. EXPORT_SYMBOL(get_gpio_ ## name);
  389. GET_GPIO(data)
  390. GET_GPIO(dir)
  391. GET_GPIO(inen)
  392. GET_GPIO(polar)
  393. GET_GPIO(edge)
  394. GET_GPIO(both)
  395. GET_GPIO(maska)
  396. GET_GPIO(maskb)
  397. /*Get current PORT date (16-bit word)*/
  398. #define GET_GPIO_P(name) \
  399. unsigned short get_gpiop_ ## name(unsigned gpio) \
  400. { \
  401. unsigned long flags; \
  402. unsigned short ret; \
  403. if (ANOMALY_05000311 || ANOMALY_05000323) \
  404. local_irq_save_hw(flags); \
  405. ret = (gpio_array[gpio_bank(gpio)]->name); \
  406. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  407. AWA_DUMMY_READ(name); \
  408. local_irq_restore_hw(flags); \
  409. } \
  410. return ret; \
  411. } \
  412. EXPORT_SYMBOL(get_gpiop_ ## name);
  413. GET_GPIO_P(data)
  414. GET_GPIO_P(dir)
  415. GET_GPIO_P(inen)
  416. GET_GPIO_P(polar)
  417. GET_GPIO_P(edge)
  418. GET_GPIO_P(both)
  419. GET_GPIO_P(maska)
  420. GET_GPIO_P(maskb)
  421. #ifdef CONFIG_PM
  422. static unsigned short wakeup_map[GPIO_BANK_NUM];
  423. static const unsigned int sic_iwr_irqs[] = {
  424. #if defined(BF533_FAMILY)
  425. IRQ_PROG_INTB
  426. #elif defined(BF537_FAMILY)
  427. IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
  428. #elif defined(BF538_FAMILY)
  429. IRQ_PORTF_INTB
  430. #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  431. IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
  432. #elif defined(BF561_FAMILY)
  433. IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
  434. #else
  435. # error no SIC_IWR defined
  436. #endif
  437. };
  438. /***********************************************************
  439. *
  440. * FUNCTIONS: Blackfin PM Setup API
  441. *
  442. * INPUTS/OUTPUTS:
  443. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  444. * type -
  445. * PM_WAKE_RISING
  446. * PM_WAKE_FALLING
  447. * PM_WAKE_HIGH
  448. * PM_WAKE_LOW
  449. * PM_WAKE_BOTH_EDGES
  450. *
  451. * DESCRIPTION: Blackfin PM Driver API
  452. *
  453. * CAUTION:
  454. *************************************************************
  455. * MODIFICATION HISTORY :
  456. **************************************************************/
  457. int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)
  458. {
  459. unsigned long flags;
  460. if (check_gpio(gpio) < 0)
  461. return -EINVAL;
  462. local_irq_save_hw(flags);
  463. if (ctrl)
  464. wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  465. else
  466. wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  467. set_gpio_maskb(gpio, ctrl);
  468. local_irq_restore_hw(flags);
  469. return 0;
  470. }
  471. int bfin_pm_standby_ctrl(unsigned ctrl)
  472. {
  473. u16 bank, mask, i;
  474. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  475. mask = wakeup_map[gpio_bank(i)];
  476. bank = gpio_bank(i);
  477. if (mask)
  478. bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl);
  479. }
  480. return 0;
  481. }
  482. void bfin_gpio_pm_hibernate_suspend(void)
  483. {
  484. int i, bank;
  485. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  486. bank = gpio_bank(i);
  487. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  488. gpio_bank_saved[bank].fer = *port_fer[bank];
  489. #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  490. gpio_bank_saved[bank].mux = *port_mux[bank];
  491. #else
  492. if (bank == 0)
  493. gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
  494. #endif
  495. #endif
  496. gpio_bank_saved[bank].data = gpio_array[bank]->data;
  497. gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
  498. gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
  499. gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
  500. gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
  501. gpio_bank_saved[bank].both = gpio_array[bank]->both;
  502. gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
  503. }
  504. AWA_DUMMY_READ(maska);
  505. }
  506. void bfin_gpio_pm_hibernate_restore(void)
  507. {
  508. int i, bank;
  509. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  510. bank = gpio_bank(i);
  511. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  512. #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  513. *port_mux[bank] = gpio_bank_saved[bank].mux;
  514. #else
  515. if (bank == 0)
  516. bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
  517. #endif
  518. *port_fer[bank] = gpio_bank_saved[bank].fer;
  519. #endif
  520. gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
  521. gpio_array[bank]->data_set = gpio_bank_saved[bank].data
  522. & gpio_bank_saved[bank].dir;
  523. gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
  524. gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
  525. gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
  526. gpio_array[bank]->both = gpio_bank_saved[bank].both;
  527. gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
  528. }
  529. AWA_DUMMY_READ(maska);
  530. }
  531. #endif
  532. #else /* CONFIG_BF54x */
  533. #ifdef CONFIG_PM
  534. int bfin_pm_standby_ctrl(unsigned ctrl)
  535. {
  536. return 0;
  537. }
  538. void bfin_gpio_pm_hibernate_suspend(void)
  539. {
  540. int i, bank;
  541. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  542. bank = gpio_bank(i);
  543. gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
  544. gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
  545. gpio_bank_saved[bank].data = gpio_array[bank]->data;
  546. gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
  547. gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
  548. }
  549. }
  550. void bfin_gpio_pm_hibernate_restore(void)
  551. {
  552. int i, bank;
  553. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  554. bank = gpio_bank(i);
  555. gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
  556. gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
  557. gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
  558. gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
  559. gpio_array[bank]->data_set = gpio_bank_saved[bank].data
  560. | gpio_bank_saved[bank].dir;
  561. }
  562. }
  563. #endif
  564. unsigned short get_gpio_dir(unsigned gpio)
  565. {
  566. return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
  567. }
  568. EXPORT_SYMBOL(get_gpio_dir);
  569. #endif /* CONFIG_BF54x */
  570. /***********************************************************
  571. *
  572. * FUNCTIONS: Blackfin Peripheral Resource Allocation
  573. * and PortMux Setup
  574. *
  575. * INPUTS/OUTPUTS:
  576. * per Peripheral Identifier
  577. * label String
  578. *
  579. * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
  580. *
  581. * CAUTION:
  582. *************************************************************
  583. * MODIFICATION HISTORY :
  584. **************************************************************/
  585. int peripheral_request(unsigned short per, const char *label)
  586. {
  587. unsigned long flags;
  588. unsigned short ident = P_IDENT(per);
  589. /*
  590. * Don't cares are pins with only one dedicated function
  591. */
  592. if (per & P_DONTCARE)
  593. return 0;
  594. if (!(per & P_DEFINED))
  595. return -ENODEV;
  596. BUG_ON(ident >= MAX_RESOURCES);
  597. local_irq_save_hw(flags);
  598. /* If a pin can be muxed as either GPIO or peripheral, make
  599. * sure it is not already a GPIO pin when we request it.
  600. */
  601. if (unlikely(!check_gpio(ident) &&
  602. reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
  603. if (system_state == SYSTEM_BOOTING)
  604. dump_stack();
  605. printk(KERN_ERR
  606. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  607. __func__, ident, get_label(ident));
  608. local_irq_restore_hw(flags);
  609. return -EBUSY;
  610. }
  611. if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
  612. /*
  613. * Pin functions like AMC address strobes my
  614. * be requested and used by several drivers
  615. */
  616. #ifdef CONFIG_BF54x
  617. if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
  618. #else
  619. if (!(per & P_MAYSHARE)) {
  620. #endif
  621. /*
  622. * Allow that the identical pin function can
  623. * be requested from the same driver twice
  624. */
  625. if (cmp_label(ident, label) == 0)
  626. goto anyway;
  627. if (system_state == SYSTEM_BOOTING)
  628. dump_stack();
  629. printk(KERN_ERR
  630. "%s: Peripheral %d function %d is already reserved by %s !\n",
  631. __func__, ident, P_FUNCT2MUX(per), get_label(ident));
  632. local_irq_restore_hw(flags);
  633. return -EBUSY;
  634. }
  635. }
  636. anyway:
  637. reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
  638. portmux_setup(per);
  639. port_setup(ident, PERIPHERAL_USAGE);
  640. local_irq_restore_hw(flags);
  641. set_label(ident, label);
  642. return 0;
  643. }
  644. EXPORT_SYMBOL(peripheral_request);
  645. int peripheral_request_list(const unsigned short per[], const char *label)
  646. {
  647. u16 cnt;
  648. int ret;
  649. for (cnt = 0; per[cnt] != 0; cnt++) {
  650. ret = peripheral_request(per[cnt], label);
  651. if (ret < 0) {
  652. for ( ; cnt > 0; cnt--)
  653. peripheral_free(per[cnt - 1]);
  654. return ret;
  655. }
  656. }
  657. return 0;
  658. }
  659. EXPORT_SYMBOL(peripheral_request_list);
  660. void peripheral_free(unsigned short per)
  661. {
  662. unsigned long flags;
  663. unsigned short ident = P_IDENT(per);
  664. if (per & P_DONTCARE)
  665. return;
  666. if (!(per & P_DEFINED))
  667. return;
  668. local_irq_save_hw(flags);
  669. if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
  670. local_irq_restore_hw(flags);
  671. return;
  672. }
  673. if (!(per & P_MAYSHARE))
  674. port_setup(ident, GPIO_USAGE);
  675. reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
  676. set_label(ident, "free");
  677. local_irq_restore_hw(flags);
  678. }
  679. EXPORT_SYMBOL(peripheral_free);
  680. void peripheral_free_list(const unsigned short per[])
  681. {
  682. u16 cnt;
  683. for (cnt = 0; per[cnt] != 0; cnt++)
  684. peripheral_free(per[cnt]);
  685. }
  686. EXPORT_SYMBOL(peripheral_free_list);
  687. /***********************************************************
  688. *
  689. * FUNCTIONS: Blackfin GPIO Driver
  690. *
  691. * INPUTS/OUTPUTS:
  692. * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
  693. * label String
  694. *
  695. * DESCRIPTION: Blackfin GPIO Driver API
  696. *
  697. * CAUTION:
  698. *************************************************************
  699. * MODIFICATION HISTORY :
  700. **************************************************************/
  701. int bfin_gpio_request(unsigned gpio, const char *label)
  702. {
  703. unsigned long flags;
  704. if (check_gpio(gpio) < 0)
  705. return -EINVAL;
  706. local_irq_save_hw(flags);
  707. /*
  708. * Allow that the identical GPIO can
  709. * be requested from the same driver twice
  710. * Do nothing and return -
  711. */
  712. if (cmp_label(gpio, label) == 0) {
  713. local_irq_restore_hw(flags);
  714. return 0;
  715. }
  716. if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  717. if (system_state == SYSTEM_BOOTING)
  718. dump_stack();
  719. printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
  720. gpio, get_label(gpio));
  721. local_irq_restore_hw(flags);
  722. return -EBUSY;
  723. }
  724. if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  725. if (system_state == SYSTEM_BOOTING)
  726. dump_stack();
  727. printk(KERN_ERR
  728. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  729. gpio, get_label(gpio));
  730. local_irq_restore_hw(flags);
  731. return -EBUSY;
  732. }
  733. if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  734. printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
  735. " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
  736. }
  737. #ifndef CONFIG_BF54x
  738. else { /* Reset POLAR setting when acquiring a gpio for the first time */
  739. set_gpio_polar(gpio, 0);
  740. }
  741. #endif
  742. reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  743. set_label(gpio, label);
  744. local_irq_restore_hw(flags);
  745. port_setup(gpio, GPIO_USAGE);
  746. return 0;
  747. }
  748. EXPORT_SYMBOL(bfin_gpio_request);
  749. void bfin_gpio_free(unsigned gpio)
  750. {
  751. unsigned long flags;
  752. if (check_gpio(gpio) < 0)
  753. return;
  754. might_sleep();
  755. local_irq_save_hw(flags);
  756. if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
  757. if (system_state == SYSTEM_BOOTING)
  758. dump_stack();
  759. gpio_error(gpio);
  760. local_irq_restore_hw(flags);
  761. return;
  762. }
  763. reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  764. set_label(gpio, "free");
  765. local_irq_restore_hw(flags);
  766. }
  767. EXPORT_SYMBOL(bfin_gpio_free);
  768. #ifdef BFIN_SPECIAL_GPIO_BANKS
  769. static unsigned short reserved_special_gpio_map[gpio_bank(MAX_RESOURCES)];
  770. int bfin_special_gpio_request(unsigned gpio, const char *label)
  771. {
  772. unsigned long flags;
  773. local_irq_save_hw(flags);
  774. /*
  775. * Allow that the identical GPIO can
  776. * be requested from the same driver twice
  777. * Do nothing and return -
  778. */
  779. if (cmp_label(gpio, label) == 0) {
  780. local_irq_restore_hw(flags);
  781. return 0;
  782. }
  783. if (unlikely(reserved_special_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  784. local_irq_restore_hw(flags);
  785. printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
  786. gpio, get_label(gpio));
  787. return -EBUSY;
  788. }
  789. if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  790. local_irq_restore_hw(flags);
  791. printk(KERN_ERR
  792. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  793. gpio, get_label(gpio));
  794. return -EBUSY;
  795. }
  796. reserved_special_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  797. reserved_peri_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  798. set_label(gpio, label);
  799. local_irq_restore_hw(flags);
  800. port_setup(gpio, GPIO_USAGE);
  801. return 0;
  802. }
  803. EXPORT_SYMBOL(bfin_special_gpio_request);
  804. void bfin_special_gpio_free(unsigned gpio)
  805. {
  806. unsigned long flags;
  807. might_sleep();
  808. local_irq_save_hw(flags);
  809. if (unlikely(!(reserved_special_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
  810. gpio_error(gpio);
  811. local_irq_restore_hw(flags);
  812. return;
  813. }
  814. reserved_special_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  815. reserved_peri_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  816. set_label(gpio, "free");
  817. local_irq_restore_hw(flags);
  818. }
  819. EXPORT_SYMBOL(bfin_special_gpio_free);
  820. #endif
  821. int bfin_gpio_irq_request(unsigned gpio, const char *label)
  822. {
  823. unsigned long flags;
  824. if (check_gpio(gpio) < 0)
  825. return -EINVAL;
  826. local_irq_save_hw(flags);
  827. if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  828. if (system_state == SYSTEM_BOOTING)
  829. dump_stack();
  830. printk(KERN_ERR
  831. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  832. gpio, get_label(gpio));
  833. local_irq_restore_hw(flags);
  834. return -EBUSY;
  835. }
  836. if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))
  837. printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
  838. "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
  839. gpio, get_label(gpio));
  840. reserved_gpio_irq_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  841. set_label(gpio, label);
  842. local_irq_restore_hw(flags);
  843. port_setup(gpio, GPIO_USAGE);
  844. return 0;
  845. }
  846. void bfin_gpio_irq_free(unsigned gpio)
  847. {
  848. unsigned long flags;
  849. if (check_gpio(gpio) < 0)
  850. return;
  851. local_irq_save_hw(flags);
  852. if (unlikely(!(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
  853. if (system_state == SYSTEM_BOOTING)
  854. dump_stack();
  855. gpio_error(gpio);
  856. local_irq_restore_hw(flags);
  857. return;
  858. }
  859. reserved_gpio_irq_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  860. set_label(gpio, "free");
  861. local_irq_restore_hw(flags);
  862. }
  863. static inline void __bfin_gpio_direction_input(unsigned gpio)
  864. {
  865. #ifdef CONFIG_BF54x
  866. gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
  867. #else
  868. gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
  869. #endif
  870. gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
  871. }
  872. int bfin_gpio_direction_input(unsigned gpio)
  873. {
  874. unsigned long flags;
  875. if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  876. gpio_error(gpio);
  877. return -EINVAL;
  878. }
  879. local_irq_save_hw(flags);
  880. __bfin_gpio_direction_input(gpio);
  881. AWA_DUMMY_READ(inen);
  882. local_irq_restore_hw(flags);
  883. return 0;
  884. }
  885. EXPORT_SYMBOL(bfin_gpio_direction_input);
  886. void bfin_gpio_irq_prepare(unsigned gpio)
  887. {
  888. #ifdef CONFIG_BF54x
  889. unsigned long flags;
  890. #endif
  891. port_setup(gpio, GPIO_USAGE);
  892. #ifdef CONFIG_BF54x
  893. local_irq_save_hw(flags);
  894. __bfin_gpio_direction_input(gpio);
  895. local_irq_restore_hw(flags);
  896. #endif
  897. }
  898. void bfin_gpio_set_value(unsigned gpio, int arg)
  899. {
  900. if (arg)
  901. gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  902. else
  903. gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
  904. }
  905. EXPORT_SYMBOL(bfin_gpio_set_value);
  906. int bfin_gpio_direction_output(unsigned gpio, int value)
  907. {
  908. unsigned long flags;
  909. if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  910. gpio_error(gpio);
  911. return -EINVAL;
  912. }
  913. local_irq_save_hw(flags);
  914. gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
  915. gpio_set_value(gpio, value);
  916. #ifdef CONFIG_BF54x
  917. gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
  918. #else
  919. gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
  920. #endif
  921. AWA_DUMMY_READ(dir);
  922. local_irq_restore_hw(flags);
  923. return 0;
  924. }
  925. EXPORT_SYMBOL(bfin_gpio_direction_output);
  926. int bfin_gpio_get_value(unsigned gpio)
  927. {
  928. #ifdef CONFIG_BF54x
  929. return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
  930. #else
  931. unsigned long flags;
  932. if (unlikely(get_gpio_edge(gpio))) {
  933. int ret;
  934. local_irq_save_hw(flags);
  935. set_gpio_edge(gpio, 0);
  936. ret = get_gpio_data(gpio);
  937. set_gpio_edge(gpio, 1);
  938. local_irq_restore_hw(flags);
  939. return ret;
  940. } else
  941. return get_gpio_data(gpio);
  942. #endif
  943. }
  944. EXPORT_SYMBOL(bfin_gpio_get_value);
  945. /* If we are booting from SPI and our board lacks a strong enough pull up,
  946. * the core can reset and execute the bootrom faster than the resistor can
  947. * pull the signal logically high. To work around this (common) error in
  948. * board design, we explicitly set the pin back to GPIO mode, force /CS
  949. * high, and wait for the electrons to do their thing.
  950. *
  951. * This function only makes sense to be called from reset code, but it
  952. * lives here as we need to force all the GPIO states w/out going through
  953. * BUG() checks and such.
  954. */
  955. void bfin_reset_boot_spi_cs(unsigned short pin)
  956. {
  957. unsigned short gpio = P_IDENT(pin);
  958. port_setup(gpio, GPIO_USAGE);
  959. gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  960. AWA_DUMMY_READ(data_set);
  961. udelay(1);
  962. }
  963. #if defined(CONFIG_PROC_FS)
  964. static int gpio_proc_read(char *buf, char **start, off_t offset,
  965. int len, int *unused_i, void *unused_v)
  966. {
  967. int c, irq, gpio, outlen = 0;
  968. for (c = 0; c < MAX_RESOURCES; c++) {
  969. irq = reserved_gpio_irq_map[gpio_bank(c)] & gpio_bit(c);
  970. gpio = reserved_gpio_map[gpio_bank(c)] & gpio_bit(c);
  971. if (!check_gpio(c) && (gpio || irq))
  972. len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
  973. get_label(c), (gpio && irq) ? " *" : "",
  974. get_gpio_dir(c) ? "OUTPUT" : "INPUT");
  975. else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
  976. len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
  977. else
  978. continue;
  979. buf += len;
  980. outlen += len;
  981. }
  982. return outlen;
  983. }
  984. static __init int gpio_register_proc(void)
  985. {
  986. struct proc_dir_entry *proc_gpio;
  987. proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
  988. if (proc_gpio)
  989. proc_gpio->read_proc = gpio_proc_read;
  990. return proc_gpio != NULL;
  991. }
  992. __initcall(gpio_register_proc);
  993. #endif
  994. #ifdef CONFIG_GPIOLIB
  995. static int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
  996. {
  997. return bfin_gpio_direction_input(gpio);
  998. }
  999. static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
  1000. {
  1001. return bfin_gpio_direction_output(gpio, level);
  1002. }
  1003. static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
  1004. {
  1005. return bfin_gpio_get_value(gpio);
  1006. }
  1007. static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
  1008. {
  1009. return bfin_gpio_set_value(gpio, value);
  1010. }
  1011. static int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
  1012. {
  1013. return bfin_gpio_request(gpio, chip->label);
  1014. }
  1015. static void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
  1016. {
  1017. return bfin_gpio_free(gpio);
  1018. }
  1019. static int bfin_gpiolib_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
  1020. {
  1021. return gpio + GPIO_IRQ_BASE;
  1022. }
  1023. static struct gpio_chip bfin_chip = {
  1024. .label = "BFIN-GPIO",
  1025. .direction_input = bfin_gpiolib_direction_input,
  1026. .get = bfin_gpiolib_get_value,
  1027. .direction_output = bfin_gpiolib_direction_output,
  1028. .set = bfin_gpiolib_set_value,
  1029. .request = bfin_gpiolib_gpio_request,
  1030. .free = bfin_gpiolib_gpio_free,
  1031. .to_irq = bfin_gpiolib_gpio_to_irq,
  1032. .base = 0,
  1033. .ngpio = MAX_BLACKFIN_GPIOS,
  1034. };
  1035. static int __init bfin_gpiolib_setup(void)
  1036. {
  1037. return gpiochip_add(&bfin_chip);
  1038. }
  1039. arch_initcall(bfin_gpiolib_setup);
  1040. #endif