setup-sh7367.c 4.4 KB

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  1. /*
  2. * sh7367 processor support
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/irq.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/delay.h>
  26. #include <linux/input.h>
  27. #include <linux/io.h>
  28. #include <linux/serial_sci.h>
  29. #include <linux/sh_timer.h>
  30. #include <mach/hardware.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/mach/arch.h>
  33. static struct plat_sci_port scif0_platform_data = {
  34. .mapbase = 0xe6c40000,
  35. .flags = UPF_BOOT_AUTOCONF,
  36. .type = PORT_SCIF,
  37. .irqs = { 80, 80, 80, 80 },
  38. };
  39. static struct platform_device scif0_device = {
  40. .name = "sh-sci",
  41. .id = 0,
  42. .dev = {
  43. .platform_data = &scif0_platform_data,
  44. },
  45. };
  46. static struct plat_sci_port scif1_platform_data = {
  47. .mapbase = 0xe6c50000,
  48. .flags = UPF_BOOT_AUTOCONF,
  49. .type = PORT_SCIF,
  50. .irqs = { 81, 81, 81, 81 },
  51. };
  52. static struct platform_device scif1_device = {
  53. .name = "sh-sci",
  54. .id = 1,
  55. .dev = {
  56. .platform_data = &scif1_platform_data,
  57. },
  58. };
  59. static struct plat_sci_port scif2_platform_data = {
  60. .mapbase = 0xe6c60000,
  61. .flags = UPF_BOOT_AUTOCONF,
  62. .type = PORT_SCIF,
  63. .irqs = { 82, 82, 82, 82 },
  64. };
  65. static struct platform_device scif2_device = {
  66. .name = "sh-sci",
  67. .id = 2,
  68. .dev = {
  69. .platform_data = &scif2_platform_data,
  70. },
  71. };
  72. static struct plat_sci_port scif3_platform_data = {
  73. .mapbase = 0xe6c70000,
  74. .flags = UPF_BOOT_AUTOCONF,
  75. .type = PORT_SCIF,
  76. .irqs = { 83, 83, 83, 83 },
  77. };
  78. static struct platform_device scif3_device = {
  79. .name = "sh-sci",
  80. .id = 3,
  81. .dev = {
  82. .platform_data = &scif3_platform_data,
  83. },
  84. };
  85. static struct plat_sci_port scif4_platform_data = {
  86. .mapbase = 0xe6c80000,
  87. .flags = UPF_BOOT_AUTOCONF,
  88. .type = PORT_SCIF,
  89. .irqs = { 89, 89, 89, 89 },
  90. };
  91. static struct platform_device scif4_device = {
  92. .name = "sh-sci",
  93. .id = 4,
  94. .dev = {
  95. .platform_data = &scif4_platform_data,
  96. },
  97. };
  98. static struct plat_sci_port scif5_platform_data = {
  99. .mapbase = 0xe6cb0000,
  100. .flags = UPF_BOOT_AUTOCONF,
  101. .type = PORT_SCIF,
  102. .irqs = { 90, 90, 90, 90 },
  103. };
  104. static struct platform_device scif5_device = {
  105. .name = "sh-sci",
  106. .id = 5,
  107. .dev = {
  108. .platform_data = &scif5_platform_data,
  109. },
  110. };
  111. static struct plat_sci_port scif6_platform_data = {
  112. .mapbase = 0xe6c30000,
  113. .flags = UPF_BOOT_AUTOCONF,
  114. .type = PORT_SCIF,
  115. .irqs = { 91, 91, 91, 91 },
  116. };
  117. static struct platform_device scif6_device = {
  118. .name = "sh-sci",
  119. .id = 6,
  120. .dev = {
  121. .platform_data = &scif6_platform_data,
  122. },
  123. };
  124. static struct sh_timer_config cmt10_platform_data = {
  125. .name = "CMT10",
  126. .channel_offset = 0x10,
  127. .timer_bit = 0,
  128. .clk = "r_clk",
  129. .clockevent_rating = 125,
  130. .clocksource_rating = 125,
  131. };
  132. static struct resource cmt10_resources[] = {
  133. [0] = {
  134. .name = "CMT10",
  135. .start = 0xe6138010,
  136. .end = 0xe613801b,
  137. .flags = IORESOURCE_MEM,
  138. },
  139. [1] = {
  140. .start = 72,
  141. .flags = IORESOURCE_IRQ,
  142. },
  143. };
  144. static struct platform_device cmt10_device = {
  145. .name = "sh_cmt",
  146. .id = 10,
  147. .dev = {
  148. .platform_data = &cmt10_platform_data,
  149. },
  150. .resource = cmt10_resources,
  151. .num_resources = ARRAY_SIZE(cmt10_resources),
  152. };
  153. static struct platform_device *sh7367_early_devices[] __initdata = {
  154. &scif0_device,
  155. &scif1_device,
  156. &scif2_device,
  157. &scif3_device,
  158. &scif4_device,
  159. &scif5_device,
  160. &scif6_device,
  161. &cmt10_device,
  162. };
  163. void __init sh7367_add_standard_devices(void)
  164. {
  165. platform_add_devices(sh7367_early_devices,
  166. ARRAY_SIZE(sh7367_early_devices));
  167. }
  168. #define SYMSTPCR2 0xe6158048
  169. #define SYMSTPCR2_CMT1 (1 << 29)
  170. void __init sh7367_add_early_devices(void)
  171. {
  172. /* enable clock to CMT1 */
  173. __raw_writel(__raw_readl(SYMSTPCR2) & ~SYMSTPCR2_CMT1, SYMSTPCR2);
  174. early_platform_add_devices(sh7367_early_devices,
  175. ARRAY_SIZE(sh7367_early_devices));
  176. }