mainstone.c 15 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/mainstone.c
  3. *
  4. * Support for the Intel HCDDBBVA0 Development Platform.
  5. * (go figure how they came up with such name...)
  6. *
  7. * Author: Nicolas Pitre
  8. * Created: Nov 05, 2002
  9. * Copyright: MontaVista Software Inc.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/sysdev.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/sched.h>
  20. #include <linux/bitops.h>
  21. #include <linux/fb.h>
  22. #include <linux/ioport.h>
  23. #include <linux/mtd/mtd.h>
  24. #include <linux/mtd/partitions.h>
  25. #include <linux/input.h>
  26. #include <linux/gpio_keys.h>
  27. #include <linux/pwm_backlight.h>
  28. #include <linux/smc91x.h>
  29. #include <asm/types.h>
  30. #include <asm/setup.h>
  31. #include <asm/memory.h>
  32. #include <asm/mach-types.h>
  33. #include <mach/hardware.h>
  34. #include <asm/irq.h>
  35. #include <asm/sizes.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/map.h>
  38. #include <asm/mach/irq.h>
  39. #include <asm/mach/flash.h>
  40. #include <mach/pxa27x.h>
  41. #include <mach/gpio.h>
  42. #include <mach/mainstone.h>
  43. #include <mach/audio.h>
  44. #include <mach/pxafb.h>
  45. #include <plat/i2c.h>
  46. #include <mach/mmc.h>
  47. #include <mach/irda.h>
  48. #include <mach/ohci.h>
  49. #include <mach/pxa27x_keypad.h>
  50. #include "generic.h"
  51. #include "devices.h"
  52. static unsigned long mainstone_pin_config[] = {
  53. /* Chip Select */
  54. GPIO15_nCS_1,
  55. /* LCD - 16bpp Active TFT */
  56. GPIOxx_LCD_TFT_16BPP,
  57. GPIO16_PWM0_OUT, /* Backlight */
  58. /* MMC */
  59. GPIO32_MMC_CLK,
  60. GPIO112_MMC_CMD,
  61. GPIO92_MMC_DAT_0,
  62. GPIO109_MMC_DAT_1,
  63. GPIO110_MMC_DAT_2,
  64. GPIO111_MMC_DAT_3,
  65. /* USB Host Port 1 */
  66. GPIO88_USBH1_PWR,
  67. GPIO89_USBH1_PEN,
  68. /* PC Card */
  69. GPIO48_nPOE,
  70. GPIO49_nPWE,
  71. GPIO50_nPIOR,
  72. GPIO51_nPIOW,
  73. GPIO85_nPCE_1,
  74. GPIO54_nPCE_2,
  75. GPIO79_PSKTSEL,
  76. GPIO55_nPREG,
  77. GPIO56_nPWAIT,
  78. GPIO57_nIOIS16,
  79. /* AC97 */
  80. GPIO28_AC97_BITCLK,
  81. GPIO29_AC97_SDATA_IN_0,
  82. GPIO30_AC97_SDATA_OUT,
  83. GPIO31_AC97_SYNC,
  84. GPIO45_AC97_SYSCLK,
  85. /* Keypad */
  86. GPIO93_KP_DKIN_0,
  87. GPIO94_KP_DKIN_1,
  88. GPIO95_KP_DKIN_2,
  89. GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
  90. GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
  91. GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
  92. GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
  93. GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
  94. GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
  95. GPIO103_KP_MKOUT_0,
  96. GPIO104_KP_MKOUT_1,
  97. GPIO105_KP_MKOUT_2,
  98. GPIO106_KP_MKOUT_3,
  99. GPIO107_KP_MKOUT_4,
  100. GPIO108_KP_MKOUT_5,
  101. GPIO96_KP_MKOUT_6,
  102. /* I2C */
  103. GPIO117_I2C_SCL,
  104. GPIO118_I2C_SDA,
  105. /* GPIO */
  106. GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
  107. };
  108. static unsigned long mainstone_irq_enabled;
  109. static void mainstone_mask_irq(unsigned int irq)
  110. {
  111. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  112. MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
  113. }
  114. static void mainstone_unmask_irq(unsigned int irq)
  115. {
  116. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  117. /* the irq can be acknowledged only if deasserted, so it's done here */
  118. MST_INTSETCLR &= ~(1 << mainstone_irq);
  119. MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
  120. }
  121. static struct irq_chip mainstone_irq_chip = {
  122. .name = "FPGA",
  123. .ack = mainstone_mask_irq,
  124. .mask = mainstone_mask_irq,
  125. .unmask = mainstone_unmask_irq,
  126. };
  127. static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
  128. {
  129. unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
  130. do {
  131. desc->chip->ack(irq); /* clear useless edge notification */
  132. if (likely(pending)) {
  133. irq = MAINSTONE_IRQ(0) + __ffs(pending);
  134. generic_handle_irq(irq);
  135. }
  136. pending = MST_INTSETCLR & mainstone_irq_enabled;
  137. } while (pending);
  138. }
  139. static void __init mainstone_init_irq(void)
  140. {
  141. int irq;
  142. pxa27x_init_irq();
  143. /* setup extra Mainstone irqs */
  144. for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
  145. set_irq_chip(irq, &mainstone_irq_chip);
  146. set_irq_handler(irq, handle_level_irq);
  147. if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
  148. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
  149. else
  150. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  151. }
  152. set_irq_flags(MAINSTONE_IRQ(8), 0);
  153. set_irq_flags(MAINSTONE_IRQ(12), 0);
  154. MST_INTMSKENA = 0;
  155. MST_INTSETCLR = 0;
  156. set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
  157. set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
  158. }
  159. #ifdef CONFIG_PM
  160. static int mainstone_irq_resume(struct sys_device *dev)
  161. {
  162. MST_INTMSKENA = mainstone_irq_enabled;
  163. return 0;
  164. }
  165. static struct sysdev_class mainstone_irq_sysclass = {
  166. .name = "cpld_irq",
  167. .resume = mainstone_irq_resume,
  168. };
  169. static struct sys_device mainstone_irq_device = {
  170. .cls = &mainstone_irq_sysclass,
  171. };
  172. static int __init mainstone_irq_device_init(void)
  173. {
  174. int ret = -ENODEV;
  175. if (machine_is_mainstone()) {
  176. ret = sysdev_class_register(&mainstone_irq_sysclass);
  177. if (ret == 0)
  178. ret = sysdev_register(&mainstone_irq_device);
  179. }
  180. return ret;
  181. }
  182. device_initcall(mainstone_irq_device_init);
  183. #endif
  184. static struct resource smc91x_resources[] = {
  185. [0] = {
  186. .start = (MST_ETH_PHYS + 0x300),
  187. .end = (MST_ETH_PHYS + 0xfffff),
  188. .flags = IORESOURCE_MEM,
  189. },
  190. [1] = {
  191. .start = MAINSTONE_IRQ(3),
  192. .end = MAINSTONE_IRQ(3),
  193. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  194. }
  195. };
  196. static struct smc91x_platdata mainstone_smc91x_info = {
  197. .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
  198. SMC91X_NOWAIT | SMC91X_USE_DMA,
  199. };
  200. static struct platform_device smc91x_device = {
  201. .name = "smc91x",
  202. .id = 0,
  203. .num_resources = ARRAY_SIZE(smc91x_resources),
  204. .resource = smc91x_resources,
  205. .dev = {
  206. .platform_data = &mainstone_smc91x_info,
  207. },
  208. };
  209. static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
  210. {
  211. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  212. MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
  213. return 0;
  214. }
  215. static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
  216. {
  217. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  218. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  219. }
  220. static long mst_audio_suspend_mask;
  221. static void mst_audio_suspend(void *priv)
  222. {
  223. mst_audio_suspend_mask = MST_MSCWR2;
  224. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  225. }
  226. static void mst_audio_resume(void *priv)
  227. {
  228. MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
  229. }
  230. static pxa2xx_audio_ops_t mst_audio_ops = {
  231. .startup = mst_audio_startup,
  232. .shutdown = mst_audio_shutdown,
  233. .suspend = mst_audio_suspend,
  234. .resume = mst_audio_resume,
  235. };
  236. static struct resource flash_resources[] = {
  237. [0] = {
  238. .start = PXA_CS0_PHYS,
  239. .end = PXA_CS0_PHYS + SZ_64M - 1,
  240. .flags = IORESOURCE_MEM,
  241. },
  242. [1] = {
  243. .start = PXA_CS1_PHYS,
  244. .end = PXA_CS1_PHYS + SZ_64M - 1,
  245. .flags = IORESOURCE_MEM,
  246. },
  247. };
  248. static struct mtd_partition mainstoneflash0_partitions[] = {
  249. {
  250. .name = "Bootloader",
  251. .size = 0x00040000,
  252. .offset = 0,
  253. .mask_flags = MTD_WRITEABLE /* force read-only */
  254. },{
  255. .name = "Kernel",
  256. .size = 0x00400000,
  257. .offset = 0x00040000,
  258. },{
  259. .name = "Filesystem",
  260. .size = MTDPART_SIZ_FULL,
  261. .offset = 0x00440000
  262. }
  263. };
  264. static struct flash_platform_data mst_flash_data[2] = {
  265. {
  266. .map_name = "cfi_probe",
  267. .parts = mainstoneflash0_partitions,
  268. .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
  269. }, {
  270. .map_name = "cfi_probe",
  271. .parts = NULL,
  272. .nr_parts = 0,
  273. }
  274. };
  275. static struct platform_device mst_flash_device[2] = {
  276. {
  277. .name = "pxa2xx-flash",
  278. .id = 0,
  279. .dev = {
  280. .platform_data = &mst_flash_data[0],
  281. },
  282. .resource = &flash_resources[0],
  283. .num_resources = 1,
  284. },
  285. {
  286. .name = "pxa2xx-flash",
  287. .id = 1,
  288. .dev = {
  289. .platform_data = &mst_flash_data[1],
  290. },
  291. .resource = &flash_resources[1],
  292. .num_resources = 1,
  293. },
  294. };
  295. #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
  296. static struct platform_pwm_backlight_data mainstone_backlight_data = {
  297. .pwm_id = 0,
  298. .max_brightness = 1023,
  299. .dft_brightness = 1023,
  300. .pwm_period_ns = 78770,
  301. };
  302. static struct platform_device mainstone_backlight_device = {
  303. .name = "pwm-backlight",
  304. .dev = {
  305. .parent = &pxa27x_device_pwm0.dev,
  306. .platform_data = &mainstone_backlight_data,
  307. },
  308. };
  309. static void __init mainstone_backlight_register(void)
  310. {
  311. int ret = platform_device_register(&mainstone_backlight_device);
  312. if (ret)
  313. printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
  314. }
  315. #else
  316. #define mainstone_backlight_register() do { } while (0)
  317. #endif
  318. static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
  319. .pixclock = 50000,
  320. .xres = 640,
  321. .yres = 480,
  322. .bpp = 16,
  323. .hsync_len = 1,
  324. .left_margin = 0x9f,
  325. .right_margin = 1,
  326. .vsync_len = 44,
  327. .upper_margin = 0,
  328. .lower_margin = 0,
  329. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  330. };
  331. static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
  332. .pixclock = 110000,
  333. .xres = 240,
  334. .yres = 320,
  335. .bpp = 16,
  336. .hsync_len = 4,
  337. .left_margin = 8,
  338. .right_margin = 20,
  339. .vsync_len = 3,
  340. .upper_margin = 1,
  341. .lower_margin = 10,
  342. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  343. };
  344. static struct pxafb_mach_info mainstone_pxafb_info = {
  345. .num_modes = 1,
  346. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  347. };
  348. static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
  349. {
  350. int err;
  351. /* make sure SD/Memory Stick multiplexer's signals
  352. * are routed to MMC controller
  353. */
  354. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  355. err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
  356. "MMC card detect", data);
  357. if (err)
  358. printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
  359. return err;
  360. }
  361. static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
  362. {
  363. struct pxamci_platform_data* p_d = dev->platform_data;
  364. if (( 1 << vdd) & p_d->ocr_mask) {
  365. printk(KERN_DEBUG "%s: on\n", __func__);
  366. MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
  367. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  368. } else {
  369. printk(KERN_DEBUG "%s: off\n", __func__);
  370. MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
  371. }
  372. }
  373. static void mainstone_mci_exit(struct device *dev, void *data)
  374. {
  375. free_irq(MAINSTONE_MMC_IRQ, data);
  376. }
  377. static struct pxamci_platform_data mainstone_mci_platform_data = {
  378. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  379. .init = mainstone_mci_init,
  380. .setpower = mainstone_mci_setpower,
  381. .exit = mainstone_mci_exit,
  382. .gpio_card_detect = -1,
  383. .gpio_card_ro = -1,
  384. .gpio_power = -1,
  385. };
  386. static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
  387. {
  388. unsigned long flags;
  389. local_irq_save(flags);
  390. if (mode & IR_SIRMODE) {
  391. MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
  392. } else if (mode & IR_FIRMODE) {
  393. MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
  394. }
  395. pxa2xx_transceiver_mode(dev, mode);
  396. if (mode & IR_OFF) {
  397. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
  398. } else {
  399. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
  400. }
  401. local_irq_restore(flags);
  402. }
  403. static struct pxaficp_platform_data mainstone_ficp_platform_data = {
  404. .gpio_pwdown = -1,
  405. .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
  406. .transceiver_mode = mainstone_irda_transceiver_mode,
  407. };
  408. static struct gpio_keys_button gpio_keys_button[] = {
  409. [0] = {
  410. .desc = "wakeup",
  411. .code = KEY_SUSPEND,
  412. .type = EV_KEY,
  413. .gpio = 1,
  414. .wakeup = 1,
  415. },
  416. };
  417. static struct gpio_keys_platform_data mainstone_gpio_keys = {
  418. .buttons = gpio_keys_button,
  419. .nbuttons = 1,
  420. };
  421. static struct platform_device mst_gpio_keys_device = {
  422. .name = "gpio-keys",
  423. .id = -1,
  424. .dev = {
  425. .platform_data = &mainstone_gpio_keys,
  426. },
  427. };
  428. static struct platform_device *platform_devices[] __initdata = {
  429. &smc91x_device,
  430. &mst_flash_device[0],
  431. &mst_flash_device[1],
  432. &mst_gpio_keys_device,
  433. };
  434. static struct pxaohci_platform_data mainstone_ohci_platform_data = {
  435. .port_mode = PMM_PERPORT_MODE,
  436. .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
  437. };
  438. #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
  439. static unsigned int mainstone_matrix_keys[] = {
  440. KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
  441. KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
  442. KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
  443. KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
  444. KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
  445. KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
  446. KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
  447. KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
  448. KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
  449. KEY(0, 4, KEY_DOT), /* . */
  450. KEY(1, 4, KEY_CLOSE), /* @ */
  451. KEY(4, 4, KEY_SLASH),
  452. KEY(5, 4, KEY_BACKSLASH),
  453. KEY(0, 5, KEY_HOME),
  454. KEY(1, 5, KEY_LEFTSHIFT),
  455. KEY(2, 5, KEY_SPACE),
  456. KEY(3, 5, KEY_SPACE),
  457. KEY(4, 5, KEY_ENTER),
  458. KEY(5, 5, KEY_BACKSPACE),
  459. KEY(0, 6, KEY_UP),
  460. KEY(1, 6, KEY_DOWN),
  461. KEY(2, 6, KEY_LEFT),
  462. KEY(3, 6, KEY_RIGHT),
  463. KEY(4, 6, KEY_SELECT),
  464. };
  465. struct pxa27x_keypad_platform_data mainstone_keypad_info = {
  466. .matrix_key_rows = 6,
  467. .matrix_key_cols = 7,
  468. .matrix_key_map = mainstone_matrix_keys,
  469. .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys),
  470. .enable_rotary0 = 1,
  471. .rotary0_up_key = KEY_UP,
  472. .rotary0_down_key = KEY_DOWN,
  473. .debounce_interval = 30,
  474. };
  475. static void __init mainstone_init_keypad(void)
  476. {
  477. pxa_set_keypad_info(&mainstone_keypad_info);
  478. }
  479. #else
  480. static inline void mainstone_init_keypad(void) {}
  481. #endif
  482. static void __init mainstone_init(void)
  483. {
  484. int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
  485. pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
  486. pxa_set_ffuart_info(NULL);
  487. pxa_set_btuart_info(NULL);
  488. pxa_set_stuart_info(NULL);
  489. mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
  490. mst_flash_data[1].width = 4;
  491. /* Compensate for SW7 which swaps the flash banks */
  492. mst_flash_data[SW7].name = "processor-flash";
  493. mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
  494. printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
  495. mst_flash_data[0].name);
  496. /* system bus arbiter setting
  497. * - Core_Park
  498. * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
  499. */
  500. ARB_CNTRL = ARB_CORE_PARK | 0x234;
  501. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  502. /* reading Mainstone's "Virtual Configuration Register"
  503. might be handy to select LCD type here */
  504. if (0)
  505. mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
  506. else
  507. mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
  508. set_pxa_fb_info(&mainstone_pxafb_info);
  509. mainstone_backlight_register();
  510. pxa_set_mci_info(&mainstone_mci_platform_data);
  511. pxa_set_ficp_info(&mainstone_ficp_platform_data);
  512. pxa_set_ohci_info(&mainstone_ohci_platform_data);
  513. pxa_set_i2c_info(NULL);
  514. pxa_set_ac97_info(&mst_audio_ops);
  515. mainstone_init_keypad();
  516. }
  517. static struct map_desc mainstone_io_desc[] __initdata = {
  518. { /* CPLD */
  519. .virtual = MST_FPGA_VIRT,
  520. .pfn = __phys_to_pfn(MST_FPGA_PHYS),
  521. .length = 0x00100000,
  522. .type = MT_DEVICE
  523. }
  524. };
  525. static void __init mainstone_map_io(void)
  526. {
  527. pxa_map_io();
  528. iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
  529. /* for use I SRAM as framebuffer. */
  530. PSLR |= 0xF04;
  531. PCFR = 0x66;
  532. }
  533. MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
  534. /* Maintainer: MontaVista Software Inc. */
  535. .phys_io = 0x40000000,
  536. .boot_params = 0xa0000100, /* BLOB boot parameter setting */
  537. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  538. .map_io = mainstone_map_io,
  539. .init_irq = mainstone_init_irq,
  540. .timer = &pxa_timer,
  541. .init_machine = mainstone_init,
  542. MACHINE_END