devices.c 20 KB

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  1. #include <linux/module.h>
  2. #include <linux/kernel.h>
  3. #include <linux/init.h>
  4. #include <linux/platform_device.h>
  5. #include <linux/dma-mapping.h>
  6. #include <mach/udc.h>
  7. #include <mach/pxafb.h>
  8. #include <mach/mmc.h>
  9. #include <mach/irda.h>
  10. #include <mach/ohci.h>
  11. #include <mach/pxa27x_keypad.h>
  12. #include <mach/pxa2xx_spi.h>
  13. #include <mach/camera.h>
  14. #include <mach/audio.h>
  15. #include <mach/hardware.h>
  16. #include <plat/i2c.h>
  17. #include <plat/pxa3xx_nand.h>
  18. #include "devices.h"
  19. #include "generic.h"
  20. void __init pxa_register_device(struct platform_device *dev, void *data)
  21. {
  22. int ret;
  23. dev->dev.platform_data = data;
  24. ret = platform_device_register(dev);
  25. if (ret)
  26. dev_err(&dev->dev, "unable to register device: %d\n", ret);
  27. }
  28. static struct resource pxamci_resources[] = {
  29. [0] = {
  30. .start = 0x41100000,
  31. .end = 0x41100fff,
  32. .flags = IORESOURCE_MEM,
  33. },
  34. [1] = {
  35. .start = IRQ_MMC,
  36. .end = IRQ_MMC,
  37. .flags = IORESOURCE_IRQ,
  38. },
  39. [2] = {
  40. .start = 21,
  41. .end = 21,
  42. .flags = IORESOURCE_DMA,
  43. },
  44. [3] = {
  45. .start = 22,
  46. .end = 22,
  47. .flags = IORESOURCE_DMA,
  48. },
  49. };
  50. static u64 pxamci_dmamask = 0xffffffffUL;
  51. struct platform_device pxa_device_mci = {
  52. .name = "pxa2xx-mci",
  53. .id = 0,
  54. .dev = {
  55. .dma_mask = &pxamci_dmamask,
  56. .coherent_dma_mask = 0xffffffff,
  57. },
  58. .num_resources = ARRAY_SIZE(pxamci_resources),
  59. .resource = pxamci_resources,
  60. };
  61. void __init pxa_set_mci_info(struct pxamci_platform_data *info)
  62. {
  63. pxa_register_device(&pxa_device_mci, info);
  64. }
  65. static struct pxa2xx_udc_mach_info pxa_udc_info = {
  66. .gpio_pullup = -1,
  67. .gpio_vbus = -1,
  68. };
  69. void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
  70. {
  71. memcpy(&pxa_udc_info, info, sizeof *info);
  72. }
  73. static struct resource pxa2xx_udc_resources[] = {
  74. [0] = {
  75. .start = 0x40600000,
  76. .end = 0x4060ffff,
  77. .flags = IORESOURCE_MEM,
  78. },
  79. [1] = {
  80. .start = IRQ_USB,
  81. .end = IRQ_USB,
  82. .flags = IORESOURCE_IRQ,
  83. },
  84. };
  85. static u64 udc_dma_mask = ~(u32)0;
  86. struct platform_device pxa25x_device_udc = {
  87. .name = "pxa25x-udc",
  88. .id = -1,
  89. .resource = pxa2xx_udc_resources,
  90. .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
  91. .dev = {
  92. .platform_data = &pxa_udc_info,
  93. .dma_mask = &udc_dma_mask,
  94. }
  95. };
  96. struct platform_device pxa27x_device_udc = {
  97. .name = "pxa27x-udc",
  98. .id = -1,
  99. .resource = pxa2xx_udc_resources,
  100. .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
  101. .dev = {
  102. .platform_data = &pxa_udc_info,
  103. .dma_mask = &udc_dma_mask,
  104. }
  105. };
  106. static struct resource pxafb_resources[] = {
  107. [0] = {
  108. .start = 0x44000000,
  109. .end = 0x4400ffff,
  110. .flags = IORESOURCE_MEM,
  111. },
  112. [1] = {
  113. .start = IRQ_LCD,
  114. .end = IRQ_LCD,
  115. .flags = IORESOURCE_IRQ,
  116. },
  117. };
  118. static u64 fb_dma_mask = ~(u64)0;
  119. struct platform_device pxa_device_fb = {
  120. .name = "pxa2xx-fb",
  121. .id = -1,
  122. .dev = {
  123. .dma_mask = &fb_dma_mask,
  124. .coherent_dma_mask = 0xffffffff,
  125. },
  126. .num_resources = ARRAY_SIZE(pxafb_resources),
  127. .resource = pxafb_resources,
  128. };
  129. void __init set_pxa_fb_info(struct pxafb_mach_info *info)
  130. {
  131. pxa_register_device(&pxa_device_fb, info);
  132. }
  133. void __init set_pxa_fb_parent(struct device *parent_dev)
  134. {
  135. pxa_device_fb.dev.parent = parent_dev;
  136. }
  137. static struct resource pxa_resource_ffuart[] = {
  138. {
  139. .start = 0x40100000,
  140. .end = 0x40100023,
  141. .flags = IORESOURCE_MEM,
  142. }, {
  143. .start = IRQ_FFUART,
  144. .end = IRQ_FFUART,
  145. .flags = IORESOURCE_IRQ,
  146. }
  147. };
  148. struct platform_device pxa_device_ffuart = {
  149. .name = "pxa2xx-uart",
  150. .id = 0,
  151. .resource = pxa_resource_ffuart,
  152. .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
  153. };
  154. void __init pxa_set_ffuart_info(void *info)
  155. {
  156. pxa_register_device(&pxa_device_ffuart, info);
  157. }
  158. static struct resource pxa_resource_btuart[] = {
  159. {
  160. .start = 0x40200000,
  161. .end = 0x40200023,
  162. .flags = IORESOURCE_MEM,
  163. }, {
  164. .start = IRQ_BTUART,
  165. .end = IRQ_BTUART,
  166. .flags = IORESOURCE_IRQ,
  167. }
  168. };
  169. struct platform_device pxa_device_btuart = {
  170. .name = "pxa2xx-uart",
  171. .id = 1,
  172. .resource = pxa_resource_btuart,
  173. .num_resources = ARRAY_SIZE(pxa_resource_btuart),
  174. };
  175. void __init pxa_set_btuart_info(void *info)
  176. {
  177. pxa_register_device(&pxa_device_btuart, info);
  178. }
  179. static struct resource pxa_resource_stuart[] = {
  180. {
  181. .start = 0x40700000,
  182. .end = 0x40700023,
  183. .flags = IORESOURCE_MEM,
  184. }, {
  185. .start = IRQ_STUART,
  186. .end = IRQ_STUART,
  187. .flags = IORESOURCE_IRQ,
  188. }
  189. };
  190. struct platform_device pxa_device_stuart = {
  191. .name = "pxa2xx-uart",
  192. .id = 2,
  193. .resource = pxa_resource_stuart,
  194. .num_resources = ARRAY_SIZE(pxa_resource_stuart),
  195. };
  196. void __init pxa_set_stuart_info(void *info)
  197. {
  198. pxa_register_device(&pxa_device_stuart, info);
  199. }
  200. static struct resource pxa_resource_hwuart[] = {
  201. {
  202. .start = 0x41600000,
  203. .end = 0x4160002F,
  204. .flags = IORESOURCE_MEM,
  205. }, {
  206. .start = IRQ_HWUART,
  207. .end = IRQ_HWUART,
  208. .flags = IORESOURCE_IRQ,
  209. }
  210. };
  211. struct platform_device pxa_device_hwuart = {
  212. .name = "pxa2xx-uart",
  213. .id = 3,
  214. .resource = pxa_resource_hwuart,
  215. .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
  216. };
  217. void __init pxa_set_hwuart_info(void *info)
  218. {
  219. if (cpu_is_pxa255())
  220. pxa_register_device(&pxa_device_hwuart, info);
  221. else
  222. pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
  223. }
  224. static struct resource pxai2c_resources[] = {
  225. {
  226. .start = 0x40301680,
  227. .end = 0x403016a3,
  228. .flags = IORESOURCE_MEM,
  229. }, {
  230. .start = IRQ_I2C,
  231. .end = IRQ_I2C,
  232. .flags = IORESOURCE_IRQ,
  233. },
  234. };
  235. struct platform_device pxa_device_i2c = {
  236. .name = "pxa2xx-i2c",
  237. .id = 0,
  238. .resource = pxai2c_resources,
  239. .num_resources = ARRAY_SIZE(pxai2c_resources),
  240. };
  241. void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
  242. {
  243. pxa_register_device(&pxa_device_i2c, info);
  244. }
  245. #ifdef CONFIG_PXA27x
  246. static struct resource pxa27x_resources_i2c_power[] = {
  247. {
  248. .start = 0x40f00180,
  249. .end = 0x40f001a3,
  250. .flags = IORESOURCE_MEM,
  251. }, {
  252. .start = IRQ_PWRI2C,
  253. .end = IRQ_PWRI2C,
  254. .flags = IORESOURCE_IRQ,
  255. },
  256. };
  257. struct platform_device pxa27x_device_i2c_power = {
  258. .name = "pxa2xx-i2c",
  259. .id = 1,
  260. .resource = pxa27x_resources_i2c_power,
  261. .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
  262. };
  263. #endif
  264. #ifdef CONFIG_PXA3xx
  265. static struct resource pxa3xx_resources_i2c_power[] = {
  266. {
  267. .start = 0x40f500c0,
  268. .end = 0x40f500d3,
  269. .flags = IORESOURCE_MEM,
  270. }, {
  271. .start = IRQ_PWRI2C,
  272. .end = IRQ_PWRI2C,
  273. .flags = IORESOURCE_IRQ,
  274. },
  275. };
  276. struct platform_device pxa3xx_device_i2c_power = {
  277. .name = "pxa3xx-pwri2c",
  278. .id = 1,
  279. .resource = pxa3xx_resources_i2c_power,
  280. .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
  281. };
  282. #endif
  283. static struct resource pxai2s_resources[] = {
  284. {
  285. .start = 0x40400000,
  286. .end = 0x40400083,
  287. .flags = IORESOURCE_MEM,
  288. }, {
  289. .start = IRQ_I2S,
  290. .end = IRQ_I2S,
  291. .flags = IORESOURCE_IRQ,
  292. },
  293. };
  294. struct platform_device pxa_device_i2s = {
  295. .name = "pxa2xx-i2s",
  296. .id = -1,
  297. .resource = pxai2s_resources,
  298. .num_resources = ARRAY_SIZE(pxai2s_resources),
  299. };
  300. static u64 pxaficp_dmamask = ~(u32)0;
  301. struct platform_device pxa_device_ficp = {
  302. .name = "pxa2xx-ir",
  303. .id = -1,
  304. .dev = {
  305. .dma_mask = &pxaficp_dmamask,
  306. .coherent_dma_mask = 0xffffffff,
  307. },
  308. };
  309. void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
  310. {
  311. pxa_register_device(&pxa_device_ficp, info);
  312. }
  313. static struct resource pxa_rtc_resources[] = {
  314. [0] = {
  315. .start = 0x40900000,
  316. .end = 0x40900000 + 0x3b,
  317. .flags = IORESOURCE_MEM,
  318. },
  319. [1] = {
  320. .start = IRQ_RTC1Hz,
  321. .end = IRQ_RTC1Hz,
  322. .flags = IORESOURCE_IRQ,
  323. },
  324. [2] = {
  325. .start = IRQ_RTCAlrm,
  326. .end = IRQ_RTCAlrm,
  327. .flags = IORESOURCE_IRQ,
  328. },
  329. };
  330. struct platform_device sa1100_device_rtc = {
  331. .name = "sa1100-rtc",
  332. .id = -1,
  333. };
  334. struct platform_device pxa_device_rtc = {
  335. .name = "pxa-rtc",
  336. .id = -1,
  337. .num_resources = ARRAY_SIZE(pxa_rtc_resources),
  338. .resource = pxa_rtc_resources,
  339. };
  340. static struct resource pxa_ac97_resources[] = {
  341. [0] = {
  342. .start = 0x40500000,
  343. .end = 0x40500000 + 0xfff,
  344. .flags = IORESOURCE_MEM,
  345. },
  346. [1] = {
  347. .start = IRQ_AC97,
  348. .end = IRQ_AC97,
  349. .flags = IORESOURCE_IRQ,
  350. },
  351. };
  352. static u64 pxa_ac97_dmamask = 0xffffffffUL;
  353. struct platform_device pxa_device_ac97 = {
  354. .name = "pxa2xx-ac97",
  355. .id = -1,
  356. .dev = {
  357. .dma_mask = &pxa_ac97_dmamask,
  358. .coherent_dma_mask = 0xffffffff,
  359. },
  360. .num_resources = ARRAY_SIZE(pxa_ac97_resources),
  361. .resource = pxa_ac97_resources,
  362. };
  363. void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
  364. {
  365. pxa_register_device(&pxa_device_ac97, ops);
  366. }
  367. #ifdef CONFIG_PXA25x
  368. static struct resource pxa25x_resource_pwm0[] = {
  369. [0] = {
  370. .start = 0x40b00000,
  371. .end = 0x40b0000f,
  372. .flags = IORESOURCE_MEM,
  373. },
  374. };
  375. struct platform_device pxa25x_device_pwm0 = {
  376. .name = "pxa25x-pwm",
  377. .id = 0,
  378. .resource = pxa25x_resource_pwm0,
  379. .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
  380. };
  381. static struct resource pxa25x_resource_pwm1[] = {
  382. [0] = {
  383. .start = 0x40c00000,
  384. .end = 0x40c0000f,
  385. .flags = IORESOURCE_MEM,
  386. },
  387. };
  388. struct platform_device pxa25x_device_pwm1 = {
  389. .name = "pxa25x-pwm",
  390. .id = 1,
  391. .resource = pxa25x_resource_pwm1,
  392. .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
  393. };
  394. static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
  395. static struct resource pxa25x_resource_ssp[] = {
  396. [0] = {
  397. .start = 0x41000000,
  398. .end = 0x4100001f,
  399. .flags = IORESOURCE_MEM,
  400. },
  401. [1] = {
  402. .start = IRQ_SSP,
  403. .end = IRQ_SSP,
  404. .flags = IORESOURCE_IRQ,
  405. },
  406. [2] = {
  407. /* DRCMR for RX */
  408. .start = 13,
  409. .end = 13,
  410. .flags = IORESOURCE_DMA,
  411. },
  412. [3] = {
  413. /* DRCMR for TX */
  414. .start = 14,
  415. .end = 14,
  416. .flags = IORESOURCE_DMA,
  417. },
  418. };
  419. struct platform_device pxa25x_device_ssp = {
  420. .name = "pxa25x-ssp",
  421. .id = 0,
  422. .dev = {
  423. .dma_mask = &pxa25x_ssp_dma_mask,
  424. .coherent_dma_mask = DMA_BIT_MASK(32),
  425. },
  426. .resource = pxa25x_resource_ssp,
  427. .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
  428. };
  429. static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
  430. static struct resource pxa25x_resource_nssp[] = {
  431. [0] = {
  432. .start = 0x41400000,
  433. .end = 0x4140002f,
  434. .flags = IORESOURCE_MEM,
  435. },
  436. [1] = {
  437. .start = IRQ_NSSP,
  438. .end = IRQ_NSSP,
  439. .flags = IORESOURCE_IRQ,
  440. },
  441. [2] = {
  442. /* DRCMR for RX */
  443. .start = 15,
  444. .end = 15,
  445. .flags = IORESOURCE_DMA,
  446. },
  447. [3] = {
  448. /* DRCMR for TX */
  449. .start = 16,
  450. .end = 16,
  451. .flags = IORESOURCE_DMA,
  452. },
  453. };
  454. struct platform_device pxa25x_device_nssp = {
  455. .name = "pxa25x-nssp",
  456. .id = 1,
  457. .dev = {
  458. .dma_mask = &pxa25x_nssp_dma_mask,
  459. .coherent_dma_mask = DMA_BIT_MASK(32),
  460. },
  461. .resource = pxa25x_resource_nssp,
  462. .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
  463. };
  464. static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
  465. static struct resource pxa25x_resource_assp[] = {
  466. [0] = {
  467. .start = 0x41500000,
  468. .end = 0x4150002f,
  469. .flags = IORESOURCE_MEM,
  470. },
  471. [1] = {
  472. .start = IRQ_ASSP,
  473. .end = IRQ_ASSP,
  474. .flags = IORESOURCE_IRQ,
  475. },
  476. [2] = {
  477. /* DRCMR for RX */
  478. .start = 23,
  479. .end = 23,
  480. .flags = IORESOURCE_DMA,
  481. },
  482. [3] = {
  483. /* DRCMR for TX */
  484. .start = 24,
  485. .end = 24,
  486. .flags = IORESOURCE_DMA,
  487. },
  488. };
  489. struct platform_device pxa25x_device_assp = {
  490. /* ASSP is basically equivalent to NSSP */
  491. .name = "pxa25x-nssp",
  492. .id = 2,
  493. .dev = {
  494. .dma_mask = &pxa25x_assp_dma_mask,
  495. .coherent_dma_mask = DMA_BIT_MASK(32),
  496. },
  497. .resource = pxa25x_resource_assp,
  498. .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
  499. };
  500. #endif /* CONFIG_PXA25x */
  501. #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
  502. static struct resource pxa27x_resource_keypad[] = {
  503. [0] = {
  504. .start = 0x41500000,
  505. .end = 0x4150004c,
  506. .flags = IORESOURCE_MEM,
  507. },
  508. [1] = {
  509. .start = IRQ_KEYPAD,
  510. .end = IRQ_KEYPAD,
  511. .flags = IORESOURCE_IRQ,
  512. },
  513. };
  514. struct platform_device pxa27x_device_keypad = {
  515. .name = "pxa27x-keypad",
  516. .id = -1,
  517. .resource = pxa27x_resource_keypad,
  518. .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
  519. };
  520. void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
  521. {
  522. pxa_register_device(&pxa27x_device_keypad, info);
  523. }
  524. static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
  525. static struct resource pxa27x_resource_ohci[] = {
  526. [0] = {
  527. .start = 0x4C000000,
  528. .end = 0x4C00ff6f,
  529. .flags = IORESOURCE_MEM,
  530. },
  531. [1] = {
  532. .start = IRQ_USBH1,
  533. .end = IRQ_USBH1,
  534. .flags = IORESOURCE_IRQ,
  535. },
  536. };
  537. struct platform_device pxa27x_device_ohci = {
  538. .name = "pxa27x-ohci",
  539. .id = -1,
  540. .dev = {
  541. .dma_mask = &pxa27x_ohci_dma_mask,
  542. .coherent_dma_mask = DMA_BIT_MASK(32),
  543. },
  544. .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
  545. .resource = pxa27x_resource_ohci,
  546. };
  547. void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
  548. {
  549. pxa_register_device(&pxa27x_device_ohci, info);
  550. }
  551. static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
  552. static struct resource pxa27x_resource_ssp1[] = {
  553. [0] = {
  554. .start = 0x41000000,
  555. .end = 0x4100003f,
  556. .flags = IORESOURCE_MEM,
  557. },
  558. [1] = {
  559. .start = IRQ_SSP,
  560. .end = IRQ_SSP,
  561. .flags = IORESOURCE_IRQ,
  562. },
  563. [2] = {
  564. /* DRCMR for RX */
  565. .start = 13,
  566. .end = 13,
  567. .flags = IORESOURCE_DMA,
  568. },
  569. [3] = {
  570. /* DRCMR for TX */
  571. .start = 14,
  572. .end = 14,
  573. .flags = IORESOURCE_DMA,
  574. },
  575. };
  576. struct platform_device pxa27x_device_ssp1 = {
  577. .name = "pxa27x-ssp",
  578. .id = 0,
  579. .dev = {
  580. .dma_mask = &pxa27x_ssp1_dma_mask,
  581. .coherent_dma_mask = DMA_BIT_MASK(32),
  582. },
  583. .resource = pxa27x_resource_ssp1,
  584. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
  585. };
  586. static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
  587. static struct resource pxa27x_resource_ssp2[] = {
  588. [0] = {
  589. .start = 0x41700000,
  590. .end = 0x4170003f,
  591. .flags = IORESOURCE_MEM,
  592. },
  593. [1] = {
  594. .start = IRQ_SSP2,
  595. .end = IRQ_SSP2,
  596. .flags = IORESOURCE_IRQ,
  597. },
  598. [2] = {
  599. /* DRCMR for RX */
  600. .start = 15,
  601. .end = 15,
  602. .flags = IORESOURCE_DMA,
  603. },
  604. [3] = {
  605. /* DRCMR for TX */
  606. .start = 16,
  607. .end = 16,
  608. .flags = IORESOURCE_DMA,
  609. },
  610. };
  611. struct platform_device pxa27x_device_ssp2 = {
  612. .name = "pxa27x-ssp",
  613. .id = 1,
  614. .dev = {
  615. .dma_mask = &pxa27x_ssp2_dma_mask,
  616. .coherent_dma_mask = DMA_BIT_MASK(32),
  617. },
  618. .resource = pxa27x_resource_ssp2,
  619. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
  620. };
  621. static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
  622. static struct resource pxa27x_resource_ssp3[] = {
  623. [0] = {
  624. .start = 0x41900000,
  625. .end = 0x4190003f,
  626. .flags = IORESOURCE_MEM,
  627. },
  628. [1] = {
  629. .start = IRQ_SSP3,
  630. .end = IRQ_SSP3,
  631. .flags = IORESOURCE_IRQ,
  632. },
  633. [2] = {
  634. /* DRCMR for RX */
  635. .start = 66,
  636. .end = 66,
  637. .flags = IORESOURCE_DMA,
  638. },
  639. [3] = {
  640. /* DRCMR for TX */
  641. .start = 67,
  642. .end = 67,
  643. .flags = IORESOURCE_DMA,
  644. },
  645. };
  646. struct platform_device pxa27x_device_ssp3 = {
  647. .name = "pxa27x-ssp",
  648. .id = 2,
  649. .dev = {
  650. .dma_mask = &pxa27x_ssp3_dma_mask,
  651. .coherent_dma_mask = DMA_BIT_MASK(32),
  652. },
  653. .resource = pxa27x_resource_ssp3,
  654. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
  655. };
  656. static struct resource pxa27x_resource_pwm0[] = {
  657. [0] = {
  658. .start = 0x40b00000,
  659. .end = 0x40b0001f,
  660. .flags = IORESOURCE_MEM,
  661. },
  662. };
  663. struct platform_device pxa27x_device_pwm0 = {
  664. .name = "pxa27x-pwm",
  665. .id = 0,
  666. .resource = pxa27x_resource_pwm0,
  667. .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
  668. };
  669. static struct resource pxa27x_resource_pwm1[] = {
  670. [0] = {
  671. .start = 0x40c00000,
  672. .end = 0x40c0001f,
  673. .flags = IORESOURCE_MEM,
  674. },
  675. };
  676. struct platform_device pxa27x_device_pwm1 = {
  677. .name = "pxa27x-pwm",
  678. .id = 1,
  679. .resource = pxa27x_resource_pwm1,
  680. .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
  681. };
  682. static struct resource pxa27x_resource_camera[] = {
  683. [0] = {
  684. .start = 0x50000000,
  685. .end = 0x50000fff,
  686. .flags = IORESOURCE_MEM,
  687. },
  688. [1] = {
  689. .start = IRQ_CAMERA,
  690. .end = IRQ_CAMERA,
  691. .flags = IORESOURCE_IRQ,
  692. },
  693. };
  694. static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
  695. static struct platform_device pxa27x_device_camera = {
  696. .name = "pxa27x-camera",
  697. .id = 0, /* This is used to put cameras on this interface */
  698. .dev = {
  699. .dma_mask = &pxa27x_dma_mask_camera,
  700. .coherent_dma_mask = 0xffffffff,
  701. },
  702. .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
  703. .resource = pxa27x_resource_camera,
  704. };
  705. void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
  706. {
  707. pxa_register_device(&pxa27x_device_camera, info);
  708. }
  709. #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
  710. #ifdef CONFIG_PXA3xx
  711. static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
  712. static struct resource pxa3xx_resource_ssp4[] = {
  713. [0] = {
  714. .start = 0x41a00000,
  715. .end = 0x41a0003f,
  716. .flags = IORESOURCE_MEM,
  717. },
  718. [1] = {
  719. .start = IRQ_SSP4,
  720. .end = IRQ_SSP4,
  721. .flags = IORESOURCE_IRQ,
  722. },
  723. [2] = {
  724. /* DRCMR for RX */
  725. .start = 2,
  726. .end = 2,
  727. .flags = IORESOURCE_DMA,
  728. },
  729. [3] = {
  730. /* DRCMR for TX */
  731. .start = 3,
  732. .end = 3,
  733. .flags = IORESOURCE_DMA,
  734. },
  735. };
  736. struct platform_device pxa3xx_device_ssp4 = {
  737. /* PXA3xx SSP is basically equivalent to PXA27x */
  738. .name = "pxa27x-ssp",
  739. .id = 3,
  740. .dev = {
  741. .dma_mask = &pxa3xx_ssp4_dma_mask,
  742. .coherent_dma_mask = DMA_BIT_MASK(32),
  743. },
  744. .resource = pxa3xx_resource_ssp4,
  745. .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
  746. };
  747. static struct resource pxa3xx_resources_mci2[] = {
  748. [0] = {
  749. .start = 0x42000000,
  750. .end = 0x42000fff,
  751. .flags = IORESOURCE_MEM,
  752. },
  753. [1] = {
  754. .start = IRQ_MMC2,
  755. .end = IRQ_MMC2,
  756. .flags = IORESOURCE_IRQ,
  757. },
  758. [2] = {
  759. .start = 93,
  760. .end = 93,
  761. .flags = IORESOURCE_DMA,
  762. },
  763. [3] = {
  764. .start = 94,
  765. .end = 94,
  766. .flags = IORESOURCE_DMA,
  767. },
  768. };
  769. struct platform_device pxa3xx_device_mci2 = {
  770. .name = "pxa2xx-mci",
  771. .id = 1,
  772. .dev = {
  773. .dma_mask = &pxamci_dmamask,
  774. .coherent_dma_mask = 0xffffffff,
  775. },
  776. .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
  777. .resource = pxa3xx_resources_mci2,
  778. };
  779. void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
  780. {
  781. pxa_register_device(&pxa3xx_device_mci2, info);
  782. }
  783. static struct resource pxa3xx_resources_mci3[] = {
  784. [0] = {
  785. .start = 0x42500000,
  786. .end = 0x42500fff,
  787. .flags = IORESOURCE_MEM,
  788. },
  789. [1] = {
  790. .start = IRQ_MMC3,
  791. .end = IRQ_MMC3,
  792. .flags = IORESOURCE_IRQ,
  793. },
  794. [2] = {
  795. .start = 100,
  796. .end = 100,
  797. .flags = IORESOURCE_DMA,
  798. },
  799. [3] = {
  800. .start = 101,
  801. .end = 101,
  802. .flags = IORESOURCE_DMA,
  803. },
  804. };
  805. struct platform_device pxa3xx_device_mci3 = {
  806. .name = "pxa2xx-mci",
  807. .id = 2,
  808. .dev = {
  809. .dma_mask = &pxamci_dmamask,
  810. .coherent_dma_mask = 0xffffffff,
  811. },
  812. .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
  813. .resource = pxa3xx_resources_mci3,
  814. };
  815. void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
  816. {
  817. pxa_register_device(&pxa3xx_device_mci3, info);
  818. }
  819. static struct resource pxa3xx_resources_nand[] = {
  820. [0] = {
  821. .start = 0x43100000,
  822. .end = 0x43100053,
  823. .flags = IORESOURCE_MEM,
  824. },
  825. [1] = {
  826. .start = IRQ_NAND,
  827. .end = IRQ_NAND,
  828. .flags = IORESOURCE_IRQ,
  829. },
  830. [2] = {
  831. /* DRCMR for Data DMA */
  832. .start = 97,
  833. .end = 97,
  834. .flags = IORESOURCE_DMA,
  835. },
  836. [3] = {
  837. /* DRCMR for Command DMA */
  838. .start = 99,
  839. .end = 99,
  840. .flags = IORESOURCE_DMA,
  841. },
  842. };
  843. static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
  844. struct platform_device pxa3xx_device_nand = {
  845. .name = "pxa3xx-nand",
  846. .id = -1,
  847. .dev = {
  848. .dma_mask = &pxa3xx_nand_dma_mask,
  849. .coherent_dma_mask = DMA_BIT_MASK(32),
  850. },
  851. .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
  852. .resource = pxa3xx_resources_nand,
  853. };
  854. void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
  855. {
  856. pxa_register_device(&pxa3xx_device_nand, info);
  857. }
  858. static struct resource pxa3xx_resources_gcu[] = {
  859. {
  860. .start = 0x54000000,
  861. .end = 0x54000fff,
  862. .flags = IORESOURCE_MEM,
  863. },
  864. {
  865. .start = IRQ_GCU,
  866. .end = IRQ_GCU,
  867. .flags = IORESOURCE_IRQ,
  868. },
  869. };
  870. static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
  871. struct platform_device pxa3xx_device_gcu = {
  872. .name = "pxa3xx-gcu",
  873. .id = -1,
  874. .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
  875. .resource = pxa3xx_resources_gcu,
  876. .dev = {
  877. .dma_mask = &pxa3xx_gcu_dmamask,
  878. .coherent_dma_mask = 0xffffffff,
  879. },
  880. };
  881. #endif /* CONFIG_PXA3xx */
  882. /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
  883. * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
  884. void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
  885. {
  886. struct platform_device *pd;
  887. pd = platform_device_alloc("pxa2xx-spi", id);
  888. if (pd == NULL) {
  889. printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
  890. id);
  891. return;
  892. }
  893. pd->dev.platform_data = info;
  894. platform_device_add(pd);
  895. }