bfin_5xx.c 26 KB

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  1. /*
  2. * File: drivers/serial/bfin_5xx.c
  3. * Based on: Based on drivers/serial/sa1100.c
  4. * Author: Aubrey Li <aubrey.li@analog.com>
  5. *
  6. * Created:
  7. * Description: Driver for blackfin 5xx serial ports
  8. *
  9. * Modified:
  10. * Copyright 2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/module.h>
  33. #include <linux/ioport.h>
  34. #include <linux/init.h>
  35. #include <linux/console.h>
  36. #include <linux/sysrq.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/tty.h>
  39. #include <linux/tty_flip.h>
  40. #include <linux/serial_core.h>
  41. #include <asm/gpio.h>
  42. #include <asm/mach/bfin_serial_5xx.h>
  43. #ifdef CONFIG_SERIAL_BFIN_DMA
  44. #include <linux/dma-mapping.h>
  45. #include <asm/io.h>
  46. #include <asm/irq.h>
  47. #include <asm/cacheflush.h>
  48. #endif
  49. /* UART name and device definitions */
  50. #define BFIN_SERIAL_NAME "ttyBF"
  51. #define BFIN_SERIAL_MAJOR 204
  52. #define BFIN_SERIAL_MINOR 64
  53. /*
  54. * Setup for console. Argument comes from the menuconfig
  55. */
  56. #define DMA_RX_XCOUNT 512
  57. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  58. #define DMA_RX_FLUSH_JIFFIES 5
  59. #ifdef CONFIG_SERIAL_BFIN_DMA
  60. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  61. #else
  62. static void bfin_serial_do_work(struct work_struct *work);
  63. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  64. static void local_put_char(struct bfin_serial_port *uart, char ch);
  65. #endif
  66. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
  67. /*
  68. * interrupts are disabled on entry
  69. */
  70. static void bfin_serial_stop_tx(struct uart_port *port)
  71. {
  72. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  73. #ifdef CONFIG_SERIAL_BFIN_DMA
  74. disable_dma(uart->tx_dma_channel);
  75. #else
  76. unsigned short ier;
  77. ier = UART_GET_IER(uart);
  78. ier &= ~ETBEI;
  79. UART_PUT_IER(uart, ier);
  80. #endif
  81. }
  82. /*
  83. * port is locked and interrupts are disabled
  84. */
  85. static void bfin_serial_start_tx(struct uart_port *port)
  86. {
  87. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  88. #ifdef CONFIG_SERIAL_BFIN_DMA
  89. bfin_serial_dma_tx_chars(uart);
  90. #else
  91. unsigned short ier;
  92. ier = UART_GET_IER(uart);
  93. ier |= ETBEI;
  94. UART_PUT_IER(uart, ier);
  95. bfin_serial_tx_chars(uart);
  96. #endif
  97. }
  98. /*
  99. * Interrupts are enabled
  100. */
  101. static void bfin_serial_stop_rx(struct uart_port *port)
  102. {
  103. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  104. unsigned short ier;
  105. ier = UART_GET_IER(uart);
  106. ier &= ~ERBFI;
  107. UART_PUT_IER(uart, ier);
  108. }
  109. /*
  110. * Set the modem control timer to fire immediately.
  111. */
  112. static void bfin_serial_enable_ms(struct uart_port *port)
  113. {
  114. }
  115. #ifdef CONFIG_SERIAL_BFIN_PIO
  116. static void local_put_char(struct bfin_serial_port *uart, char ch)
  117. {
  118. unsigned short status;
  119. int flags = 0;
  120. spin_lock_irqsave(&uart->port.lock, flags);
  121. do {
  122. status = UART_GET_LSR(uart);
  123. } while (!(status & THRE));
  124. UART_PUT_CHAR(uart, ch);
  125. SSYNC();
  126. spin_unlock_irqrestore(&uart->port.lock, flags);
  127. }
  128. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  129. {
  130. struct tty_struct *tty = uart->port.info->tty;
  131. unsigned int status, ch, flg;
  132. #ifdef BF533_FAMILY
  133. static int in_break = 0;
  134. #endif
  135. status = UART_GET_LSR(uart);
  136. ch = UART_GET_CHAR(uart);
  137. uart->port.icount.rx++;
  138. #ifdef BF533_FAMILY
  139. /* The BF533 family of processors have a nice misbehavior where
  140. * they continuously generate characters for a "single" break.
  141. * We have to basically ignore this flood until the "next" valid
  142. * character comes across. All other Blackfin families operate
  143. * properly though.
  144. */
  145. if (in_break) {
  146. if (ch != 0) {
  147. in_break = 0;
  148. ch = UART_GET_CHAR(uart);
  149. if (bfin_revid() < 5)
  150. return;
  151. } else
  152. return;
  153. }
  154. #endif
  155. if (status & BI) {
  156. #ifdef BF533_FAMILY
  157. in_break = 1;
  158. #endif
  159. uart->port.icount.brk++;
  160. if (uart_handle_break(&uart->port))
  161. goto ignore_char;
  162. status &= ~(PE | FE);
  163. }
  164. if (status & PE)
  165. uart->port.icount.parity++;
  166. if (status & OE)
  167. uart->port.icount.overrun++;
  168. if (status & FE)
  169. uart->port.icount.frame++;
  170. status &= uart->port.read_status_mask;
  171. if (status & BI)
  172. flg = TTY_BREAK;
  173. else if (status & PE)
  174. flg = TTY_PARITY;
  175. else if (status & FE)
  176. flg = TTY_FRAME;
  177. else
  178. flg = TTY_NORMAL;
  179. if (uart_handle_sysrq_char(&uart->port, ch))
  180. goto ignore_char;
  181. uart_insert_char(&uart->port, status, OE, ch, flg);
  182. ignore_char:
  183. tty_flip_buffer_push(tty);
  184. }
  185. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  186. {
  187. struct circ_buf *xmit = &uart->port.info->xmit;
  188. if (uart->port.x_char) {
  189. UART_PUT_CHAR(uart, uart->port.x_char);
  190. uart->port.icount.tx++;
  191. uart->port.x_char = 0;
  192. return;
  193. }
  194. /*
  195. * Check the modem control lines before
  196. * transmitting anything.
  197. */
  198. bfin_serial_mctrl_check(uart);
  199. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  200. bfin_serial_stop_tx(&uart->port);
  201. return;
  202. }
  203. local_put_char(uart, xmit->buf[xmit->tail]);
  204. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  205. uart->port.icount.tx++;
  206. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  207. uart_write_wakeup(&uart->port);
  208. if (uart_circ_empty(xmit))
  209. bfin_serial_stop_tx(&uart->port);
  210. }
  211. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  212. {
  213. struct bfin_serial_port *uart = dev_id;
  214. spin_lock(&uart->port.lock);
  215. while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
  216. bfin_serial_rx_chars(uart);
  217. spin_unlock(&uart->port.lock);
  218. return IRQ_HANDLED;
  219. }
  220. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  221. {
  222. struct bfin_serial_port *uart = dev_id;
  223. spin_lock(&uart->port.lock);
  224. while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
  225. bfin_serial_tx_chars(uart);
  226. spin_unlock(&uart->port.lock);
  227. return IRQ_HANDLED;
  228. }
  229. static void bfin_serial_do_work(struct work_struct *work)
  230. {
  231. struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
  232. bfin_serial_mctrl_check(uart);
  233. }
  234. #endif
  235. #ifdef CONFIG_SERIAL_BFIN_DMA
  236. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  237. {
  238. struct circ_buf *xmit = &uart->port.info->xmit;
  239. unsigned short ier;
  240. int flags = 0;
  241. if (!uart->tx_done)
  242. return;
  243. uart->tx_done = 0;
  244. if (uart->port.x_char) {
  245. UART_PUT_CHAR(uart, uart->port.x_char);
  246. uart->port.icount.tx++;
  247. uart->port.x_char = 0;
  248. uart->tx_done = 1;
  249. return;
  250. }
  251. /*
  252. * Check the modem control lines before
  253. * transmitting anything.
  254. */
  255. bfin_serial_mctrl_check(uart);
  256. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  257. bfin_serial_stop_tx(&uart->port);
  258. uart->tx_done = 1;
  259. return;
  260. }
  261. spin_lock_irqsave(&uart->port.lock, flags);
  262. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  263. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  264. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  265. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  266. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  267. set_dma_config(uart->tx_dma_channel,
  268. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  269. INTR_ON_BUF,
  270. DIMENSION_LINEAR,
  271. DATA_SIZE_8));
  272. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  273. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  274. set_dma_x_modify(uart->tx_dma_channel, 1);
  275. enable_dma(uart->tx_dma_channel);
  276. ier = UART_GET_IER(uart);
  277. ier |= ETBEI;
  278. UART_PUT_IER(uart, ier);
  279. spin_unlock_irqrestore(&uart->port.lock, flags);
  280. }
  281. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  282. {
  283. struct tty_struct *tty = uart->port.info->tty;
  284. int i, flg, status;
  285. status = UART_GET_LSR(uart);
  286. uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
  287. if (status & BI) {
  288. uart->port.icount.brk++;
  289. if (uart_handle_break(&uart->port))
  290. goto dma_ignore_char;
  291. status &= ~(PE | FE);
  292. }
  293. if (status & PE)
  294. uart->port.icount.parity++;
  295. if (status & OE)
  296. uart->port.icount.overrun++;
  297. if (status & FE)
  298. uart->port.icount.frame++;
  299. status &= uart->port.read_status_mask;
  300. if (status & BI)
  301. flg = TTY_BREAK;
  302. else if (status & PE)
  303. flg = TTY_PARITY;
  304. else if (status & FE)
  305. flg = TTY_FRAME;
  306. else
  307. flg = TTY_NORMAL;
  308. for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
  309. if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  310. goto dma_ignore_char;
  311. uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
  312. }
  313. dma_ignore_char:
  314. tty_flip_buffer_push(tty);
  315. }
  316. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  317. {
  318. int x_pos, pos;
  319. int flags = 0;
  320. bfin_serial_dma_tx_chars(uart);
  321. spin_lock_irqsave(&uart->port.lock, flags);
  322. x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
  323. if (x_pos == DMA_RX_XCOUNT)
  324. x_pos = 0;
  325. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  326. if (pos>uart->rx_dma_buf.tail) {
  327. uart->rx_dma_buf.tail = pos;
  328. bfin_serial_dma_rx_chars(uart);
  329. uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
  330. }
  331. spin_unlock_irqrestore(&uart->port.lock, flags);
  332. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  333. add_timer(&(uart->rx_dma_timer));
  334. }
  335. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  336. {
  337. struct bfin_serial_port *uart = dev_id;
  338. struct circ_buf *xmit = &uart->port.info->xmit;
  339. unsigned short ier;
  340. spin_lock(&uart->port.lock);
  341. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  342. clear_dma_irqstat(uart->tx_dma_channel);
  343. disable_dma(uart->tx_dma_channel);
  344. ier = UART_GET_IER(uart);
  345. ier &= ~ETBEI;
  346. UART_PUT_IER(uart, ier);
  347. xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
  348. uart->port.icount.tx+=uart->tx_count;
  349. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  350. uart_write_wakeup(&uart->port);
  351. if (uart_circ_empty(xmit))
  352. bfin_serial_stop_tx(&uart->port);
  353. uart->tx_done = 1;
  354. }
  355. spin_unlock(&uart->port.lock);
  356. return IRQ_HANDLED;
  357. }
  358. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  359. {
  360. struct bfin_serial_port *uart = dev_id;
  361. unsigned short irqstat;
  362. uart->rx_dma_nrows++;
  363. if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
  364. uart->rx_dma_nrows = 0;
  365. uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
  366. bfin_serial_dma_rx_chars(uart);
  367. uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
  368. }
  369. spin_lock(&uart->port.lock);
  370. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  371. clear_dma_irqstat(uart->rx_dma_channel);
  372. spin_unlock(&uart->port.lock);
  373. return IRQ_HANDLED;
  374. }
  375. #endif
  376. /*
  377. * Return TIOCSER_TEMT when transmitter is not busy.
  378. */
  379. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  380. {
  381. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  382. unsigned short lsr;
  383. lsr = UART_GET_LSR(uart);
  384. if (lsr & TEMT)
  385. return TIOCSER_TEMT;
  386. else
  387. return 0;
  388. }
  389. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  390. {
  391. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  392. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  393. if (uart->cts_pin < 0)
  394. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  395. if (gpio_get_value(uart->cts_pin))
  396. return TIOCM_DSR | TIOCM_CAR;
  397. else
  398. #endif
  399. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  400. }
  401. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  402. {
  403. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  404. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  405. if (uart->rts_pin < 0)
  406. return;
  407. if (mctrl & TIOCM_RTS)
  408. gpio_set_value(uart->rts_pin, 0);
  409. else
  410. gpio_set_value(uart->rts_pin, 1);
  411. #endif
  412. }
  413. /*
  414. * Handle any change of modem status signal since we were last called.
  415. */
  416. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
  417. {
  418. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  419. unsigned int status;
  420. # ifdef CONFIG_SERIAL_BFIN_DMA
  421. struct uart_info *info = uart->port.info;
  422. struct tty_struct *tty = info->tty;
  423. status = bfin_serial_get_mctrl(&uart->port);
  424. if (!(status & TIOCM_CTS)) {
  425. tty->hw_stopped = 1;
  426. } else {
  427. tty->hw_stopped = 0;
  428. }
  429. # else
  430. status = bfin_serial_get_mctrl(&uart->port);
  431. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  432. if (!(status & TIOCM_CTS))
  433. schedule_work(&uart->cts_workqueue);
  434. # endif
  435. #endif
  436. }
  437. /*
  438. * Interrupts are always disabled.
  439. */
  440. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  441. {
  442. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  443. u16 lcr = UART_GET_LCR(uart);
  444. if (break_state)
  445. lcr |= SB;
  446. else
  447. lcr &= ~SB;
  448. UART_PUT_LCR(uart, lcr);
  449. SSYNC();
  450. }
  451. static int bfin_serial_startup(struct uart_port *port)
  452. {
  453. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  454. #ifdef CONFIG_SERIAL_BFIN_DMA
  455. dma_addr_t dma_handle;
  456. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  457. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  458. return -EBUSY;
  459. }
  460. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  461. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  462. free_dma(uart->rx_dma_channel);
  463. return -EBUSY;
  464. }
  465. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  466. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  467. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  468. uart->rx_dma_buf.head = 0;
  469. uart->rx_dma_buf.tail = 0;
  470. uart->rx_dma_nrows = 0;
  471. set_dma_config(uart->rx_dma_channel,
  472. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  473. INTR_ON_ROW, DIMENSION_2D,
  474. DATA_SIZE_8));
  475. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  476. set_dma_x_modify(uart->rx_dma_channel, 1);
  477. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  478. set_dma_y_modify(uart->rx_dma_channel, 1);
  479. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  480. enable_dma(uart->rx_dma_channel);
  481. uart->rx_dma_timer.data = (unsigned long)(uart);
  482. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  483. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  484. add_timer(&(uart->rx_dma_timer));
  485. #else
  486. if (request_irq
  487. (uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
  488. "BFIN_UART_RX", uart)) {
  489. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  490. return -EBUSY;
  491. }
  492. if (request_irq
  493. (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
  494. "BFIN_UART_TX", uart)) {
  495. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  496. free_irq(uart->port.irq, uart);
  497. return -EBUSY;
  498. }
  499. #endif
  500. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  501. return 0;
  502. }
  503. static void bfin_serial_shutdown(struct uart_port *port)
  504. {
  505. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  506. #ifdef CONFIG_SERIAL_BFIN_DMA
  507. disable_dma(uart->tx_dma_channel);
  508. free_dma(uart->tx_dma_channel);
  509. disable_dma(uart->rx_dma_channel);
  510. free_dma(uart->rx_dma_channel);
  511. del_timer(&(uart->rx_dma_timer));
  512. #else
  513. free_irq(uart->port.irq, uart);
  514. free_irq(uart->port.irq+1, uart);
  515. #endif
  516. }
  517. static void
  518. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  519. struct ktermios *old)
  520. {
  521. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  522. unsigned long flags;
  523. unsigned int baud, quot;
  524. unsigned short val, ier, lsr, lcr = 0;
  525. switch (termios->c_cflag & CSIZE) {
  526. case CS8:
  527. lcr = WLS(8);
  528. break;
  529. case CS7:
  530. lcr = WLS(7);
  531. break;
  532. case CS6:
  533. lcr = WLS(6);
  534. break;
  535. case CS5:
  536. lcr = WLS(5);
  537. break;
  538. default:
  539. printk(KERN_ERR "%s: word lengh not supported\n",
  540. __FUNCTION__);
  541. }
  542. if (termios->c_cflag & CSTOPB)
  543. lcr |= STB;
  544. if (termios->c_cflag & PARENB) {
  545. lcr |= PEN;
  546. if (!(termios->c_cflag & PARODD))
  547. lcr |= EPS;
  548. if (termios->c_cflag & CMSPAR)
  549. lcr |= STP;
  550. }
  551. port->read_status_mask = OE;
  552. if (termios->c_iflag & INPCK)
  553. port->read_status_mask |= (FE | PE);
  554. if (termios->c_iflag & (BRKINT | PARMRK))
  555. port->read_status_mask |= BI;
  556. /*
  557. * Characters to ignore
  558. */
  559. port->ignore_status_mask = 0;
  560. if (termios->c_iflag & IGNPAR)
  561. port->ignore_status_mask |= FE | PE;
  562. if (termios->c_iflag & IGNBRK) {
  563. port->ignore_status_mask |= BI;
  564. /*
  565. * If we're ignoring parity and break indicators,
  566. * ignore overruns too (for real raw support).
  567. */
  568. if (termios->c_iflag & IGNPAR)
  569. port->ignore_status_mask |= OE;
  570. }
  571. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  572. quot = uart_get_divisor(port, baud);
  573. spin_lock_irqsave(&uart->port.lock, flags);
  574. do {
  575. lsr = UART_GET_LSR(uart);
  576. } while (!(lsr & TEMT));
  577. /* Disable UART */
  578. ier = UART_GET_IER(uart);
  579. UART_PUT_IER(uart, 0);
  580. /* Set DLAB in LCR to Access DLL and DLH */
  581. val = UART_GET_LCR(uart);
  582. val |= DLAB;
  583. UART_PUT_LCR(uart, val);
  584. SSYNC();
  585. UART_PUT_DLL(uart, quot & 0xFF);
  586. SSYNC();
  587. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  588. SSYNC();
  589. /* Clear DLAB in LCR to Access THR RBR IER */
  590. val = UART_GET_LCR(uart);
  591. val &= ~DLAB;
  592. UART_PUT_LCR(uart, val);
  593. SSYNC();
  594. UART_PUT_LCR(uart, lcr);
  595. /* Enable UART */
  596. UART_PUT_IER(uart, ier);
  597. val = UART_GET_GCTL(uart);
  598. val |= UCEN;
  599. UART_PUT_GCTL(uart, val);
  600. spin_unlock_irqrestore(&uart->port.lock, flags);
  601. }
  602. static const char *bfin_serial_type(struct uart_port *port)
  603. {
  604. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  605. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  606. }
  607. /*
  608. * Release the memory region(s) being used by 'port'.
  609. */
  610. static void bfin_serial_release_port(struct uart_port *port)
  611. {
  612. }
  613. /*
  614. * Request the memory region(s) being used by 'port'.
  615. */
  616. static int bfin_serial_request_port(struct uart_port *port)
  617. {
  618. return 0;
  619. }
  620. /*
  621. * Configure/autoconfigure the port.
  622. */
  623. static void bfin_serial_config_port(struct uart_port *port, int flags)
  624. {
  625. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  626. if (flags & UART_CONFIG_TYPE &&
  627. bfin_serial_request_port(&uart->port) == 0)
  628. uart->port.type = PORT_BFIN;
  629. }
  630. /*
  631. * Verify the new serial_struct (for TIOCSSERIAL).
  632. * The only change we allow are to the flags and type, and
  633. * even then only between PORT_BFIN and PORT_UNKNOWN
  634. */
  635. static int
  636. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  637. {
  638. return 0;
  639. }
  640. static struct uart_ops bfin_serial_pops = {
  641. .tx_empty = bfin_serial_tx_empty,
  642. .set_mctrl = bfin_serial_set_mctrl,
  643. .get_mctrl = bfin_serial_get_mctrl,
  644. .stop_tx = bfin_serial_stop_tx,
  645. .start_tx = bfin_serial_start_tx,
  646. .stop_rx = bfin_serial_stop_rx,
  647. .enable_ms = bfin_serial_enable_ms,
  648. .break_ctl = bfin_serial_break_ctl,
  649. .startup = bfin_serial_startup,
  650. .shutdown = bfin_serial_shutdown,
  651. .set_termios = bfin_serial_set_termios,
  652. .type = bfin_serial_type,
  653. .release_port = bfin_serial_release_port,
  654. .request_port = bfin_serial_request_port,
  655. .config_port = bfin_serial_config_port,
  656. .verify_port = bfin_serial_verify_port,
  657. };
  658. static void __init bfin_serial_init_ports(void)
  659. {
  660. static int first = 1;
  661. int i;
  662. if (!first)
  663. return;
  664. first = 0;
  665. for (i = 0; i < nr_ports; i++) {
  666. bfin_serial_ports[i].port.uartclk = get_sclk();
  667. bfin_serial_ports[i].port.ops = &bfin_serial_pops;
  668. bfin_serial_ports[i].port.line = i;
  669. bfin_serial_ports[i].port.iotype = UPIO_MEM;
  670. bfin_serial_ports[i].port.membase =
  671. (void __iomem *)bfin_serial_resource[i].uart_base_addr;
  672. bfin_serial_ports[i].port.mapbase =
  673. bfin_serial_resource[i].uart_base_addr;
  674. bfin_serial_ports[i].port.irq =
  675. bfin_serial_resource[i].uart_irq;
  676. bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
  677. #ifdef CONFIG_SERIAL_BFIN_DMA
  678. bfin_serial_ports[i].tx_done = 1;
  679. bfin_serial_ports[i].tx_count = 0;
  680. bfin_serial_ports[i].tx_dma_channel =
  681. bfin_serial_resource[i].uart_tx_dma_channel;
  682. bfin_serial_ports[i].rx_dma_channel =
  683. bfin_serial_resource[i].uart_rx_dma_channel;
  684. init_timer(&(bfin_serial_ports[i].rx_dma_timer));
  685. #else
  686. INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
  687. #endif
  688. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  689. bfin_serial_ports[i].cts_pin =
  690. bfin_serial_resource[i].uart_cts_pin;
  691. bfin_serial_ports[i].rts_pin =
  692. bfin_serial_resource[i].uart_rts_pin;
  693. #endif
  694. bfin_serial_hw_init(&bfin_serial_ports[i]);
  695. }
  696. }
  697. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  698. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  699. {
  700. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  701. while (!(UART_GET_LSR(uart)))
  702. barrier();
  703. UART_PUT_CHAR(uart, ch);
  704. SSYNC();
  705. }
  706. /*
  707. * Interrupts are disabled on entering
  708. */
  709. static void
  710. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  711. {
  712. struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
  713. int flags = 0;
  714. spin_lock_irqsave(&uart->port.lock, flags);
  715. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  716. spin_unlock_irqrestore(&uart->port.lock, flags);
  717. }
  718. /*
  719. * If the port was already initialised (eg, by a boot loader),
  720. * try to determine the current setup.
  721. */
  722. static void __init
  723. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  724. int *parity, int *bits)
  725. {
  726. unsigned short status;
  727. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  728. if (status == (ERBFI | ETBEI)) {
  729. /* ok, the port was enabled */
  730. unsigned short lcr, val;
  731. unsigned short dlh, dll;
  732. lcr = UART_GET_LCR(uart);
  733. *parity = 'n';
  734. if (lcr & PEN) {
  735. if (lcr & EPS)
  736. *parity = 'e';
  737. else
  738. *parity = 'o';
  739. }
  740. switch (lcr & 0x03) {
  741. case 0: *bits = 5; break;
  742. case 1: *bits = 6; break;
  743. case 2: *bits = 7; break;
  744. case 3: *bits = 8; break;
  745. }
  746. /* Set DLAB in LCR to Access DLL and DLH */
  747. val = UART_GET_LCR(uart);
  748. val |= DLAB;
  749. UART_PUT_LCR(uart, val);
  750. dll = UART_GET_DLL(uart);
  751. dlh = UART_GET_DLH(uart);
  752. /* Clear DLAB in LCR to Access THR RBR IER */
  753. val = UART_GET_LCR(uart);
  754. val &= ~DLAB;
  755. UART_PUT_LCR(uart, val);
  756. *baud = get_sclk() / (16*(dll | dlh << 8));
  757. }
  758. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
  759. }
  760. static int __init
  761. bfin_serial_console_setup(struct console *co, char *options)
  762. {
  763. struct bfin_serial_port *uart;
  764. int baud = 57600;
  765. int bits = 8;
  766. int parity = 'n';
  767. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  768. int flow = 'r';
  769. #else
  770. int flow = 'n';
  771. #endif
  772. /*
  773. * Check whether an invalid uart number has been specified, and
  774. * if so, search for the first available port that does have
  775. * console support.
  776. */
  777. if (co->index == -1 || co->index >= nr_ports)
  778. co->index = 0;
  779. uart = &bfin_serial_ports[co->index];
  780. if (options)
  781. uart_parse_options(options, &baud, &parity, &bits, &flow);
  782. else
  783. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  784. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  785. }
  786. static struct uart_driver bfin_serial_reg;
  787. static struct console bfin_serial_console = {
  788. .name = BFIN_SERIAL_NAME,
  789. .write = bfin_serial_console_write,
  790. .device = uart_console_device,
  791. .setup = bfin_serial_console_setup,
  792. .flags = CON_PRINTBUFFER,
  793. .index = -1,
  794. .data = &bfin_serial_reg,
  795. };
  796. static int __init bfin_serial_rs_console_init(void)
  797. {
  798. bfin_serial_init_ports();
  799. register_console(&bfin_serial_console);
  800. return 0;
  801. }
  802. console_initcall(bfin_serial_rs_console_init);
  803. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  804. #else
  805. #define BFIN_SERIAL_CONSOLE NULL
  806. #endif
  807. static struct uart_driver bfin_serial_reg = {
  808. .owner = THIS_MODULE,
  809. .driver_name = "bfin-uart",
  810. .dev_name = BFIN_SERIAL_NAME,
  811. .major = BFIN_SERIAL_MAJOR,
  812. .minor = BFIN_SERIAL_MINOR,
  813. .nr = NR_PORTS,
  814. .cons = BFIN_SERIAL_CONSOLE,
  815. };
  816. static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
  817. {
  818. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  819. if (uart)
  820. uart_suspend_port(&bfin_serial_reg, &uart->port);
  821. return 0;
  822. }
  823. static int bfin_serial_resume(struct platform_device *dev)
  824. {
  825. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  826. if (uart)
  827. uart_resume_port(&bfin_serial_reg, &uart->port);
  828. return 0;
  829. }
  830. static int bfin_serial_probe(struct platform_device *dev)
  831. {
  832. struct resource *res = dev->resource;
  833. int i;
  834. for (i = 0; i < dev->num_resources; i++, res++)
  835. if (res->flags & IORESOURCE_MEM)
  836. break;
  837. if (i < dev->num_resources) {
  838. for (i = 0; i < nr_ports; i++, res++) {
  839. if (bfin_serial_ports[i].port.mapbase != res->start)
  840. continue;
  841. bfin_serial_ports[i].port.dev = &dev->dev;
  842. uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  843. platform_set_drvdata(dev, &bfin_serial_ports[i]);
  844. }
  845. }
  846. return 0;
  847. }
  848. static int bfin_serial_remove(struct platform_device *pdev)
  849. {
  850. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  851. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  852. gpio_free(uart->cts_pin);
  853. gpio_free(uart->rts_pin);
  854. #endif
  855. platform_set_drvdata(pdev, NULL);
  856. if (uart)
  857. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  858. return 0;
  859. }
  860. static struct platform_driver bfin_serial_driver = {
  861. .probe = bfin_serial_probe,
  862. .remove = bfin_serial_remove,
  863. .suspend = bfin_serial_suspend,
  864. .resume = bfin_serial_resume,
  865. .driver = {
  866. .name = "bfin-uart",
  867. },
  868. };
  869. static int __init bfin_serial_init(void)
  870. {
  871. int ret;
  872. pr_info("Serial: Blackfin serial driver\n");
  873. bfin_serial_init_ports();
  874. ret = uart_register_driver(&bfin_serial_reg);
  875. if (ret == 0) {
  876. ret = platform_driver_register(&bfin_serial_driver);
  877. if (ret) {
  878. pr_debug("uart register failed\n");
  879. uart_unregister_driver(&bfin_serial_reg);
  880. }
  881. }
  882. return ret;
  883. }
  884. static void __exit bfin_serial_exit(void)
  885. {
  886. platform_driver_unregister(&bfin_serial_driver);
  887. uart_unregister_driver(&bfin_serial_reg);
  888. }
  889. module_init(bfin_serial_init);
  890. module_exit(bfin_serial_exit);
  891. MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
  892. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  893. MODULE_LICENSE("GPL");
  894. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);