board-3430sdp.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605
  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/i2c/twl.h>
  22. #include <linux/regulator/machine.h>
  23. #include <linux/io.h>
  24. #include <linux/gpio.h>
  25. #include <linux/mmc/host.h>
  26. #include <mach/hardware.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <plat/mcspi.h>
  31. #include <plat/usb.h>
  32. #include "common.h"
  33. #include <plat/dma.h>
  34. #include <plat/gpmc.h>
  35. #include <video/omapdss.h>
  36. #include <video/omap-panel-tfp410.h>
  37. #include <plat/gpmc-smc91x.h>
  38. #include "board-flash.h"
  39. #include "mux.h"
  40. #include "sdram-qimonda-hyb18m512160af-6.h"
  41. #include "hsmmc.h"
  42. #include "pm.h"
  43. #include "control.h"
  44. #include "common-board-devices.h"
  45. #define CONFIG_DISABLE_HFCLK 1
  46. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  47. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  48. #define ENABLE_VAUX3_DEDICATED 0x03
  49. #define ENABLE_VAUX3_DEV_GRP 0x20
  50. #define TWL4030_MSECURE_GPIO 22
  51. static uint32_t board_keymap[] = {
  52. KEY(0, 0, KEY_LEFT),
  53. KEY(0, 1, KEY_RIGHT),
  54. KEY(0, 2, KEY_A),
  55. KEY(0, 3, KEY_B),
  56. KEY(0, 4, KEY_C),
  57. KEY(1, 0, KEY_DOWN),
  58. KEY(1, 1, KEY_UP),
  59. KEY(1, 2, KEY_E),
  60. KEY(1, 3, KEY_F),
  61. KEY(1, 4, KEY_G),
  62. KEY(2, 0, KEY_ENTER),
  63. KEY(2, 1, KEY_I),
  64. KEY(2, 2, KEY_J),
  65. KEY(2, 3, KEY_K),
  66. KEY(2, 4, KEY_3),
  67. KEY(3, 0, KEY_M),
  68. KEY(3, 1, KEY_N),
  69. KEY(3, 2, KEY_O),
  70. KEY(3, 3, KEY_P),
  71. KEY(3, 4, KEY_Q),
  72. KEY(4, 0, KEY_R),
  73. KEY(4, 1, KEY_4),
  74. KEY(4, 2, KEY_T),
  75. KEY(4, 3, KEY_U),
  76. KEY(4, 4, KEY_D),
  77. KEY(5, 0, KEY_V),
  78. KEY(5, 1, KEY_W),
  79. KEY(5, 2, KEY_L),
  80. KEY(5, 3, KEY_S),
  81. KEY(5, 4, KEY_H),
  82. 0
  83. };
  84. static struct matrix_keymap_data board_map_data = {
  85. .keymap = board_keymap,
  86. .keymap_size = ARRAY_SIZE(board_keymap),
  87. };
  88. static struct twl4030_keypad_data sdp3430_kp_data = {
  89. .keymap_data = &board_map_data,
  90. .rows = 5,
  91. .cols = 6,
  92. .rep = 1,
  93. };
  94. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  95. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  96. static struct gpio sdp3430_dss_gpios[] __initdata = {
  97. {SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" },
  98. {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
  99. };
  100. static void __init sdp3430_display_init(void)
  101. {
  102. int r;
  103. r = gpio_request_array(sdp3430_dss_gpios,
  104. ARRAY_SIZE(sdp3430_dss_gpios));
  105. if (r)
  106. printk(KERN_ERR "failed to get LCD control GPIOs\n");
  107. }
  108. static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
  109. {
  110. gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
  111. gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
  112. return 0;
  113. }
  114. static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
  115. {
  116. gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
  117. gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
  118. }
  119. static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
  120. {
  121. return 0;
  122. }
  123. static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
  124. {
  125. }
  126. static struct omap_dss_device sdp3430_lcd_device = {
  127. .name = "lcd",
  128. .driver_name = "sharp_ls_panel",
  129. .type = OMAP_DISPLAY_TYPE_DPI,
  130. .phy.dpi.data_lines = 16,
  131. .platform_enable = sdp3430_panel_enable_lcd,
  132. .platform_disable = sdp3430_panel_disable_lcd,
  133. };
  134. static struct tfp410_platform_data dvi_panel = {
  135. .power_down_gpio = -1,
  136. };
  137. static struct omap_dss_device sdp3430_dvi_device = {
  138. .name = "dvi",
  139. .type = OMAP_DISPLAY_TYPE_DPI,
  140. .driver_name = "tfp410",
  141. .data = &dvi_panel,
  142. .phy.dpi.data_lines = 24,
  143. };
  144. static struct omap_dss_device sdp3430_tv_device = {
  145. .name = "tv",
  146. .driver_name = "venc",
  147. .type = OMAP_DISPLAY_TYPE_VENC,
  148. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  149. .platform_enable = sdp3430_panel_enable_tv,
  150. .platform_disable = sdp3430_panel_disable_tv,
  151. };
  152. static struct omap_dss_device *sdp3430_dss_devices[] = {
  153. &sdp3430_lcd_device,
  154. &sdp3430_dvi_device,
  155. &sdp3430_tv_device,
  156. };
  157. static struct omap_dss_board_info sdp3430_dss_data = {
  158. .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
  159. .devices = sdp3430_dss_devices,
  160. .default_device = &sdp3430_lcd_device,
  161. };
  162. static struct omap2_hsmmc_info mmc[] = {
  163. {
  164. .mmc = 1,
  165. /* 8 bits (default) requires S6.3 == ON,
  166. * so the SIM card isn't used; else 4 bits.
  167. */
  168. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  169. .gpio_wp = 4,
  170. .deferred = true,
  171. },
  172. {
  173. .mmc = 2,
  174. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  175. .gpio_wp = 7,
  176. .deferred = true,
  177. },
  178. {} /* Terminator */
  179. };
  180. static int sdp3430_twl_gpio_setup(struct device *dev,
  181. unsigned gpio, unsigned ngpio)
  182. {
  183. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  184. * gpio + 1 is "mmc1_cd" (input/IRQ)
  185. */
  186. mmc[0].gpio_cd = gpio + 0;
  187. mmc[1].gpio_cd = gpio + 1;
  188. omap_hsmmc_late_init(mmc);
  189. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  190. gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
  191. /* gpio + 15 is "sub_lcd_nRST" (output) */
  192. gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
  193. return 0;
  194. }
  195. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  196. .gpio_base = OMAP_MAX_GPIO_LINES,
  197. .irq_base = TWL4030_GPIO_IRQ_BASE,
  198. .irq_end = TWL4030_GPIO_IRQ_END,
  199. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  200. | BIT(16) | BIT(17),
  201. .setup = sdp3430_twl_gpio_setup,
  202. };
  203. /* regulator consumer mappings */
  204. /* ads7846 on SPI */
  205. static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
  206. REGULATOR_SUPPLY("vcc", "spi1.0"),
  207. };
  208. static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
  209. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  210. };
  211. static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
  212. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  213. };
  214. static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
  215. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
  216. };
  217. /*
  218. * Apply all the fixed voltages since most versions of U-Boot
  219. * don't bother with that initialization.
  220. */
  221. /* VAUX1 for mainboard (irda and sub-lcd) */
  222. static struct regulator_init_data sdp3430_vaux1 = {
  223. .constraints = {
  224. .min_uV = 2800000,
  225. .max_uV = 2800000,
  226. .apply_uV = true,
  227. .valid_modes_mask = REGULATOR_MODE_NORMAL
  228. | REGULATOR_MODE_STANDBY,
  229. .valid_ops_mask = REGULATOR_CHANGE_MODE
  230. | REGULATOR_CHANGE_STATUS,
  231. },
  232. };
  233. /* VAUX2 for camera module */
  234. static struct regulator_init_data sdp3430_vaux2 = {
  235. .constraints = {
  236. .min_uV = 2800000,
  237. .max_uV = 2800000,
  238. .apply_uV = true,
  239. .valid_modes_mask = REGULATOR_MODE_NORMAL
  240. | REGULATOR_MODE_STANDBY,
  241. .valid_ops_mask = REGULATOR_CHANGE_MODE
  242. | REGULATOR_CHANGE_STATUS,
  243. },
  244. };
  245. /* VAUX3 for LCD board */
  246. static struct regulator_init_data sdp3430_vaux3 = {
  247. .constraints = {
  248. .min_uV = 2800000,
  249. .max_uV = 2800000,
  250. .apply_uV = true,
  251. .valid_modes_mask = REGULATOR_MODE_NORMAL
  252. | REGULATOR_MODE_STANDBY,
  253. .valid_ops_mask = REGULATOR_CHANGE_MODE
  254. | REGULATOR_CHANGE_STATUS,
  255. },
  256. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
  257. .consumer_supplies = sdp3430_vaux3_supplies,
  258. };
  259. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  260. static struct regulator_init_data sdp3430_vaux4 = {
  261. .constraints = {
  262. .min_uV = 1800000,
  263. .max_uV = 1800000,
  264. .apply_uV = true,
  265. .valid_modes_mask = REGULATOR_MODE_NORMAL
  266. | REGULATOR_MODE_STANDBY,
  267. .valid_ops_mask = REGULATOR_CHANGE_MODE
  268. | REGULATOR_CHANGE_STATUS,
  269. },
  270. };
  271. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  272. static struct regulator_init_data sdp3430_vmmc1 = {
  273. .constraints = {
  274. .min_uV = 1850000,
  275. .max_uV = 3150000,
  276. .valid_modes_mask = REGULATOR_MODE_NORMAL
  277. | REGULATOR_MODE_STANDBY,
  278. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  279. | REGULATOR_CHANGE_MODE
  280. | REGULATOR_CHANGE_STATUS,
  281. },
  282. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
  283. .consumer_supplies = sdp3430_vmmc1_supplies,
  284. };
  285. /* VMMC2 for MMC2 card */
  286. static struct regulator_init_data sdp3430_vmmc2 = {
  287. .constraints = {
  288. .min_uV = 1850000,
  289. .max_uV = 1850000,
  290. .apply_uV = true,
  291. .valid_modes_mask = REGULATOR_MODE_NORMAL
  292. | REGULATOR_MODE_STANDBY,
  293. .valid_ops_mask = REGULATOR_CHANGE_MODE
  294. | REGULATOR_CHANGE_STATUS,
  295. },
  296. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
  297. .consumer_supplies = sdp3430_vmmc2_supplies,
  298. };
  299. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  300. static struct regulator_init_data sdp3430_vsim = {
  301. .constraints = {
  302. .min_uV = 1800000,
  303. .max_uV = 3000000,
  304. .valid_modes_mask = REGULATOR_MODE_NORMAL
  305. | REGULATOR_MODE_STANDBY,
  306. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  307. | REGULATOR_CHANGE_MODE
  308. | REGULATOR_CHANGE_STATUS,
  309. },
  310. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
  311. .consumer_supplies = sdp3430_vsim_supplies,
  312. };
  313. static struct twl4030_platform_data sdp3430_twldata = {
  314. /* platform_data for children goes here */
  315. .gpio = &sdp3430_gpio_data,
  316. .keypad = &sdp3430_kp_data,
  317. .vaux1 = &sdp3430_vaux1,
  318. .vaux2 = &sdp3430_vaux2,
  319. .vaux3 = &sdp3430_vaux3,
  320. .vaux4 = &sdp3430_vaux4,
  321. .vmmc1 = &sdp3430_vmmc1,
  322. .vmmc2 = &sdp3430_vmmc2,
  323. .vsim = &sdp3430_vsim,
  324. };
  325. static int __init omap3430_i2c_init(void)
  326. {
  327. /* i2c1 for PMIC only */
  328. omap3_pmic_get_config(&sdp3430_twldata,
  329. TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
  330. TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
  331. TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
  332. sdp3430_twldata.vdac->constraints.apply_uV = true;
  333. sdp3430_twldata.vpll2->constraints.apply_uV = true;
  334. sdp3430_twldata.vpll2->constraints.name = "VDVI";
  335. omap3_pmic_init("twl4030", &sdp3430_twldata);
  336. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  337. omap_register_i2c_bus(2, 400, NULL, 0);
  338. /* i2c3 on display connector (for DVI, tfp410) */
  339. omap_register_i2c_bus(3, 400, NULL, 0);
  340. return 0;
  341. }
  342. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  343. static struct omap_smc91x_platform_data board_smc91x_data = {
  344. .cs = 3,
  345. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  346. IORESOURCE_IRQ_LOWLEVEL,
  347. };
  348. static void __init board_smc91x_init(void)
  349. {
  350. if (omap_rev() > OMAP3430_REV_ES1_0)
  351. board_smc91x_data.gpio_irq = 6;
  352. else
  353. board_smc91x_data.gpio_irq = 29;
  354. gpmc_smc91x_init(&board_smc91x_data);
  355. }
  356. #else
  357. static inline void board_smc91x_init(void)
  358. {
  359. }
  360. #endif
  361. static void enable_board_wakeup_source(void)
  362. {
  363. /* T2 interrupt line (keypad) */
  364. omap_mux_init_signal("sys_nirq",
  365. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  366. }
  367. static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
  368. .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
  369. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  370. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  371. .phy_reset = true,
  372. .reset_gpio_port[0] = 57,
  373. .reset_gpio_port[1] = 61,
  374. .reset_gpio_port[2] = -EINVAL
  375. };
  376. #ifdef CONFIG_OMAP_MUX
  377. static struct omap_board_mux board_mux[] __initdata = {
  378. { .reg_offset = OMAP_MUX_TERMINATOR },
  379. };
  380. #else
  381. #define board_mux NULL
  382. #endif
  383. /*
  384. * SDP3430 V2 Board CS organization
  385. * Different from SDP3430 V1. Now 4 switches used to specify CS
  386. *
  387. * See also the Switch S8 settings in the comments.
  388. */
  389. static char chip_sel_3430[][GPMC_CS_NUM] = {
  390. {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  391. {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  392. {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  393. };
  394. static struct mtd_partition sdp_nor_partitions[] = {
  395. /* bootloader (U-Boot, etc) in first sector */
  396. {
  397. .name = "Bootloader-NOR",
  398. .offset = 0,
  399. .size = SZ_256K,
  400. .mask_flags = MTD_WRITEABLE, /* force read-only */
  401. },
  402. /* bootloader params in the next sector */
  403. {
  404. .name = "Params-NOR",
  405. .offset = MTDPART_OFS_APPEND,
  406. .size = SZ_256K,
  407. .mask_flags = 0,
  408. },
  409. /* kernel */
  410. {
  411. .name = "Kernel-NOR",
  412. .offset = MTDPART_OFS_APPEND,
  413. .size = SZ_2M,
  414. .mask_flags = 0
  415. },
  416. /* file system */
  417. {
  418. .name = "Filesystem-NOR",
  419. .offset = MTDPART_OFS_APPEND,
  420. .size = MTDPART_SIZ_FULL,
  421. .mask_flags = 0
  422. }
  423. };
  424. static struct mtd_partition sdp_onenand_partitions[] = {
  425. {
  426. .name = "X-Loader-OneNAND",
  427. .offset = 0,
  428. .size = 4 * (64 * 2048),
  429. .mask_flags = MTD_WRITEABLE /* force read-only */
  430. },
  431. {
  432. .name = "U-Boot-OneNAND",
  433. .offset = MTDPART_OFS_APPEND,
  434. .size = 2 * (64 * 2048),
  435. .mask_flags = MTD_WRITEABLE /* force read-only */
  436. },
  437. {
  438. .name = "U-Boot Environment-OneNAND",
  439. .offset = MTDPART_OFS_APPEND,
  440. .size = 1 * (64 * 2048),
  441. },
  442. {
  443. .name = "Kernel-OneNAND",
  444. .offset = MTDPART_OFS_APPEND,
  445. .size = 16 * (64 * 2048),
  446. },
  447. {
  448. .name = "File System-OneNAND",
  449. .offset = MTDPART_OFS_APPEND,
  450. .size = MTDPART_SIZ_FULL,
  451. },
  452. };
  453. static struct mtd_partition sdp_nand_partitions[] = {
  454. /* All the partition sizes are listed in terms of NAND block size */
  455. {
  456. .name = "X-Loader-NAND",
  457. .offset = 0,
  458. .size = 4 * (64 * 2048),
  459. .mask_flags = MTD_WRITEABLE, /* force read-only */
  460. },
  461. {
  462. .name = "U-Boot-NAND",
  463. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  464. .size = 10 * (64 * 2048),
  465. .mask_flags = MTD_WRITEABLE, /* force read-only */
  466. },
  467. {
  468. .name = "Boot Env-NAND",
  469. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  470. .size = 6 * (64 * 2048),
  471. },
  472. {
  473. .name = "Kernel-NAND",
  474. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  475. .size = 40 * (64 * 2048),
  476. },
  477. {
  478. .name = "File System - NAND",
  479. .size = MTDPART_SIZ_FULL,
  480. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  481. },
  482. };
  483. static struct flash_partitions sdp_flash_partitions[] = {
  484. {
  485. .parts = sdp_nor_partitions,
  486. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  487. },
  488. {
  489. .parts = sdp_onenand_partitions,
  490. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  491. },
  492. {
  493. .parts = sdp_nand_partitions,
  494. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  495. },
  496. };
  497. static void __init omap_3430sdp_init(void)
  498. {
  499. int gpio_pendown;
  500. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  501. omap_hsmmc_init(mmc);
  502. omap3430_i2c_init();
  503. omap_display_init(&sdp3430_dss_data);
  504. if (omap_rev() > OMAP3430_REV_ES1_0)
  505. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
  506. else
  507. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
  508. omap_ads7846_init(1, gpio_pendown, 310, NULL);
  509. omap_serial_init();
  510. omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
  511. usb_musb_init(NULL);
  512. board_smc91x_init();
  513. board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
  514. sdp3430_display_init();
  515. enable_board_wakeup_source();
  516. usbhs_init(&usbhs_bdata);
  517. }
  518. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  519. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  520. .atag_offset = 0x100,
  521. .reserve = omap_reserve,
  522. .map_io = omap3_map_io,
  523. .init_early = omap3430_init_early,
  524. .init_irq = omap3_init_irq,
  525. .handle_irq = omap3_intc_handle_irq,
  526. .init_machine = omap_3430sdp_init,
  527. .init_late = omap3430_init_late,
  528. .timer = &omap3_timer,
  529. .restart = omap_prcm_restart,
  530. MACHINE_END