clps711x.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583
  1. /*
  2. * Driver for CLPS711x serial ports
  3. *
  4. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  5. *
  6. * Copyright 1999 ARM Limited
  7. * Copyright (C) 2000 Deep Blue Solutions Ltd.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. */
  23. #if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  24. #define SUPPORT_SYSRQ
  25. #endif
  26. #include <linux/module.h>
  27. #include <linux/ioport.h>
  28. #include <linux/init.h>
  29. #include <linux/console.h>
  30. #include <linux/sysrq.h>
  31. #include <linux/spinlock.h>
  32. #include <linux/device.h>
  33. #include <linux/tty.h>
  34. #include <linux/tty_flip.h>
  35. #include <linux/serial_core.h>
  36. #include <linux/serial.h>
  37. #include <linux/io.h>
  38. #include <linux/clk.h>
  39. #include <linux/platform_device.h>
  40. #include <mach/hardware.h>
  41. #include <asm/irq.h>
  42. #define UART_CLPS711X_NAME "uart-clps711x"
  43. #define UART_CLPS711X_NR 2
  44. #define UART_CLPS711X_MAJOR 204
  45. #define UART_CLPS711X_MINOR 40
  46. #define UBRLCR(port) ((port)->line ? UBRLCR2 : UBRLCR1)
  47. #define UARTDR(port) ((port)->line ? UARTDR2 : UARTDR1)
  48. #define SYSFLG(port) ((port)->line ? SYSFLG2 : SYSFLG1)
  49. #define SYSCON(port) ((port)->line ? SYSCON2 : SYSCON1)
  50. #define TX_IRQ(port) ((port)->line ? IRQ_UTXINT2 : IRQ_UTXINT1)
  51. #define RX_IRQ(port) ((port)->line ? IRQ_URXINT2 : IRQ_URXINT1)
  52. #define UART_ANY_ERR (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR)
  53. struct clps711x_port {
  54. struct uart_driver uart;
  55. struct clk *uart_clk;
  56. struct uart_port port[UART_CLPS711X_NR];
  57. int tx_enabled[UART_CLPS711X_NR];
  58. #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
  59. struct console console;
  60. #endif
  61. };
  62. static void clps711xuart_stop_tx(struct uart_port *port)
  63. {
  64. struct clps711x_port *s = dev_get_drvdata(port->dev);
  65. if (s->tx_enabled[port->line]) {
  66. disable_irq(TX_IRQ(port));
  67. s->tx_enabled[port->line] = 0;
  68. }
  69. }
  70. static void clps711xuart_start_tx(struct uart_port *port)
  71. {
  72. struct clps711x_port *s = dev_get_drvdata(port->dev);
  73. if (!s->tx_enabled[port->line]) {
  74. enable_irq(TX_IRQ(port));
  75. s->tx_enabled[port->line] = 1;
  76. }
  77. }
  78. static void clps711xuart_stop_rx(struct uart_port *port)
  79. {
  80. disable_irq(RX_IRQ(port));
  81. }
  82. static void clps711xuart_enable_ms(struct uart_port *port)
  83. {
  84. }
  85. static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id)
  86. {
  87. struct uart_port *port = dev_id;
  88. struct tty_struct *tty = port->state->port.tty;
  89. unsigned int status, ch, flg;
  90. status = clps_readl(SYSFLG(port));
  91. while (!(status & SYSFLG_URXFE)) {
  92. ch = clps_readl(UARTDR(port));
  93. port->icount.rx++;
  94. flg = TTY_NORMAL;
  95. /*
  96. * Note that the error handling code is
  97. * out of the main execution path
  98. */
  99. if (unlikely(ch & UART_ANY_ERR)) {
  100. if (ch & UARTDR_PARERR)
  101. port->icount.parity++;
  102. else if (ch & UARTDR_FRMERR)
  103. port->icount.frame++;
  104. if (ch & UARTDR_OVERR)
  105. port->icount.overrun++;
  106. ch &= port->read_status_mask;
  107. if (ch & UARTDR_PARERR)
  108. flg = TTY_PARITY;
  109. else if (ch & UARTDR_FRMERR)
  110. flg = TTY_FRAME;
  111. #ifdef SUPPORT_SYSRQ
  112. port->sysrq = 0;
  113. #endif
  114. }
  115. if (uart_handle_sysrq_char(port, ch))
  116. goto ignore_char;
  117. /*
  118. * CHECK: does overrun affect the current character?
  119. * ASSUMPTION: it does not.
  120. */
  121. uart_insert_char(port, ch, UARTDR_OVERR, ch, flg);
  122. ignore_char:
  123. status = clps_readl(SYSFLG(port));
  124. }
  125. tty_flip_buffer_push(tty);
  126. return IRQ_HANDLED;
  127. }
  128. static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id)
  129. {
  130. struct uart_port *port = dev_id;
  131. struct clps711x_port *s = dev_get_drvdata(port->dev);
  132. struct circ_buf *xmit = &port->state->xmit;
  133. if (port->x_char) {
  134. clps_writel(port->x_char, UARTDR(port));
  135. port->icount.tx++;
  136. port->x_char = 0;
  137. return IRQ_HANDLED;
  138. }
  139. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  140. disable_irq_nosync(TX_IRQ(port));
  141. s->tx_enabled[port->line] = 0;
  142. return IRQ_HANDLED;
  143. }
  144. while (!uart_circ_empty(xmit)) {
  145. clps_writew(xmit->buf[xmit->tail], UARTDR(port));
  146. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  147. port->icount.tx++;
  148. if (clps_readl(SYSFLG(port) & SYSFLG_UTXFF))
  149. break;
  150. }
  151. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  152. uart_write_wakeup(port);
  153. return IRQ_HANDLED;
  154. }
  155. static unsigned int clps711xuart_tx_empty(struct uart_port *port)
  156. {
  157. unsigned int status = clps_readl(SYSFLG(port));
  158. return status & SYSFLG_UBUSY ? 0 : TIOCSER_TEMT;
  159. }
  160. static unsigned int clps711xuart_get_mctrl(struct uart_port *port)
  161. {
  162. unsigned int port_addr;
  163. unsigned int result = 0;
  164. unsigned int status;
  165. port_addr = SYSFLG(port);
  166. if (port_addr == SYSFLG1) {
  167. status = clps_readl(SYSFLG1);
  168. if (status & SYSFLG1_DCD)
  169. result |= TIOCM_CAR;
  170. if (status & SYSFLG1_DSR)
  171. result |= TIOCM_DSR;
  172. if (status & SYSFLG1_CTS)
  173. result |= TIOCM_CTS;
  174. }
  175. return result;
  176. }
  177. static void
  178. clps711xuart_set_mctrl_null(struct uart_port *port, unsigned int mctrl)
  179. {
  180. }
  181. static void clps711xuart_break_ctl(struct uart_port *port, int break_state)
  182. {
  183. unsigned long flags;
  184. unsigned int ubrlcr;
  185. spin_lock_irqsave(&port->lock, flags);
  186. ubrlcr = clps_readl(UBRLCR(port));
  187. if (break_state == -1)
  188. ubrlcr |= UBRLCR_BREAK;
  189. else
  190. ubrlcr &= ~UBRLCR_BREAK;
  191. clps_writel(ubrlcr, UBRLCR(port));
  192. spin_unlock_irqrestore(&port->lock, flags);
  193. }
  194. static int clps711xuart_startup(struct uart_port *port)
  195. {
  196. struct clps711x_port *s = dev_get_drvdata(port->dev);
  197. unsigned int syscon;
  198. int retval;
  199. s->tx_enabled[port->line] = 1;
  200. /*
  201. * Allocate the IRQs
  202. */
  203. retval = request_irq(TX_IRQ(port), clps711xuart_int_tx, 0,
  204. "clps711xuart_tx", port);
  205. if (retval)
  206. return retval;
  207. retval = request_irq(RX_IRQ(port), clps711xuart_int_rx, 0,
  208. "clps711xuart_rx", port);
  209. if (retval) {
  210. free_irq(TX_IRQ(port), port);
  211. return retval;
  212. }
  213. /*
  214. * enable the port
  215. */
  216. syscon = clps_readl(SYSCON(port));
  217. syscon |= SYSCON_UARTEN;
  218. clps_writel(syscon, SYSCON(port));
  219. return 0;
  220. }
  221. static void clps711xuart_shutdown(struct uart_port *port)
  222. {
  223. unsigned int ubrlcr, syscon;
  224. /*
  225. * Free the interrupt
  226. */
  227. free_irq(TX_IRQ(port), port); /* TX interrupt */
  228. free_irq(RX_IRQ(port), port); /* RX interrupt */
  229. /*
  230. * disable the port
  231. */
  232. syscon = clps_readl(SYSCON(port));
  233. syscon &= ~SYSCON_UARTEN;
  234. clps_writel(syscon, SYSCON(port));
  235. /*
  236. * disable break condition and fifos
  237. */
  238. ubrlcr = clps_readl(UBRLCR(port));
  239. ubrlcr &= ~(UBRLCR_FIFOEN | UBRLCR_BREAK);
  240. clps_writel(ubrlcr, UBRLCR(port));
  241. }
  242. static void
  243. clps711xuart_set_termios(struct uart_port *port, struct ktermios *termios,
  244. struct ktermios *old)
  245. {
  246. unsigned int ubrlcr, baud, quot;
  247. unsigned long flags;
  248. /*
  249. * We don't implement CREAD.
  250. */
  251. termios->c_cflag |= CREAD;
  252. /* Ask the core to calculate the divisor for us */
  253. baud = uart_get_baud_rate(port, termios, old, port->uartclk / 4096,
  254. port->uartclk / 16);
  255. quot = uart_get_divisor(port, baud);
  256. switch (termios->c_cflag & CSIZE) {
  257. case CS5:
  258. ubrlcr = UBRLCR_WRDLEN5;
  259. break;
  260. case CS6:
  261. ubrlcr = UBRLCR_WRDLEN6;
  262. break;
  263. case CS7:
  264. ubrlcr = UBRLCR_WRDLEN7;
  265. break;
  266. default: // CS8
  267. ubrlcr = UBRLCR_WRDLEN8;
  268. break;
  269. }
  270. if (termios->c_cflag & CSTOPB)
  271. ubrlcr |= UBRLCR_XSTOP;
  272. if (termios->c_cflag & PARENB) {
  273. ubrlcr |= UBRLCR_PRTEN;
  274. if (!(termios->c_cflag & PARODD))
  275. ubrlcr |= UBRLCR_EVENPRT;
  276. }
  277. /* Enable FIFO */
  278. ubrlcr |= UBRLCR_FIFOEN;
  279. spin_lock_irqsave(&port->lock, flags);
  280. /*
  281. * Update the per-port timeout.
  282. */
  283. uart_update_timeout(port, termios->c_cflag, baud);
  284. port->read_status_mask = UARTDR_OVERR;
  285. if (termios->c_iflag & INPCK)
  286. port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR;
  287. /*
  288. * Characters to ignore
  289. */
  290. port->ignore_status_mask = 0;
  291. if (termios->c_iflag & IGNPAR)
  292. port->ignore_status_mask |= UARTDR_FRMERR | UARTDR_PARERR;
  293. if (termios->c_iflag & IGNBRK) {
  294. /*
  295. * If we're ignoring parity and break indicators,
  296. * ignore overruns to (for real raw support).
  297. */
  298. if (termios->c_iflag & IGNPAR)
  299. port->ignore_status_mask |= UARTDR_OVERR;
  300. }
  301. quot -= 1;
  302. clps_writel(ubrlcr | quot, UBRLCR(port));
  303. spin_unlock_irqrestore(&port->lock, flags);
  304. }
  305. static const char *clps711xuart_type(struct uart_port *port)
  306. {
  307. return port->type == PORT_CLPS711X ? "CLPS711x" : NULL;
  308. }
  309. /*
  310. * Configure/autoconfigure the port.
  311. */
  312. static void clps711xuart_config_port(struct uart_port *port, int flags)
  313. {
  314. if (flags & UART_CONFIG_TYPE)
  315. port->type = PORT_CLPS711X;
  316. }
  317. static void clps711xuart_release_port(struct uart_port *port)
  318. {
  319. }
  320. static int clps711xuart_request_port(struct uart_port *port)
  321. {
  322. return 0;
  323. }
  324. static struct uart_ops uart_clps711x_ops = {
  325. .tx_empty = clps711xuart_tx_empty,
  326. .set_mctrl = clps711xuart_set_mctrl_null,
  327. .get_mctrl = clps711xuart_get_mctrl,
  328. .stop_tx = clps711xuart_stop_tx,
  329. .start_tx = clps711xuart_start_tx,
  330. .stop_rx = clps711xuart_stop_rx,
  331. .enable_ms = clps711xuart_enable_ms,
  332. .break_ctl = clps711xuart_break_ctl,
  333. .startup = clps711xuart_startup,
  334. .shutdown = clps711xuart_shutdown,
  335. .set_termios = clps711xuart_set_termios,
  336. .type = clps711xuart_type,
  337. .config_port = clps711xuart_config_port,
  338. .release_port = clps711xuart_release_port,
  339. .request_port = clps711xuart_request_port,
  340. };
  341. #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
  342. static void uart_clps711x_console_putchar(struct uart_port *port, int ch)
  343. {
  344. while (clps_readl(SYSFLG(port)) & SYSFLG_UTXFF)
  345. barrier();
  346. clps_writew(ch, UARTDR(port));
  347. }
  348. static void uart_clps711x_console_write(struct console *co, const char *c,
  349. unsigned n)
  350. {
  351. struct clps711x_port *s = (struct clps711x_port *)co->data;
  352. struct uart_port *port = &s->port[co->index];
  353. u32 syscon;
  354. /* Ensure that the port is enabled */
  355. syscon = clps_readl(SYSCON(port));
  356. clps_writel(syscon | SYSCON_UARTEN, SYSCON(port));
  357. uart_console_write(port, c, n, uart_clps711x_console_putchar);
  358. /* Wait for transmitter to become empty */
  359. while (clps_readl(SYSFLG(port)) & SYSFLG_UBUSY)
  360. barrier();
  361. /* Restore the uart state */
  362. clps_writel(syscon, SYSCON(port));
  363. }
  364. static void uart_clps711x_console_get_options(struct uart_port *port,
  365. int *baud, int *parity,
  366. int *bits)
  367. {
  368. if (clps_readl(SYSCON(port)) & SYSCON_UARTEN) {
  369. unsigned int ubrlcr, quot;
  370. ubrlcr = clps_readl(UBRLCR(port));
  371. *parity = 'n';
  372. if (ubrlcr & UBRLCR_PRTEN) {
  373. if (ubrlcr & UBRLCR_EVENPRT)
  374. *parity = 'e';
  375. else
  376. *parity = 'o';
  377. }
  378. if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7)
  379. *bits = 7;
  380. else
  381. *bits = 8;
  382. quot = ubrlcr & UBRLCR_BAUD_MASK;
  383. *baud = port->uartclk / (16 * (quot + 1));
  384. }
  385. }
  386. static int uart_clps711x_console_setup(struct console *co, char *options)
  387. {
  388. int baud = 38400, bits = 8, parity = 'n', flow = 'n';
  389. struct clps711x_port *s = (struct clps711x_port *)co->data;
  390. struct uart_port *port = &s->port[(co->index > 0) ? co->index : 0];
  391. if (options)
  392. uart_parse_options(options, &baud, &parity, &bits, &flow);
  393. else
  394. uart_clps711x_console_get_options(port, &baud, &parity, &bits);
  395. return uart_set_options(port, co, baud, parity, bits, flow);
  396. }
  397. #endif
  398. static int __devinit uart_clps711x_probe(struct platform_device *pdev)
  399. {
  400. struct clps711x_port *s;
  401. int ret, i;
  402. s = devm_kzalloc(&pdev->dev, sizeof(struct clps711x_port), GFP_KERNEL);
  403. if (!s) {
  404. dev_err(&pdev->dev, "Error allocating port structure\n");
  405. return -ENOMEM;
  406. }
  407. platform_set_drvdata(pdev, s);
  408. s->uart_clk = devm_clk_get(&pdev->dev, "uart");
  409. if (IS_ERR(s->uart_clk)) {
  410. dev_err(&pdev->dev, "Can't get UART clocks\n");
  411. ret = PTR_ERR(s->uart_clk);
  412. goto err_out;
  413. }
  414. s->uart.owner = THIS_MODULE;
  415. s->uart.dev_name = "ttyCL";
  416. s->uart.major = UART_CLPS711X_MAJOR;
  417. s->uart.minor = UART_CLPS711X_MINOR;
  418. s->uart.nr = UART_CLPS711X_NR;
  419. #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
  420. s->uart.cons = &s->console;
  421. s->uart.cons->device = uart_console_device;
  422. s->uart.cons->write = uart_clps711x_console_write;
  423. s->uart.cons->setup = uart_clps711x_console_setup;
  424. s->uart.cons->flags = CON_PRINTBUFFER;
  425. s->uart.cons->index = -1;
  426. s->uart.cons->data = s;
  427. strcpy(s->uart.cons->name, "ttyCL");
  428. #endif
  429. ret = uart_register_driver(&s->uart);
  430. if (ret) {
  431. dev_err(&pdev->dev, "Registering UART driver failed\n");
  432. devm_clk_put(&pdev->dev, s->uart_clk);
  433. goto err_out;
  434. }
  435. for (i = 0; i < UART_CLPS711X_NR; i++) {
  436. s->port[i].line = i;
  437. s->port[i].dev = &pdev->dev;
  438. s->port[i].irq = TX_IRQ(&s->port[i]);
  439. s->port[i].iobase = SYSCON(&s->port[i]);
  440. s->port[i].type = PORT_CLPS711X;
  441. s->port[i].fifosize = 16;
  442. s->port[i].flags = UPF_SKIP_TEST | UPF_FIXED_TYPE;
  443. s->port[i].uartclk = clk_get_rate(s->uart_clk);
  444. s->port[i].ops = &uart_clps711x_ops;
  445. WARN_ON(uart_add_one_port(&s->uart, &s->port[i]));
  446. }
  447. return 0;
  448. err_out:
  449. platform_set_drvdata(pdev, NULL);
  450. return ret;
  451. }
  452. static int __devexit uart_clps711x_remove(struct platform_device *pdev)
  453. {
  454. struct clps711x_port *s = platform_get_drvdata(pdev);
  455. int i;
  456. for (i = 0; i < UART_CLPS711X_NR; i++)
  457. uart_remove_one_port(&s->uart, &s->port[i]);
  458. devm_clk_put(&pdev->dev, s->uart_clk);
  459. uart_unregister_driver(&s->uart);
  460. platform_set_drvdata(pdev, NULL);
  461. return 0;
  462. }
  463. static struct platform_driver clps711x_uart_driver = {
  464. .driver = {
  465. .name = UART_CLPS711X_NAME,
  466. .owner = THIS_MODULE,
  467. },
  468. .probe = uart_clps711x_probe,
  469. .remove = __devexit_p(uart_clps711x_remove),
  470. };
  471. module_platform_driver(clps711x_uart_driver);
  472. static struct platform_device clps711x_uart_device = {
  473. .name = UART_CLPS711X_NAME,
  474. };
  475. static int __init uart_clps711x_init(void)
  476. {
  477. return platform_device_register(&clps711x_uart_device);
  478. }
  479. module_init(uart_clps711x_init);
  480. static void __exit uart_clps711x_exit(void)
  481. {
  482. platform_device_unregister(&clps711x_uart_device);
  483. }
  484. module_exit(uart_clps711x_exit);
  485. MODULE_AUTHOR("Deep Blue Solutions Ltd");
  486. MODULE_DESCRIPTION("CLPS711X serial driver");
  487. MODULE_LICENSE("GPL");