p54common.c 51 KB

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  1. /*
  2. * Common code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
  6. * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
  7. *
  8. * Based on:
  9. * - the islsm (softmac prism54) driver, which is:
  10. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  11. * - stlc45xx driver
  12. * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. */
  18. #include <linux/init.h>
  19. #include <linux/firmware.h>
  20. #include <linux/etherdevice.h>
  21. #include <net/mac80211.h>
  22. #include "p54.h"
  23. #include "p54common.h"
  24. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  25. MODULE_DESCRIPTION("Softmac Prism54 common code");
  26. MODULE_LICENSE("GPL");
  27. MODULE_ALIAS("prism54common");
  28. static struct ieee80211_rate p54_bgrates[] = {
  29. { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  30. { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  31. { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  32. { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  33. { .bitrate = 60, .hw_value = 4, },
  34. { .bitrate = 90, .hw_value = 5, },
  35. { .bitrate = 120, .hw_value = 6, },
  36. { .bitrate = 180, .hw_value = 7, },
  37. { .bitrate = 240, .hw_value = 8, },
  38. { .bitrate = 360, .hw_value = 9, },
  39. { .bitrate = 480, .hw_value = 10, },
  40. { .bitrate = 540, .hw_value = 11, },
  41. };
  42. static struct ieee80211_channel p54_bgchannels[] = {
  43. { .center_freq = 2412, .hw_value = 1, },
  44. { .center_freq = 2417, .hw_value = 2, },
  45. { .center_freq = 2422, .hw_value = 3, },
  46. { .center_freq = 2427, .hw_value = 4, },
  47. { .center_freq = 2432, .hw_value = 5, },
  48. { .center_freq = 2437, .hw_value = 6, },
  49. { .center_freq = 2442, .hw_value = 7, },
  50. { .center_freq = 2447, .hw_value = 8, },
  51. { .center_freq = 2452, .hw_value = 9, },
  52. { .center_freq = 2457, .hw_value = 10, },
  53. { .center_freq = 2462, .hw_value = 11, },
  54. { .center_freq = 2467, .hw_value = 12, },
  55. { .center_freq = 2472, .hw_value = 13, },
  56. { .center_freq = 2484, .hw_value = 14, },
  57. };
  58. static struct ieee80211_supported_band band_2GHz = {
  59. .channels = p54_bgchannels,
  60. .n_channels = ARRAY_SIZE(p54_bgchannels),
  61. .bitrates = p54_bgrates,
  62. .n_bitrates = ARRAY_SIZE(p54_bgrates),
  63. };
  64. static struct ieee80211_rate p54_arates[] = {
  65. { .bitrate = 60, .hw_value = 4, },
  66. { .bitrate = 90, .hw_value = 5, },
  67. { .bitrate = 120, .hw_value = 6, },
  68. { .bitrate = 180, .hw_value = 7, },
  69. { .bitrate = 240, .hw_value = 8, },
  70. { .bitrate = 360, .hw_value = 9, },
  71. { .bitrate = 480, .hw_value = 10, },
  72. { .bitrate = 540, .hw_value = 11, },
  73. };
  74. static struct ieee80211_channel p54_achannels[] = {
  75. { .center_freq = 4920 },
  76. { .center_freq = 4940 },
  77. { .center_freq = 4960 },
  78. { .center_freq = 4980 },
  79. { .center_freq = 5040 },
  80. { .center_freq = 5060 },
  81. { .center_freq = 5080 },
  82. { .center_freq = 5170 },
  83. { .center_freq = 5180 },
  84. { .center_freq = 5190 },
  85. { .center_freq = 5200 },
  86. { .center_freq = 5210 },
  87. { .center_freq = 5220 },
  88. { .center_freq = 5230 },
  89. { .center_freq = 5240 },
  90. { .center_freq = 5260 },
  91. { .center_freq = 5280 },
  92. { .center_freq = 5300 },
  93. { .center_freq = 5320 },
  94. { .center_freq = 5500 },
  95. { .center_freq = 5520 },
  96. { .center_freq = 5540 },
  97. { .center_freq = 5560 },
  98. { .center_freq = 5580 },
  99. { .center_freq = 5600 },
  100. { .center_freq = 5620 },
  101. { .center_freq = 5640 },
  102. { .center_freq = 5660 },
  103. { .center_freq = 5680 },
  104. { .center_freq = 5700 },
  105. { .center_freq = 5745 },
  106. { .center_freq = 5765 },
  107. { .center_freq = 5785 },
  108. { .center_freq = 5805 },
  109. { .center_freq = 5825 },
  110. };
  111. static struct ieee80211_supported_band band_5GHz = {
  112. .channels = p54_achannels,
  113. .n_channels = ARRAY_SIZE(p54_achannels),
  114. .bitrates = p54_arates,
  115. .n_bitrates = ARRAY_SIZE(p54_arates),
  116. };
  117. int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  118. {
  119. struct p54_common *priv = dev->priv;
  120. struct bootrec_exp_if *exp_if;
  121. struct bootrec *bootrec;
  122. u32 *data = (u32 *)fw->data;
  123. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  124. u8 *fw_version = NULL;
  125. size_t len;
  126. int i;
  127. if (priv->rx_start)
  128. return 0;
  129. while (data < end_data && *data)
  130. data++;
  131. while (data < end_data && !*data)
  132. data++;
  133. bootrec = (struct bootrec *) data;
  134. while (bootrec->data <= end_data &&
  135. (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
  136. u32 code = le32_to_cpu(bootrec->code);
  137. switch (code) {
  138. case BR_CODE_COMPONENT_ID:
  139. priv->fw_interface = be32_to_cpup((__be32 *)
  140. bootrec->data);
  141. switch (priv->fw_interface) {
  142. case FW_FMAC:
  143. printk(KERN_INFO "p54: FreeMAC firmware\n");
  144. break;
  145. case FW_LM20:
  146. printk(KERN_INFO "p54: LM20 firmware\n");
  147. break;
  148. case FW_LM86:
  149. printk(KERN_INFO "p54: LM86 firmware\n");
  150. break;
  151. case FW_LM87:
  152. printk(KERN_INFO "p54: LM87 firmware\n");
  153. break;
  154. default:
  155. printk(KERN_INFO "p54: unknown firmware\n");
  156. break;
  157. }
  158. break;
  159. case BR_CODE_COMPONENT_VERSION:
  160. /* 24 bytes should be enough for all firmwares */
  161. if (strnlen((unsigned char*)bootrec->data, 24) < 24)
  162. fw_version = (unsigned char*)bootrec->data;
  163. break;
  164. case BR_CODE_DESCR: {
  165. struct bootrec_desc *desc =
  166. (struct bootrec_desc *)bootrec->data;
  167. priv->rx_start = le32_to_cpu(desc->rx_start);
  168. /* FIXME add sanity checking */
  169. priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
  170. priv->headroom = desc->headroom;
  171. priv->tailroom = desc->tailroom;
  172. if (le32_to_cpu(bootrec->len) == 11)
  173. priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
  174. else
  175. priv->rx_mtu = (size_t)
  176. 0x620 - priv->tx_hdr_len;
  177. break;
  178. }
  179. case BR_CODE_EXPOSED_IF:
  180. exp_if = (struct bootrec_exp_if *) bootrec->data;
  181. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  182. if (exp_if[i].if_id == cpu_to_le16(0x1a))
  183. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  184. break;
  185. case BR_CODE_DEPENDENT_IF:
  186. break;
  187. case BR_CODE_END_OF_BRA:
  188. case LEGACY_BR_CODE_END_OF_BRA:
  189. end_data = NULL;
  190. break;
  191. default:
  192. break;
  193. }
  194. bootrec = (struct bootrec *)&bootrec->data[len];
  195. }
  196. if (fw_version)
  197. printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
  198. fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
  199. if (priv->fw_var < 0x500)
  200. printk(KERN_INFO "p54: you are using an obsolete firmware. "
  201. "visit http://wireless.kernel.org/en/users/Drivers/p54 "
  202. "and grab one for \"kernel >= 2.6.28\"!\n");
  203. if (priv->fw_var >= 0x300) {
  204. /* Firmware supports QoS, use it! */
  205. priv->tx_stats[4].limit = 3; /* AC_VO */
  206. priv->tx_stats[5].limit = 4; /* AC_VI */
  207. priv->tx_stats[6].limit = 3; /* AC_BE */
  208. priv->tx_stats[7].limit = 2; /* AC_BK */
  209. dev->queues = 4;
  210. }
  211. return 0;
  212. }
  213. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  214. static int p54_convert_rev0(struct ieee80211_hw *dev,
  215. struct pda_pa_curve_data *curve_data)
  216. {
  217. struct p54_common *priv = dev->priv;
  218. struct p54_pa_curve_data_sample *dst;
  219. struct pda_pa_curve_data_sample_rev0 *src;
  220. size_t cd_len = sizeof(*curve_data) +
  221. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  222. curve_data->channels;
  223. unsigned int i, j;
  224. void *source, *target;
  225. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  226. if (!priv->curve_data)
  227. return -ENOMEM;
  228. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  229. source = curve_data->data;
  230. target = priv->curve_data->data;
  231. for (i = 0; i < curve_data->channels; i++) {
  232. __le16 *freq = source;
  233. source += sizeof(__le16);
  234. *((__le16 *)target) = *freq;
  235. target += sizeof(__le16);
  236. for (j = 0; j < curve_data->points_per_channel; j++) {
  237. dst = target;
  238. src = source;
  239. dst->rf_power = src->rf_power;
  240. dst->pa_detector = src->pa_detector;
  241. dst->data_64qam = src->pcv;
  242. /* "invent" the points for the other modulations */
  243. #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
  244. dst->data_16qam = SUB(src->pcv, 12);
  245. dst->data_qpsk = SUB(dst->data_16qam, 12);
  246. dst->data_bpsk = SUB(dst->data_qpsk, 12);
  247. dst->data_barker = SUB(dst->data_bpsk, 14);
  248. #undef SUB
  249. target += sizeof(*dst);
  250. source += sizeof(*src);
  251. }
  252. }
  253. return 0;
  254. }
  255. static int p54_convert_rev1(struct ieee80211_hw *dev,
  256. struct pda_pa_curve_data *curve_data)
  257. {
  258. struct p54_common *priv = dev->priv;
  259. struct p54_pa_curve_data_sample *dst;
  260. struct pda_pa_curve_data_sample_rev1 *src;
  261. size_t cd_len = sizeof(*curve_data) +
  262. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  263. curve_data->channels;
  264. unsigned int i, j;
  265. void *source, *target;
  266. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  267. if (!priv->curve_data)
  268. return -ENOMEM;
  269. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  270. source = curve_data->data;
  271. target = priv->curve_data->data;
  272. for (i = 0; i < curve_data->channels; i++) {
  273. __le16 *freq = source;
  274. source += sizeof(__le16);
  275. *((__le16 *)target) = *freq;
  276. target += sizeof(__le16);
  277. for (j = 0; j < curve_data->points_per_channel; j++) {
  278. memcpy(target, source, sizeof(*src));
  279. target += sizeof(*dst);
  280. source += sizeof(*src);
  281. }
  282. source++;
  283. }
  284. return 0;
  285. }
  286. static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
  287. "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
  288. static int p54_init_xbow_synth(struct ieee80211_hw *dev);
  289. static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
  290. {
  291. struct p54_common *priv = dev->priv;
  292. struct eeprom_pda_wrap *wrap = NULL;
  293. struct pda_entry *entry;
  294. unsigned int data_len, entry_len;
  295. void *tmp;
  296. int err;
  297. u8 *end = (u8 *)eeprom + len;
  298. u16 synth = 0;
  299. wrap = (struct eeprom_pda_wrap *) eeprom;
  300. entry = (void *)wrap->data + le16_to_cpu(wrap->len);
  301. /* verify that at least the entry length/code fits */
  302. while ((u8 *)entry <= end - sizeof(*entry)) {
  303. entry_len = le16_to_cpu(entry->len);
  304. data_len = ((entry_len - 1) << 1);
  305. /* abort if entry exceeds whole structure */
  306. if ((u8 *)entry + sizeof(*entry) + data_len > end)
  307. break;
  308. switch (le16_to_cpu(entry->code)) {
  309. case PDR_MAC_ADDRESS:
  310. SET_IEEE80211_PERM_ADDR(dev, entry->data);
  311. break;
  312. case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
  313. if (data_len < 2) {
  314. err = -EINVAL;
  315. goto err;
  316. }
  317. if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
  318. err = -EINVAL;
  319. goto err;
  320. }
  321. priv->output_limit = kmalloc(entry->data[1] *
  322. sizeof(*priv->output_limit), GFP_KERNEL);
  323. if (!priv->output_limit) {
  324. err = -ENOMEM;
  325. goto err;
  326. }
  327. memcpy(priv->output_limit, &entry->data[2],
  328. entry->data[1]*sizeof(*priv->output_limit));
  329. priv->output_limit_len = entry->data[1];
  330. break;
  331. case PDR_PRISM_PA_CAL_CURVE_DATA: {
  332. struct pda_pa_curve_data *curve_data =
  333. (struct pda_pa_curve_data *)entry->data;
  334. if (data_len < sizeof(*curve_data)) {
  335. err = -EINVAL;
  336. goto err;
  337. }
  338. switch (curve_data->cal_method_rev) {
  339. case 0:
  340. err = p54_convert_rev0(dev, curve_data);
  341. break;
  342. case 1:
  343. err = p54_convert_rev1(dev, curve_data);
  344. break;
  345. default:
  346. printk(KERN_ERR "p54: unknown curve data "
  347. "revision %d\n",
  348. curve_data->cal_method_rev);
  349. err = -ENODEV;
  350. break;
  351. }
  352. if (err)
  353. goto err;
  354. }
  355. case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
  356. priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
  357. if (!priv->iq_autocal) {
  358. err = -ENOMEM;
  359. goto err;
  360. }
  361. memcpy(priv->iq_autocal, entry->data, data_len);
  362. priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
  363. break;
  364. case PDR_INTERFACE_LIST:
  365. tmp = entry->data;
  366. while ((u8 *)tmp < entry->data + data_len) {
  367. struct bootrec_exp_if *exp_if = tmp;
  368. if (le16_to_cpu(exp_if->if_id) == 0xf)
  369. synth = le16_to_cpu(exp_if->variant);
  370. tmp += sizeof(struct bootrec_exp_if);
  371. }
  372. break;
  373. case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
  374. priv->version = *(u8 *)(entry->data + 1);
  375. break;
  376. case PDR_END:
  377. /* make it overrun */
  378. entry_len = len;
  379. break;
  380. case PDR_MANUFACTURING_PART_NUMBER:
  381. case PDR_PDA_VERSION:
  382. case PDR_NIC_SERIAL_NUMBER:
  383. case PDR_REGULATORY_DOMAIN_LIST:
  384. case PDR_TEMPERATURE_TYPE:
  385. case PDR_PRISM_PCI_IDENTIFIER:
  386. case PDR_COUNTRY_INFORMATION:
  387. case PDR_OEM_NAME:
  388. case PDR_PRODUCT_NAME:
  389. case PDR_UTF8_OEM_NAME:
  390. case PDR_UTF8_PRODUCT_NAME:
  391. case PDR_COUNTRY_LIST:
  392. case PDR_DEFAULT_COUNTRY:
  393. case PDR_ANTENNA_GAIN:
  394. case PDR_PRISM_INDIGO_PA_CALIBRATION_DATA:
  395. case PDR_RSSI_LINEAR_APPROXIMATION:
  396. case PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND:
  397. case PDR_REGULATORY_POWER_LIMITS:
  398. case PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED:
  399. case PDR_RADIATED_TRANSMISSION_CORRECTION:
  400. case PDR_PRISM_TX_IQ_CALIBRATION:
  401. case PDR_BASEBAND_REGISTERS:
  402. case PDR_PER_CHANNEL_BASEBAND_REGISTERS:
  403. break;
  404. default:
  405. printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
  406. le16_to_cpu(entry->code));
  407. break;
  408. }
  409. entry = (void *)entry + (entry_len + 1)*2;
  410. }
  411. if (!synth || !priv->iq_autocal || !priv->output_limit ||
  412. !priv->curve_data) {
  413. printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
  414. err = -EINVAL;
  415. goto err;
  416. }
  417. priv->rxhw = synth & PDR_SYNTH_FRONTEND_MASK;
  418. if (priv->rxhw == 4)
  419. p54_init_xbow_synth(dev);
  420. if (!(synth & PDR_SYNTH_24_GHZ_DISABLED))
  421. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
  422. if (!(synth & PDR_SYNTH_5_GHZ_DISABLED))
  423. dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
  424. if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
  425. u8 perm_addr[ETH_ALEN];
  426. printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
  427. wiphy_name(dev->wiphy));
  428. random_ether_addr(perm_addr);
  429. SET_IEEE80211_PERM_ADDR(dev, perm_addr);
  430. }
  431. printk(KERN_INFO "%s: hwaddr %pM, MAC:isl38%02x RF:%s\n",
  432. wiphy_name(dev->wiphy),
  433. dev->wiphy->perm_addr,
  434. priv->version, p54_rf_chips[priv->rxhw]);
  435. return 0;
  436. err:
  437. if (priv->iq_autocal) {
  438. kfree(priv->iq_autocal);
  439. priv->iq_autocal = NULL;
  440. }
  441. if (priv->output_limit) {
  442. kfree(priv->output_limit);
  443. priv->output_limit = NULL;
  444. }
  445. if (priv->curve_data) {
  446. kfree(priv->curve_data);
  447. priv->curve_data = NULL;
  448. }
  449. printk(KERN_ERR "p54: eeprom parse failed!\n");
  450. return err;
  451. }
  452. static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
  453. {
  454. /* TODO: get the rssi_add & rssi_mul data from the eeprom */
  455. return ((rssi * 0x83) / 64 - 400) / 4;
  456. }
  457. static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
  458. {
  459. struct p54_common *priv = dev->priv;
  460. struct p54_rx_data *hdr = (struct p54_rx_data *) skb->data;
  461. struct ieee80211_rx_status rx_status = {0};
  462. u16 freq = le16_to_cpu(hdr->freq);
  463. size_t header_len = sizeof(*hdr);
  464. u32 tsf32;
  465. if (!(hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_IN_FCS_GOOD))) {
  466. if (priv->filter_flags & FIF_FCSFAIL)
  467. rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
  468. else
  469. return 0;
  470. }
  471. rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
  472. rx_status.noise = priv->noise;
  473. /* XX correct? */
  474. rx_status.qual = (100 * hdr->rssi) / 127;
  475. if (hdr->rate & 0x10)
  476. rx_status.flag |= RX_FLAG_SHORTPRE;
  477. rx_status.rate_idx = (dev->conf.channel->band == IEEE80211_BAND_2GHZ ?
  478. hdr->rate : (hdr->rate - 4)) & 0xf;
  479. rx_status.freq = freq;
  480. rx_status.band = dev->conf.channel->band;
  481. rx_status.antenna = hdr->antenna;
  482. tsf32 = le32_to_cpu(hdr->tsf32);
  483. if (tsf32 < priv->tsf_low32)
  484. priv->tsf_high32++;
  485. rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
  486. priv->tsf_low32 = tsf32;
  487. rx_status.flag |= RX_FLAG_TSFT;
  488. if (hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
  489. header_len += hdr->align[0];
  490. skb_pull(skb, header_len);
  491. skb_trim(skb, le16_to_cpu(hdr->len));
  492. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  493. return -1;
  494. }
  495. static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
  496. {
  497. struct p54_common *priv = dev->priv;
  498. int i;
  499. if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
  500. return ;
  501. for (i = 0; i < dev->queues; i++)
  502. if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
  503. ieee80211_wake_queue(dev, i);
  504. }
  505. void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb)
  506. {
  507. struct p54_common *priv = dev->priv;
  508. struct ieee80211_tx_info *info;
  509. struct memrecord *range;
  510. unsigned long flags;
  511. u32 freed = 0, last_addr = priv->rx_start;
  512. if (unlikely(!skb || !dev || !skb_queue_len(&priv->tx_queue)))
  513. return;
  514. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  515. info = IEEE80211_SKB_CB(skb);
  516. range = (void *)info->rate_driver_data;
  517. if (skb->prev != (struct sk_buff *)&priv->tx_queue) {
  518. struct ieee80211_tx_info *ni;
  519. struct memrecord *mr;
  520. ni = IEEE80211_SKB_CB(skb->prev);
  521. mr = (struct memrecord *)ni->rate_driver_data;
  522. last_addr = mr->end_addr;
  523. }
  524. if (skb->next != (struct sk_buff *)&priv->tx_queue) {
  525. struct ieee80211_tx_info *ni;
  526. struct memrecord *mr;
  527. ni = IEEE80211_SKB_CB(skb->next);
  528. mr = (struct memrecord *)ni->rate_driver_data;
  529. freed = mr->start_addr - last_addr;
  530. } else
  531. freed = priv->rx_end - last_addr;
  532. __skb_unlink(skb, &priv->tx_queue);
  533. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  534. kfree_skb(skb);
  535. if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
  536. IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
  537. p54_wake_free_queues(dev);
  538. }
  539. EXPORT_SYMBOL_GPL(p54_free_skb);
  540. static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
  541. {
  542. struct p54_common *priv = dev->priv;
  543. struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
  544. struct p54_frame_sent *payload = (struct p54_frame_sent *) hdr->data;
  545. struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
  546. u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
  547. struct memrecord *range = NULL;
  548. u32 freed = 0;
  549. u32 last_addr = priv->rx_start;
  550. unsigned long flags;
  551. int count, idx;
  552. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  553. while (entry != (struct sk_buff *)&priv->tx_queue) {
  554. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
  555. struct p54_hdr *entry_hdr;
  556. struct p54_tx_data *entry_data;
  557. int pad = 0;
  558. range = (void *)info->rate_driver_data;
  559. if (range->start_addr != addr) {
  560. last_addr = range->end_addr;
  561. entry = entry->next;
  562. continue;
  563. }
  564. if (entry->next != (struct sk_buff *)&priv->tx_queue) {
  565. struct ieee80211_tx_info *ni;
  566. struct memrecord *mr;
  567. ni = IEEE80211_SKB_CB(entry->next);
  568. mr = (struct memrecord *)ni->rate_driver_data;
  569. freed = mr->start_addr - last_addr;
  570. } else
  571. freed = priv->rx_end - last_addr;
  572. last_addr = range->end_addr;
  573. __skb_unlink(entry, &priv->tx_queue);
  574. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  575. if (unlikely(entry == priv->cached_beacon)) {
  576. kfree_skb(entry);
  577. priv->cached_beacon = NULL;
  578. goto out;
  579. }
  580. /*
  581. * Clear manually, ieee80211_tx_info_clear_status would
  582. * clear the counts too and we need them.
  583. */
  584. memset(&info->status.ampdu_ack_len, 0,
  585. sizeof(struct ieee80211_tx_info) -
  586. offsetof(struct ieee80211_tx_info, status.ampdu_ack_len));
  587. BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
  588. status.ampdu_ack_len) != 23);
  589. entry_hdr = (struct p54_hdr *) entry->data;
  590. entry_data = (struct p54_tx_data *) entry_hdr->data;
  591. if (entry_hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
  592. pad = entry_data->align[0];
  593. /* walk through the rates array and adjust the counts */
  594. count = payload->tries;
  595. for (idx = 0; idx < 4; idx++) {
  596. if (count >= info->status.rates[idx].count) {
  597. count -= info->status.rates[idx].count;
  598. } else if (count > 0) {
  599. info->status.rates[idx].count = count;
  600. count = 0;
  601. } else {
  602. info->status.rates[idx].idx = -1;
  603. info->status.rates[idx].count = 0;
  604. }
  605. }
  606. priv->tx_stats[entry_data->hw_queue].len--;
  607. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
  608. (!payload->status))
  609. info->flags |= IEEE80211_TX_STAT_ACK;
  610. if (payload->status & P54_TX_PSM_CANCELLED)
  611. info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
  612. info->status.ack_signal = p54_rssi_to_dbm(dev,
  613. (int)payload->ack_rssi);
  614. skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
  615. ieee80211_tx_status_irqsafe(dev, entry);
  616. goto out;
  617. }
  618. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  619. out:
  620. if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
  621. IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
  622. p54_wake_free_queues(dev);
  623. }
  624. static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
  625. struct sk_buff *skb)
  626. {
  627. struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
  628. struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
  629. struct p54_common *priv = dev->priv;
  630. if (!priv->eeprom)
  631. return ;
  632. memcpy(priv->eeprom, eeprom->data, le16_to_cpu(eeprom->len));
  633. complete(&priv->eeprom_comp);
  634. }
  635. static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
  636. {
  637. struct p54_common *priv = dev->priv;
  638. struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
  639. struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
  640. u32 tsf32 = le32_to_cpu(stats->tsf32);
  641. if (tsf32 < priv->tsf_low32)
  642. priv->tsf_high32++;
  643. priv->tsf_low32 = tsf32;
  644. priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
  645. priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
  646. priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
  647. priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
  648. complete(&priv->stats_comp);
  649. mod_timer(&priv->stats_timer, jiffies + 5 * HZ);
  650. }
  651. static void p54_rx_trap(struct ieee80211_hw *dev, struct sk_buff *skb)
  652. {
  653. struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
  654. struct p54_trap *trap = (struct p54_trap *) hdr->data;
  655. u16 event = le16_to_cpu(trap->event);
  656. u16 freq = le16_to_cpu(trap->frequency);
  657. switch (event) {
  658. case P54_TRAP_BEACON_TX:
  659. break;
  660. case P54_TRAP_RADAR:
  661. printk(KERN_INFO "%s: radar (freq:%d MHz)\n",
  662. wiphy_name(dev->wiphy), freq);
  663. break;
  664. case P54_TRAP_NO_BEACON:
  665. break;
  666. case P54_TRAP_SCAN:
  667. break;
  668. case P54_TRAP_TBTT:
  669. break;
  670. case P54_TRAP_TIMER:
  671. break;
  672. default:
  673. printk(KERN_INFO "%s: received event:%x freq:%d\n",
  674. wiphy_name(dev->wiphy), event, freq);
  675. break;
  676. }
  677. }
  678. static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
  679. {
  680. struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
  681. switch (le16_to_cpu(hdr->type)) {
  682. case P54_CONTROL_TYPE_TXDONE:
  683. p54_rx_frame_sent(dev, skb);
  684. break;
  685. case P54_CONTROL_TYPE_TRAP:
  686. p54_rx_trap(dev, skb);
  687. break;
  688. case P54_CONTROL_TYPE_BBP:
  689. break;
  690. case P54_CONTROL_TYPE_STAT_READBACK:
  691. p54_rx_stats(dev, skb);
  692. break;
  693. case P54_CONTROL_TYPE_EEPROM_READBACK:
  694. p54_rx_eeprom_readback(dev, skb);
  695. break;
  696. default:
  697. printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
  698. wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
  699. break;
  700. }
  701. return 0;
  702. }
  703. /* returns zero if skb can be reused */
  704. int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
  705. {
  706. u16 type = le16_to_cpu(*((__le16 *)skb->data));
  707. if (type & P54_HDR_FLAG_CONTROL)
  708. return p54_rx_control(dev, skb);
  709. else
  710. return p54_rx_data(dev, skb);
  711. }
  712. EXPORT_SYMBOL_GPL(p54_rx);
  713. /*
  714. * So, the firmware is somewhat stupid and doesn't know what places in its
  715. * memory incoming data should go to. By poking around in the firmware, we
  716. * can find some unused memory to upload our packets to. However, data that we
  717. * want the card to TX needs to stay intact until the card has told us that
  718. * it is done with it. This function finds empty places we can upload to and
  719. * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
  720. * allocated areas.
  721. */
  722. static int p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
  723. struct p54_hdr *data, u32 len)
  724. {
  725. struct p54_common *priv = dev->priv;
  726. struct sk_buff *entry = priv->tx_queue.next;
  727. struct sk_buff *target_skb = NULL;
  728. struct ieee80211_tx_info *info;
  729. struct memrecord *range;
  730. u32 last_addr = priv->rx_start;
  731. u32 largest_hole = 0;
  732. u32 target_addr = priv->rx_start;
  733. unsigned long flags;
  734. unsigned int left;
  735. len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
  736. if (!skb)
  737. return -EINVAL;
  738. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  739. left = skb_queue_len(&priv->tx_queue);
  740. while (left--) {
  741. u32 hole_size;
  742. info = IEEE80211_SKB_CB(entry);
  743. range = (void *)info->rate_driver_data;
  744. hole_size = range->start_addr - last_addr;
  745. if (!target_skb && hole_size >= len) {
  746. target_skb = entry->prev;
  747. hole_size -= len;
  748. target_addr = last_addr;
  749. }
  750. largest_hole = max(largest_hole, hole_size);
  751. last_addr = range->end_addr;
  752. entry = entry->next;
  753. }
  754. if (!target_skb && priv->rx_end - last_addr >= len) {
  755. target_skb = priv->tx_queue.prev;
  756. largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
  757. if (!skb_queue_empty(&priv->tx_queue)) {
  758. info = IEEE80211_SKB_CB(target_skb);
  759. range = (void *)info->rate_driver_data;
  760. target_addr = range->end_addr;
  761. }
  762. } else
  763. largest_hole = max(largest_hole, priv->rx_end - last_addr);
  764. if (!target_skb) {
  765. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  766. ieee80211_stop_queues(dev);
  767. return -ENOMEM;
  768. }
  769. info = IEEE80211_SKB_CB(skb);
  770. range = (void *)info->rate_driver_data;
  771. range->start_addr = target_addr;
  772. range->end_addr = target_addr + len;
  773. __skb_queue_after(&priv->tx_queue, target_skb, skb);
  774. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  775. if (largest_hole < priv->headroom + sizeof(struct p54_hdr) +
  776. 48 + IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
  777. ieee80211_stop_queues(dev);
  778. data->req_id = cpu_to_le32(target_addr + priv->headroom);
  779. return 0;
  780. }
  781. static struct sk_buff *p54_alloc_skb(struct ieee80211_hw *dev,
  782. u16 hdr_flags, u16 len, u16 type, gfp_t memflags)
  783. {
  784. struct p54_common *priv = dev->priv;
  785. struct p54_hdr *hdr;
  786. struct sk_buff *skb;
  787. skb = __dev_alloc_skb(len + priv->tx_hdr_len, memflags);
  788. if (!skb)
  789. return NULL;
  790. skb_reserve(skb, priv->tx_hdr_len);
  791. hdr = (struct p54_hdr *) skb_put(skb, sizeof(*hdr));
  792. hdr->flags = cpu_to_le16(hdr_flags);
  793. hdr->len = cpu_to_le16(len - sizeof(*hdr));
  794. hdr->type = cpu_to_le16(type);
  795. hdr->tries = hdr->rts_tries = 0;
  796. if (unlikely(p54_assign_address(dev, skb, hdr, len))) {
  797. kfree_skb(skb);
  798. return NULL;
  799. }
  800. return skb;
  801. }
  802. int p54_read_eeprom(struct ieee80211_hw *dev)
  803. {
  804. struct p54_common *priv = dev->priv;
  805. struct p54_hdr *hdr = NULL;
  806. struct p54_eeprom_lm86 *eeprom_hdr;
  807. struct sk_buff *skb;
  808. size_t eeprom_size = 0x2020, offset = 0, blocksize;
  809. int ret = -ENOMEM;
  810. void *eeprom = NULL;
  811. skb = p54_alloc_skb(dev, 0x8000, sizeof(*hdr) + sizeof(*eeprom_hdr) +
  812. EEPROM_READBACK_LEN,
  813. P54_CONTROL_TYPE_EEPROM_READBACK, GFP_KERNEL);
  814. if (!skb)
  815. goto free;
  816. priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
  817. if (!priv->eeprom)
  818. goto free;
  819. eeprom = kzalloc(eeprom_size, GFP_KERNEL);
  820. if (!eeprom)
  821. goto free;
  822. eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
  823. sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN);
  824. while (eeprom_size) {
  825. blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
  826. eeprom_hdr->offset = cpu_to_le16(offset);
  827. eeprom_hdr->len = cpu_to_le16(blocksize);
  828. priv->tx(dev, skb, 0);
  829. if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
  830. printk(KERN_ERR "%s: device does not respond!\n",
  831. wiphy_name(dev->wiphy));
  832. ret = -EBUSY;
  833. goto free;
  834. }
  835. memcpy(eeprom + offset, priv->eeprom, blocksize);
  836. offset += blocksize;
  837. eeprom_size -= blocksize;
  838. }
  839. ret = p54_parse_eeprom(dev, eeprom, offset);
  840. free:
  841. kfree(priv->eeprom);
  842. priv->eeprom = NULL;
  843. p54_free_skb(dev, skb);
  844. kfree(eeprom);
  845. return ret;
  846. }
  847. EXPORT_SYMBOL_GPL(p54_read_eeprom);
  848. static int p54_set_tim(struct ieee80211_hw *dev, struct ieee80211_sta *sta,
  849. bool set)
  850. {
  851. struct p54_common *priv = dev->priv;
  852. struct sk_buff *skb;
  853. struct p54_tim *tim;
  854. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
  855. sizeof(struct p54_hdr) + sizeof(*tim),
  856. P54_CONTROL_TYPE_TIM, GFP_KERNEL);
  857. if (!skb)
  858. return -ENOMEM;
  859. tim = (struct p54_tim *) skb_put(skb, sizeof(*tim));
  860. tim->count = 1;
  861. tim->entry[0] = cpu_to_le16(set ? (sta->aid | 0x8000) : sta->aid);
  862. priv->tx(dev, skb, 1);
  863. return 0;
  864. }
  865. static int p54_sta_unlock(struct ieee80211_hw *dev, u8 *addr)
  866. {
  867. struct p54_common *priv = dev->priv;
  868. struct sk_buff *skb;
  869. struct p54_sta_unlock *sta;
  870. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
  871. sizeof(struct p54_hdr) + sizeof(*sta),
  872. P54_CONTROL_TYPE_PSM_STA_UNLOCK, GFP_ATOMIC);
  873. if (!skb)
  874. return -ENOMEM;
  875. sta = (struct p54_sta_unlock *)skb_put(skb, sizeof(*sta));
  876. memcpy(sta->addr, addr, ETH_ALEN);
  877. priv->tx(dev, skb, 1);
  878. return 0;
  879. }
  880. static int p54_tx_cancel(struct ieee80211_hw *dev, struct sk_buff *entry)
  881. {
  882. struct p54_common *priv = dev->priv;
  883. struct sk_buff *skb;
  884. struct p54_hdr *hdr;
  885. struct p54_txcancel *cancel;
  886. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
  887. sizeof(struct p54_hdr) + sizeof(*cancel),
  888. P54_CONTROL_TYPE_TXCANCEL, GFP_ATOMIC);
  889. if (!skb)
  890. return -ENOMEM;
  891. hdr = (void *)entry->data;
  892. cancel = (struct p54_txcancel *)skb_put(skb, sizeof(*cancel));
  893. cancel->req_id = hdr->req_id;
  894. priv->tx(dev, skb, 1);
  895. return 0;
  896. }
  897. static int p54_tx_fill(struct ieee80211_hw *dev, struct sk_buff *skb,
  898. struct ieee80211_tx_info *info, u8 *queue, size_t *extra_len,
  899. u16 *flags, u16 *aid)
  900. {
  901. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  902. struct p54_common *priv = dev->priv;
  903. int ret = 0;
  904. if (unlikely(ieee80211_is_mgmt(hdr->frame_control))) {
  905. if (ieee80211_is_beacon(hdr->frame_control)) {
  906. *aid = 0;
  907. *queue = 0;
  908. *extra_len = IEEE80211_MAX_TIM_LEN;
  909. *flags = P54_HDR_FLAG_DATA_OUT_TIMESTAMP;
  910. return 0;
  911. } else if (ieee80211_is_probe_resp(hdr->frame_control)) {
  912. *aid = 0;
  913. *queue = 2;
  914. *flags = P54_HDR_FLAG_DATA_OUT_TIMESTAMP |
  915. P54_HDR_FLAG_DATA_OUT_NOCANCEL;
  916. return 0;
  917. } else {
  918. *queue = 2;
  919. ret = 0;
  920. }
  921. } else {
  922. *queue += 4;
  923. ret = 1;
  924. }
  925. switch (priv->mode) {
  926. case NL80211_IFTYPE_STATION:
  927. *aid = 1;
  928. break;
  929. case NL80211_IFTYPE_AP:
  930. case NL80211_IFTYPE_ADHOC:
  931. case NL80211_IFTYPE_MESH_POINT:
  932. if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
  933. *aid = 0;
  934. *queue = 3;
  935. return 0;
  936. }
  937. if (info->control.sta)
  938. *aid = info->control.sta->aid;
  939. else
  940. *flags = P54_HDR_FLAG_DATA_OUT_NOCANCEL;
  941. }
  942. return ret;
  943. }
  944. static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
  945. {
  946. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  947. struct ieee80211_tx_queue_stats *current_queue = NULL;
  948. struct p54_common *priv = dev->priv;
  949. struct p54_hdr *hdr;
  950. struct p54_tx_data *txhdr;
  951. size_t padding, len, tim_len = 0;
  952. int i, j, ridx;
  953. u16 hdr_flags = 0, aid = 0;
  954. u8 rate, queue;
  955. u8 cts_rate = 0x20;
  956. u8 rc_flags;
  957. u8 calculated_tries[4];
  958. u8 nrates = 0, nremaining = 8;
  959. queue = skb_get_queue_mapping(skb);
  960. if (p54_tx_fill(dev, skb, info, &queue, &tim_len, &hdr_flags, &aid)) {
  961. current_queue = &priv->tx_stats[queue];
  962. if (unlikely(current_queue->len > current_queue->limit))
  963. return NETDEV_TX_BUSY;
  964. current_queue->len++;
  965. current_queue->count++;
  966. if (current_queue->len == current_queue->limit)
  967. ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
  968. }
  969. padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
  970. len = skb->len;
  971. if (info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT) {
  972. if (info->control.sta)
  973. if (p54_sta_unlock(dev, info->control.sta->addr)) {
  974. if (current_queue) {
  975. current_queue->len--;
  976. current_queue->count--;
  977. }
  978. return NETDEV_TX_BUSY;
  979. }
  980. }
  981. txhdr = (struct p54_tx_data *) skb_push(skb, sizeof(*txhdr) + padding);
  982. hdr = (struct p54_hdr *) skb_push(skb, sizeof(*hdr));
  983. if (padding)
  984. hdr_flags |= P54_HDR_FLAG_DATA_ALIGN;
  985. hdr->len = cpu_to_le16(len);
  986. hdr->type = cpu_to_le16(aid);
  987. hdr->rts_tries = info->control.rates[0].count;
  988. /*
  989. * we register the rates in perfect order, and
  990. * RTS/CTS won't happen on 5 GHz
  991. */
  992. cts_rate = info->control.rts_cts_rate_idx;
  993. memset(&txhdr->rateset, 0, sizeof(txhdr->rateset));
  994. /* see how many rates got used */
  995. for (i = 0; i < 4; i++) {
  996. if (info->control.rates[i].idx < 0)
  997. break;
  998. nrates++;
  999. }
  1000. /* limit tries to 8/nrates per rate */
  1001. for (i = 0; i < nrates; i++) {
  1002. /*
  1003. * The magic expression here is equivalent to 8/nrates for
  1004. * all values that matter, but avoids division and jumps.
  1005. * Note that nrates can only take the values 1 through 4.
  1006. */
  1007. calculated_tries[i] = min_t(int, ((15 >> nrates) | 1) + 1,
  1008. info->control.rates[i].count);
  1009. nremaining -= calculated_tries[i];
  1010. }
  1011. /* if there are tries left, distribute from back to front */
  1012. for (i = nrates - 1; nremaining > 0 && i >= 0; i--) {
  1013. int tmp = info->control.rates[i].count - calculated_tries[i];
  1014. if (tmp <= 0)
  1015. continue;
  1016. /* RC requested more tries at this rate */
  1017. tmp = min_t(int, tmp, nremaining);
  1018. calculated_tries[i] += tmp;
  1019. nremaining -= tmp;
  1020. }
  1021. ridx = 0;
  1022. for (i = 0; i < nrates && ridx < 8; i++) {
  1023. /* we register the rates in perfect order */
  1024. rate = info->control.rates[i].idx;
  1025. if (info->band == IEEE80211_BAND_5GHZ)
  1026. rate += 4;
  1027. /* store the count we actually calculated for TX status */
  1028. info->control.rates[i].count = calculated_tries[i];
  1029. rc_flags = info->control.rates[i].flags;
  1030. if (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) {
  1031. rate |= 0x10;
  1032. cts_rate |= 0x10;
  1033. }
  1034. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
  1035. rate |= 0x40;
  1036. else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
  1037. rate |= 0x20;
  1038. for (j = 0; j < calculated_tries[i] && ridx < 8; j++) {
  1039. txhdr->rateset[ridx] = rate;
  1040. ridx++;
  1041. }
  1042. }
  1043. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
  1044. hdr_flags |= P54_HDR_FLAG_DATA_OUT_SEQNR;
  1045. /* TODO: enable bursting */
  1046. hdr->flags = cpu_to_le16(hdr_flags);
  1047. hdr->tries = ridx;
  1048. txhdr->crypt_offset = 0;
  1049. txhdr->rts_rate_idx = 0;
  1050. txhdr->key_type = 0;
  1051. txhdr->key_len = 0;
  1052. txhdr->hw_queue = queue;
  1053. if (current_queue)
  1054. txhdr->backlog = current_queue->len;
  1055. else
  1056. txhdr->backlog = 0;
  1057. memset(txhdr->durations, 0, sizeof(txhdr->durations));
  1058. txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
  1059. 2 : info->antenna_sel_tx - 1;
  1060. txhdr->output_power = priv->output_power;
  1061. txhdr->cts_rate = cts_rate;
  1062. if (padding)
  1063. txhdr->align[0] = padding;
  1064. /* modifies skb->cb and with it info, so must be last! */
  1065. if (unlikely(p54_assign_address(dev, skb, hdr, skb->len + tim_len))) {
  1066. skb_pull(skb, sizeof(*hdr) + sizeof(*txhdr) + padding);
  1067. if (current_queue) {
  1068. current_queue->len--;
  1069. current_queue->count--;
  1070. }
  1071. return NETDEV_TX_BUSY;
  1072. }
  1073. priv->tx(dev, skb, 0);
  1074. return 0;
  1075. }
  1076. static int p54_setup_mac(struct ieee80211_hw *dev, u16 mode, const u8 *bssid)
  1077. {
  1078. struct p54_common *priv = dev->priv;
  1079. struct sk_buff *skb;
  1080. struct p54_setup_mac *setup;
  1081. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup) +
  1082. sizeof(struct p54_hdr), P54_CONTROL_TYPE_SETUP,
  1083. GFP_ATOMIC);
  1084. if (!skb)
  1085. return -ENOMEM;
  1086. setup = (struct p54_setup_mac *) skb_put(skb, sizeof(*setup));
  1087. priv->mac_mode = mode;
  1088. setup->mac_mode = cpu_to_le16(mode);
  1089. memcpy(setup->mac_addr, priv->mac_addr, ETH_ALEN);
  1090. if (!bssid)
  1091. memset(setup->bssid, ~0, ETH_ALEN);
  1092. else
  1093. memcpy(setup->bssid, bssid, ETH_ALEN);
  1094. setup->rx_antenna = priv->rx_antenna;
  1095. setup->rx_align = 0;
  1096. if (priv->fw_var < 0x500) {
  1097. setup->v1.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  1098. memset(setup->v1.rts_rates, 0, 8);
  1099. setup->v1.rx_addr = cpu_to_le32(priv->rx_end);
  1100. setup->v1.max_rx = cpu_to_le16(priv->rx_mtu);
  1101. setup->v1.rxhw = cpu_to_le16(priv->rxhw);
  1102. setup->v1.wakeup_timer = cpu_to_le16(priv->wakeup_timer);
  1103. setup->v1.unalloc0 = cpu_to_le16(0);
  1104. } else {
  1105. setup->v2.rx_addr = cpu_to_le32(priv->rx_end);
  1106. setup->v2.max_rx = cpu_to_le16(priv->rx_mtu);
  1107. setup->v2.rxhw = cpu_to_le16(priv->rxhw);
  1108. setup->v2.timer = cpu_to_le16(priv->wakeup_timer);
  1109. setup->v2.truncate = cpu_to_le16(48896);
  1110. setup->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  1111. setup->v2.sbss_offset = 0;
  1112. setup->v2.mcast_window = 0;
  1113. setup->v2.rx_rssi_threshold = 0;
  1114. setup->v2.rx_ed_threshold = 0;
  1115. setup->v2.ref_clock = cpu_to_le32(644245094);
  1116. setup->v2.lpf_bandwidth = cpu_to_le16(65535);
  1117. setup->v2.osc_start_delay = cpu_to_le16(65535);
  1118. }
  1119. priv->tx(dev, skb, 1);
  1120. return 0;
  1121. }
  1122. static int p54_set_freq(struct ieee80211_hw *dev, u16 frequency)
  1123. {
  1124. struct p54_common *priv = dev->priv;
  1125. struct sk_buff *skb;
  1126. struct p54_scan *chan;
  1127. unsigned int i;
  1128. void *entry;
  1129. __le16 freq = cpu_to_le16(frequency);
  1130. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*chan) +
  1131. sizeof(struct p54_hdr), P54_CONTROL_TYPE_SCAN,
  1132. GFP_ATOMIC);
  1133. if (!skb)
  1134. return -ENOMEM;
  1135. chan = (struct p54_scan *) skb_put(skb, sizeof(*chan));
  1136. memset(chan->padding1, 0, sizeof(chan->padding1));
  1137. chan->mode = cpu_to_le16(P54_SCAN_EXIT);
  1138. chan->dwell = cpu_to_le16(0x0);
  1139. for (i = 0; i < priv->iq_autocal_len; i++) {
  1140. if (priv->iq_autocal[i].freq != freq)
  1141. continue;
  1142. memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
  1143. sizeof(*priv->iq_autocal));
  1144. break;
  1145. }
  1146. if (i == priv->iq_autocal_len)
  1147. goto err;
  1148. for (i = 0; i < priv->output_limit_len; i++) {
  1149. if (priv->output_limit[i].freq != freq)
  1150. continue;
  1151. chan->val_barker = 0x38;
  1152. chan->val_bpsk = chan->dup_bpsk =
  1153. priv->output_limit[i].val_bpsk;
  1154. chan->val_qpsk = chan->dup_qpsk =
  1155. priv->output_limit[i].val_qpsk;
  1156. chan->val_16qam = chan->dup_16qam =
  1157. priv->output_limit[i].val_16qam;
  1158. chan->val_64qam = chan->dup_64qam =
  1159. priv->output_limit[i].val_64qam;
  1160. break;
  1161. }
  1162. if (i == priv->output_limit_len)
  1163. goto err;
  1164. entry = priv->curve_data->data;
  1165. for (i = 0; i < priv->curve_data->channels; i++) {
  1166. if (*((__le16 *)entry) != freq) {
  1167. entry += sizeof(__le16);
  1168. entry += sizeof(struct p54_pa_curve_data_sample) *
  1169. priv->curve_data->points_per_channel;
  1170. continue;
  1171. }
  1172. entry += sizeof(__le16);
  1173. chan->pa_points_per_curve = 8;
  1174. memset(chan->curve_data, 0, sizeof(*chan->curve_data));
  1175. memcpy(chan->curve_data, entry,
  1176. sizeof(struct p54_pa_curve_data_sample) *
  1177. min((u8)8, priv->curve_data->points_per_channel));
  1178. break;
  1179. }
  1180. if (priv->fw_var < 0x500) {
  1181. chan->v1.rssical_mul = cpu_to_le16(130);
  1182. chan->v1.rssical_add = cpu_to_le16(0xfe70);
  1183. } else {
  1184. chan->v2.rssical_mul = cpu_to_le16(130);
  1185. chan->v2.rssical_add = cpu_to_le16(0xfe70);
  1186. chan->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  1187. memset(chan->v2.rts_rates, 0, 8);
  1188. }
  1189. priv->tx(dev, skb, 1);
  1190. return 0;
  1191. err:
  1192. printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
  1193. kfree_skb(skb);
  1194. return -EINVAL;
  1195. }
  1196. static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
  1197. {
  1198. struct p54_common *priv = dev->priv;
  1199. struct sk_buff *skb;
  1200. struct p54_led *led;
  1201. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*led) +
  1202. sizeof(struct p54_hdr), P54_CONTROL_TYPE_LED,
  1203. GFP_ATOMIC);
  1204. if (!skb)
  1205. return -ENOMEM;
  1206. led = (struct p54_led *)skb_put(skb, sizeof(*led));
  1207. led->mode = cpu_to_le16(mode);
  1208. led->led_permanent = cpu_to_le16(link);
  1209. led->led_temporary = cpu_to_le16(act);
  1210. led->duration = cpu_to_le16(1000);
  1211. priv->tx(dev, skb, 1);
  1212. return 0;
  1213. }
  1214. #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
  1215. do { \
  1216. queue.aifs = cpu_to_le16(ai_fs); \
  1217. queue.cwmin = cpu_to_le16(cw_min); \
  1218. queue.cwmax = cpu_to_le16(cw_max); \
  1219. queue.txop = cpu_to_le16(_txop); \
  1220. } while(0)
  1221. static int p54_set_edcf(struct ieee80211_hw *dev)
  1222. {
  1223. struct p54_common *priv = dev->priv;
  1224. struct sk_buff *skb;
  1225. struct p54_edcf *edcf;
  1226. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*edcf) +
  1227. sizeof(struct p54_hdr), P54_CONTROL_TYPE_DCFINIT,
  1228. GFP_ATOMIC);
  1229. if (!skb)
  1230. return -ENOMEM;
  1231. edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf));
  1232. if (priv->use_short_slot) {
  1233. edcf->slottime = 9;
  1234. edcf->sifs = 0x10;
  1235. edcf->eofpad = 0x00;
  1236. } else {
  1237. edcf->slottime = 20;
  1238. edcf->sifs = 0x0a;
  1239. edcf->eofpad = 0x06;
  1240. }
  1241. /* (see prism54/isl_oid.h for further details) */
  1242. edcf->frameburst = cpu_to_le16(0);
  1243. edcf->round_trip_delay = cpu_to_le16(0);
  1244. edcf->flags = 0;
  1245. memset(edcf->mapping, 0, sizeof(edcf->mapping));
  1246. memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
  1247. priv->tx(dev, skb, 1);
  1248. return 0;
  1249. }
  1250. static int p54_init_stats(struct ieee80211_hw *dev)
  1251. {
  1252. struct p54_common *priv = dev->priv;
  1253. priv->cached_stats = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL,
  1254. sizeof(struct p54_hdr) + sizeof(struct p54_statistics),
  1255. P54_CONTROL_TYPE_STAT_READBACK, GFP_KERNEL);
  1256. if (!priv->cached_stats)
  1257. return -ENOMEM;
  1258. mod_timer(&priv->stats_timer, jiffies + HZ);
  1259. return 0;
  1260. }
  1261. static int p54_beacon_tim(struct sk_buff *skb)
  1262. {
  1263. /*
  1264. * the good excuse for this mess is ... the firmware.
  1265. * The dummy TIM MUST be at the end of the beacon frame,
  1266. * because it'll be overwritten!
  1267. */
  1268. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  1269. u8 *pos, *end;
  1270. if (skb->len <= sizeof(mgmt)) {
  1271. printk(KERN_ERR "p54: beacon is too short!\n");
  1272. return -EINVAL;
  1273. }
  1274. pos = (u8 *)mgmt->u.beacon.variable;
  1275. end = skb->data + skb->len;
  1276. while (pos < end) {
  1277. if (pos + 2 + pos[1] > end) {
  1278. printk(KERN_ERR "p54: parsing beacon failed\n");
  1279. return -EINVAL;
  1280. }
  1281. if (pos[0] == WLAN_EID_TIM) {
  1282. u8 dtim_len = pos[1];
  1283. u8 dtim_period = pos[3];
  1284. u8 *next = pos + 2 + dtim_len;
  1285. if (dtim_len < 3) {
  1286. printk(KERN_ERR "p54: invalid dtim len!\n");
  1287. return -EINVAL;
  1288. }
  1289. memmove(pos, next, end - next);
  1290. if (dtim_len > 3)
  1291. skb_trim(skb, skb->len - (dtim_len - 3));
  1292. pos = end - (dtim_len + 2);
  1293. /* add the dummy at the end */
  1294. pos[0] = WLAN_EID_TIM;
  1295. pos[1] = 3;
  1296. pos[2] = 0;
  1297. pos[3] = dtim_period;
  1298. pos[4] = 0;
  1299. return 0;
  1300. }
  1301. pos += 2 + pos[1];
  1302. }
  1303. return 0;
  1304. }
  1305. static int p54_beacon_update(struct ieee80211_hw *dev,
  1306. struct ieee80211_vif *vif)
  1307. {
  1308. struct p54_common *priv = dev->priv;
  1309. struct sk_buff *beacon;
  1310. int ret;
  1311. if (priv->cached_beacon) {
  1312. p54_tx_cancel(dev, priv->cached_beacon);
  1313. /* wait for the last beacon the be freed */
  1314. msleep(10);
  1315. }
  1316. beacon = ieee80211_beacon_get(dev, vif);
  1317. if (!beacon)
  1318. return -ENOMEM;
  1319. ret = p54_beacon_tim(beacon);
  1320. if (ret)
  1321. return ret;
  1322. ret = p54_tx(dev, beacon);
  1323. if (ret)
  1324. return ret;
  1325. priv->cached_beacon = beacon;
  1326. priv->tsf_high32 = 0;
  1327. priv->tsf_low32 = 0;
  1328. return 0;
  1329. }
  1330. static int p54_start(struct ieee80211_hw *dev)
  1331. {
  1332. struct p54_common *priv = dev->priv;
  1333. int err;
  1334. mutex_lock(&priv->conf_mutex);
  1335. err = priv->open(dev);
  1336. if (err)
  1337. goto out;
  1338. P54_SET_QUEUE(priv->qos_params[0], 0x0002, 0x0003, 0x0007, 47);
  1339. P54_SET_QUEUE(priv->qos_params[1], 0x0002, 0x0007, 0x000f, 94);
  1340. P54_SET_QUEUE(priv->qos_params[2], 0x0003, 0x000f, 0x03ff, 0);
  1341. P54_SET_QUEUE(priv->qos_params[3], 0x0007, 0x000f, 0x03ff, 0);
  1342. err = p54_set_edcf(dev);
  1343. if (err)
  1344. goto out;
  1345. err = p54_init_stats(dev);
  1346. if (err)
  1347. goto out;
  1348. err = p54_setup_mac(dev, P54_FILTER_TYPE_NONE, NULL);
  1349. if (err)
  1350. goto out;
  1351. priv->mode = NL80211_IFTYPE_MONITOR;
  1352. out:
  1353. mutex_unlock(&priv->conf_mutex);
  1354. return err;
  1355. }
  1356. static void p54_stop(struct ieee80211_hw *dev)
  1357. {
  1358. struct p54_common *priv = dev->priv;
  1359. struct sk_buff *skb;
  1360. mutex_lock(&priv->conf_mutex);
  1361. del_timer(&priv->stats_timer);
  1362. p54_free_skb(dev, priv->cached_stats);
  1363. priv->cached_stats = NULL;
  1364. if (priv->cached_beacon)
  1365. p54_tx_cancel(dev, priv->cached_beacon);
  1366. while ((skb = skb_dequeue(&priv->tx_queue)))
  1367. kfree_skb(skb);
  1368. priv->cached_beacon = NULL;
  1369. priv->stop(dev);
  1370. priv->tsf_high32 = priv->tsf_low32 = 0;
  1371. priv->mode = NL80211_IFTYPE_UNSPECIFIED;
  1372. mutex_unlock(&priv->conf_mutex);
  1373. }
  1374. static int p54_add_interface(struct ieee80211_hw *dev,
  1375. struct ieee80211_if_init_conf *conf)
  1376. {
  1377. struct p54_common *priv = dev->priv;
  1378. mutex_lock(&priv->conf_mutex);
  1379. if (priv->mode != NL80211_IFTYPE_MONITOR) {
  1380. mutex_unlock(&priv->conf_mutex);
  1381. return -EOPNOTSUPP;
  1382. }
  1383. switch (conf->type) {
  1384. case NL80211_IFTYPE_STATION:
  1385. case NL80211_IFTYPE_ADHOC:
  1386. case NL80211_IFTYPE_AP:
  1387. case NL80211_IFTYPE_MESH_POINT:
  1388. priv->mode = conf->type;
  1389. break;
  1390. default:
  1391. mutex_unlock(&priv->conf_mutex);
  1392. return -EOPNOTSUPP;
  1393. }
  1394. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  1395. p54_setup_mac(dev, P54_FILTER_TYPE_NONE, NULL);
  1396. switch (conf->type) {
  1397. case NL80211_IFTYPE_STATION:
  1398. p54_setup_mac(dev, P54_FILTER_TYPE_STATION, NULL);
  1399. break;
  1400. case NL80211_IFTYPE_AP:
  1401. p54_setup_mac(dev, P54_FILTER_TYPE_AP, priv->mac_addr);
  1402. break;
  1403. case NL80211_IFTYPE_ADHOC:
  1404. case NL80211_IFTYPE_MESH_POINT:
  1405. p54_setup_mac(dev, P54_FILTER_TYPE_IBSS, NULL);
  1406. break;
  1407. default:
  1408. BUG(); /* impossible */
  1409. break;
  1410. }
  1411. p54_set_leds(dev, 1, 0, 0);
  1412. mutex_unlock(&priv->conf_mutex);
  1413. return 0;
  1414. }
  1415. static void p54_remove_interface(struct ieee80211_hw *dev,
  1416. struct ieee80211_if_init_conf *conf)
  1417. {
  1418. struct p54_common *priv = dev->priv;
  1419. mutex_lock(&priv->conf_mutex);
  1420. if (priv->cached_beacon)
  1421. p54_tx_cancel(dev, priv->cached_beacon);
  1422. p54_setup_mac(dev, P54_FILTER_TYPE_NONE, NULL);
  1423. priv->mode = NL80211_IFTYPE_MONITOR;
  1424. memset(priv->mac_addr, 0, ETH_ALEN);
  1425. mutex_unlock(&priv->conf_mutex);
  1426. }
  1427. static int p54_config(struct ieee80211_hw *dev, u32 changed)
  1428. {
  1429. int ret;
  1430. struct p54_common *priv = dev->priv;
  1431. struct ieee80211_conf *conf = &dev->conf;
  1432. mutex_lock(&priv->conf_mutex);
  1433. priv->rx_antenna = 2; /* automatic */
  1434. priv->output_power = conf->power_level << 2;
  1435. ret = p54_set_freq(dev, conf->channel->center_freq);
  1436. if (!ret)
  1437. ret = p54_set_edcf(dev);
  1438. mutex_unlock(&priv->conf_mutex);
  1439. return ret;
  1440. }
  1441. static int p54_config_interface(struct ieee80211_hw *dev,
  1442. struct ieee80211_vif *vif,
  1443. struct ieee80211_if_conf *conf)
  1444. {
  1445. struct p54_common *priv = dev->priv;
  1446. int ret = 0;
  1447. mutex_lock(&priv->conf_mutex);
  1448. switch (priv->mode) {
  1449. case NL80211_IFTYPE_STATION:
  1450. ret = p54_setup_mac(dev, P54_FILTER_TYPE_STATION, conf->bssid);
  1451. if (ret)
  1452. goto out;
  1453. ret = p54_set_leds(dev, 1,
  1454. !is_multicast_ether_addr(conf->bssid), 0);
  1455. if (ret)
  1456. goto out;
  1457. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  1458. break;
  1459. case NL80211_IFTYPE_AP:
  1460. case NL80211_IFTYPE_ADHOC:
  1461. case NL80211_IFTYPE_MESH_POINT:
  1462. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  1463. ret = p54_set_freq(dev, dev->conf.channel->center_freq);
  1464. if (ret)
  1465. goto out;
  1466. ret = p54_setup_mac(dev, priv->mac_mode, priv->bssid);
  1467. if (ret)
  1468. goto out;
  1469. if (conf->changed & IEEE80211_IFCC_BEACON) {
  1470. ret = p54_beacon_update(dev, vif);
  1471. if (ret)
  1472. goto out;
  1473. ret = p54_set_edcf(dev);
  1474. if (ret)
  1475. goto out;
  1476. }
  1477. }
  1478. out:
  1479. mutex_unlock(&priv->conf_mutex);
  1480. return ret;
  1481. }
  1482. static void p54_configure_filter(struct ieee80211_hw *dev,
  1483. unsigned int changed_flags,
  1484. unsigned int *total_flags,
  1485. int mc_count, struct dev_mc_list *mclist)
  1486. {
  1487. struct p54_common *priv = dev->priv;
  1488. *total_flags &= FIF_BCN_PRBRESP_PROMISC |
  1489. FIF_PROMISC_IN_BSS |
  1490. FIF_FCSFAIL;
  1491. priv->filter_flags = *total_flags;
  1492. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1493. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1494. p54_setup_mac(dev, priv->mac_mode, NULL);
  1495. else
  1496. p54_setup_mac(dev, priv->mac_mode, priv->bssid);
  1497. }
  1498. if (changed_flags & FIF_PROMISC_IN_BSS) {
  1499. if (*total_flags & FIF_PROMISC_IN_BSS)
  1500. p54_setup_mac(dev, priv->mac_mode | 0x8, NULL);
  1501. else
  1502. p54_setup_mac(dev, priv->mac_mode & ~0x8, priv->bssid);
  1503. }
  1504. }
  1505. static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
  1506. const struct ieee80211_tx_queue_params *params)
  1507. {
  1508. struct p54_common *priv = dev->priv;
  1509. int ret;
  1510. mutex_lock(&priv->conf_mutex);
  1511. if ((params) && !(queue > 4)) {
  1512. P54_SET_QUEUE(priv->qos_params[queue], params->aifs,
  1513. params->cw_min, params->cw_max, params->txop);
  1514. } else
  1515. ret = -EINVAL;
  1516. if (!ret)
  1517. ret = p54_set_edcf(dev);
  1518. mutex_unlock(&priv->conf_mutex);
  1519. return ret;
  1520. }
  1521. static int p54_init_xbow_synth(struct ieee80211_hw *dev)
  1522. {
  1523. struct p54_common *priv = dev->priv;
  1524. struct sk_buff *skb;
  1525. struct p54_xbow_synth *xbow;
  1526. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*xbow) +
  1527. sizeof(struct p54_hdr),
  1528. P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
  1529. GFP_KERNEL);
  1530. if (!skb)
  1531. return -ENOMEM;
  1532. xbow = (struct p54_xbow_synth *)skb_put(skb, sizeof(*xbow));
  1533. xbow->magic1 = cpu_to_le16(0x1);
  1534. xbow->magic2 = cpu_to_le16(0x2);
  1535. xbow->freq = cpu_to_le16(5390);
  1536. memset(xbow->padding, 0, sizeof(xbow->padding));
  1537. priv->tx(dev, skb, 1);
  1538. return 0;
  1539. }
  1540. static void p54_statistics_timer(unsigned long data)
  1541. {
  1542. struct ieee80211_hw *dev = (struct ieee80211_hw *) data;
  1543. struct p54_common *priv = dev->priv;
  1544. BUG_ON(!priv->cached_stats);
  1545. priv->tx(dev, priv->cached_stats, 0);
  1546. }
  1547. static int p54_get_stats(struct ieee80211_hw *dev,
  1548. struct ieee80211_low_level_stats *stats)
  1549. {
  1550. struct p54_common *priv = dev->priv;
  1551. del_timer(&priv->stats_timer);
  1552. p54_statistics_timer((unsigned long)dev);
  1553. if (!wait_for_completion_interruptible_timeout(&priv->stats_comp, HZ)) {
  1554. printk(KERN_ERR "%s: device does not respond!\n",
  1555. wiphy_name(dev->wiphy));
  1556. return -EBUSY;
  1557. }
  1558. memcpy(stats, &priv->stats, sizeof(*stats));
  1559. return 0;
  1560. }
  1561. static int p54_get_tx_stats(struct ieee80211_hw *dev,
  1562. struct ieee80211_tx_queue_stats *stats)
  1563. {
  1564. struct p54_common *priv = dev->priv;
  1565. memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
  1566. return 0;
  1567. }
  1568. static void p54_bss_info_changed(struct ieee80211_hw *dev,
  1569. struct ieee80211_vif *vif,
  1570. struct ieee80211_bss_conf *info,
  1571. u32 changed)
  1572. {
  1573. struct p54_common *priv = dev->priv;
  1574. if (changed & BSS_CHANGED_ERP_SLOT) {
  1575. priv->use_short_slot = info->use_short_slot;
  1576. p54_set_edcf(dev);
  1577. }
  1578. if (changed & BSS_CHANGED_BASIC_RATES) {
  1579. if (dev->conf.channel->band == IEEE80211_BAND_5GHZ)
  1580. priv->basic_rate_mask = (info->basic_rates << 4);
  1581. else
  1582. priv->basic_rate_mask = info->basic_rates;
  1583. p54_setup_mac(dev, priv->mac_mode, priv->bssid);
  1584. if (priv->fw_var >= 0x500)
  1585. p54_set_freq(dev, dev->conf.channel->center_freq);
  1586. }
  1587. if (changed & BSS_CHANGED_ASSOC) {
  1588. if (info->assoc) {
  1589. priv->aid = info->aid;
  1590. priv->wakeup_timer = info->beacon_int *
  1591. info->dtim_period * 5;
  1592. p54_setup_mac(dev, priv->mac_mode, priv->bssid);
  1593. }
  1594. }
  1595. }
  1596. static const struct ieee80211_ops p54_ops = {
  1597. .tx = p54_tx,
  1598. .start = p54_start,
  1599. .stop = p54_stop,
  1600. .add_interface = p54_add_interface,
  1601. .remove_interface = p54_remove_interface,
  1602. .set_tim = p54_set_tim,
  1603. .config = p54_config,
  1604. .config_interface = p54_config_interface,
  1605. .bss_info_changed = p54_bss_info_changed,
  1606. .configure_filter = p54_configure_filter,
  1607. .conf_tx = p54_conf_tx,
  1608. .get_stats = p54_get_stats,
  1609. .get_tx_stats = p54_get_tx_stats
  1610. };
  1611. struct ieee80211_hw *p54_init_common(size_t priv_data_len)
  1612. {
  1613. struct ieee80211_hw *dev;
  1614. struct p54_common *priv;
  1615. dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
  1616. if (!dev)
  1617. return NULL;
  1618. priv = dev->priv;
  1619. priv->mode = NL80211_IFTYPE_UNSPECIFIED;
  1620. priv->basic_rate_mask = 0x15f;
  1621. skb_queue_head_init(&priv->tx_queue);
  1622. dev->flags = IEEE80211_HW_RX_INCLUDES_FCS |
  1623. IEEE80211_HW_SIGNAL_DBM |
  1624. IEEE80211_HW_NOISE_DBM;
  1625. dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
  1626. BIT(NL80211_IFTYPE_ADHOC) |
  1627. BIT(NL80211_IFTYPE_AP) |
  1628. BIT(NL80211_IFTYPE_MESH_POINT);
  1629. dev->channel_change_time = 1000; /* TODO: find actual value */
  1630. priv->tx_stats[0].limit = 1; /* Beacon queue */
  1631. priv->tx_stats[1].limit = 1; /* Probe queue for HW scan */
  1632. priv->tx_stats[2].limit = 3; /* queue for MLMEs */
  1633. priv->tx_stats[3].limit = 3; /* Broadcast / MC queue */
  1634. priv->tx_stats[4].limit = 5; /* Data */
  1635. dev->queues = 1;
  1636. priv->noise = -94;
  1637. /*
  1638. * We support at most 8 tries no matter which rate they're at,
  1639. * we cannot support max_rates * max_rate_tries as we set it
  1640. * here, but setting it correctly to 4/2 or so would limit us
  1641. * artificially if the RC algorithm wants just two rates, so
  1642. * let's say 4/7, we'll redistribute it at TX time, see the
  1643. * comments there.
  1644. */
  1645. dev->max_rates = 4;
  1646. dev->max_rate_tries = 7;
  1647. dev->extra_tx_headroom = sizeof(struct p54_hdr) + 4 +
  1648. sizeof(struct p54_tx_data);
  1649. mutex_init(&priv->conf_mutex);
  1650. init_completion(&priv->eeprom_comp);
  1651. init_completion(&priv->stats_comp);
  1652. setup_timer(&priv->stats_timer, p54_statistics_timer,
  1653. (unsigned long)dev);
  1654. return dev;
  1655. }
  1656. EXPORT_SYMBOL_GPL(p54_init_common);
  1657. void p54_free_common(struct ieee80211_hw *dev)
  1658. {
  1659. struct p54_common *priv = dev->priv;
  1660. del_timer(&priv->stats_timer);
  1661. kfree_skb(priv->cached_stats);
  1662. kfree(priv->iq_autocal);
  1663. kfree(priv->output_limit);
  1664. kfree(priv->curve_data);
  1665. }
  1666. EXPORT_SYMBOL_GPL(p54_free_common);
  1667. static int __init p54_init(void)
  1668. {
  1669. return 0;
  1670. }
  1671. static void __exit p54_exit(void)
  1672. {
  1673. }
  1674. module_init(p54_init);
  1675. module_exit(p54_exit);