pSeries_smp.c 12 KB

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  1. /*
  2. * SMP support for pSeries and BPA machines.
  3. *
  4. * Dave Engebretsen, Peter Bergner, and
  5. * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
  6. *
  7. * Plus various changes from other IBM teams...
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #undef DEBUG
  15. #include <linux/config.h>
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/smp.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/delay.h>
  22. #include <linux/init.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/cache.h>
  25. #include <linux/err.h>
  26. #include <linux/sysdev.h>
  27. #include <linux/cpu.h>
  28. #include <asm/ptrace.h>
  29. #include <asm/atomic.h>
  30. #include <asm/irq.h>
  31. #include <asm/page.h>
  32. #include <asm/pgtable.h>
  33. #include <asm/io.h>
  34. #include <asm/prom.h>
  35. #include <asm/smp.h>
  36. #include <asm/paca.h>
  37. #include <asm/time.h>
  38. #include <asm/machdep.h>
  39. #include <asm/xics.h>
  40. #include <asm/cputable.h>
  41. #include <asm/system.h>
  42. #include <asm/rtas.h>
  43. #include <asm/plpar_wrappers.h>
  44. #include <asm/pSeries_reconfig.h>
  45. #include "mpic.h"
  46. #include "bpa_iic.h"
  47. #ifdef DEBUG
  48. #define DBG(fmt...) udbg_printf(fmt)
  49. #else
  50. #define DBG(fmt...)
  51. #endif
  52. /*
  53. * The primary thread of each non-boot processor is recorded here before
  54. * smp init.
  55. */
  56. static cpumask_t of_spin_map;
  57. extern void pSeries_secondary_smp_init(unsigned long);
  58. #ifdef CONFIG_HOTPLUG_CPU
  59. /* Get state of physical CPU.
  60. * Return codes:
  61. * 0 - The processor is in the RTAS stopped state
  62. * 1 - stop-self is in progress
  63. * 2 - The processor is not in the RTAS stopped state
  64. * -1 - Hardware Error
  65. * -2 - Hardware Busy, Try again later.
  66. */
  67. static int query_cpu_stopped(unsigned int pcpu)
  68. {
  69. int cpu_status;
  70. int status, qcss_tok;
  71. qcss_tok = rtas_token("query-cpu-stopped-state");
  72. if (qcss_tok == RTAS_UNKNOWN_SERVICE)
  73. return -1;
  74. status = rtas_call(qcss_tok, 1, 2, &cpu_status, pcpu);
  75. if (status != 0) {
  76. printk(KERN_ERR
  77. "RTAS query-cpu-stopped-state failed: %i\n", status);
  78. return status;
  79. }
  80. return cpu_status;
  81. }
  82. int pSeries_cpu_disable(void)
  83. {
  84. systemcfg->processorCount--;
  85. /*fix boot_cpuid here*/
  86. if (smp_processor_id() == boot_cpuid)
  87. boot_cpuid = any_online_cpu(cpu_online_map);
  88. /* FIXME: abstract this to not be platform specific later on */
  89. xics_migrate_irqs_away();
  90. return 0;
  91. }
  92. void pSeries_cpu_die(unsigned int cpu)
  93. {
  94. int tries;
  95. int cpu_status;
  96. unsigned int pcpu = get_hard_smp_processor_id(cpu);
  97. for (tries = 0; tries < 25; tries++) {
  98. cpu_status = query_cpu_stopped(pcpu);
  99. if (cpu_status == 0 || cpu_status == -1)
  100. break;
  101. msleep(200);
  102. }
  103. if (cpu_status != 0) {
  104. printk("Querying DEAD? cpu %i (%i) shows %i\n",
  105. cpu, pcpu, cpu_status);
  106. }
  107. /* Isolation and deallocation are definatly done by
  108. * drslot_chrp_cpu. If they were not they would be
  109. * done here. Change isolate state to Isolate and
  110. * change allocation-state to Unusable.
  111. */
  112. paca[cpu].cpu_start = 0;
  113. }
  114. /*
  115. * Update cpu_present_map and paca(s) for a new cpu node. The wrinkle
  116. * here is that a cpu device node may represent up to two logical cpus
  117. * in the SMT case. We must honor the assumption in other code that
  118. * the logical ids for sibling SMT threads x and y are adjacent, such
  119. * that x^1 == y and y^1 == x.
  120. */
  121. static int pSeries_add_processor(struct device_node *np)
  122. {
  123. unsigned int cpu;
  124. cpumask_t candidate_map, tmp = CPU_MASK_NONE;
  125. int err = -ENOSPC, len, nthreads, i;
  126. u32 *intserv;
  127. intserv = (u32 *)get_property(np, "ibm,ppc-interrupt-server#s", &len);
  128. if (!intserv)
  129. return 0;
  130. nthreads = len / sizeof(u32);
  131. for (i = 0; i < nthreads; i++)
  132. cpu_set(i, tmp);
  133. lock_cpu_hotplug();
  134. BUG_ON(!cpus_subset(cpu_present_map, cpu_possible_map));
  135. /* Get a bitmap of unoccupied slots. */
  136. cpus_xor(candidate_map, cpu_possible_map, cpu_present_map);
  137. if (cpus_empty(candidate_map)) {
  138. /* If we get here, it most likely means that NR_CPUS is
  139. * less than the partition's max processors setting.
  140. */
  141. printk(KERN_ERR "Cannot add cpu %s; this system configuration"
  142. " supports %d logical cpus.\n", np->full_name,
  143. cpus_weight(cpu_possible_map));
  144. goto out_unlock;
  145. }
  146. while (!cpus_empty(tmp))
  147. if (cpus_subset(tmp, candidate_map))
  148. /* Found a range where we can insert the new cpu(s) */
  149. break;
  150. else
  151. cpus_shift_left(tmp, tmp, nthreads);
  152. if (cpus_empty(tmp)) {
  153. printk(KERN_ERR "Unable to find space in cpu_present_map for"
  154. " processor %s with %d thread(s)\n", np->name,
  155. nthreads);
  156. goto out_unlock;
  157. }
  158. for_each_cpu_mask(cpu, tmp) {
  159. BUG_ON(cpu_isset(cpu, cpu_present_map));
  160. cpu_set(cpu, cpu_present_map);
  161. set_hard_smp_processor_id(cpu, *intserv++);
  162. }
  163. err = 0;
  164. out_unlock:
  165. unlock_cpu_hotplug();
  166. return err;
  167. }
  168. /*
  169. * Update the present map for a cpu node which is going away, and set
  170. * the hard id in the paca(s) to -1 to be consistent with boot time
  171. * convention for non-present cpus.
  172. */
  173. static void pSeries_remove_processor(struct device_node *np)
  174. {
  175. unsigned int cpu;
  176. int len, nthreads, i;
  177. u32 *intserv;
  178. intserv = (u32 *)get_property(np, "ibm,ppc-interrupt-server#s", &len);
  179. if (!intserv)
  180. return;
  181. nthreads = len / sizeof(u32);
  182. lock_cpu_hotplug();
  183. for (i = 0; i < nthreads; i++) {
  184. for_each_present_cpu(cpu) {
  185. if (get_hard_smp_processor_id(cpu) != intserv[i])
  186. continue;
  187. BUG_ON(cpu_online(cpu));
  188. cpu_clear(cpu, cpu_present_map);
  189. set_hard_smp_processor_id(cpu, -1);
  190. break;
  191. }
  192. if (cpu == NR_CPUS)
  193. printk(KERN_WARNING "Could not find cpu to remove "
  194. "with physical id 0x%x\n", intserv[i]);
  195. }
  196. unlock_cpu_hotplug();
  197. }
  198. static int pSeries_smp_notifier(struct notifier_block *nb, unsigned long action, void *node)
  199. {
  200. int err = NOTIFY_OK;
  201. switch (action) {
  202. case PSERIES_RECONFIG_ADD:
  203. if (pSeries_add_processor(node))
  204. err = NOTIFY_BAD;
  205. break;
  206. case PSERIES_RECONFIG_REMOVE:
  207. pSeries_remove_processor(node);
  208. break;
  209. default:
  210. err = NOTIFY_DONE;
  211. break;
  212. }
  213. return err;
  214. }
  215. static struct notifier_block pSeries_smp_nb = {
  216. .notifier_call = pSeries_smp_notifier,
  217. };
  218. #endif /* CONFIG_HOTPLUG_CPU */
  219. /**
  220. * smp_startup_cpu() - start the given cpu
  221. *
  222. * At boot time, there is nothing to do for primary threads which were
  223. * started from Open Firmware. For anything else, call RTAS with the
  224. * appropriate start location.
  225. *
  226. * Returns:
  227. * 0 - failure
  228. * 1 - success
  229. */
  230. static inline int __devinit smp_startup_cpu(unsigned int lcpu)
  231. {
  232. int status;
  233. unsigned long start_here = __pa((u32)*((unsigned long *)
  234. pSeries_secondary_smp_init));
  235. unsigned int pcpu;
  236. if (cpu_isset(lcpu, of_spin_map))
  237. /* Already started by OF and sitting in spin loop */
  238. return 1;
  239. pcpu = get_hard_smp_processor_id(lcpu);
  240. /* Fixup atomic count: it exited inside IRQ handler. */
  241. paca[lcpu].__current->thread_info->preempt_count = 0;
  242. status = rtas_call(rtas_token("start-cpu"), 3, 1, NULL,
  243. pcpu, start_here, lcpu);
  244. if (status != 0) {
  245. printk(KERN_ERR "start-cpu failed: %i\n", status);
  246. return 0;
  247. }
  248. return 1;
  249. }
  250. #ifdef CONFIG_XICS
  251. static inline void smp_xics_do_message(int cpu, int msg)
  252. {
  253. set_bit(msg, &xics_ipi_message[cpu].value);
  254. mb();
  255. xics_cause_IPI(cpu);
  256. }
  257. static void smp_xics_message_pass(int target, int msg)
  258. {
  259. unsigned int i;
  260. if (target < NR_CPUS) {
  261. smp_xics_do_message(target, msg);
  262. } else {
  263. for_each_online_cpu(i) {
  264. if (target == MSG_ALL_BUT_SELF
  265. && i == smp_processor_id())
  266. continue;
  267. smp_xics_do_message(i, msg);
  268. }
  269. }
  270. }
  271. static int __init smp_xics_probe(void)
  272. {
  273. xics_request_IPIs();
  274. return cpus_weight(cpu_possible_map);
  275. }
  276. static void __devinit smp_xics_setup_cpu(int cpu)
  277. {
  278. if (cpu != boot_cpuid)
  279. xics_setup_cpu();
  280. if (cur_cpu_spec->firmware_features & FW_FEATURE_SPLPAR)
  281. vpa_init(cpu);
  282. cpu_clear(cpu, of_spin_map);
  283. }
  284. #endif /* CONFIG_XICS */
  285. #ifdef CONFIG_BPA_IIC
  286. static void smp_iic_message_pass(int target, int msg)
  287. {
  288. unsigned int i;
  289. if (target < NR_CPUS) {
  290. iic_cause_IPI(target, msg);
  291. } else {
  292. for_each_online_cpu(i) {
  293. if (target == MSG_ALL_BUT_SELF
  294. && i == smp_processor_id())
  295. continue;
  296. iic_cause_IPI(i, msg);
  297. }
  298. }
  299. }
  300. static int __init smp_iic_probe(void)
  301. {
  302. iic_request_IPIs();
  303. return cpus_weight(cpu_possible_map);
  304. }
  305. static void __devinit smp_iic_setup_cpu(int cpu)
  306. {
  307. if (cpu != boot_cpuid)
  308. iic_setup_cpu();
  309. }
  310. #endif /* CONFIG_BPA_IIC */
  311. static DEFINE_SPINLOCK(timebase_lock);
  312. static unsigned long timebase = 0;
  313. static void __devinit pSeries_give_timebase(void)
  314. {
  315. spin_lock(&timebase_lock);
  316. rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL);
  317. timebase = get_tb();
  318. spin_unlock(&timebase_lock);
  319. while (timebase)
  320. barrier();
  321. rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL);
  322. }
  323. static void __devinit pSeries_take_timebase(void)
  324. {
  325. while (!timebase)
  326. barrier();
  327. spin_lock(&timebase_lock);
  328. set_tb(timebase >> 32, timebase & 0xffffffff);
  329. timebase = 0;
  330. spin_unlock(&timebase_lock);
  331. }
  332. static void __devinit smp_pSeries_kick_cpu(int nr)
  333. {
  334. BUG_ON(nr < 0 || nr >= NR_CPUS);
  335. if (!smp_startup_cpu(nr))
  336. return;
  337. /*
  338. * The processor is currently spinning, waiting for the
  339. * cpu_start field to become non-zero After we set cpu_start,
  340. * the processor will continue on to secondary_start
  341. */
  342. paca[nr].cpu_start = 1;
  343. }
  344. static int smp_pSeries_cpu_bootable(unsigned int nr)
  345. {
  346. /* Special case - we inhibit secondary thread startup
  347. * during boot if the user requests it. Odd-numbered
  348. * cpus are assumed to be secondary threads.
  349. */
  350. if (system_state < SYSTEM_RUNNING &&
  351. cpu_has_feature(CPU_FTR_SMT) &&
  352. !smt_enabled_at_boot && nr % 2 != 0)
  353. return 0;
  354. return 1;
  355. }
  356. #ifdef CONFIG_MPIC
  357. static struct smp_ops_t pSeries_mpic_smp_ops = {
  358. .message_pass = smp_mpic_message_pass,
  359. .probe = smp_mpic_probe,
  360. .kick_cpu = smp_pSeries_kick_cpu,
  361. .setup_cpu = smp_mpic_setup_cpu,
  362. };
  363. #endif
  364. #ifdef CONFIG_XICS
  365. static struct smp_ops_t pSeries_xics_smp_ops = {
  366. .message_pass = smp_xics_message_pass,
  367. .probe = smp_xics_probe,
  368. .kick_cpu = smp_pSeries_kick_cpu,
  369. .setup_cpu = smp_xics_setup_cpu,
  370. .cpu_bootable = smp_pSeries_cpu_bootable,
  371. };
  372. #endif
  373. #ifdef CONFIG_BPA_IIC
  374. static struct smp_ops_t bpa_iic_smp_ops = {
  375. .message_pass = smp_iic_message_pass,
  376. .probe = smp_iic_probe,
  377. .kick_cpu = smp_pSeries_kick_cpu,
  378. .setup_cpu = smp_iic_setup_cpu,
  379. .cpu_bootable = smp_pSeries_cpu_bootable,
  380. };
  381. #endif
  382. /* This is called very early */
  383. void __init smp_init_pSeries(void)
  384. {
  385. int i;
  386. DBG(" -> smp_init_pSeries()\n");
  387. switch (ppc64_interrupt_controller) {
  388. #ifdef CONFIG_MPIC
  389. case IC_OPEN_PIC:
  390. smp_ops = &pSeries_mpic_smp_ops;
  391. break;
  392. #endif
  393. #ifdef CONFIG_XICS
  394. case IC_PPC_XIC:
  395. smp_ops = &pSeries_xics_smp_ops;
  396. break;
  397. #endif
  398. #ifdef CONFIG_BPA_IIC
  399. case IC_BPA_IIC:
  400. smp_ops = &bpa_iic_smp_ops;
  401. break;
  402. #endif
  403. default:
  404. panic("Invalid interrupt controller");
  405. }
  406. #ifdef CONFIG_HOTPLUG_CPU
  407. smp_ops->cpu_disable = pSeries_cpu_disable;
  408. smp_ops->cpu_die = pSeries_cpu_die;
  409. /* Processors can be added/removed only on LPAR */
  410. if (systemcfg->platform == PLATFORM_PSERIES_LPAR)
  411. pSeries_reconfig_notifier_register(&pSeries_smp_nb);
  412. #endif
  413. /* Mark threads which are still spinning in hold loops. */
  414. if (cpu_has_feature(CPU_FTR_SMT)) {
  415. for_each_present_cpu(i) {
  416. if (i % 2 == 0)
  417. /*
  418. * Even-numbered logical cpus correspond to
  419. * primary threads.
  420. */
  421. cpu_set(i, of_spin_map);
  422. }
  423. } else {
  424. of_spin_map = cpu_present_map;
  425. }
  426. cpu_clear(boot_cpuid, of_spin_map);
  427. /* Non-lpar has additional take/give timebase */
  428. if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
  429. smp_ops->give_timebase = pSeries_give_timebase;
  430. smp_ops->take_timebase = pSeries_take_timebase;
  431. }
  432. DBG(" <- smp_init_pSeries()\n");
  433. }