68328serial.h 3.5 KB

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  1. /* 68328serial.h: Definitions for the mc68328 serial driver.
  2. *
  3. * Copyright (C) 1995 David S. Miller <davem@caip.rutgers.edu>
  4. * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>
  5. * Copyright (C) 1998, 1999 D. Jeff Dionne <jeff@uclinux.org>
  6. * Copyright (C) 1999 Vladimir Gurevich <vgurevic@cisco.com>
  7. *
  8. * VZ Support/Fixes Evan Stawnyczy <e@lineo.ca>
  9. */
  10. #ifndef _MC683XX_SERIAL_H
  11. #define _MC683XX_SERIAL_H
  12. /*
  13. * I believe this is the optimal setting that reduces the number of interrupts.
  14. * At high speeds the output might become a little "bursted" (use USTCNT_TXHE
  15. * if that bothers you), but in most cases it will not, since we try to
  16. * transmit characters every time rs_interrupt is called. Thus, quite often
  17. * you'll see that a receive interrupt occures before the transmit one.
  18. * -- Vladimir Gurevich
  19. */
  20. #define USTCNT_TX_INTR_MASK (USTCNT_TXEE)
  21. /*
  22. * 68328 and 68EZ328 UARTS are a little bit different. EZ328 has special
  23. * "Old data interrupt" which occures whenever the data stay in the FIFO
  24. * longer than 30 bits time. This allows us to use FIFO without compromising
  25. * latency. '328 does not have this feature and without the real 328-based
  26. * board I would assume that RXRE is the safest setting.
  27. *
  28. * For EZ328 I use RXHE (Half empty) interrupt to reduce the number of
  29. * interrupts. RXFE (receive queue full) causes the system to lose data
  30. * at least at 115200 baud
  31. *
  32. * If your board is busy doing other stuff, you might consider to use
  33. * RXRE (data ready intrrupt) instead.
  34. *
  35. * The other option is to make these INTR masks run-time configurable, so
  36. * that people can dynamically adapt them according to the current usage.
  37. * -- Vladimir Gurevich
  38. */
  39. /* (es) */
  40. #if defined(CONFIG_M68EZ328) || defined(CONFIG_M68VZ328)
  41. #define USTCNT_RX_INTR_MASK (USTCNT_RXHE | USTCNT_ODEN)
  42. #elif defined(CONFIG_M68328)
  43. #define USTCNT_RX_INTR_MASK (USTCNT_RXRE)
  44. #else
  45. #error Please, define the Rx interrupt events for your CPU
  46. #endif
  47. /* (/es) */
  48. /*
  49. * This is our internal structure for each serial port's state.
  50. *
  51. * Many fields are paralleled by the structure used by the serial_struct
  52. * structure.
  53. *
  54. * For definitions of the flags field, see tty.h
  55. */
  56. struct m68k_serial {
  57. char soft_carrier; /* Use soft carrier on this channel */
  58. char break_abort; /* Is serial console in, so process brk/abrt */
  59. char is_cons; /* Is this our console. */
  60. /* We need to know the current clock divisor
  61. * to read the bps rate the chip has currently
  62. * loaded.
  63. */
  64. unsigned char clk_divisor; /* May be 1, 16, 32, or 64 */
  65. int baud;
  66. int magic;
  67. int baud_base;
  68. int port;
  69. int irq;
  70. int flags; /* defined in tty.h */
  71. int type; /* UART type */
  72. struct tty_struct *tty;
  73. int read_status_mask;
  74. int ignore_status_mask;
  75. int timeout;
  76. int xmit_fifo_size;
  77. int custom_divisor;
  78. int x_char; /* xon/xoff character */
  79. int close_delay;
  80. unsigned short closing_wait;
  81. unsigned short closing_wait2;
  82. unsigned long event;
  83. unsigned long last_active;
  84. int line;
  85. int count; /* # of fd on device */
  86. int blocked_open; /* # of blocked opens */
  87. unsigned char *xmit_buf;
  88. int xmit_head;
  89. int xmit_tail;
  90. int xmit_cnt;
  91. wait_queue_head_t open_wait;
  92. wait_queue_head_t close_wait;
  93. };
  94. #define SERIAL_MAGIC 0x5301
  95. /*
  96. * Define the number of ports supported and their irqs.
  97. */
  98. #define NR_PORTS 1
  99. #define UART_IRQ_DEFNS {UART_IRQ_NUM}
  100. #endif /* !(_MC683XX_SERIAL_H) */