qlcnic_ethtool.c 23 KB

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  1. /*
  2. * Copyright (C) 2009 - QLogic Corporation.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called "COPYING".
  22. *
  23. */
  24. #include <linux/types.h>
  25. #include <linux/delay.h>
  26. #include <linux/pci.h>
  27. #include <linux/io.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/ethtool.h>
  30. #include "qlcnic.h"
  31. struct qlcnic_stats {
  32. char stat_string[ETH_GSTRING_LEN];
  33. int sizeof_stat;
  34. int stat_offset;
  35. };
  36. #define QLC_SIZEOF(m) FIELD_SIZEOF(struct qlcnic_adapter, m)
  37. #define QLC_OFF(m) offsetof(struct qlcnic_adapter, m)
  38. static const struct qlcnic_stats qlcnic_gstrings_stats[] = {
  39. {"xmit_called",
  40. QLC_SIZEOF(stats.xmitcalled), QLC_OFF(stats.xmitcalled)},
  41. {"xmit_finished",
  42. QLC_SIZEOF(stats.xmitfinished), QLC_OFF(stats.xmitfinished)},
  43. {"rx_dropped",
  44. QLC_SIZEOF(stats.rxdropped), QLC_OFF(stats.rxdropped)},
  45. {"tx_dropped",
  46. QLC_SIZEOF(stats.txdropped), QLC_OFF(stats.txdropped)},
  47. {"csummed",
  48. QLC_SIZEOF(stats.csummed), QLC_OFF(stats.csummed)},
  49. {"rx_pkts",
  50. QLC_SIZEOF(stats.rx_pkts), QLC_OFF(stats.rx_pkts)},
  51. {"lro_pkts",
  52. QLC_SIZEOF(stats.lro_pkts), QLC_OFF(stats.lro_pkts)},
  53. {"rx_bytes",
  54. QLC_SIZEOF(stats.rxbytes), QLC_OFF(stats.rxbytes)},
  55. {"tx_bytes",
  56. QLC_SIZEOF(stats.txbytes), QLC_OFF(stats.txbytes)},
  57. };
  58. #define QLCNIC_STATS_LEN ARRAY_SIZE(qlcnic_gstrings_stats)
  59. static const char qlcnic_gstrings_test[][ETH_GSTRING_LEN] = {
  60. "Register_Test_on_offline",
  61. "Link_Test_on_offline"
  62. };
  63. #define QLCNIC_TEST_LEN ARRAY_SIZE(qlcnic_gstrings_test)
  64. #define QLCNIC_RING_REGS_COUNT 20
  65. #define QLCNIC_RING_REGS_LEN (QLCNIC_RING_REGS_COUNT * sizeof(u32))
  66. #define QLCNIC_MAX_EEPROM_LEN 1024
  67. static const u32 diag_registers[] = {
  68. CRB_CMDPEG_STATE,
  69. CRB_RCVPEG_STATE,
  70. CRB_XG_STATE_P3,
  71. CRB_FW_CAPABILITIES_1,
  72. ISR_INT_STATE_REG,
  73. QLCNIC_CRB_DEV_REF_COUNT,
  74. QLCNIC_CRB_DEV_STATE,
  75. QLCNIC_CRB_DRV_STATE,
  76. QLCNIC_CRB_DRV_SCRATCH,
  77. QLCNIC_CRB_DEV_PARTITION_INFO,
  78. QLCNIC_CRB_DRV_IDC_VER,
  79. QLCNIC_PEG_ALIVE_COUNTER,
  80. QLCNIC_PEG_HALT_STATUS1,
  81. QLCNIC_PEG_HALT_STATUS2,
  82. QLCNIC_CRB_PEG_NET_0+0x3c,
  83. QLCNIC_CRB_PEG_NET_1+0x3c,
  84. QLCNIC_CRB_PEG_NET_2+0x3c,
  85. QLCNIC_CRB_PEG_NET_4+0x3c,
  86. -1
  87. };
  88. static int qlcnic_get_regs_len(struct net_device *dev)
  89. {
  90. return sizeof(diag_registers) + QLCNIC_RING_REGS_LEN;
  91. }
  92. static int qlcnic_get_eeprom_len(struct net_device *dev)
  93. {
  94. return QLCNIC_FLASH_TOTAL_SIZE;
  95. }
  96. static void
  97. qlcnic_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
  98. {
  99. struct qlcnic_adapter *adapter = netdev_priv(dev);
  100. u32 fw_major, fw_minor, fw_build;
  101. fw_major = QLCRD32(adapter, QLCNIC_FW_VERSION_MAJOR);
  102. fw_minor = QLCRD32(adapter, QLCNIC_FW_VERSION_MINOR);
  103. fw_build = QLCRD32(adapter, QLCNIC_FW_VERSION_SUB);
  104. sprintf(drvinfo->fw_version, "%d.%d.%d", fw_major, fw_minor, fw_build);
  105. strlcpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  106. strlcpy(drvinfo->driver, qlcnic_driver_name, 32);
  107. strlcpy(drvinfo->version, QLCNIC_LINUX_VERSIONID, 32);
  108. }
  109. static int
  110. qlcnic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  111. {
  112. struct qlcnic_adapter *adapter = netdev_priv(dev);
  113. int check_sfp_module = 0;
  114. u16 pcifn = adapter->ahw.pci_func;
  115. /* read which mode */
  116. if (adapter->ahw.port_type == QLCNIC_GBE) {
  117. ecmd->supported = (SUPPORTED_10baseT_Half |
  118. SUPPORTED_10baseT_Full |
  119. SUPPORTED_100baseT_Half |
  120. SUPPORTED_100baseT_Full |
  121. SUPPORTED_1000baseT_Half |
  122. SUPPORTED_1000baseT_Full);
  123. ecmd->advertising = (ADVERTISED_100baseT_Half |
  124. ADVERTISED_100baseT_Full |
  125. ADVERTISED_1000baseT_Half |
  126. ADVERTISED_1000baseT_Full);
  127. ecmd->speed = adapter->link_speed;
  128. ecmd->duplex = adapter->link_duplex;
  129. ecmd->autoneg = adapter->link_autoneg;
  130. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  131. u32 val;
  132. val = QLCRD32(adapter, QLCNIC_PORT_MODE_ADDR);
  133. if (val == QLCNIC_PORT_MODE_802_3_AP) {
  134. ecmd->supported = SUPPORTED_1000baseT_Full;
  135. ecmd->advertising = ADVERTISED_1000baseT_Full;
  136. } else {
  137. ecmd->supported = SUPPORTED_10000baseT_Full;
  138. ecmd->advertising = ADVERTISED_10000baseT_Full;
  139. }
  140. if (netif_running(dev) && adapter->has_link_events) {
  141. ecmd->speed = adapter->link_speed;
  142. ecmd->autoneg = adapter->link_autoneg;
  143. ecmd->duplex = adapter->link_duplex;
  144. goto skip;
  145. }
  146. val = QLCRD32(adapter, P3_LINK_SPEED_REG(pcifn));
  147. ecmd->speed = P3_LINK_SPEED_MHZ *
  148. P3_LINK_SPEED_VAL(pcifn, val);
  149. ecmd->duplex = DUPLEX_FULL;
  150. ecmd->autoneg = AUTONEG_DISABLE;
  151. } else
  152. return -EIO;
  153. skip:
  154. ecmd->phy_address = adapter->physical_port;
  155. ecmd->transceiver = XCVR_EXTERNAL;
  156. switch (adapter->ahw.board_type) {
  157. case QLCNIC_BRDTYPE_P3_REF_QG:
  158. case QLCNIC_BRDTYPE_P3_4_GB:
  159. case QLCNIC_BRDTYPE_P3_4_GB_MM:
  160. ecmd->supported |= SUPPORTED_Autoneg;
  161. ecmd->advertising |= ADVERTISED_Autoneg;
  162. case QLCNIC_BRDTYPE_P3_10G_CX4:
  163. case QLCNIC_BRDTYPE_P3_10G_CX4_LP:
  164. case QLCNIC_BRDTYPE_P3_10000_BASE_T:
  165. ecmd->supported |= SUPPORTED_TP;
  166. ecmd->advertising |= ADVERTISED_TP;
  167. ecmd->port = PORT_TP;
  168. ecmd->autoneg = adapter->link_autoneg;
  169. break;
  170. case QLCNIC_BRDTYPE_P3_IMEZ:
  171. case QLCNIC_BRDTYPE_P3_XG_LOM:
  172. case QLCNIC_BRDTYPE_P3_HMEZ:
  173. ecmd->supported |= SUPPORTED_MII;
  174. ecmd->advertising |= ADVERTISED_MII;
  175. ecmd->port = PORT_MII;
  176. ecmd->autoneg = AUTONEG_DISABLE;
  177. break;
  178. case QLCNIC_BRDTYPE_P3_10G_SFP_PLUS:
  179. case QLCNIC_BRDTYPE_P3_10G_SFP_CT:
  180. case QLCNIC_BRDTYPE_P3_10G_SFP_QT:
  181. ecmd->advertising |= ADVERTISED_TP;
  182. ecmd->supported |= SUPPORTED_TP;
  183. check_sfp_module = netif_running(dev) &&
  184. adapter->has_link_events;
  185. case QLCNIC_BRDTYPE_P3_10G_XFP:
  186. ecmd->supported |= SUPPORTED_FIBRE;
  187. ecmd->advertising |= ADVERTISED_FIBRE;
  188. ecmd->port = PORT_FIBRE;
  189. ecmd->autoneg = AUTONEG_DISABLE;
  190. break;
  191. case QLCNIC_BRDTYPE_P3_10G_TP:
  192. if (adapter->ahw.port_type == QLCNIC_XGBE) {
  193. ecmd->autoneg = AUTONEG_DISABLE;
  194. ecmd->supported |= (SUPPORTED_FIBRE | SUPPORTED_TP);
  195. ecmd->advertising |=
  196. (ADVERTISED_FIBRE | ADVERTISED_TP);
  197. ecmd->port = PORT_FIBRE;
  198. check_sfp_module = netif_running(dev) &&
  199. adapter->has_link_events;
  200. } else {
  201. ecmd->autoneg = AUTONEG_ENABLE;
  202. ecmd->supported |= (SUPPORTED_TP | SUPPORTED_Autoneg);
  203. ecmd->advertising |=
  204. (ADVERTISED_TP | ADVERTISED_Autoneg);
  205. ecmd->port = PORT_TP;
  206. }
  207. break;
  208. default:
  209. dev_err(&adapter->pdev->dev, "Unsupported board model %d\n",
  210. adapter->ahw.board_type);
  211. return -EIO;
  212. }
  213. if (check_sfp_module) {
  214. switch (adapter->module_type) {
  215. case LINKEVENT_MODULE_OPTICAL_UNKNOWN:
  216. case LINKEVENT_MODULE_OPTICAL_SRLR:
  217. case LINKEVENT_MODULE_OPTICAL_LRM:
  218. case LINKEVENT_MODULE_OPTICAL_SFP_1G:
  219. ecmd->port = PORT_FIBRE;
  220. break;
  221. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE:
  222. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN:
  223. case LINKEVENT_MODULE_TWINAX:
  224. ecmd->port = PORT_TP;
  225. break;
  226. default:
  227. ecmd->port = PORT_OTHER;
  228. }
  229. }
  230. return 0;
  231. }
  232. static int
  233. qlcnic_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  234. {
  235. struct qlcnic_adapter *adapter = netdev_priv(dev);
  236. __u32 status;
  237. /* read which mode */
  238. if (adapter->ahw.port_type == QLCNIC_GBE) {
  239. /* autonegotiation */
  240. if (qlcnic_fw_cmd_set_phy(adapter,
  241. QLCNIC_NIU_GB_MII_MGMT_ADDR_AUTONEG,
  242. ecmd->autoneg) != 0)
  243. return -EIO;
  244. else
  245. adapter->link_autoneg = ecmd->autoneg;
  246. if (qlcnic_fw_cmd_query_phy(adapter,
  247. QLCNIC_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
  248. &status) != 0)
  249. return -EIO;
  250. switch (ecmd->speed) {
  251. case SPEED_10:
  252. qlcnic_set_phy_speed(status, 0);
  253. break;
  254. case SPEED_100:
  255. qlcnic_set_phy_speed(status, 1);
  256. break;
  257. case SPEED_1000:
  258. qlcnic_set_phy_speed(status, 2);
  259. break;
  260. }
  261. if (ecmd->duplex == DUPLEX_HALF)
  262. qlcnic_clear_phy_duplex(status);
  263. if (ecmd->duplex == DUPLEX_FULL)
  264. qlcnic_set_phy_duplex(status);
  265. if (qlcnic_fw_cmd_set_phy(adapter,
  266. QLCNIC_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
  267. *((int *)&status)) != 0)
  268. return -EIO;
  269. else {
  270. adapter->link_speed = ecmd->speed;
  271. adapter->link_duplex = ecmd->duplex;
  272. }
  273. } else
  274. return -EOPNOTSUPP;
  275. if (!netif_running(dev))
  276. return 0;
  277. dev->netdev_ops->ndo_stop(dev);
  278. return dev->netdev_ops->ndo_open(dev);
  279. }
  280. static void
  281. qlcnic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
  282. {
  283. struct qlcnic_adapter *adapter = netdev_priv(dev);
  284. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  285. struct qlcnic_host_sds_ring *sds_ring;
  286. u32 *regs_buff = p;
  287. int ring, i = 0;
  288. memset(p, 0, qlcnic_get_regs_len(dev));
  289. regs->version = (1 << 24) | (adapter->ahw.revision_id << 16) |
  290. (adapter->pdev)->device;
  291. for (i = 0; diag_registers[i] != -1; i++)
  292. regs_buff[i] = QLCRD32(adapter, diag_registers[i]);
  293. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  294. return;
  295. regs_buff[i++] = 0xFFEFCDAB; /* Marker btw regs and ring count*/
  296. regs_buff[i++] = 1; /* No. of tx ring */
  297. regs_buff[i++] = le32_to_cpu(*(adapter->tx_ring->hw_consumer));
  298. regs_buff[i++] = readl(adapter->tx_ring->crb_cmd_producer);
  299. regs_buff[i++] = 2; /* No. of rx ring */
  300. regs_buff[i++] = readl(recv_ctx->rds_rings[0].crb_rcv_producer);
  301. regs_buff[i++] = readl(recv_ctx->rds_rings[1].crb_rcv_producer);
  302. regs_buff[i++] = adapter->max_sds_rings;
  303. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  304. sds_ring = &(recv_ctx->sds_rings[ring]);
  305. regs_buff[i++] = readl(sds_ring->crb_sts_consumer);
  306. }
  307. }
  308. static u32 qlcnic_test_link(struct net_device *dev)
  309. {
  310. struct qlcnic_adapter *adapter = netdev_priv(dev);
  311. u32 val;
  312. val = QLCRD32(adapter, CRB_XG_STATE_P3);
  313. val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val);
  314. return (val == XG_LINK_UP_P3) ? 0 : 1;
  315. }
  316. static int
  317. qlcnic_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
  318. u8 *bytes)
  319. {
  320. struct qlcnic_adapter *adapter = netdev_priv(dev);
  321. int offset;
  322. int ret;
  323. if (eeprom->len == 0)
  324. return -EINVAL;
  325. eeprom->magic = (adapter->pdev)->vendor |
  326. ((adapter->pdev)->device << 16);
  327. offset = eeprom->offset;
  328. ret = qlcnic_rom_fast_read_words(adapter, offset, bytes,
  329. eeprom->len);
  330. if (ret < 0)
  331. return ret;
  332. return 0;
  333. }
  334. static void
  335. qlcnic_get_ringparam(struct net_device *dev,
  336. struct ethtool_ringparam *ring)
  337. {
  338. struct qlcnic_adapter *adapter = netdev_priv(dev);
  339. ring->rx_pending = adapter->num_rxd;
  340. ring->rx_jumbo_pending = adapter->num_jumbo_rxd;
  341. ring->rx_jumbo_pending += adapter->num_lro_rxd;
  342. ring->tx_pending = adapter->num_txd;
  343. if (adapter->ahw.port_type == QLCNIC_GBE) {
  344. ring->rx_max_pending = MAX_RCV_DESCRIPTORS_1G;
  345. ring->rx_jumbo_max_pending = MAX_JUMBO_RCV_DESCRIPTORS_1G;
  346. } else {
  347. ring->rx_max_pending = MAX_RCV_DESCRIPTORS_10G;
  348. ring->rx_jumbo_max_pending = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  349. }
  350. ring->tx_max_pending = MAX_CMD_DESCRIPTORS;
  351. ring->rx_mini_max_pending = 0;
  352. ring->rx_mini_pending = 0;
  353. }
  354. static u32
  355. qlcnic_validate_ringparam(u32 val, u32 min, u32 max, char *r_name)
  356. {
  357. u32 num_desc;
  358. num_desc = max(val, min);
  359. num_desc = min(num_desc, max);
  360. num_desc = roundup_pow_of_two(num_desc);
  361. if (val != num_desc) {
  362. printk(KERN_INFO "%s: setting %s ring size %d instead of %d\n",
  363. qlcnic_driver_name, r_name, num_desc, val);
  364. }
  365. return num_desc;
  366. }
  367. static int
  368. qlcnic_set_ringparam(struct net_device *dev,
  369. struct ethtool_ringparam *ring)
  370. {
  371. struct qlcnic_adapter *adapter = netdev_priv(dev);
  372. u16 max_rcv_desc = MAX_RCV_DESCRIPTORS_10G;
  373. u16 max_jumbo_desc = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  374. u16 num_rxd, num_jumbo_rxd, num_txd;
  375. if (ring->rx_mini_pending)
  376. return -EOPNOTSUPP;
  377. if (adapter->ahw.port_type == QLCNIC_GBE) {
  378. max_rcv_desc = MAX_RCV_DESCRIPTORS_1G;
  379. max_jumbo_desc = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  380. }
  381. num_rxd = qlcnic_validate_ringparam(ring->rx_pending,
  382. MIN_RCV_DESCRIPTORS, max_rcv_desc, "rx");
  383. num_jumbo_rxd = qlcnic_validate_ringparam(ring->rx_jumbo_pending,
  384. MIN_JUMBO_DESCRIPTORS, max_jumbo_desc, "rx jumbo");
  385. num_txd = qlcnic_validate_ringparam(ring->tx_pending,
  386. MIN_CMD_DESCRIPTORS, MAX_CMD_DESCRIPTORS, "tx");
  387. if (num_rxd == adapter->num_rxd && num_txd == adapter->num_txd &&
  388. num_jumbo_rxd == adapter->num_jumbo_rxd)
  389. return 0;
  390. adapter->num_rxd = num_rxd;
  391. adapter->num_jumbo_rxd = num_jumbo_rxd;
  392. adapter->num_txd = num_txd;
  393. return qlcnic_reset_context(adapter);
  394. }
  395. static void
  396. qlcnic_get_pauseparam(struct net_device *netdev,
  397. struct ethtool_pauseparam *pause)
  398. {
  399. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  400. int port = adapter->physical_port;
  401. __u32 val;
  402. if (adapter->ahw.port_type == QLCNIC_GBE) {
  403. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  404. return;
  405. /* get flow control settings */
  406. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  407. pause->rx_pause = qlcnic_gb_get_rx_flowctl(val);
  408. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  409. switch (port) {
  410. case 0:
  411. pause->tx_pause = !(qlcnic_gb_get_gb0_mask(val));
  412. break;
  413. case 1:
  414. pause->tx_pause = !(qlcnic_gb_get_gb1_mask(val));
  415. break;
  416. case 2:
  417. pause->tx_pause = !(qlcnic_gb_get_gb2_mask(val));
  418. break;
  419. case 3:
  420. default:
  421. pause->tx_pause = !(qlcnic_gb_get_gb3_mask(val));
  422. break;
  423. }
  424. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  425. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  426. return;
  427. pause->rx_pause = 1;
  428. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  429. if (port == 0)
  430. pause->tx_pause = !(qlcnic_xg_get_xg0_mask(val));
  431. else
  432. pause->tx_pause = !(qlcnic_xg_get_xg1_mask(val));
  433. } else {
  434. dev_err(&netdev->dev, "Unknown board type: %x\n",
  435. adapter->ahw.port_type);
  436. }
  437. }
  438. static int
  439. qlcnic_set_pauseparam(struct net_device *netdev,
  440. struct ethtool_pauseparam *pause)
  441. {
  442. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  443. int port = adapter->physical_port;
  444. __u32 val;
  445. /* read mode */
  446. if (adapter->ahw.port_type == QLCNIC_GBE) {
  447. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  448. return -EIO;
  449. /* set flow control */
  450. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  451. if (pause->rx_pause)
  452. qlcnic_gb_rx_flowctl(val);
  453. else
  454. qlcnic_gb_unset_rx_flowctl(val);
  455. QLCWR32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port),
  456. val);
  457. /* set autoneg */
  458. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  459. switch (port) {
  460. case 0:
  461. if (pause->tx_pause)
  462. qlcnic_gb_unset_gb0_mask(val);
  463. else
  464. qlcnic_gb_set_gb0_mask(val);
  465. break;
  466. case 1:
  467. if (pause->tx_pause)
  468. qlcnic_gb_unset_gb1_mask(val);
  469. else
  470. qlcnic_gb_set_gb1_mask(val);
  471. break;
  472. case 2:
  473. if (pause->tx_pause)
  474. qlcnic_gb_unset_gb2_mask(val);
  475. else
  476. qlcnic_gb_set_gb2_mask(val);
  477. break;
  478. case 3:
  479. default:
  480. if (pause->tx_pause)
  481. qlcnic_gb_unset_gb3_mask(val);
  482. else
  483. qlcnic_gb_set_gb3_mask(val);
  484. break;
  485. }
  486. QLCWR32(adapter, QLCNIC_NIU_GB_PAUSE_CTL, val);
  487. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  488. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  489. return -EIO;
  490. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  491. if (port == 0) {
  492. if (pause->tx_pause)
  493. qlcnic_xg_unset_xg0_mask(val);
  494. else
  495. qlcnic_xg_set_xg0_mask(val);
  496. } else {
  497. if (pause->tx_pause)
  498. qlcnic_xg_unset_xg1_mask(val);
  499. else
  500. qlcnic_xg_set_xg1_mask(val);
  501. }
  502. QLCWR32(adapter, QLCNIC_NIU_XG_PAUSE_CTL, val);
  503. } else {
  504. dev_err(&netdev->dev, "Unknown board type: %x\n",
  505. adapter->ahw.port_type);
  506. }
  507. return 0;
  508. }
  509. static int qlcnic_reg_test(struct net_device *dev)
  510. {
  511. struct qlcnic_adapter *adapter = netdev_priv(dev);
  512. u32 data_read, data_written;
  513. data_read = QLCRD32(adapter, QLCNIC_PCIX_PH_REG(0));
  514. if ((data_read & 0xffff) != adapter->pdev->vendor)
  515. return 1;
  516. data_written = (u32)0xa5a5a5a5;
  517. QLCWR32(adapter, CRB_SCRATCHPAD_TEST, data_written);
  518. data_read = QLCRD32(adapter, CRB_SCRATCHPAD_TEST);
  519. if (data_written != data_read)
  520. return 1;
  521. return 0;
  522. }
  523. static int qlcnic_get_sset_count(struct net_device *dev, int sset)
  524. {
  525. switch (sset) {
  526. case ETH_SS_TEST:
  527. return QLCNIC_TEST_LEN;
  528. case ETH_SS_STATS:
  529. return QLCNIC_STATS_LEN;
  530. default:
  531. return -EOPNOTSUPP;
  532. }
  533. }
  534. static void
  535. qlcnic_diag_test(struct net_device *dev, struct ethtool_test *eth_test,
  536. u64 *data)
  537. {
  538. memset(data, 0, sizeof(u64) * QLCNIC_TEST_LEN);
  539. data[0] = qlcnic_reg_test(dev);
  540. if (data[0])
  541. eth_test->flags |= ETH_TEST_FL_FAILED;
  542. /* link test */
  543. data[1] = (u64) qlcnic_test_link(dev);
  544. if (data[1])
  545. eth_test->flags |= ETH_TEST_FL_FAILED;
  546. }
  547. static void
  548. qlcnic_get_strings(struct net_device *dev, u32 stringset, u8 * data)
  549. {
  550. int index;
  551. switch (stringset) {
  552. case ETH_SS_TEST:
  553. memcpy(data, *qlcnic_gstrings_test,
  554. QLCNIC_TEST_LEN * ETH_GSTRING_LEN);
  555. break;
  556. case ETH_SS_STATS:
  557. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  558. memcpy(data + index * ETH_GSTRING_LEN,
  559. qlcnic_gstrings_stats[index].stat_string,
  560. ETH_GSTRING_LEN);
  561. }
  562. break;
  563. }
  564. }
  565. static void
  566. qlcnic_get_ethtool_stats(struct net_device *dev,
  567. struct ethtool_stats *stats, u64 * data)
  568. {
  569. struct qlcnic_adapter *adapter = netdev_priv(dev);
  570. int index;
  571. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  572. char *p =
  573. (char *)adapter +
  574. qlcnic_gstrings_stats[index].stat_offset;
  575. data[index] =
  576. (qlcnic_gstrings_stats[index].sizeof_stat ==
  577. sizeof(u64)) ? *(u64 *)p:(*(u32 *)p);
  578. }
  579. }
  580. static u32 qlcnic_get_rx_csum(struct net_device *dev)
  581. {
  582. struct qlcnic_adapter *adapter = netdev_priv(dev);
  583. return adapter->rx_csum;
  584. }
  585. static int qlcnic_set_rx_csum(struct net_device *dev, u32 data)
  586. {
  587. struct qlcnic_adapter *adapter = netdev_priv(dev);
  588. adapter->rx_csum = !!data;
  589. return 0;
  590. }
  591. static u32 qlcnic_get_tso(struct net_device *dev)
  592. {
  593. return (dev->features & (NETIF_F_TSO | NETIF_F_TSO6)) != 0;
  594. }
  595. static int qlcnic_set_tso(struct net_device *dev, u32 data)
  596. {
  597. if (data)
  598. dev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
  599. else
  600. dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
  601. return 0;
  602. }
  603. static void
  604. qlcnic_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  605. {
  606. struct qlcnic_adapter *adapter = netdev_priv(dev);
  607. u32 wol_cfg;
  608. wol->supported = 0;
  609. wol->wolopts = 0;
  610. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  611. if (wol_cfg & (1UL << adapter->portnum))
  612. wol->supported |= WAKE_MAGIC;
  613. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  614. if (wol_cfg & (1UL << adapter->portnum))
  615. wol->wolopts |= WAKE_MAGIC;
  616. }
  617. static int
  618. qlcnic_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  619. {
  620. struct qlcnic_adapter *adapter = netdev_priv(dev);
  621. u32 wol_cfg;
  622. if (wol->wolopts & ~WAKE_MAGIC)
  623. return -EOPNOTSUPP;
  624. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  625. if (!(wol_cfg & (1 << adapter->portnum)))
  626. return -EOPNOTSUPP;
  627. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  628. if (wol->wolopts & WAKE_MAGIC)
  629. wol_cfg |= 1UL << adapter->portnum;
  630. else
  631. wol_cfg &= ~(1UL << adapter->portnum);
  632. QLCWR32(adapter, QLCNIC_WOL_CONFIG, wol_cfg);
  633. return 0;
  634. }
  635. /*
  636. * Set the coalescing parameters. Currently only normal is supported.
  637. * If rx_coalesce_usecs == 0 or rx_max_coalesced_frames == 0 then set the
  638. * firmware coalescing to default.
  639. */
  640. static int qlcnic_set_intr_coalesce(struct net_device *netdev,
  641. struct ethtool_coalesce *ethcoal)
  642. {
  643. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  644. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  645. return -EINVAL;
  646. /*
  647. * Return Error if unsupported values or
  648. * unsupported parameters are set.
  649. */
  650. if (ethcoal->rx_coalesce_usecs > 0xffff ||
  651. ethcoal->rx_max_coalesced_frames > 0xffff ||
  652. ethcoal->tx_coalesce_usecs > 0xffff ||
  653. ethcoal->tx_max_coalesced_frames > 0xffff ||
  654. ethcoal->rx_coalesce_usecs_irq ||
  655. ethcoal->rx_max_coalesced_frames_irq ||
  656. ethcoal->tx_coalesce_usecs_irq ||
  657. ethcoal->tx_max_coalesced_frames_irq ||
  658. ethcoal->stats_block_coalesce_usecs ||
  659. ethcoal->use_adaptive_rx_coalesce ||
  660. ethcoal->use_adaptive_tx_coalesce ||
  661. ethcoal->pkt_rate_low ||
  662. ethcoal->rx_coalesce_usecs_low ||
  663. ethcoal->rx_max_coalesced_frames_low ||
  664. ethcoal->tx_coalesce_usecs_low ||
  665. ethcoal->tx_max_coalesced_frames_low ||
  666. ethcoal->pkt_rate_high ||
  667. ethcoal->rx_coalesce_usecs_high ||
  668. ethcoal->rx_max_coalesced_frames_high ||
  669. ethcoal->tx_coalesce_usecs_high ||
  670. ethcoal->tx_max_coalesced_frames_high)
  671. return -EINVAL;
  672. if (!ethcoal->rx_coalesce_usecs ||
  673. !ethcoal->rx_max_coalesced_frames) {
  674. adapter->coal.flags = QLCNIC_INTR_DEFAULT;
  675. adapter->coal.normal.data.rx_time_us =
  676. QLCNIC_DEFAULT_INTR_COALESCE_RX_TIME_US;
  677. adapter->coal.normal.data.rx_packets =
  678. QLCNIC_DEFAULT_INTR_COALESCE_RX_PACKETS;
  679. } else {
  680. adapter->coal.flags = 0;
  681. adapter->coal.normal.data.rx_time_us =
  682. ethcoal->rx_coalesce_usecs;
  683. adapter->coal.normal.data.rx_packets =
  684. ethcoal->rx_max_coalesced_frames;
  685. }
  686. adapter->coal.normal.data.tx_time_us = ethcoal->tx_coalesce_usecs;
  687. adapter->coal.normal.data.tx_packets =
  688. ethcoal->tx_max_coalesced_frames;
  689. qlcnic_config_intr_coalesce(adapter);
  690. return 0;
  691. }
  692. static int qlcnic_get_intr_coalesce(struct net_device *netdev,
  693. struct ethtool_coalesce *ethcoal)
  694. {
  695. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  696. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  697. return -EINVAL;
  698. ethcoal->rx_coalesce_usecs = adapter->coal.normal.data.rx_time_us;
  699. ethcoal->tx_coalesce_usecs = adapter->coal.normal.data.tx_time_us;
  700. ethcoal->rx_max_coalesced_frames =
  701. adapter->coal.normal.data.rx_packets;
  702. ethcoal->tx_max_coalesced_frames =
  703. adapter->coal.normal.data.tx_packets;
  704. return 0;
  705. }
  706. static int qlcnic_set_flags(struct net_device *netdev, u32 data)
  707. {
  708. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  709. int hw_lro;
  710. if (!(adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO))
  711. return -EINVAL;
  712. ethtool_op_set_flags(netdev, data);
  713. hw_lro = (data & ETH_FLAG_LRO) ? QLCNIC_LRO_ENABLED : 0;
  714. if (qlcnic_config_hw_lro(adapter, hw_lro))
  715. return -EIO;
  716. if ((hw_lro == 0) && qlcnic_send_lro_cleanup(adapter))
  717. return -EIO;
  718. return 0;
  719. }
  720. const struct ethtool_ops qlcnic_ethtool_ops = {
  721. .get_settings = qlcnic_get_settings,
  722. .set_settings = qlcnic_set_settings,
  723. .get_drvinfo = qlcnic_get_drvinfo,
  724. .get_regs_len = qlcnic_get_regs_len,
  725. .get_regs = qlcnic_get_regs,
  726. .get_link = ethtool_op_get_link,
  727. .get_eeprom_len = qlcnic_get_eeprom_len,
  728. .get_eeprom = qlcnic_get_eeprom,
  729. .get_ringparam = qlcnic_get_ringparam,
  730. .set_ringparam = qlcnic_set_ringparam,
  731. .get_pauseparam = qlcnic_get_pauseparam,
  732. .set_pauseparam = qlcnic_set_pauseparam,
  733. .set_tx_csum = ethtool_op_set_tx_csum,
  734. .set_sg = ethtool_op_set_sg,
  735. .get_tso = qlcnic_get_tso,
  736. .set_tso = qlcnic_set_tso,
  737. .get_wol = qlcnic_get_wol,
  738. .set_wol = qlcnic_set_wol,
  739. .self_test = qlcnic_diag_test,
  740. .get_strings = qlcnic_get_strings,
  741. .get_ethtool_stats = qlcnic_get_ethtool_stats,
  742. .get_sset_count = qlcnic_get_sset_count,
  743. .get_rx_csum = qlcnic_get_rx_csum,
  744. .set_rx_csum = qlcnic_set_rx_csum,
  745. .get_coalesce = qlcnic_get_intr_coalesce,
  746. .set_coalesce = qlcnic_set_intr_coalesce,
  747. .get_flags = ethtool_op_get_flags,
  748. .set_flags = qlcnic_set_flags,
  749. };