twl6040.c 30 KB

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  1. /*
  2. * ALSA SoC TWL6040 codec driver
  3. *
  4. * Author: Misael Lopez Cruz <x0052729@ti.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18. * 02110-1301 USA
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/pm.h>
  26. #include <linux/i2c.h>
  27. #include <linux/gpio.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/slab.h>
  30. #include <linux/i2c/twl.h>
  31. #include <sound/core.h>
  32. #include <sound/pcm.h>
  33. #include <sound/pcm_params.h>
  34. #include <sound/soc.h>
  35. #include <sound/soc-dapm.h>
  36. #include <sound/initval.h>
  37. #include <sound/tlv.h>
  38. #include "twl6040.h"
  39. #define TWL6040_RATES (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
  40. #define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
  41. /* codec private data */
  42. struct twl6040_data {
  43. int audpwron;
  44. int naudint;
  45. int codec_powered;
  46. int pll;
  47. int non_lp;
  48. unsigned int sysclk;
  49. struct snd_pcm_hw_constraint_list *sysclk_constraints;
  50. struct completion ready;
  51. };
  52. /*
  53. * twl6040 register cache & default register settings
  54. */
  55. static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
  56. 0x00, /* not used 0x00 */
  57. 0x4B, /* TWL6040_ASICID (ro) 0x01 */
  58. 0x00, /* TWL6040_ASICREV (ro) 0x02 */
  59. 0x00, /* TWL6040_INTID 0x03 */
  60. 0x00, /* TWL6040_INTMR 0x04 */
  61. 0x00, /* TWL6040_NCPCTRL 0x05 */
  62. 0x00, /* TWL6040_LDOCTL 0x06 */
  63. 0x60, /* TWL6040_HPPLLCTL 0x07 */
  64. 0x00, /* TWL6040_LPPLLCTL 0x08 */
  65. 0x4A, /* TWL6040_LPPLLDIV 0x09 */
  66. 0x00, /* TWL6040_AMICBCTL 0x0A */
  67. 0x00, /* TWL6040_DMICBCTL 0x0B */
  68. 0x18, /* TWL6040_MICLCTL 0x0C - No input selected on Left Mic */
  69. 0x18, /* TWL6040_MICRCTL 0x0D - No input selected on Right Mic */
  70. 0x00, /* TWL6040_MICGAIN 0x0E */
  71. 0x1B, /* TWL6040_LINEGAIN 0x0F */
  72. 0x00, /* TWL6040_HSLCTL 0x10 */
  73. 0x00, /* TWL6040_HSRCTL 0x11 */
  74. 0x00, /* TWL6040_HSGAIN 0x12 */
  75. 0x00, /* TWL6040_EARCTL 0x13 */
  76. 0x00, /* TWL6040_HFLCTL 0x14 */
  77. 0x00, /* TWL6040_HFLGAIN 0x15 */
  78. 0x00, /* TWL6040_HFRCTL 0x16 */
  79. 0x00, /* TWL6040_HFRGAIN 0x17 */
  80. 0x00, /* TWL6040_VIBCTLL 0x18 */
  81. 0x00, /* TWL6040_VIBDATL 0x19 */
  82. 0x00, /* TWL6040_VIBCTLR 0x1A */
  83. 0x00, /* TWL6040_VIBDATR 0x1B */
  84. 0x00, /* TWL6040_HKCTL1 0x1C */
  85. 0x00, /* TWL6040_HKCTL2 0x1D */
  86. 0x00, /* TWL6040_GPOCTL 0x1E */
  87. 0x00, /* TWL6040_ALB 0x1F */
  88. 0x00, /* TWL6040_DLB 0x20 */
  89. 0x00, /* not used 0x21 */
  90. 0x00, /* not used 0x22 */
  91. 0x00, /* not used 0x23 */
  92. 0x00, /* not used 0x24 */
  93. 0x00, /* not used 0x25 */
  94. 0x00, /* not used 0x26 */
  95. 0x00, /* not used 0x27 */
  96. 0x00, /* TWL6040_TRIM1 0x28 */
  97. 0x00, /* TWL6040_TRIM2 0x29 */
  98. 0x00, /* TWL6040_TRIM3 0x2A */
  99. 0x00, /* TWL6040_HSOTRIM 0x2B */
  100. 0x00, /* TWL6040_HFOTRIM 0x2C */
  101. 0x09, /* TWL6040_ACCCTL 0x2D */
  102. 0x00, /* TWL6040_STATUS (ro) 0x2E */
  103. };
  104. /*
  105. * twl6040 vio/gnd registers:
  106. * registers under vio/gnd supply can be accessed
  107. * before the power-up sequence, after NRESPWRON goes high
  108. */
  109. static const int twl6040_vio_reg[TWL6040_VIOREGNUM] = {
  110. TWL6040_REG_ASICID,
  111. TWL6040_REG_ASICREV,
  112. TWL6040_REG_INTID,
  113. TWL6040_REG_INTMR,
  114. TWL6040_REG_NCPCTL,
  115. TWL6040_REG_LDOCTL,
  116. TWL6040_REG_AMICBCTL,
  117. TWL6040_REG_DMICBCTL,
  118. TWL6040_REG_HKCTL1,
  119. TWL6040_REG_HKCTL2,
  120. TWL6040_REG_GPOCTL,
  121. TWL6040_REG_TRIM1,
  122. TWL6040_REG_TRIM2,
  123. TWL6040_REG_TRIM3,
  124. TWL6040_REG_HSOTRIM,
  125. TWL6040_REG_HFOTRIM,
  126. TWL6040_REG_ACCCTL,
  127. TWL6040_REG_STATUS,
  128. };
  129. /*
  130. * twl6040 vdd/vss registers:
  131. * registers under vdd/vss supplies can only be accessed
  132. * after the power-up sequence
  133. */
  134. static const int twl6040_vdd_reg[TWL6040_VDDREGNUM] = {
  135. TWL6040_REG_HPPLLCTL,
  136. TWL6040_REG_LPPLLCTL,
  137. TWL6040_REG_LPPLLDIV,
  138. TWL6040_REG_MICLCTL,
  139. TWL6040_REG_MICRCTL,
  140. TWL6040_REG_MICGAIN,
  141. TWL6040_REG_LINEGAIN,
  142. TWL6040_REG_HSLCTL,
  143. TWL6040_REG_HSRCTL,
  144. TWL6040_REG_HSGAIN,
  145. TWL6040_REG_EARCTL,
  146. TWL6040_REG_HFLCTL,
  147. TWL6040_REG_HFLGAIN,
  148. TWL6040_REG_HFRCTL,
  149. TWL6040_REG_HFRGAIN,
  150. TWL6040_REG_VIBCTLL,
  151. TWL6040_REG_VIBDATL,
  152. TWL6040_REG_VIBCTLR,
  153. TWL6040_REG_VIBDATR,
  154. TWL6040_REG_ALB,
  155. TWL6040_REG_DLB,
  156. };
  157. /*
  158. * read twl6040 register cache
  159. */
  160. static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
  161. unsigned int reg)
  162. {
  163. u8 *cache = codec->reg_cache;
  164. if (reg >= TWL6040_CACHEREGNUM)
  165. return -EIO;
  166. return cache[reg];
  167. }
  168. /*
  169. * write twl6040 register cache
  170. */
  171. static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
  172. u8 reg, u8 value)
  173. {
  174. u8 *cache = codec->reg_cache;
  175. if (reg >= TWL6040_CACHEREGNUM)
  176. return;
  177. cache[reg] = value;
  178. }
  179. /*
  180. * read from twl6040 hardware register
  181. */
  182. static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
  183. unsigned int reg)
  184. {
  185. u8 value;
  186. if (reg >= TWL6040_CACHEREGNUM)
  187. return -EIO;
  188. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
  189. twl6040_write_reg_cache(codec, reg, value);
  190. return value;
  191. }
  192. /*
  193. * write to the twl6040 register space
  194. */
  195. static int twl6040_write(struct snd_soc_codec *codec,
  196. unsigned int reg, unsigned int value)
  197. {
  198. if (reg >= TWL6040_CACHEREGNUM)
  199. return -EIO;
  200. twl6040_write_reg_cache(codec, reg, value);
  201. return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
  202. }
  203. static void twl6040_init_vio_regs(struct snd_soc_codec *codec)
  204. {
  205. u8 *cache = codec->reg_cache;
  206. int reg, i;
  207. /* allow registers to be accessed by i2c */
  208. twl6040_write(codec, TWL6040_REG_ACCCTL, cache[TWL6040_REG_ACCCTL]);
  209. for (i = 0; i < TWL6040_VIOREGNUM; i++) {
  210. reg = twl6040_vio_reg[i];
  211. /* skip read-only registers (ASICID, ASICREV, STATUS) */
  212. switch (reg) {
  213. case TWL6040_REG_ASICID:
  214. case TWL6040_REG_ASICREV:
  215. case TWL6040_REG_STATUS:
  216. continue;
  217. default:
  218. break;
  219. }
  220. twl6040_write(codec, reg, cache[reg]);
  221. }
  222. }
  223. static void twl6040_init_vdd_regs(struct snd_soc_codec *codec)
  224. {
  225. u8 *cache = codec->reg_cache;
  226. int reg, i;
  227. for (i = 0; i < TWL6040_VDDREGNUM; i++) {
  228. reg = twl6040_vdd_reg[i];
  229. twl6040_write(codec, reg, cache[reg]);
  230. }
  231. }
  232. /* twl6040 codec manual power-up sequence */
  233. static void twl6040_power_up(struct snd_soc_codec *codec)
  234. {
  235. u8 ncpctl, ldoctl, lppllctl, accctl;
  236. ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL);
  237. ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL);
  238. lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
  239. accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL);
  240. /* enable reference system */
  241. ldoctl |= TWL6040_REFENA;
  242. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  243. msleep(10);
  244. /* enable internal oscillator */
  245. ldoctl |= TWL6040_OSCENA;
  246. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  247. udelay(10);
  248. /* enable high-side ldo */
  249. ldoctl |= TWL6040_HSLDOENA;
  250. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  251. udelay(244);
  252. /* enable negative charge pump */
  253. ncpctl |= TWL6040_NCPENA | TWL6040_NCPOPEN;
  254. twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl);
  255. udelay(488);
  256. /* enable low-side ldo */
  257. ldoctl |= TWL6040_LSLDOENA;
  258. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  259. udelay(244);
  260. /* enable low-power pll */
  261. lppllctl |= TWL6040_LPLLENA;
  262. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  263. /* reset state machine */
  264. accctl |= TWL6040_RESETSPLIT;
  265. twl6040_write(codec, TWL6040_REG_ACCCTL, accctl);
  266. mdelay(5);
  267. accctl &= ~TWL6040_RESETSPLIT;
  268. twl6040_write(codec, TWL6040_REG_ACCCTL, accctl);
  269. /* disable internal oscillator */
  270. ldoctl &= ~TWL6040_OSCENA;
  271. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  272. }
  273. /* twl6040 codec manual power-down sequence */
  274. static void twl6040_power_down(struct snd_soc_codec *codec)
  275. {
  276. u8 ncpctl, ldoctl, lppllctl, accctl;
  277. ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL);
  278. ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL);
  279. lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
  280. accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL);
  281. /* enable internal oscillator */
  282. ldoctl |= TWL6040_OSCENA;
  283. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  284. udelay(10);
  285. /* disable low-power pll */
  286. lppllctl &= ~TWL6040_LPLLENA;
  287. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  288. /* disable low-side ldo */
  289. ldoctl &= ~TWL6040_LSLDOENA;
  290. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  291. udelay(244);
  292. /* disable negative charge pump */
  293. ncpctl &= ~(TWL6040_NCPENA | TWL6040_NCPOPEN);
  294. twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl);
  295. udelay(488);
  296. /* disable high-side ldo */
  297. ldoctl &= ~TWL6040_HSLDOENA;
  298. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  299. udelay(244);
  300. /* disable internal oscillator */
  301. ldoctl &= ~TWL6040_OSCENA;
  302. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  303. /* disable reference system */
  304. ldoctl &= ~TWL6040_REFENA;
  305. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  306. msleep(10);
  307. }
  308. /* set headset dac and driver power mode */
  309. static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
  310. {
  311. int hslctl, hsrctl;
  312. int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL;
  313. hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
  314. hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
  315. if (high_perf) {
  316. hslctl &= ~mask;
  317. hsrctl &= ~mask;
  318. } else {
  319. hslctl |= mask;
  320. hsrctl |= mask;
  321. }
  322. twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
  323. twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
  324. return 0;
  325. }
  326. static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
  327. struct snd_kcontrol *kcontrol, int event)
  328. {
  329. msleep(1);
  330. return 0;
  331. }
  332. static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
  333. struct snd_kcontrol *kcontrol, int event)
  334. {
  335. struct snd_soc_codec *codec = w->codec;
  336. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  337. if (SND_SOC_DAPM_EVENT_ON(event))
  338. priv->non_lp++;
  339. else
  340. priv->non_lp--;
  341. msleep(1);
  342. return 0;
  343. }
  344. /* audio interrupt handler */
  345. static irqreturn_t twl6040_naudint_handler(int irq, void *data)
  346. {
  347. struct snd_soc_codec *codec = data;
  348. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  349. u8 intid;
  350. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &intid, TWL6040_REG_INTID);
  351. switch (intid) {
  352. case TWL6040_THINT:
  353. dev_alert(codec->dev, "die temp over-limit detection\n");
  354. break;
  355. case TWL6040_PLUGINT:
  356. case TWL6040_UNPLUGINT:
  357. case TWL6040_HOOKINT:
  358. break;
  359. case TWL6040_HFINT:
  360. dev_alert(codec->dev, "hf drivers over current detection\n");
  361. break;
  362. case TWL6040_VIBINT:
  363. dev_alert(codec->dev, "vib drivers over current detection\n");
  364. break;
  365. case TWL6040_READYINT:
  366. complete(&priv->ready);
  367. break;
  368. default:
  369. dev_err(codec->dev, "unknown audio interrupt %d\n", intid);
  370. break;
  371. }
  372. return IRQ_HANDLED;
  373. }
  374. /*
  375. * MICATT volume control:
  376. * from -6 to 0 dB in 6 dB steps
  377. */
  378. static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
  379. /*
  380. * MICGAIN volume control:
  381. * from 6 to 30 dB in 6 dB steps
  382. */
  383. static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0);
  384. /*
  385. * HSGAIN volume control:
  386. * from -30 to 0 dB in 2 dB steps
  387. */
  388. static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
  389. /*
  390. * HFGAIN volume control:
  391. * from -52 to 6 dB in 2 dB steps
  392. */
  393. static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
  394. /*
  395. * EPGAIN volume control:
  396. * from -24 to 6 dB in 2 dB steps
  397. */
  398. static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
  399. /* Left analog microphone selection */
  400. static const char *twl6040_amicl_texts[] =
  401. {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
  402. /* Right analog microphone selection */
  403. static const char *twl6040_amicr_texts[] =
  404. {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
  405. static const struct soc_enum twl6040_enum[] = {
  406. SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 3, twl6040_amicl_texts),
  407. SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 3, twl6040_amicr_texts),
  408. };
  409. static const struct snd_kcontrol_new amicl_control =
  410. SOC_DAPM_ENUM("Route", twl6040_enum[0]);
  411. static const struct snd_kcontrol_new amicr_control =
  412. SOC_DAPM_ENUM("Route", twl6040_enum[1]);
  413. /* Headset DAC playback switches */
  414. static const struct snd_kcontrol_new hsdacl_switch_controls =
  415. SOC_DAPM_SINGLE("Switch", TWL6040_REG_HSLCTL, 5, 1, 0);
  416. static const struct snd_kcontrol_new hsdacr_switch_controls =
  417. SOC_DAPM_SINGLE("Switch", TWL6040_REG_HSRCTL, 5, 1, 0);
  418. /* Handsfree DAC playback switches */
  419. static const struct snd_kcontrol_new hfdacl_switch_controls =
  420. SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 2, 1, 0);
  421. static const struct snd_kcontrol_new hfdacr_switch_controls =
  422. SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFRCTL, 2, 1, 0);
  423. static const struct snd_kcontrol_new ep_driver_switch_controls =
  424. SOC_DAPM_SINGLE("Switch", TWL6040_REG_EARCTL, 0, 1, 0);
  425. static const struct snd_kcontrol_new twl6040_snd_controls[] = {
  426. /* Capture gains */
  427. SOC_DOUBLE_TLV("Capture Preamplifier Volume",
  428. TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
  429. SOC_DOUBLE_TLV("Capture Volume",
  430. TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
  431. /* Playback gains */
  432. SOC_DOUBLE_TLV("Headset Playback Volume",
  433. TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv),
  434. SOC_DOUBLE_R_TLV("Handsfree Playback Volume",
  435. TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv),
  436. SOC_SINGLE_TLV("Earphone Playback Volume",
  437. TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
  438. };
  439. static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
  440. /* Inputs */
  441. SND_SOC_DAPM_INPUT("MAINMIC"),
  442. SND_SOC_DAPM_INPUT("HSMIC"),
  443. SND_SOC_DAPM_INPUT("SUBMIC"),
  444. SND_SOC_DAPM_INPUT("AFML"),
  445. SND_SOC_DAPM_INPUT("AFMR"),
  446. /* Outputs */
  447. SND_SOC_DAPM_OUTPUT("HSOL"),
  448. SND_SOC_DAPM_OUTPUT("HSOR"),
  449. SND_SOC_DAPM_OUTPUT("HFL"),
  450. SND_SOC_DAPM_OUTPUT("HFR"),
  451. SND_SOC_DAPM_OUTPUT("EP"),
  452. /* Analog input muxes for the capture amplifiers */
  453. SND_SOC_DAPM_MUX("Analog Left Capture Route",
  454. SND_SOC_NOPM, 0, 0, &amicl_control),
  455. SND_SOC_DAPM_MUX("Analog Right Capture Route",
  456. SND_SOC_NOPM, 0, 0, &amicr_control),
  457. /* Analog capture PGAs */
  458. SND_SOC_DAPM_PGA("MicAmpL",
  459. TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
  460. SND_SOC_DAPM_PGA("MicAmpR",
  461. TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
  462. /* ADCs */
  463. SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
  464. TWL6040_REG_MICLCTL, 2, 0),
  465. SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
  466. TWL6040_REG_MICRCTL, 2, 0),
  467. /* Microphone bias */
  468. SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
  469. TWL6040_REG_AMICBCTL, 0, 0),
  470. SND_SOC_DAPM_MICBIAS("Main Mic Bias",
  471. TWL6040_REG_AMICBCTL, 4, 0),
  472. SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
  473. TWL6040_REG_DMICBCTL, 0, 0),
  474. SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
  475. TWL6040_REG_DMICBCTL, 4, 0),
  476. /* DACs */
  477. SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback",
  478. TWL6040_REG_HSLCTL, 0, 0,
  479. twl6040_hs_dac_event,
  480. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  481. SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback",
  482. TWL6040_REG_HSRCTL, 0, 0,
  483. twl6040_hs_dac_event,
  484. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  485. SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
  486. TWL6040_REG_HFLCTL, 0, 0,
  487. twl6040_power_mode_event,
  488. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  489. SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
  490. TWL6040_REG_HFRCTL, 0, 0,
  491. twl6040_power_mode_event,
  492. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  493. /* Analog playback switches */
  494. SND_SOC_DAPM_SWITCH("HSDAC Left Playback",
  495. SND_SOC_NOPM, 0, 0, &hsdacl_switch_controls),
  496. SND_SOC_DAPM_SWITCH("HSDAC Right Playback",
  497. SND_SOC_NOPM, 0, 0, &hsdacr_switch_controls),
  498. SND_SOC_DAPM_SWITCH("HFDAC Left Playback",
  499. SND_SOC_NOPM, 0, 0, &hfdacl_switch_controls),
  500. SND_SOC_DAPM_SWITCH("HFDAC Right Playback",
  501. SND_SOC_NOPM, 0, 0, &hfdacr_switch_controls),
  502. /* Analog playback drivers */
  503. SND_SOC_DAPM_PGA_E("Handsfree Left Driver",
  504. TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
  505. twl6040_power_mode_event,
  506. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  507. SND_SOC_DAPM_PGA_E("Handsfree Right Driver",
  508. TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
  509. twl6040_power_mode_event,
  510. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  511. SND_SOC_DAPM_PGA("Headset Left Driver",
  512. TWL6040_REG_HSLCTL, 2, 0, NULL, 0),
  513. SND_SOC_DAPM_PGA("Headset Right Driver",
  514. TWL6040_REG_HSRCTL, 2, 0, NULL, 0),
  515. SND_SOC_DAPM_SWITCH_E("Earphone Driver",
  516. SND_SOC_NOPM, 0, 0, &ep_driver_switch_controls,
  517. twl6040_power_mode_event,
  518. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  519. /* Analog playback PGAs */
  520. SND_SOC_DAPM_PGA("HFDAC Left PGA",
  521. TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
  522. SND_SOC_DAPM_PGA("HFDAC Right PGA",
  523. TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
  524. };
  525. static const struct snd_soc_dapm_route intercon[] = {
  526. /* Capture path */
  527. {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
  528. {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
  529. {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
  530. {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
  531. {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
  532. {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
  533. {"MicAmpL", NULL, "Analog Left Capture Route"},
  534. {"MicAmpR", NULL, "Analog Right Capture Route"},
  535. {"ADC Left", NULL, "MicAmpL"},
  536. {"ADC Right", NULL, "MicAmpR"},
  537. /* Headset playback path */
  538. {"HSDAC Left Playback", "Switch", "HSDAC Left"},
  539. {"HSDAC Right Playback", "Switch", "HSDAC Right"},
  540. {"Headset Left Driver", NULL, "HSDAC Left Playback"},
  541. {"Headset Right Driver", NULL, "HSDAC Right Playback"},
  542. {"HSOL", NULL, "Headset Left Driver"},
  543. {"HSOR", NULL, "Headset Right Driver"},
  544. /* Earphone playback path */
  545. {"Earphone Driver", "Switch", "HSDAC Left"},
  546. {"EP", NULL, "Earphone Driver"},
  547. /* Handsfree playback path */
  548. {"HFDAC Left Playback", "Switch", "HFDAC Left"},
  549. {"HFDAC Right Playback", "Switch", "HFDAC Right"},
  550. {"HFDAC Left PGA", NULL, "HFDAC Left Playback"},
  551. {"HFDAC Right PGA", NULL, "HFDAC Right Playback"},
  552. {"Handsfree Left Driver", "Switch", "HFDAC Left PGA"},
  553. {"Handsfree Right Driver", "Switch", "HFDAC Right PGA"},
  554. {"HFL", NULL, "Handsfree Left Driver"},
  555. {"HFR", NULL, "Handsfree Right Driver"},
  556. };
  557. static int twl6040_add_widgets(struct snd_soc_codec *codec)
  558. {
  559. struct snd_soc_dapm_context *dapm = &codec->dapm;
  560. snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets,
  561. ARRAY_SIZE(twl6040_dapm_widgets));
  562. snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
  563. snd_soc_dapm_new_widgets(dapm);
  564. return 0;
  565. }
  566. static int twl6040_power_up_completion(struct snd_soc_codec *codec,
  567. int naudint)
  568. {
  569. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  570. int time_left;
  571. u8 intid;
  572. time_left = wait_for_completion_timeout(&priv->ready,
  573. msecs_to_jiffies(48));
  574. if (!time_left) {
  575. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &intid,
  576. TWL6040_REG_INTID);
  577. if (!(intid & TWL6040_READYINT)) {
  578. dev_err(codec->dev, "timeout waiting for READYINT\n");
  579. return -ETIMEDOUT;
  580. }
  581. }
  582. priv->codec_powered = 1;
  583. return 0;
  584. }
  585. static int twl6040_set_bias_level(struct snd_soc_codec *codec,
  586. enum snd_soc_bias_level level)
  587. {
  588. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  589. int audpwron = priv->audpwron;
  590. int naudint = priv->naudint;
  591. int ret;
  592. switch (level) {
  593. case SND_SOC_BIAS_ON:
  594. break;
  595. case SND_SOC_BIAS_PREPARE:
  596. break;
  597. case SND_SOC_BIAS_STANDBY:
  598. if (priv->codec_powered)
  599. break;
  600. if (gpio_is_valid(audpwron)) {
  601. /* use AUDPWRON line */
  602. gpio_set_value(audpwron, 1);
  603. /* wait for power-up completion */
  604. ret = twl6040_power_up_completion(codec, naudint);
  605. if (ret)
  606. return ret;
  607. /* sync registers updated during power-up sequence */
  608. twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL);
  609. twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL);
  610. twl6040_read_reg_volatile(codec, TWL6040_REG_LPPLLCTL);
  611. } else {
  612. /* use manual power-up sequence */
  613. twl6040_power_up(codec);
  614. priv->codec_powered = 1;
  615. }
  616. /* initialize vdd/vss registers with reg_cache */
  617. twl6040_init_vdd_regs(codec);
  618. break;
  619. case SND_SOC_BIAS_OFF:
  620. if (!priv->codec_powered)
  621. break;
  622. if (gpio_is_valid(audpwron)) {
  623. /* use AUDPWRON line */
  624. gpio_set_value(audpwron, 0);
  625. /* power-down sequence latency */
  626. udelay(500);
  627. /* sync registers updated during power-down sequence */
  628. twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL);
  629. twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL);
  630. twl6040_write_reg_cache(codec, TWL6040_REG_LPPLLCTL,
  631. 0x00);
  632. } else {
  633. /* use manual power-down sequence */
  634. twl6040_power_down(codec);
  635. }
  636. priv->codec_powered = 0;
  637. break;
  638. }
  639. codec->dapm.bias_level = level;
  640. return 0;
  641. }
  642. /* set of rates for each pll: low-power and high-performance */
  643. static unsigned int lp_rates[] = {
  644. 88200,
  645. 96000,
  646. };
  647. static struct snd_pcm_hw_constraint_list lp_constraints = {
  648. .count = ARRAY_SIZE(lp_rates),
  649. .list = lp_rates,
  650. };
  651. static unsigned int hp_rates[] = {
  652. 96000,
  653. };
  654. static struct snd_pcm_hw_constraint_list hp_constraints = {
  655. .count = ARRAY_SIZE(hp_rates),
  656. .list = hp_rates,
  657. };
  658. static int twl6040_startup(struct snd_pcm_substream *substream,
  659. struct snd_soc_dai *dai)
  660. {
  661. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  662. struct snd_soc_codec *codec = rtd->codec;
  663. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  664. if (!priv->sysclk) {
  665. dev_err(codec->dev,
  666. "no mclk configured, call set_sysclk() on init\n");
  667. return -EINVAL;
  668. }
  669. /*
  670. * capture is not supported at 17.64 MHz,
  671. * it's reserved for headset low-power playback scenario
  672. */
  673. if ((priv->sysclk == 17640000) && substream->stream) {
  674. dev_err(codec->dev,
  675. "capture mode is not supported at %dHz\n",
  676. priv->sysclk);
  677. return -EINVAL;
  678. }
  679. snd_pcm_hw_constraint_list(substream->runtime, 0,
  680. SNDRV_PCM_HW_PARAM_RATE,
  681. priv->sysclk_constraints);
  682. return 0;
  683. }
  684. static int twl6040_hw_params(struct snd_pcm_substream *substream,
  685. struct snd_pcm_hw_params *params,
  686. struct snd_soc_dai *dai)
  687. {
  688. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  689. struct snd_soc_codec *codec = rtd->codec;
  690. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  691. u8 lppllctl;
  692. int rate;
  693. /* nothing to do for high-perf pll, it supports only 48 kHz */
  694. if (priv->pll == TWL6040_HPPLL_ID)
  695. return 0;
  696. lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
  697. rate = params_rate(params);
  698. switch (rate) {
  699. case 88200:
  700. lppllctl |= TWL6040_LPLLFIN;
  701. priv->sysclk = 17640000;
  702. break;
  703. case 96000:
  704. lppllctl &= ~TWL6040_LPLLFIN;
  705. priv->sysclk = 19200000;
  706. break;
  707. default:
  708. dev_err(codec->dev, "unsupported rate %d\n", rate);
  709. return -EINVAL;
  710. }
  711. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  712. return 0;
  713. }
  714. static int twl6040_trigger(struct snd_pcm_substream *substream,
  715. int cmd, struct snd_soc_dai *dai)
  716. {
  717. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  718. struct snd_soc_codec *codec = rtd->codec;
  719. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  720. switch (cmd) {
  721. case SNDRV_PCM_TRIGGER_START:
  722. case SNDRV_PCM_TRIGGER_RESUME:
  723. /*
  724. * low-power playback mode is restricted
  725. * for headset path only
  726. */
  727. if ((priv->sysclk == 17640000) && priv->non_lp) {
  728. dev_err(codec->dev,
  729. "some enabled paths aren't supported at %dHz\n",
  730. priv->sysclk);
  731. return -EPERM;
  732. }
  733. break;
  734. default:
  735. break;
  736. }
  737. return 0;
  738. }
  739. static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  740. int clk_id, unsigned int freq, int dir)
  741. {
  742. struct snd_soc_codec *codec = codec_dai->codec;
  743. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  744. u8 hppllctl, lppllctl;
  745. hppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_HPPLLCTL);
  746. lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
  747. switch (clk_id) {
  748. case TWL6040_SYSCLK_SEL_LPPLL:
  749. switch (freq) {
  750. case 32768:
  751. /* headset dac and driver must be in low-power mode */
  752. headset_power_mode(codec, 0);
  753. /* clk32k input requires low-power pll */
  754. lppllctl |= TWL6040_LPLLENA;
  755. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  756. mdelay(5);
  757. lppllctl &= ~TWL6040_HPLLSEL;
  758. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  759. hppllctl &= ~TWL6040_HPLLENA;
  760. twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl);
  761. break;
  762. default:
  763. dev_err(codec->dev, "unknown mclk freq %d\n", freq);
  764. return -EINVAL;
  765. }
  766. /* lppll divider */
  767. switch (priv->sysclk) {
  768. case 17640000:
  769. lppllctl |= TWL6040_LPLLFIN;
  770. break;
  771. case 19200000:
  772. lppllctl &= ~TWL6040_LPLLFIN;
  773. break;
  774. default:
  775. /* sysclk not yet configured */
  776. lppllctl &= ~TWL6040_LPLLFIN;
  777. priv->sysclk = 19200000;
  778. break;
  779. }
  780. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  781. priv->pll = TWL6040_LPPLL_ID;
  782. priv->sysclk_constraints = &lp_constraints;
  783. break;
  784. case TWL6040_SYSCLK_SEL_HPPLL:
  785. hppllctl &= ~TWL6040_MCLK_MSK;
  786. switch (freq) {
  787. case 12000000:
  788. /* mclk input, pll enabled */
  789. hppllctl |= TWL6040_MCLK_12000KHZ |
  790. TWL6040_HPLLSQRBP |
  791. TWL6040_HPLLENA;
  792. break;
  793. case 19200000:
  794. /* mclk input, pll disabled */
  795. hppllctl |= TWL6040_MCLK_19200KHZ |
  796. TWL6040_HPLLSQRENA |
  797. TWL6040_HPLLBP;
  798. break;
  799. case 26000000:
  800. /* mclk input, pll enabled */
  801. hppllctl |= TWL6040_MCLK_26000KHZ |
  802. TWL6040_HPLLSQRBP |
  803. TWL6040_HPLLENA;
  804. break;
  805. case 38400000:
  806. /* clk slicer, pll disabled */
  807. hppllctl |= TWL6040_MCLK_38400KHZ |
  808. TWL6040_HPLLSQRENA |
  809. TWL6040_HPLLBP;
  810. break;
  811. default:
  812. dev_err(codec->dev, "unknown mclk freq %d\n", freq);
  813. return -EINVAL;
  814. }
  815. /* headset dac and driver must be in high-performance mode */
  816. headset_power_mode(codec, 1);
  817. twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl);
  818. udelay(500);
  819. lppllctl |= TWL6040_HPLLSEL;
  820. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  821. lppllctl &= ~TWL6040_LPLLENA;
  822. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  823. /* high-performance pll can provide only 19.2 MHz */
  824. priv->pll = TWL6040_HPPLL_ID;
  825. priv->sysclk = 19200000;
  826. priv->sysclk_constraints = &hp_constraints;
  827. break;
  828. default:
  829. dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
  830. return -EINVAL;
  831. }
  832. return 0;
  833. }
  834. static struct snd_soc_dai_ops twl6040_dai_ops = {
  835. .startup = twl6040_startup,
  836. .hw_params = twl6040_hw_params,
  837. .trigger = twl6040_trigger,
  838. .set_sysclk = twl6040_set_dai_sysclk,
  839. };
  840. static struct snd_soc_dai_driver twl6040_dai = {
  841. .name = "twl6040-hifi",
  842. .playback = {
  843. .stream_name = "Playback",
  844. .channels_min = 1,
  845. .channels_max = 4,
  846. .rates = TWL6040_RATES,
  847. .formats = TWL6040_FORMATS,
  848. },
  849. .capture = {
  850. .stream_name = "Capture",
  851. .channels_min = 1,
  852. .channels_max = 2,
  853. .rates = TWL6040_RATES,
  854. .formats = TWL6040_FORMATS,
  855. },
  856. .ops = &twl6040_dai_ops,
  857. };
  858. #ifdef CONFIG_PM
  859. static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
  860. {
  861. twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
  862. return 0;
  863. }
  864. static int twl6040_resume(struct snd_soc_codec *codec)
  865. {
  866. twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  867. return 0;
  868. }
  869. #else
  870. #define twl6040_suspend NULL
  871. #define twl6040_resume NULL
  872. #endif
  873. static int twl6040_probe(struct snd_soc_codec *codec)
  874. {
  875. struct twl4030_codec_data *twl_codec = codec->dev->platform_data;
  876. struct twl6040_data *priv;
  877. int audpwron, naudint;
  878. int ret = 0;
  879. priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
  880. if (priv == NULL)
  881. return -ENOMEM;
  882. snd_soc_codec_set_drvdata(codec, priv);
  883. if (twl_codec) {
  884. audpwron = twl_codec->audpwron_gpio;
  885. naudint = twl_codec->naudint_irq;
  886. } else {
  887. audpwron = -EINVAL;
  888. naudint = 0;
  889. }
  890. priv->audpwron = audpwron;
  891. priv->naudint = naudint;
  892. init_completion(&priv->ready);
  893. if (gpio_is_valid(audpwron)) {
  894. ret = gpio_request(audpwron, "audpwron");
  895. if (ret)
  896. goto gpio1_err;
  897. ret = gpio_direction_output(audpwron, 0);
  898. if (ret)
  899. goto gpio2_err;
  900. priv->codec_powered = 0;
  901. }
  902. if (naudint) {
  903. /* audio interrupt */
  904. ret = request_threaded_irq(naudint, NULL,
  905. twl6040_naudint_handler,
  906. IRQF_TRIGGER_LOW | IRQF_ONESHOT,
  907. "twl6040_codec", codec);
  908. if (ret)
  909. goto gpio2_err;
  910. } else {
  911. if (gpio_is_valid(audpwron)) {
  912. /* enable only codec ready interrupt */
  913. twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
  914. ~TWL6040_READYMSK & TWL6040_ALLINT_MSK);
  915. } else {
  916. /* no interrupts at all */
  917. twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
  918. TWL6040_ALLINT_MSK);
  919. }
  920. }
  921. /* init vio registers */
  922. twl6040_init_vio_regs(codec);
  923. /* power on device */
  924. ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  925. if (ret)
  926. goto irq_err;
  927. snd_soc_add_controls(codec, twl6040_snd_controls,
  928. ARRAY_SIZE(twl6040_snd_controls));
  929. twl6040_add_widgets(codec);
  930. return 0;
  931. irq_err:
  932. if (naudint)
  933. free_irq(naudint, codec);
  934. gpio2_err:
  935. if (gpio_is_valid(audpwron))
  936. gpio_free(audpwron);
  937. gpio1_err:
  938. kfree(priv);
  939. return ret;
  940. }
  941. static int twl6040_remove(struct snd_soc_codec *codec)
  942. {
  943. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  944. int audpwron = priv->audpwron;
  945. int naudint = priv->naudint;
  946. twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
  947. if (gpio_is_valid(audpwron))
  948. gpio_free(audpwron);
  949. if (naudint)
  950. free_irq(naudint, codec);
  951. kfree(priv);
  952. return 0;
  953. }
  954. static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
  955. .probe = twl6040_probe,
  956. .remove = twl6040_remove,
  957. .suspend = twl6040_suspend,
  958. .resume = twl6040_resume,
  959. .read = twl6040_read_reg_cache,
  960. .write = twl6040_write,
  961. .set_bias_level = twl6040_set_bias_level,
  962. .reg_cache_size = ARRAY_SIZE(twl6040_reg),
  963. .reg_word_size = sizeof(u8),
  964. .reg_cache_default = twl6040_reg,
  965. };
  966. static int __devinit twl6040_codec_probe(struct platform_device *pdev)
  967. {
  968. return snd_soc_register_codec(&pdev->dev,
  969. &soc_codec_dev_twl6040, &twl6040_dai, 1);
  970. }
  971. static int __devexit twl6040_codec_remove(struct platform_device *pdev)
  972. {
  973. snd_soc_unregister_codec(&pdev->dev);
  974. return 0;
  975. }
  976. static struct platform_driver twl6040_codec_driver = {
  977. .driver = {
  978. .name = "twl6040-codec",
  979. .owner = THIS_MODULE,
  980. },
  981. .probe = twl6040_codec_probe,
  982. .remove = __devexit_p(twl6040_codec_remove),
  983. };
  984. static int __init twl6040_codec_init(void)
  985. {
  986. return platform_driver_register(&twl6040_codec_driver);
  987. }
  988. module_init(twl6040_codec_init);
  989. static void __exit twl6040_codec_exit(void)
  990. {
  991. platform_driver_unregister(&twl6040_codec_driver);
  992. }
  993. module_exit(twl6040_codec_exit);
  994. MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
  995. MODULE_AUTHOR("Misael Lopez Cruz");
  996. MODULE_LICENSE("GPL");