i6300esb.c 13 KB

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  1. /*
  2. * i6300esb 0.03: Watchdog timer driver for Intel 6300ESB chipset
  3. *
  4. * (c) Copyright 2004 Google Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. *
  11. * based on i810-tco.c which is
  12. *
  13. * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>
  14. * developed for
  15. * Jentro AG, Haar/Munich (Germany)
  16. *
  17. * which is in turn based on softdog.c by Alan Cox <alan@redhat.com>
  18. *
  19. * The timer is implemented in the following I/O controller hubs:
  20. * (See the intel documentation on http://developer.intel.com.)
  21. * 6300ESB chip : document number 300641-003
  22. *
  23. * 2004YYZZ Ross Biro
  24. * Initial version 0.01
  25. * 2004YYZZ Ross Biro
  26. * Version 0.02
  27. * 20050210 David Härdeman <david@2gen.com>
  28. * Ported driver to kernel 2.6
  29. */
  30. /*
  31. * Includes, defines, variables, module parameters, ...
  32. */
  33. #include <linux/module.h>
  34. #include <linux/types.h>
  35. #include <linux/kernel.h>
  36. #include <linux/fs.h>
  37. #include <linux/mm.h>
  38. #include <linux/miscdevice.h>
  39. #include <linux/watchdog.h>
  40. #include <linux/reboot.h>
  41. #include <linux/init.h>
  42. #include <linux/pci.h>
  43. #include <linux/ioport.h>
  44. #include <asm/uaccess.h>
  45. #include <asm/io.h>
  46. #include "i6300esb.h"
  47. /* Module and version information */
  48. #define ESB_VERSION "0.03"
  49. #define ESB_MODULE_NAME "i6300ESB timer"
  50. #define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
  51. #define PFX ESB_MODULE_NAME ": "
  52. /* internal variables */
  53. static void __iomem *BASEADDR;
  54. static spinlock_t esb_lock; /* Guards the hardware */
  55. static unsigned long timer_alive;
  56. static struct pci_dev *esb_pci;
  57. static unsigned short triggered; /* The status of the watchdog upon boot */
  58. static char esb_expect_close;
  59. /* module parameters */
  60. #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat (1<heartbeat<2*1023) */
  61. static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
  62. module_param(heartbeat, int, 0);
  63. MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<heartbeat<2046, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
  64. #ifdef CONFIG_WATCHDOG_NOWAYOUT
  65. static int nowayout = 1;
  66. #else
  67. static int nowayout = 0;
  68. #endif
  69. module_param(nowayout, int, 0);
  70. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
  71. /*
  72. * Some i6300ESB specific functions
  73. */
  74. /*
  75. * Prepare for reloading the timer by unlocking the proper registers.
  76. * This is performed by first writing 0x80 followed by 0x86 to the
  77. * reload register. After this the appropriate registers can be written
  78. * to once before they need to be unlocked again.
  79. */
  80. static inline void esb_unlock_registers(void) {
  81. writeb(ESB_UNLOCK1, ESB_RELOAD_REG);
  82. writeb(ESB_UNLOCK2, ESB_RELOAD_REG);
  83. }
  84. static void esb_timer_start(void)
  85. {
  86. u8 val;
  87. /* Enable or Enable + Lock? */
  88. val = 0x02 | (nowayout ? 0x01 : 0x00);
  89. pci_write_config_byte(esb_pci, ESB_LOCK_REG, val);
  90. }
  91. static int esb_timer_stop(void)
  92. {
  93. u8 val;
  94. spin_lock(&esb_lock);
  95. /* First, reset timers as suggested by the docs */
  96. esb_unlock_registers();
  97. writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
  98. /* Then disable the WDT */
  99. pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x0);
  100. pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val);
  101. spin_unlock(&esb_lock);
  102. /* Returns 0 if the timer was disabled, non-zero otherwise */
  103. return (val & 0x01);
  104. }
  105. static void esb_timer_keepalive(void)
  106. {
  107. spin_lock(&esb_lock);
  108. esb_unlock_registers();
  109. writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
  110. /* FIXME: Do we need to flush anything here? */
  111. spin_unlock(&esb_lock);
  112. }
  113. static int esb_timer_set_heartbeat(int time)
  114. {
  115. u32 val;
  116. if (time < 0x1 || time > (2 * 0x03ff))
  117. return -EINVAL;
  118. spin_lock(&esb_lock);
  119. /* We shift by 9, so if we are passed a value of 1 sec,
  120. * val will be 1 << 9 = 512, then write that to two
  121. * timers => 2 * 512 = 1024 (which is decremented at 1KHz)
  122. */
  123. val = time << 9;
  124. /* Write timer 1 */
  125. esb_unlock_registers();
  126. writel(val, ESB_TIMER1_REG);
  127. /* Write timer 2 */
  128. esb_unlock_registers();
  129. writel(val, ESB_TIMER2_REG);
  130. /* Reload */
  131. esb_unlock_registers();
  132. writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
  133. /* FIXME: Do we need to flush everything out? */
  134. /* Done */
  135. heartbeat = time;
  136. spin_unlock(&esb_lock);
  137. return 0;
  138. }
  139. static int esb_timer_read (void)
  140. {
  141. u32 count;
  142. /* This isn't documented, and doesn't take into
  143. * acount which stage is running, but it looks
  144. * like a 20 bit count down, so we might as well report it.
  145. */
  146. pci_read_config_dword(esb_pci, 0x64, &count);
  147. return (int)count;
  148. }
  149. /*
  150. * /dev/watchdog handling
  151. */
  152. static int esb_open (struct inode *inode, struct file *file)
  153. {
  154. /* /dev/watchdog can only be opened once */
  155. if (test_and_set_bit(0, &timer_alive))
  156. return -EBUSY;
  157. /* Reload and activate timer */
  158. esb_timer_keepalive ();
  159. esb_timer_start ();
  160. return nonseekable_open(inode, file);
  161. }
  162. static int esb_release (struct inode *inode, struct file *file)
  163. {
  164. /* Shut off the timer. */
  165. if (esb_expect_close == 42) {
  166. esb_timer_stop ();
  167. } else {
  168. printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
  169. esb_timer_keepalive ();
  170. }
  171. clear_bit(0, &timer_alive);
  172. esb_expect_close = 0;
  173. return 0;
  174. }
  175. static ssize_t esb_write (struct file *file, const char __user *data,
  176. size_t len, loff_t * ppos)
  177. {
  178. /* See if we got the magic character 'V' and reload the timer */
  179. if (len) {
  180. if (!nowayout) {
  181. size_t i;
  182. /* note: just in case someone wrote the magic character
  183. * five months ago... */
  184. esb_expect_close = 0;
  185. /* scan to see whether or not we got the magic character */
  186. for (i = 0; i != len; i++) {
  187. char c;
  188. if(get_user(c, data+i))
  189. return -EFAULT;
  190. if (c == 'V')
  191. esb_expect_close = 42;
  192. }
  193. }
  194. /* someone wrote to us, we should reload the timer */
  195. esb_timer_keepalive ();
  196. }
  197. return len;
  198. }
  199. static int esb_ioctl (struct inode *inode, struct file *file,
  200. unsigned int cmd, unsigned long arg)
  201. {
  202. int new_options, retval = -EINVAL;
  203. int new_heartbeat;
  204. void __user *argp = (void __user *)arg;
  205. int __user *p = argp;
  206. static struct watchdog_info ident = {
  207. .options = WDIOF_SETTIMEOUT |
  208. WDIOF_KEEPALIVEPING |
  209. WDIOF_MAGICCLOSE,
  210. .firmware_version = 0,
  211. .identity = ESB_MODULE_NAME,
  212. };
  213. switch (cmd) {
  214. case WDIOC_GETSUPPORT:
  215. return copy_to_user(argp, &ident,
  216. sizeof (ident)) ? -EFAULT : 0;
  217. case WDIOC_GETSTATUS:
  218. return put_user (esb_timer_read(), p);
  219. case WDIOC_GETBOOTSTATUS:
  220. return put_user (triggered, p);
  221. case WDIOC_KEEPALIVE:
  222. esb_timer_keepalive ();
  223. return 0;
  224. case WDIOC_SETOPTIONS:
  225. {
  226. if (get_user (new_options, p))
  227. return -EFAULT;
  228. if (new_options & WDIOS_DISABLECARD) {
  229. esb_timer_stop ();
  230. retval = 0;
  231. }
  232. if (new_options & WDIOS_ENABLECARD) {
  233. esb_timer_keepalive ();
  234. esb_timer_start ();
  235. retval = 0;
  236. }
  237. return retval;
  238. }
  239. case WDIOC_SETTIMEOUT:
  240. {
  241. if (get_user(new_heartbeat, p))
  242. return -EFAULT;
  243. if (esb_timer_set_heartbeat(new_heartbeat))
  244. return -EINVAL;
  245. esb_timer_keepalive ();
  246. /* Fall */
  247. }
  248. case WDIOC_GETTIMEOUT:
  249. return put_user(heartbeat, p);
  250. default:
  251. return -ENOIOCTLCMD;
  252. }
  253. }
  254. /*
  255. * Notify system
  256. */
  257. static int esb_notify_sys (struct notifier_block *this, unsigned long code, void *unused)
  258. {
  259. if (code==SYS_DOWN || code==SYS_HALT) {
  260. /* Turn the WDT off */
  261. esb_timer_stop ();
  262. }
  263. return NOTIFY_DONE;
  264. }
  265. /*
  266. * Kernel Interfaces
  267. */
  268. static struct file_operations esb_fops = {
  269. .owner = THIS_MODULE,
  270. .llseek = no_llseek,
  271. .write = esb_write,
  272. .ioctl = esb_ioctl,
  273. .open = esb_open,
  274. .release = esb_release,
  275. };
  276. static struct miscdevice esb_miscdev = {
  277. .minor = WATCHDOG_MINOR,
  278. .name = "watchdog",
  279. .fops = &esb_fops,
  280. };
  281. static struct notifier_block esb_notifier = {
  282. .notifier_call = esb_notify_sys,
  283. };
  284. /*
  285. * Data for PCI driver interface
  286. *
  287. * This data only exists for exporting the supported
  288. * PCI ids via MODULE_DEVICE_TABLE. We do not actually
  289. * register a pci_driver, because someone else might one day
  290. * want to register another driver on the same PCI id.
  291. */
  292. static struct pci_device_id esb_pci_tbl[] = {
  293. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9, PCI_ANY_ID, PCI_ANY_ID, },
  294. { 0, }, /* End of list */
  295. };
  296. MODULE_DEVICE_TABLE (pci, esb_pci_tbl);
  297. /*
  298. * Init & exit routines
  299. */
  300. static unsigned char __init esb_getdevice (void)
  301. {
  302. u8 val1;
  303. unsigned short val2;
  304. struct pci_dev *dev = NULL;
  305. /*
  306. * Find the PCI device
  307. */
  308. for_each_pci_dev(dev)
  309. if (pci_match_device(esb_pci_tbl, dev)) {
  310. esb_pci = dev;
  311. break;
  312. }
  313. if (esb_pci) {
  314. if (pci_enable_device(esb_pci)) {
  315. printk (KERN_ERR PFX "failed to enable device\n");
  316. goto out;
  317. }
  318. if (pci_request_region(esb_pci, 0, ESB_MODULE_NAME)) {
  319. printk (KERN_ERR PFX "failed to request region\n");
  320. goto err_disable;
  321. }
  322. BASEADDR = ioremap(pci_resource_start(esb_pci, 0),
  323. pci_resource_len(esb_pci, 0));
  324. if (BASEADDR == NULL) {
  325. /* Something's wrong here, BASEADDR has to be set */
  326. printk (KERN_ERR PFX "failed to get BASEADDR\n");
  327. goto err_release;
  328. }
  329. /*
  330. * The watchdog has two timers, it can be setup so that the
  331. * expiry of timer1 results in an interrupt and the expiry of
  332. * timer2 results in a reboot. We set it to not generate
  333. * any interrupts as there is not much we can do with it
  334. * right now.
  335. *
  336. * We also enable reboots and set the timer frequency to
  337. * the PCI clock divided by 2^15 (approx 1KHz).
  338. */
  339. pci_write_config_word(esb_pci, ESB_CONFIG_REG, 0x0003);
  340. /* Check that the WDT isn't already locked */
  341. pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1);
  342. if (val1 & ESB_WDT_LOCK)
  343. printk (KERN_WARNING PFX "nowayout already set\n");
  344. /* Set the timer to watchdog mode and disable it for now */
  345. pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00);
  346. /* Check if the watchdog was previously triggered */
  347. esb_unlock_registers();
  348. val2 = readw(ESB_RELOAD_REG);
  349. triggered = (val2 & (0x01 << 9) >> 9);
  350. /* Reset trigger flag and timers */
  351. esb_unlock_registers();
  352. writew((0x11 << 8), ESB_RELOAD_REG);
  353. /* Done */
  354. return 1;
  355. err_release:
  356. pci_release_region(esb_pci, 0);
  357. err_disable:
  358. pci_disable_device(esb_pci);
  359. pci_dev_put(esb_pci);
  360. }
  361. out:
  362. return 0;
  363. }
  364. static int __init watchdog_init (void)
  365. {
  366. int ret;
  367. spin_lock_init(&esb_lock);
  368. /* Check whether or not the hardware watchdog is there */
  369. if (!esb_getdevice () || esb_pci == NULL)
  370. return -ENODEV;
  371. /* Check that the heartbeat value is within it's range ; if not reset to the default */
  372. if (esb_timer_set_heartbeat (heartbeat)) {
  373. esb_timer_set_heartbeat (WATCHDOG_HEARTBEAT);
  374. printk(KERN_INFO PFX "heartbeat value must be 1<heartbeat<2046, using %d\n",
  375. heartbeat);
  376. }
  377. ret = register_reboot_notifier(&esb_notifier);
  378. if (ret != 0) {
  379. printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
  380. ret);
  381. goto err_unmap;
  382. }
  383. ret = misc_register(&esb_miscdev);
  384. if (ret != 0) {
  385. printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
  386. WATCHDOG_MINOR, ret);
  387. goto err_notifier;
  388. }
  389. esb_timer_stop ();
  390. printk (KERN_INFO PFX "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
  391. BASEADDR, heartbeat, nowayout);
  392. return 0;
  393. err_notifier:
  394. unregister_reboot_notifier(&esb_notifier);
  395. err_unmap:
  396. iounmap(BASEADDR);
  397. /* err_release: */
  398. pci_release_region(esb_pci, 0);
  399. /* err_disable: */
  400. pci_disable_device(esb_pci);
  401. pci_dev_put(esb_pci);
  402. /* out: */
  403. return ret;
  404. }
  405. static void __exit watchdog_cleanup (void)
  406. {
  407. /* Stop the timer before we leave */
  408. if (!nowayout)
  409. esb_timer_stop ();
  410. /* Deregister */
  411. misc_deregister(&esb_miscdev);
  412. unregister_reboot_notifier(&esb_notifier);
  413. iounmap(BASEADDR);
  414. pci_release_region(esb_pci, 0);
  415. pci_disable_device(esb_pci);
  416. pci_dev_put(esb_pci);
  417. }
  418. module_init(watchdog_init);
  419. module_exit(watchdog_cleanup);
  420. MODULE_AUTHOR("Ross Biro and David Härdeman");
  421. MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets");
  422. MODULE_LICENSE("GPL");
  423. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);