probe_roms.h 5.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161
  1. /*
  2. * This file is provided under a dual BSD/GPLv2 license. When using or
  3. * redistributing this file, you may do so under either license.
  4. *
  5. * GPL LICENSE SUMMARY
  6. *
  7. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * BSD LICENSE
  25. *
  26. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  27. * All rights reserved.
  28. *
  29. * Redistribution and use in source and binary forms, with or without
  30. * modification, are permitted provided that the following conditions
  31. * are met:
  32. *
  33. * * Redistributions of source code must retain the above copyright
  34. * notice, this list of conditions and the following disclaimer.
  35. * * Redistributions in binary form must reproduce the above copyright
  36. * notice, this list of conditions and the following disclaimer in
  37. * the documentation and/or other materials provided with the
  38. * distribution.
  39. * * Neither the name of Intel Corporation nor the names of its
  40. * contributors may be used to endorse or promote products derived
  41. * from this software without specific prior written permission.
  42. *
  43. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  45. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  46. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  47. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  48. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  49. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  50. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  51. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  52. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  53. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  54. */
  55. #ifndef _ISCI_PROBE_ROMS_H_
  56. #define _ISCI_PROBE_ROMS_H_
  57. #ifdef __KERNEL__
  58. #include <linux/firmware.h>
  59. #include <linux/pci.h>
  60. #include "isci.h"
  61. struct isci_orom *isci_request_oprom(struct pci_dev *pdev);
  62. union scic_oem_parameters;
  63. struct isci_orom;
  64. enum sci_status isci_parse_oem_parameters(
  65. union scic_oem_parameters *oem_params,
  66. struct isci_orom *orom,
  67. int scu_index);
  68. struct isci_orom *isci_request_firmware(struct pci_dev *pdev, const struct firmware *fw);
  69. struct isci_orom *isci_get_efi_var(struct pci_dev *pdev);
  70. struct isci_oem_hdr {
  71. u8 sig[4];
  72. u8 rev_major;
  73. u8 rev_minor;
  74. u16 len;
  75. u8 checksum;
  76. u8 reserved1;
  77. u16 reserved2;
  78. } __attribute__ ((packed));
  79. #else
  80. #define SCI_MAX_PORTS 4
  81. #define SCI_MAX_PHYS 4
  82. #define SCI_MAX_CONTROLLERS 2
  83. #endif
  84. #define ISCI_FW_NAME "isci/isci_firmware.bin"
  85. #define ROMSIGNATURE 0xaa55
  86. #define ISCI_OEM_SIG "$OEM"
  87. #define ISCI_OEM_SIG_SIZE 4
  88. #define ISCI_ROM_SIG "ISCUOEMB"
  89. #define ISCI_ROM_SIG_SIZE 8
  90. #define ISCI_EFI_VENDOR_GUID \
  91. EFI_GUID(0x193dfefa, 0xa445, 0x4302, 0x99, 0xd8, 0xef, 0x3a, 0xad, \
  92. 0x1a, 0x04, 0xc6)
  93. #define ISCI_EFI_ATTRIBUTES 0
  94. #define ISCI_EFI_VAR_NAME "RstScuO"
  95. /* Allowed PORT configuration modes APC Automatic PORT configuration mode is
  96. * defined by the OEM configuration parameters providing no PHY_MASK parameters
  97. * for any PORT. i.e. There are no phys assigned to any of the ports at start.
  98. * MPC Manual PORT configuration mode is defined by the OEM configuration
  99. * parameters providing a PHY_MASK value for any PORT. It is assumed that any
  100. * PORT with no PHY_MASK is an invalid port and not all PHYs must be assigned.
  101. * A PORT_PHY mask that assigns just a single PHY to a port and no other PHYs
  102. * being assigned is sufficient to declare manual PORT configuration.
  103. */
  104. enum scic_port_configuration_mode {
  105. SCIC_PORT_MANUAL_CONFIGURATION_MODE = 0,
  106. SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE = 1
  107. };
  108. struct sci_bios_oem_param_block_hdr {
  109. uint8_t signature[ISCI_ROM_SIG_SIZE];
  110. uint16_t total_block_length;
  111. uint8_t hdr_length;
  112. uint8_t version;
  113. uint8_t preboot_source;
  114. uint8_t num_elements;
  115. uint16_t element_length;
  116. uint8_t reserved[8];
  117. } __attribute__ ((packed));
  118. struct scic_sds_oem_params {
  119. struct {
  120. uint8_t mode_type;
  121. uint8_t max_concurrent_dev_spin_up;
  122. uint8_t do_enable_ssc;
  123. uint8_t reserved;
  124. } controller;
  125. struct {
  126. uint8_t phy_mask;
  127. } ports[SCI_MAX_PORTS];
  128. struct sci_phy_oem_params {
  129. struct {
  130. uint32_t high;
  131. uint32_t low;
  132. } sas_address;
  133. uint32_t afe_tx_amp_control0;
  134. uint32_t afe_tx_amp_control1;
  135. uint32_t afe_tx_amp_control2;
  136. uint32_t afe_tx_amp_control3;
  137. } phys[SCI_MAX_PHYS];
  138. } __attribute__ ((packed));
  139. struct isci_orom {
  140. struct sci_bios_oem_param_block_hdr hdr;
  141. struct scic_sds_oem_params ctrl[SCI_MAX_CONTROLLERS];
  142. } __attribute__ ((packed));
  143. #endif