devices-msm7x30.c 6.2 KB

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  1. /*
  2. * Copyright (C) 2008 Google, Inc.
  3. * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
  4. *
  5. * This software is licensed under the terms of the GNU General Public
  6. * License version 2, as published by the Free Software Foundation, and
  7. * may be copied, distributed, and modified under those terms.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <mach/irqs.h>
  19. #include <mach/msm_iomap.h>
  20. #include <mach/dma.h>
  21. #include <mach/board.h>
  22. #include "devices.h"
  23. #include "smd_private.h"
  24. #include <asm/mach/flash.h>
  25. #include "clock-pcom.h"
  26. #include "clock-7x30.h"
  27. #include <mach/mmc.h>
  28. static struct resource resources_uart2[] = {
  29. {
  30. .start = INT_UART2,
  31. .end = INT_UART2,
  32. .flags = IORESOURCE_IRQ,
  33. },
  34. {
  35. .start = MSM_UART2_PHYS,
  36. .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
  37. .flags = IORESOURCE_MEM,
  38. },
  39. };
  40. struct platform_device msm_device_uart2 = {
  41. .name = "msm_serial",
  42. .id = 1,
  43. .num_resources = ARRAY_SIZE(resources_uart2),
  44. .resource = resources_uart2,
  45. };
  46. struct platform_device msm_device_smd = {
  47. .name = "msm_smd",
  48. .id = -1,
  49. };
  50. static struct resource resources_otg[] = {
  51. {
  52. .start = MSM_HSUSB_PHYS,
  53. .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
  54. .flags = IORESOURCE_MEM,
  55. },
  56. {
  57. .start = INT_USB_HS,
  58. .end = INT_USB_HS,
  59. .flags = IORESOURCE_IRQ,
  60. },
  61. };
  62. struct platform_device msm_device_otg = {
  63. .name = "msm_otg",
  64. .id = -1,
  65. .num_resources = ARRAY_SIZE(resources_otg),
  66. .resource = resources_otg,
  67. .dev = {
  68. .coherent_dma_mask = 0xffffffff,
  69. },
  70. };
  71. static struct resource resources_hsusb[] = {
  72. {
  73. .start = MSM_HSUSB_PHYS,
  74. .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
  75. .flags = IORESOURCE_MEM,
  76. },
  77. {
  78. .start = INT_USB_HS,
  79. .end = INT_USB_HS,
  80. .flags = IORESOURCE_IRQ,
  81. },
  82. };
  83. struct platform_device msm_device_hsusb = {
  84. .name = "msm_hsusb",
  85. .id = -1,
  86. .num_resources = ARRAY_SIZE(resources_hsusb),
  87. .resource = resources_hsusb,
  88. .dev = {
  89. .coherent_dma_mask = 0xffffffff,
  90. },
  91. };
  92. static u64 dma_mask = 0xffffffffULL;
  93. static struct resource resources_hsusb_host[] = {
  94. {
  95. .start = MSM_HSUSB_PHYS,
  96. .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
  97. .flags = IORESOURCE_MEM,
  98. },
  99. {
  100. .start = INT_USB_HS,
  101. .end = INT_USB_HS,
  102. .flags = IORESOURCE_IRQ,
  103. },
  104. };
  105. struct platform_device msm_device_hsusb_host = {
  106. .name = "msm_hsusb_host",
  107. .id = -1,
  108. .num_resources = ARRAY_SIZE(resources_hsusb_host),
  109. .resource = resources_hsusb_host,
  110. .dev = {
  111. .dma_mask = &dma_mask,
  112. .coherent_dma_mask = 0xffffffffULL,
  113. },
  114. };
  115. struct clk msm_clocks_7x30[] = {
  116. CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
  117. CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0),
  118. CLK_PCOM("cam_m_clk", CAM_M_CLK, NULL, 0),
  119. CLK_PCOM("camif_pad_pclk", CAMIF_PAD_P_CLK, NULL, OFF),
  120. CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN),
  121. CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
  122. CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX),
  123. CLK_PCOM("emdh_pclk", EMDH_P_CLK, NULL, OFF),
  124. CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
  125. CLK_PCOM("grp_2d_clk", GRP_2D_CLK, NULL, 0),
  126. CLK_PCOM("grp_2d_pclk", GRP_2D_P_CLK, NULL, 0),
  127. CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0),
  128. CLK_PCOM("grp_pclk", GRP_3D_P_CLK, NULL, 0),
  129. CLK_7X30S("grp_src_clk", GRP_3D_SRC_CLK, GRP_3D_CLK, NULL, 0),
  130. CLK_PCOM("hdmi_clk", HDMI_CLK, NULL, 0),
  131. CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
  132. CLK_PCOM("jpeg_clk", JPEG_CLK, NULL, OFF),
  133. CLK_PCOM("jpeg_pclk", JPEG_P_CLK, NULL, OFF),
  134. CLK_PCOM("lpa_codec_clk", LPA_CODEC_CLK, NULL, 0),
  135. CLK_PCOM("lpa_core_clk", LPA_CORE_CLK, NULL, 0),
  136. CLK_PCOM("lpa_pclk", LPA_P_CLK, NULL, 0),
  137. CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0),
  138. CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX),
  139. CLK_PCOM("mddi_pclk", PMDH_P_CLK, NULL, 0),
  140. CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF),
  141. CLK_PCOM("mdp_pclk", MDP_P_CLK, NULL, 0),
  142. CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0),
  143. CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0),
  144. CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0),
  145. CLK_PCOM("mfc_clk", MFC_CLK, NULL, 0),
  146. CLK_PCOM("mfc_div2_clk", MFC_DIV2_CLK, NULL, 0),
  147. CLK_PCOM("mfc_pclk", MFC_P_CLK, NULL, 0),
  148. CLK_PCOM("mi2s_m_clk", MI2S_M_CLK, NULL, 0),
  149. CLK_PCOM("mi2s_s_clk", MI2S_S_CLK, NULL, 0),
  150. CLK_PCOM("mi2s_codec_rx_m_clk", MI2S_CODEC_RX_M_CLK, NULL, 0),
  151. CLK_PCOM("mi2s_codec_rx_s_clk", MI2S_CODEC_RX_S_CLK, NULL, 0),
  152. CLK_PCOM("mi2s_codec_tx_m_clk", MI2S_CODEC_TX_M_CLK, NULL, 0),
  153. CLK_PCOM("mi2s_codec_tx_s_clk", MI2S_CODEC_TX_S_CLK, NULL, 0),
  154. CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN),
  155. CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0),
  156. CLK_PCOM("rotator_clk", AXI_ROTATOR_CLK, NULL, 0),
  157. CLK_PCOM("rotator_imem_clk", ROTATOR_IMEM_CLK, NULL, OFF),
  158. CLK_PCOM("rotator_pclk", ROTATOR_P_CLK, NULL, OFF),
  159. CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF),
  160. CLK_PCOM("spi_clk", SPI_CLK, NULL, 0),
  161. CLK_PCOM("spi_pclk", SPI_P_CLK, NULL, 0),
  162. CLK_7X30S("tv_src_clk", TV_CLK, TV_ENC_CLK, NULL, 0),
  163. CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
  164. CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
  165. CLK_PCOM("uart_clk", UART2_CLK, &msm_device_uart2.dev, 0),
  166. CLK_PCOM("usb_phy_clk", USB_PHY_CLK, NULL, 0),
  167. CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF),
  168. CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF),
  169. CLK_PCOM("usb_hs_core_clk", USB_HS_CORE_CLK, NULL, OFF),
  170. CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF),
  171. CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF),
  172. CLK_PCOM("usb_hs2_core_clk", USB_HS2_CORE_CLK, NULL, OFF),
  173. CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF),
  174. CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF),
  175. CLK_PCOM("usb_hs3_core_clk", USB_HS3_CORE_CLK, NULL, OFF),
  176. CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF | CLK_MIN),
  177. CLK_PCOM("vfe_camif_clk", VFE_CAMIF_CLK, NULL, 0),
  178. CLK_PCOM("vfe_clk", VFE_CLK, NULL, 0),
  179. CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, 0),
  180. CLK_PCOM("vfe_pclk", VFE_P_CLK, NULL, OFF),
  181. CLK_PCOM("vpe_clk", VPE_CLK, NULL, 0),
  182. /* 7x30 v2 hardware only. */
  183. CLK_PCOM("csi_clk", CSI0_CLK, NULL, 0),
  184. CLK_PCOM("csi_pclk", CSI0_P_CLK, NULL, 0),
  185. CLK_PCOM("csi_vfe_clk", CSI0_VFE_CLK, NULL, 0),
  186. };
  187. unsigned msm_num_clocks_7x30 = ARRAY_SIZE(msm_clocks_7x30);