processor_idle.c 35 KB

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  1. /*
  2. * processor_idle - idle state submodule to the ACPI processor driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
  8. * - Added processor hotplug support
  9. * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
  10. * - Added support for C3 on SMP
  11. *
  12. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or (at
  17. * your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful, but
  20. * WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  22. * General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License along
  25. * with this program; if not, write to the Free Software Foundation, Inc.,
  26. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27. *
  28. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/cpufreq.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/seq_file.h>
  36. #include <linux/acpi.h>
  37. #include <linux/dmi.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/sched.h> /* need_resched() */
  40. #include <linux/latency.h>
  41. #include <linux/clockchips.h>
  42. /*
  43. * Include the apic definitions for x86 to have the APIC timer related defines
  44. * available also for UP (on SMP it gets magically included via linux/smp.h).
  45. * asm/acpi.h is not an option, as it would require more include magic. Also
  46. * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
  47. */
  48. #ifdef CONFIG_X86
  49. #include <asm/apic.h>
  50. #endif
  51. /*
  52. * Include the apic definitions for x86 to have the APIC timer related defines
  53. * available also for UP (on SMP it gets magically included via linux/smp.h).
  54. */
  55. #ifdef CONFIG_X86
  56. #include <asm/apic.h>
  57. #endif
  58. #include <asm/io.h>
  59. #include <asm/uaccess.h>
  60. #include <acpi/acpi_bus.h>
  61. #include <acpi/processor.h>
  62. #define ACPI_PROCESSOR_COMPONENT 0x01000000
  63. #define ACPI_PROCESSOR_CLASS "processor"
  64. #define _COMPONENT ACPI_PROCESSOR_COMPONENT
  65. ACPI_MODULE_NAME("processor_idle");
  66. #define ACPI_PROCESSOR_FILE_POWER "power"
  67. #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
  68. #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
  69. #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
  70. static void (*pm_idle_save) (void) __read_mostly;
  71. module_param(max_cstate, uint, 0644);
  72. static unsigned int nocst __read_mostly;
  73. module_param(nocst, uint, 0000);
  74. /*
  75. * bm_history -- bit-mask with a bit per jiffy of bus-master activity
  76. * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
  77. * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
  78. * 100 HZ: 0x0000000F: 4 jiffies = 40ms
  79. * reduce history for more aggressive entry into C3
  80. */
  81. static unsigned int bm_history __read_mostly =
  82. (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
  83. module_param(bm_history, uint, 0644);
  84. static unsigned use_ipi = 2;
  85. module_param(use_ipi, uint, 0644);
  86. MODULE_PARM_DESC(use_ipi, "IPI (vs. LAPIC) irqs for not waking up from C2/C3"
  87. " machines. 0=apic, 1=ipi, 2=auto\n");
  88. /* --------------------------------------------------------------------------
  89. Power Management
  90. -------------------------------------------------------------------------- */
  91. /*
  92. * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
  93. * For now disable this. Probably a bug somewhere else.
  94. *
  95. * To skip this limit, boot/load with a large max_cstate limit.
  96. */
  97. static int set_max_cstate(struct dmi_system_id *id)
  98. {
  99. if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
  100. return 0;
  101. printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
  102. " Override with \"processor.max_cstate=%d\"\n", id->ident,
  103. (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
  104. max_cstate = (long)id->driver_data;
  105. return 0;
  106. }
  107. /* Actually this shouldn't be __cpuinitdata, would be better to fix the
  108. callers to only run once -AK */
  109. static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
  110. { set_max_cstate, "IBM ThinkPad R40e", {
  111. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  112. DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
  113. { set_max_cstate, "IBM ThinkPad R40e", {
  114. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  115. DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
  116. { set_max_cstate, "IBM ThinkPad R40e", {
  117. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  118. DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
  119. { set_max_cstate, "IBM ThinkPad R40e", {
  120. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  121. DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
  122. { set_max_cstate, "IBM ThinkPad R40e", {
  123. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  124. DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
  125. { set_max_cstate, "IBM ThinkPad R40e", {
  126. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  127. DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
  128. { set_max_cstate, "IBM ThinkPad R40e", {
  129. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  130. DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
  131. { set_max_cstate, "IBM ThinkPad R40e", {
  132. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  133. DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
  134. { set_max_cstate, "IBM ThinkPad R40e", {
  135. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  136. DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
  137. { set_max_cstate, "IBM ThinkPad R40e", {
  138. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  139. DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
  140. { set_max_cstate, "IBM ThinkPad R40e", {
  141. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  142. DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
  143. { set_max_cstate, "IBM ThinkPad R40e", {
  144. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  145. DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
  146. { set_max_cstate, "IBM ThinkPad R40e", {
  147. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  148. DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
  149. { set_max_cstate, "IBM ThinkPad R40e", {
  150. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  151. DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
  152. { set_max_cstate, "IBM ThinkPad R40e", {
  153. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  154. DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
  155. { set_max_cstate, "IBM ThinkPad R40e", {
  156. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  157. DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
  158. { set_max_cstate, "Medion 41700", {
  159. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  160. DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
  161. { set_max_cstate, "Clevo 5600D", {
  162. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  163. DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
  164. (void *)2},
  165. {},
  166. };
  167. static inline u32 ticks_elapsed(u32 t1, u32 t2)
  168. {
  169. if (t2 >= t1)
  170. return (t2 - t1);
  171. else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
  172. return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
  173. else
  174. return ((0xFFFFFFFF - t1) + t2);
  175. }
  176. static void
  177. acpi_processor_power_activate(struct acpi_processor *pr,
  178. struct acpi_processor_cx *new)
  179. {
  180. struct acpi_processor_cx *old;
  181. if (!pr || !new)
  182. return;
  183. old = pr->power.state;
  184. if (old)
  185. old->promotion.count = 0;
  186. new->demotion.count = 0;
  187. /* Cleanup from old state. */
  188. if (old) {
  189. switch (old->type) {
  190. case ACPI_STATE_C3:
  191. /* Disable bus master reload */
  192. if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
  193. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
  194. break;
  195. }
  196. }
  197. /* Prepare to use new state. */
  198. switch (new->type) {
  199. case ACPI_STATE_C3:
  200. /* Enable bus master reload */
  201. if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
  202. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
  203. break;
  204. }
  205. pr->power.state = new;
  206. return;
  207. }
  208. static void acpi_safe_halt(void)
  209. {
  210. current_thread_info()->status &= ~TS_POLLING;
  211. /*
  212. * TS_POLLING-cleared state must be visible before we
  213. * test NEED_RESCHED:
  214. */
  215. smp_mb();
  216. if (!need_resched())
  217. safe_halt();
  218. current_thread_info()->status |= TS_POLLING;
  219. }
  220. static atomic_t c3_cpu_count;
  221. /* Common C-state entry for C2, C3, .. */
  222. static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
  223. {
  224. if (cstate->space_id == ACPI_CSTATE_FFH) {
  225. /* Call into architectural FFH based C-state */
  226. acpi_processor_ffh_cstate_enter(cstate);
  227. } else {
  228. int unused;
  229. /* IO port based C-state */
  230. inb(cstate->address);
  231. /* Dummy wait op - must do something useless after P_LVL2 read
  232. because chipsets cannot guarantee that STPCLK# signal
  233. gets asserted in time to freeze execution properly. */
  234. unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
  235. }
  236. }
  237. #ifdef ARCH_APICTIMER_STOPS_ON_C3
  238. /*
  239. * Some BIOS implementations switch to C3 in the published C2 state.
  240. * This seems to be a common problem on AMD boxen and Intel Dothan/Banias
  241. * Pentium M machines.
  242. */
  243. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  244. struct acpi_processor_cx *cx)
  245. {
  246. struct acpi_processor_power *pwr = &pr->power;
  247. /*
  248. * Check, if one of the previous states already marked the lapic
  249. * unstable
  250. */
  251. if (pwr->timer_broadcast_on_state < state)
  252. return;
  253. if (cx->type >= ACPI_STATE_C2) {
  254. if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
  255. pr->power.timer_broadcast_on_state = state;
  256. else if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
  257. boot_cpu_data.x86 == 6) &&
  258. (boot_cpu_data.x86_model == 13 ||
  259. boot_cpu_data.x86_model == 9))
  260. {
  261. pr->power.timer_broadcast_on_state = state;
  262. }
  263. }
  264. }
  265. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
  266. {
  267. #ifdef CONFIG_GENERIC_CLOCKEVENTS
  268. unsigned long reason;
  269. reason = pr->power.timer_broadcast_on_state < INT_MAX ?
  270. CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
  271. clockevents_notify(reason, &pr->id);
  272. #else
  273. cpumask_t mask = cpumask_of_cpu(pr->id);
  274. if (use_ipi == 0)
  275. on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
  276. else if (use_ipi == 1)
  277. on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
  278. else {
  279. if (pr->power.timer_broadcast_on_state < INT_MAX)
  280. on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
  281. else
  282. on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
  283. }
  284. #endif
  285. }
  286. /* Power(C) State timer broadcast control */
  287. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  288. struct acpi_processor_cx *cx,
  289. int broadcast)
  290. {
  291. #ifdef CONFIG_GENERIC_CLOCKEVENTS
  292. int state = cx - pr->power.states;
  293. if (state >= pr->power.timer_broadcast_on_state) {
  294. unsigned long reason;
  295. reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
  296. CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
  297. clockevents_notify(reason, &pr->id);
  298. }
  299. #endif
  300. }
  301. #else
  302. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  303. struct acpi_processor_cx *cstate) { }
  304. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
  305. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  306. struct acpi_processor_cx *cx,
  307. int broadcast)
  308. {
  309. }
  310. #endif
  311. static void acpi_processor_idle(void)
  312. {
  313. struct acpi_processor *pr = NULL;
  314. struct acpi_processor_cx *cx = NULL;
  315. struct acpi_processor_cx *next_state = NULL;
  316. int sleep_ticks = 0;
  317. u32 t1, t2 = 0;
  318. pr = processors[smp_processor_id()];
  319. if (!pr)
  320. return;
  321. /*
  322. * Interrupts must be disabled during bus mastering calculations and
  323. * for C2/C3 transitions.
  324. */
  325. local_irq_disable();
  326. /*
  327. * Check whether we truly need to go idle, or should
  328. * reschedule:
  329. */
  330. if (unlikely(need_resched())) {
  331. local_irq_enable();
  332. return;
  333. }
  334. cx = pr->power.state;
  335. if (!cx) {
  336. if (pm_idle_save)
  337. pm_idle_save();
  338. else
  339. acpi_safe_halt();
  340. return;
  341. }
  342. /*
  343. * Check BM Activity
  344. * -----------------
  345. * Check for bus mastering activity (if required), record, and check
  346. * for demotion.
  347. */
  348. if (pr->flags.bm_check) {
  349. u32 bm_status = 0;
  350. unsigned long diff = jiffies - pr->power.bm_check_timestamp;
  351. if (diff > 31)
  352. diff = 31;
  353. pr->power.bm_activity <<= diff;
  354. acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
  355. if (bm_status) {
  356. pr->power.bm_activity |= 0x1;
  357. acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
  358. }
  359. /*
  360. * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
  361. * the true state of bus mastering activity; forcing us to
  362. * manually check the BMIDEA bit of each IDE channel.
  363. */
  364. else if (errata.piix4.bmisx) {
  365. if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
  366. || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
  367. pr->power.bm_activity |= 0x1;
  368. }
  369. pr->power.bm_check_timestamp = jiffies;
  370. /*
  371. * If bus mastering is or was active this jiffy, demote
  372. * to avoid a faulty transition. Note that the processor
  373. * won't enter a low-power state during this call (to this
  374. * function) but should upon the next.
  375. *
  376. * TBD: A better policy might be to fallback to the demotion
  377. * state (use it for this quantum only) istead of
  378. * demoting -- and rely on duration as our sole demotion
  379. * qualification. This may, however, introduce DMA
  380. * issues (e.g. floppy DMA transfer overrun/underrun).
  381. */
  382. if ((pr->power.bm_activity & 0x1) &&
  383. cx->demotion.threshold.bm) {
  384. local_irq_enable();
  385. next_state = cx->demotion.state;
  386. goto end;
  387. }
  388. }
  389. #ifdef CONFIG_HOTPLUG_CPU
  390. /*
  391. * Check for P_LVL2_UP flag before entering C2 and above on
  392. * an SMP system. We do it here instead of doing it at _CST/P_LVL
  393. * detection phase, to work cleanly with logical CPU hotplug.
  394. */
  395. if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  396. !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  397. cx = &pr->power.states[ACPI_STATE_C1];
  398. #endif
  399. /*
  400. * Sleep:
  401. * ------
  402. * Invoke the current Cx state to put the processor to sleep.
  403. */
  404. if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
  405. current_thread_info()->status &= ~TS_POLLING;
  406. /*
  407. * TS_POLLING-cleared state must be visible before we
  408. * test NEED_RESCHED:
  409. */
  410. smp_mb();
  411. if (need_resched()) {
  412. current_thread_info()->status |= TS_POLLING;
  413. local_irq_enable();
  414. return;
  415. }
  416. }
  417. switch (cx->type) {
  418. case ACPI_STATE_C1:
  419. /*
  420. * Invoke C1.
  421. * Use the appropriate idle routine, the one that would
  422. * be used without acpi C-states.
  423. */
  424. if (pm_idle_save)
  425. pm_idle_save();
  426. else
  427. acpi_safe_halt();
  428. /*
  429. * TBD: Can't get time duration while in C1, as resumes
  430. * go to an ISR rather than here. Need to instrument
  431. * base interrupt handler.
  432. */
  433. sleep_ticks = 0xFFFFFFFF;
  434. break;
  435. case ACPI_STATE_C2:
  436. /* Get start time (ticks) */
  437. t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  438. /* Invoke C2 */
  439. acpi_state_timer_broadcast(pr, cx, 1);
  440. acpi_cstate_enter(cx);
  441. /* Get end time (ticks) */
  442. t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  443. #ifdef CONFIG_GENERIC_TIME
  444. /* TSC halts in C2, so notify users */
  445. mark_tsc_unstable();
  446. #endif
  447. /* Re-enable interrupts */
  448. local_irq_enable();
  449. current_thread_info()->status |= TS_POLLING;
  450. /* Compute time (ticks) that we were actually asleep */
  451. sleep_ticks =
  452. ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
  453. acpi_state_timer_broadcast(pr, cx, 0);
  454. break;
  455. case ACPI_STATE_C3:
  456. if (pr->flags.bm_check) {
  457. if (atomic_inc_return(&c3_cpu_count) ==
  458. num_online_cpus()) {
  459. /*
  460. * All CPUs are trying to go to C3
  461. * Disable bus master arbitration
  462. */
  463. acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
  464. }
  465. } else {
  466. /* SMP with no shared cache... Invalidate cache */
  467. ACPI_FLUSH_CPU_CACHE();
  468. }
  469. /* Get start time (ticks) */
  470. t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  471. /* Invoke C3 */
  472. acpi_state_timer_broadcast(pr, cx, 1);
  473. acpi_cstate_enter(cx);
  474. /* Get end time (ticks) */
  475. t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  476. if (pr->flags.bm_check) {
  477. /* Enable bus master arbitration */
  478. atomic_dec(&c3_cpu_count);
  479. acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
  480. }
  481. #ifdef CONFIG_GENERIC_TIME
  482. /* TSC halts in C3, so notify users */
  483. mark_tsc_unstable();
  484. #endif
  485. /* Re-enable interrupts */
  486. local_irq_enable();
  487. current_thread_info()->status |= TS_POLLING;
  488. /* Compute time (ticks) that we were actually asleep */
  489. sleep_ticks =
  490. ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
  491. acpi_state_timer_broadcast(pr, cx, 0);
  492. break;
  493. default:
  494. local_irq_enable();
  495. return;
  496. }
  497. cx->usage++;
  498. if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
  499. cx->time += sleep_ticks;
  500. next_state = pr->power.state;
  501. #ifdef CONFIG_HOTPLUG_CPU
  502. /* Don't do promotion/demotion */
  503. if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  504. !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
  505. next_state = cx;
  506. goto end;
  507. }
  508. #endif
  509. /*
  510. * Promotion?
  511. * ----------
  512. * Track the number of longs (time asleep is greater than threshold)
  513. * and promote when the count threshold is reached. Note that bus
  514. * mastering activity may prevent promotions.
  515. * Do not promote above max_cstate.
  516. */
  517. if (cx->promotion.state &&
  518. ((cx->promotion.state - pr->power.states) <= max_cstate)) {
  519. if (sleep_ticks > cx->promotion.threshold.ticks &&
  520. cx->promotion.state->latency <= system_latency_constraint()) {
  521. cx->promotion.count++;
  522. cx->demotion.count = 0;
  523. if (cx->promotion.count >=
  524. cx->promotion.threshold.count) {
  525. if (pr->flags.bm_check) {
  526. if (!
  527. (pr->power.bm_activity & cx->
  528. promotion.threshold.bm)) {
  529. next_state =
  530. cx->promotion.state;
  531. goto end;
  532. }
  533. } else {
  534. next_state = cx->promotion.state;
  535. goto end;
  536. }
  537. }
  538. }
  539. }
  540. /*
  541. * Demotion?
  542. * ---------
  543. * Track the number of shorts (time asleep is less than time threshold)
  544. * and demote when the usage threshold is reached.
  545. */
  546. if (cx->demotion.state) {
  547. if (sleep_ticks < cx->demotion.threshold.ticks) {
  548. cx->demotion.count++;
  549. cx->promotion.count = 0;
  550. if (cx->demotion.count >= cx->demotion.threshold.count) {
  551. next_state = cx->demotion.state;
  552. goto end;
  553. }
  554. }
  555. }
  556. end:
  557. /*
  558. * Demote if current state exceeds max_cstate
  559. * or if the latency of the current state is unacceptable
  560. */
  561. if ((pr->power.state - pr->power.states) > max_cstate ||
  562. pr->power.state->latency > system_latency_constraint()) {
  563. if (cx->demotion.state)
  564. next_state = cx->demotion.state;
  565. }
  566. /*
  567. * New Cx State?
  568. * -------------
  569. * If we're going to start using a new Cx state we must clean up
  570. * from the previous and prepare to use the new.
  571. */
  572. if (next_state != pr->power.state)
  573. acpi_processor_power_activate(pr, next_state);
  574. }
  575. static int acpi_processor_set_power_policy(struct acpi_processor *pr)
  576. {
  577. unsigned int i;
  578. unsigned int state_is_set = 0;
  579. struct acpi_processor_cx *lower = NULL;
  580. struct acpi_processor_cx *higher = NULL;
  581. struct acpi_processor_cx *cx;
  582. if (!pr)
  583. return -EINVAL;
  584. /*
  585. * This function sets the default Cx state policy (OS idle handler).
  586. * Our scheme is to promote quickly to C2 but more conservatively
  587. * to C3. We're favoring C2 for its characteristics of low latency
  588. * (quick response), good power savings, and ability to allow bus
  589. * mastering activity. Note that the Cx state policy is completely
  590. * customizable and can be altered dynamically.
  591. */
  592. /* startup state */
  593. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  594. cx = &pr->power.states[i];
  595. if (!cx->valid)
  596. continue;
  597. if (!state_is_set)
  598. pr->power.state = cx;
  599. state_is_set++;
  600. break;
  601. }
  602. if (!state_is_set)
  603. return -ENODEV;
  604. /* demotion */
  605. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  606. cx = &pr->power.states[i];
  607. if (!cx->valid)
  608. continue;
  609. if (lower) {
  610. cx->demotion.state = lower;
  611. cx->demotion.threshold.ticks = cx->latency_ticks;
  612. cx->demotion.threshold.count = 1;
  613. if (cx->type == ACPI_STATE_C3)
  614. cx->demotion.threshold.bm = bm_history;
  615. }
  616. lower = cx;
  617. }
  618. /* promotion */
  619. for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
  620. cx = &pr->power.states[i];
  621. if (!cx->valid)
  622. continue;
  623. if (higher) {
  624. cx->promotion.state = higher;
  625. cx->promotion.threshold.ticks = cx->latency_ticks;
  626. if (cx->type >= ACPI_STATE_C2)
  627. cx->promotion.threshold.count = 4;
  628. else
  629. cx->promotion.threshold.count = 10;
  630. if (higher->type == ACPI_STATE_C3)
  631. cx->promotion.threshold.bm = bm_history;
  632. }
  633. higher = cx;
  634. }
  635. return 0;
  636. }
  637. static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
  638. {
  639. if (!pr)
  640. return -EINVAL;
  641. if (!pr->pblk)
  642. return -ENODEV;
  643. /* if info is obtained from pblk/fadt, type equals state */
  644. pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
  645. pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
  646. #ifndef CONFIG_HOTPLUG_CPU
  647. /*
  648. * Check for P_LVL2_UP flag before entering C2 and above on
  649. * an SMP system.
  650. */
  651. if ((num_online_cpus() > 1) &&
  652. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  653. return -ENODEV;
  654. #endif
  655. /* determine C2 and C3 address from pblk */
  656. pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
  657. pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
  658. /* determine latencies from FADT */
  659. pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
  660. pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
  661. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  662. "lvl2[0x%08x] lvl3[0x%08x]\n",
  663. pr->power.states[ACPI_STATE_C2].address,
  664. pr->power.states[ACPI_STATE_C3].address));
  665. return 0;
  666. }
  667. static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
  668. {
  669. if (!pr->power.states[ACPI_STATE_C1].valid) {
  670. /* set the first C-State to C1 */
  671. /* all processors need to support C1 */
  672. pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
  673. pr->power.states[ACPI_STATE_C1].valid = 1;
  674. }
  675. /* the C0 state only exists as a filler in our array */
  676. pr->power.states[ACPI_STATE_C0].valid = 1;
  677. return 0;
  678. }
  679. static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
  680. {
  681. acpi_status status = 0;
  682. acpi_integer count;
  683. int current_count;
  684. int i;
  685. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  686. union acpi_object *cst;
  687. if (nocst)
  688. return -ENODEV;
  689. current_count = 0;
  690. status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
  691. if (ACPI_FAILURE(status)) {
  692. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
  693. return -ENODEV;
  694. }
  695. cst = buffer.pointer;
  696. /* There must be at least 2 elements */
  697. if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
  698. printk(KERN_ERR PREFIX "not enough elements in _CST\n");
  699. status = -EFAULT;
  700. goto end;
  701. }
  702. count = cst->package.elements[0].integer.value;
  703. /* Validate number of power states. */
  704. if (count < 1 || count != cst->package.count - 1) {
  705. printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
  706. status = -EFAULT;
  707. goto end;
  708. }
  709. /* Tell driver that at least _CST is supported. */
  710. pr->flags.has_cst = 1;
  711. for (i = 1; i <= count; i++) {
  712. union acpi_object *element;
  713. union acpi_object *obj;
  714. struct acpi_power_register *reg;
  715. struct acpi_processor_cx cx;
  716. memset(&cx, 0, sizeof(cx));
  717. element = &(cst->package.elements[i]);
  718. if (element->type != ACPI_TYPE_PACKAGE)
  719. continue;
  720. if (element->package.count != 4)
  721. continue;
  722. obj = &(element->package.elements[0]);
  723. if (obj->type != ACPI_TYPE_BUFFER)
  724. continue;
  725. reg = (struct acpi_power_register *)obj->buffer.pointer;
  726. if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
  727. (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
  728. continue;
  729. /* There should be an easy way to extract an integer... */
  730. obj = &(element->package.elements[1]);
  731. if (obj->type != ACPI_TYPE_INTEGER)
  732. continue;
  733. cx.type = obj->integer.value;
  734. /*
  735. * Some buggy BIOSes won't list C1 in _CST -
  736. * Let acpi_processor_get_power_info_default() handle them later
  737. */
  738. if (i == 1 && cx.type != ACPI_STATE_C1)
  739. current_count++;
  740. cx.address = reg->address;
  741. cx.index = current_count + 1;
  742. cx.space_id = ACPI_CSTATE_SYSTEMIO;
  743. if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
  744. if (acpi_processor_ffh_cstate_probe
  745. (pr->id, &cx, reg) == 0) {
  746. cx.space_id = ACPI_CSTATE_FFH;
  747. } else if (cx.type != ACPI_STATE_C1) {
  748. /*
  749. * C1 is a special case where FIXED_HARDWARE
  750. * can be handled in non-MWAIT way as well.
  751. * In that case, save this _CST entry info.
  752. * That is, we retain space_id of SYSTEM_IO for
  753. * halt based C1.
  754. * Otherwise, ignore this info and continue.
  755. */
  756. continue;
  757. }
  758. }
  759. obj = &(element->package.elements[2]);
  760. if (obj->type != ACPI_TYPE_INTEGER)
  761. continue;
  762. cx.latency = obj->integer.value;
  763. obj = &(element->package.elements[3]);
  764. if (obj->type != ACPI_TYPE_INTEGER)
  765. continue;
  766. cx.power = obj->integer.value;
  767. current_count++;
  768. memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
  769. /*
  770. * We support total ACPI_PROCESSOR_MAX_POWER - 1
  771. * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
  772. */
  773. if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
  774. printk(KERN_WARNING
  775. "Limiting number of power states to max (%d)\n",
  776. ACPI_PROCESSOR_MAX_POWER);
  777. printk(KERN_WARNING
  778. "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
  779. break;
  780. }
  781. }
  782. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
  783. current_count));
  784. /* Validate number of power states discovered */
  785. if (current_count < 2)
  786. status = -EFAULT;
  787. end:
  788. kfree(buffer.pointer);
  789. return status;
  790. }
  791. static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
  792. {
  793. if (!cx->address)
  794. return;
  795. /*
  796. * C2 latency must be less than or equal to 100
  797. * microseconds.
  798. */
  799. else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
  800. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  801. "latency too large [%d]\n", cx->latency));
  802. return;
  803. }
  804. /*
  805. * Otherwise we've met all of our C2 requirements.
  806. * Normalize the C2 latency to expidite policy
  807. */
  808. cx->valid = 1;
  809. cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
  810. return;
  811. }
  812. static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
  813. struct acpi_processor_cx *cx)
  814. {
  815. static int bm_check_flag;
  816. if (!cx->address)
  817. return;
  818. /*
  819. * C3 latency must be less than or equal to 1000
  820. * microseconds.
  821. */
  822. else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
  823. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  824. "latency too large [%d]\n", cx->latency));
  825. return;
  826. }
  827. /*
  828. * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
  829. * DMA transfers are used by any ISA device to avoid livelock.
  830. * Note that we could disable Type-F DMA (as recommended by
  831. * the erratum), but this is known to disrupt certain ISA
  832. * devices thus we take the conservative approach.
  833. */
  834. else if (errata.piix4.fdma) {
  835. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  836. "C3 not supported on PIIX4 with Type-F DMA\n"));
  837. return;
  838. }
  839. /* All the logic here assumes flags.bm_check is same across all CPUs */
  840. if (!bm_check_flag) {
  841. /* Determine whether bm_check is needed based on CPU */
  842. acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
  843. bm_check_flag = pr->flags.bm_check;
  844. } else {
  845. pr->flags.bm_check = bm_check_flag;
  846. }
  847. if (pr->flags.bm_check) {
  848. /* bus mastering control is necessary */
  849. if (!pr->flags.bm_control) {
  850. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  851. "C3 support requires bus mastering control\n"));
  852. return;
  853. }
  854. } else {
  855. /*
  856. * WBINVD should be set in fadt, for C3 state to be
  857. * supported on when bm_check is not required.
  858. */
  859. if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
  860. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  861. "Cache invalidation should work properly"
  862. " for C3 to be enabled on SMP systems\n"));
  863. return;
  864. }
  865. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
  866. }
  867. /*
  868. * Otherwise we've met all of our C3 requirements.
  869. * Normalize the C3 latency to expidite policy. Enable
  870. * checking of bus mastering status (bm_check) so we can
  871. * use this in our C3 policy
  872. */
  873. cx->valid = 1;
  874. cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
  875. return;
  876. }
  877. static int acpi_processor_power_verify(struct acpi_processor *pr)
  878. {
  879. unsigned int i;
  880. unsigned int working = 0;
  881. pr->power.timer_broadcast_on_state = INT_MAX;
  882. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  883. struct acpi_processor_cx *cx = &pr->power.states[i];
  884. switch (cx->type) {
  885. case ACPI_STATE_C1:
  886. cx->valid = 1;
  887. break;
  888. case ACPI_STATE_C2:
  889. acpi_processor_power_verify_c2(cx);
  890. if (cx->valid && use_ipi != 0 && use_ipi != 1)
  891. acpi_timer_check_state(i, pr, cx);
  892. break;
  893. case ACPI_STATE_C3:
  894. acpi_processor_power_verify_c3(pr, cx);
  895. if (cx->valid && use_ipi != 0 && use_ipi != 1)
  896. acpi_timer_check_state(i, pr, cx);
  897. break;
  898. }
  899. if (cx->valid)
  900. working++;
  901. }
  902. acpi_propagate_timer_broadcast(pr);
  903. return (working);
  904. }
  905. static int acpi_processor_get_power_info(struct acpi_processor *pr)
  906. {
  907. unsigned int i;
  908. int result;
  909. /* NOTE: the idle thread may not be running while calling
  910. * this function */
  911. /* Zero initialize all the C-states info. */
  912. memset(pr->power.states, 0, sizeof(pr->power.states));
  913. result = acpi_processor_get_power_info_cst(pr);
  914. if (result == -ENODEV)
  915. result = acpi_processor_get_power_info_fadt(pr);
  916. if (result)
  917. return result;
  918. acpi_processor_get_power_info_default(pr);
  919. pr->power.count = acpi_processor_power_verify(pr);
  920. /*
  921. * Set Default Policy
  922. * ------------------
  923. * Now that we know which states are supported, set the default
  924. * policy. Note that this policy can be changed dynamically
  925. * (e.g. encourage deeper sleeps to conserve battery life when
  926. * not on AC).
  927. */
  928. result = acpi_processor_set_power_policy(pr);
  929. if (result)
  930. return result;
  931. /*
  932. * if one state of type C2 or C3 is available, mark this
  933. * CPU as being "idle manageable"
  934. */
  935. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  936. if (pr->power.states[i].valid) {
  937. pr->power.count = i;
  938. if (pr->power.states[i].type >= ACPI_STATE_C2)
  939. pr->flags.power = 1;
  940. }
  941. }
  942. return 0;
  943. }
  944. int acpi_processor_cst_has_changed(struct acpi_processor *pr)
  945. {
  946. int result = 0;
  947. if (!pr)
  948. return -EINVAL;
  949. if (nocst) {
  950. return -ENODEV;
  951. }
  952. if (!pr->flags.power_setup_done)
  953. return -ENODEV;
  954. /* Fall back to the default idle loop */
  955. pm_idle = pm_idle_save;
  956. synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
  957. pr->flags.power = 0;
  958. result = acpi_processor_get_power_info(pr);
  959. if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
  960. pm_idle = acpi_processor_idle;
  961. return result;
  962. }
  963. /* proc interface */
  964. static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
  965. {
  966. struct acpi_processor *pr = seq->private;
  967. unsigned int i;
  968. if (!pr)
  969. goto end;
  970. seq_printf(seq, "active state: C%zd\n"
  971. "max_cstate: C%d\n"
  972. "bus master activity: %08x\n"
  973. "maximum allowed latency: %d usec\n",
  974. pr->power.state ? pr->power.state - pr->power.states : 0,
  975. max_cstate, (unsigned)pr->power.bm_activity,
  976. system_latency_constraint());
  977. seq_puts(seq, "states:\n");
  978. for (i = 1; i <= pr->power.count; i++) {
  979. seq_printf(seq, " %cC%d: ",
  980. (&pr->power.states[i] ==
  981. pr->power.state ? '*' : ' '), i);
  982. if (!pr->power.states[i].valid) {
  983. seq_puts(seq, "<not supported>\n");
  984. continue;
  985. }
  986. switch (pr->power.states[i].type) {
  987. case ACPI_STATE_C1:
  988. seq_printf(seq, "type[C1] ");
  989. break;
  990. case ACPI_STATE_C2:
  991. seq_printf(seq, "type[C2] ");
  992. break;
  993. case ACPI_STATE_C3:
  994. seq_printf(seq, "type[C3] ");
  995. break;
  996. default:
  997. seq_printf(seq, "type[--] ");
  998. break;
  999. }
  1000. if (pr->power.states[i].promotion.state)
  1001. seq_printf(seq, "promotion[C%zd] ",
  1002. (pr->power.states[i].promotion.state -
  1003. pr->power.states));
  1004. else
  1005. seq_puts(seq, "promotion[--] ");
  1006. if (pr->power.states[i].demotion.state)
  1007. seq_printf(seq, "demotion[C%zd] ",
  1008. (pr->power.states[i].demotion.state -
  1009. pr->power.states));
  1010. else
  1011. seq_puts(seq, "demotion[--] ");
  1012. seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
  1013. pr->power.states[i].latency,
  1014. pr->power.states[i].usage,
  1015. (unsigned long long)pr->power.states[i].time);
  1016. }
  1017. end:
  1018. return 0;
  1019. }
  1020. static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
  1021. {
  1022. return single_open(file, acpi_processor_power_seq_show,
  1023. PDE(inode)->data);
  1024. }
  1025. static const struct file_operations acpi_processor_power_fops = {
  1026. .open = acpi_processor_power_open_fs,
  1027. .read = seq_read,
  1028. .llseek = seq_lseek,
  1029. .release = single_release,
  1030. };
  1031. #ifdef CONFIG_SMP
  1032. static void smp_callback(void *v)
  1033. {
  1034. /* we already woke the CPU up, nothing more to do */
  1035. }
  1036. /*
  1037. * This function gets called when a part of the kernel has a new latency
  1038. * requirement. This means we need to get all processors out of their C-state,
  1039. * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
  1040. * wakes them all right up.
  1041. */
  1042. static int acpi_processor_latency_notify(struct notifier_block *b,
  1043. unsigned long l, void *v)
  1044. {
  1045. smp_call_function(smp_callback, NULL, 0, 1);
  1046. return NOTIFY_OK;
  1047. }
  1048. static struct notifier_block acpi_processor_latency_notifier = {
  1049. .notifier_call = acpi_processor_latency_notify,
  1050. };
  1051. #endif
  1052. int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
  1053. struct acpi_device *device)
  1054. {
  1055. acpi_status status = 0;
  1056. static int first_run;
  1057. struct proc_dir_entry *entry = NULL;
  1058. unsigned int i;
  1059. if (!first_run) {
  1060. dmi_check_system(processor_power_dmi_table);
  1061. if (max_cstate < ACPI_C_STATES_MAX)
  1062. printk(KERN_NOTICE
  1063. "ACPI: processor limited to max C-state %d\n",
  1064. max_cstate);
  1065. first_run++;
  1066. #ifdef CONFIG_SMP
  1067. register_latency_notifier(&acpi_processor_latency_notifier);
  1068. #endif
  1069. }
  1070. if (!pr)
  1071. return -EINVAL;
  1072. if (acpi_gbl_FADT.cst_control && !nocst) {
  1073. status =
  1074. acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
  1075. if (ACPI_FAILURE(status)) {
  1076. ACPI_EXCEPTION((AE_INFO, status,
  1077. "Notifying BIOS of _CST ability failed"));
  1078. }
  1079. }
  1080. acpi_processor_get_power_info(pr);
  1081. /*
  1082. * Install the idle handler if processor power management is supported.
  1083. * Note that we use previously set idle handler will be used on
  1084. * platforms that only support C1.
  1085. */
  1086. if ((pr->flags.power) && (!boot_option_idle_override)) {
  1087. printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
  1088. for (i = 1; i <= pr->power.count; i++)
  1089. if (pr->power.states[i].valid)
  1090. printk(" C%d[C%d]", i,
  1091. pr->power.states[i].type);
  1092. printk(")\n");
  1093. if (pr->id == 0) {
  1094. pm_idle_save = pm_idle;
  1095. pm_idle = acpi_processor_idle;
  1096. }
  1097. }
  1098. /* 'power' [R] */
  1099. entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
  1100. S_IRUGO, acpi_device_dir(device));
  1101. if (!entry)
  1102. return -EIO;
  1103. else {
  1104. entry->proc_fops = &acpi_processor_power_fops;
  1105. entry->data = acpi_driver_data(device);
  1106. entry->owner = THIS_MODULE;
  1107. }
  1108. pr->flags.power_setup_done = 1;
  1109. return 0;
  1110. }
  1111. int acpi_processor_power_exit(struct acpi_processor *pr,
  1112. struct acpi_device *device)
  1113. {
  1114. pr->flags.power_setup_done = 0;
  1115. if (acpi_device_dir(device))
  1116. remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
  1117. acpi_device_dir(device));
  1118. /* Unregister the idle handler when processor #0 is removed. */
  1119. if (pr->id == 0) {
  1120. pm_idle = pm_idle_save;
  1121. /*
  1122. * We are about to unload the current idle thread pm callback
  1123. * (pm_idle), Wait for all processors to update cached/local
  1124. * copies of pm_idle before proceeding.
  1125. */
  1126. cpu_idle_wait();
  1127. #ifdef CONFIG_SMP
  1128. unregister_latency_notifier(&acpi_processor_latency_notifier);
  1129. #endif
  1130. }
  1131. return 0;
  1132. }