board-igep0020.c 11 KB

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  1. /*
  2. * Copyright (C) 2009 Integration Software and Electronic Engineering.
  3. *
  4. * Modified from mach-omap2/board-generic.c
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/delay.h>
  14. #include <linux/err.h>
  15. #include <linux/clk.h>
  16. #include <linux/io.h>
  17. #include <linux/gpio.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/regulator/machine.h>
  20. #include <linux/i2c/twl.h>
  21. #include <asm/mach-types.h>
  22. #include <asm/mach/arch.h>
  23. #include <plat/board.h>
  24. #include <plat/common.h>
  25. #include <plat/gpmc.h>
  26. #include <plat/usb.h>
  27. #include <plat/display.h>
  28. #include <plat/onenand.h>
  29. #include "mux.h"
  30. #include "hsmmc.h"
  31. #define IGEP2_SMSC911X_CS 5
  32. #define IGEP2_SMSC911X_GPIO 176
  33. #define IGEP2_GPIO_USBH_NRESET 24
  34. #define IGEP2_GPIO_LED0_RED 26
  35. #define IGEP2_GPIO_LED0_GREEN 27
  36. #define IGEP2_GPIO_LED1_RED 28
  37. #define IGEP2_GPIO_DVI_PUP 170
  38. #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
  39. defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
  40. #define ONENAND_MAP 0x20000000
  41. /* NAND04GR4E1A ( x2 Flash built-in COMBO POP MEMORY )
  42. * Since the device is equipped with two DataRAMs, and two-plane NAND
  43. * Flash memory array, these two component enables simultaneous program
  44. * of 4KiB. Plane1 has only even blocks such as block0, block2, block4
  45. * while Plane2 has only odd blocks such as block1, block3, block5.
  46. * So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048)
  47. */
  48. static struct mtd_partition igep2_onenand_partitions[] = {
  49. {
  50. .name = "X-Loader",
  51. .offset = 0,
  52. .size = 2 * (64*(2*2048))
  53. },
  54. {
  55. .name = "U-Boot",
  56. .offset = MTDPART_OFS_APPEND,
  57. .size = 6 * (64*(2*2048)),
  58. },
  59. {
  60. .name = "Environment",
  61. .offset = MTDPART_OFS_APPEND,
  62. .size = 2 * (64*(2*2048)),
  63. },
  64. {
  65. .name = "Kernel",
  66. .offset = MTDPART_OFS_APPEND,
  67. .size = 12 * (64*(2*2048)),
  68. },
  69. {
  70. .name = "File System",
  71. .offset = MTDPART_OFS_APPEND,
  72. .size = MTDPART_SIZ_FULL,
  73. },
  74. };
  75. static int igep2_onenand_setup(void __iomem *onenand_base, int freq)
  76. {
  77. /* nothing is required to be setup for onenand as of now */
  78. return 0;
  79. }
  80. static struct omap_onenand_platform_data igep2_onenand_data = {
  81. .parts = igep2_onenand_partitions,
  82. .nr_parts = ARRAY_SIZE(igep2_onenand_partitions),
  83. .onenand_setup = igep2_onenand_setup,
  84. .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */
  85. };
  86. static struct platform_device igep2_onenand_device = {
  87. .name = "omap2-onenand",
  88. .id = -1,
  89. .dev = {
  90. .platform_data = &igep2_onenand_data,
  91. },
  92. };
  93. void __init igep2_flash_init(void)
  94. {
  95. u8 cs = 0;
  96. u8 onenandcs = GPMC_CS_NUM + 1;
  97. while (cs < GPMC_CS_NUM) {
  98. u32 ret = 0;
  99. ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
  100. /* Check if NAND/oneNAND is configured */
  101. if ((ret & 0xC00) == 0x800)
  102. /* NAND found */
  103. pr_err("IGEP v2: Unsupported NAND found\n");
  104. else {
  105. ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
  106. if ((ret & 0x3F) == (ONENAND_MAP >> 24))
  107. /* ONENAND found */
  108. onenandcs = cs;
  109. }
  110. cs++;
  111. }
  112. if (onenandcs > GPMC_CS_NUM) {
  113. pr_err("IGEP v2: Unable to find configuration in GPMC\n");
  114. return;
  115. }
  116. if (onenandcs < GPMC_CS_NUM) {
  117. igep2_onenand_data.cs = onenandcs;
  118. if (platform_device_register(&igep2_onenand_device) < 0)
  119. pr_err("IGEP v2: Unable to register OneNAND device\n");
  120. }
  121. }
  122. #else
  123. void __init igep2_flash_init(void) {}
  124. #endif
  125. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  126. #include <linux/smsc911x.h>
  127. static struct smsc911x_platform_config igep2_smsc911x_config = {
  128. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  129. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  130. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS ,
  131. .phy_interface = PHY_INTERFACE_MODE_MII,
  132. };
  133. static struct resource igep2_smsc911x_resources[] = {
  134. {
  135. .flags = IORESOURCE_MEM,
  136. },
  137. {
  138. .start = OMAP_GPIO_IRQ(IGEP2_SMSC911X_GPIO),
  139. .end = OMAP_GPIO_IRQ(IGEP2_SMSC911X_GPIO),
  140. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  141. },
  142. };
  143. static struct platform_device igep2_smsc911x_device = {
  144. .name = "smsc911x",
  145. .id = 0,
  146. .num_resources = ARRAY_SIZE(igep2_smsc911x_resources),
  147. .resource = igep2_smsc911x_resources,
  148. .dev = {
  149. .platform_data = &igep2_smsc911x_config,
  150. },
  151. };
  152. static inline void __init igep2_init_smsc911x(void)
  153. {
  154. unsigned long cs_mem_base;
  155. if (gpmc_cs_request(IGEP2_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) {
  156. pr_err("IGEP v2: Failed request for GPMC mem for smsc911x\n");
  157. gpmc_cs_free(IGEP2_SMSC911X_CS);
  158. return;
  159. }
  160. igep2_smsc911x_resources[0].start = cs_mem_base + 0x0;
  161. igep2_smsc911x_resources[0].end = cs_mem_base + 0xff;
  162. if ((gpio_request(IGEP2_SMSC911X_GPIO, "SMSC911X IRQ") == 0) &&
  163. (gpio_direction_input(IGEP2_SMSC911X_GPIO) == 0)) {
  164. gpio_export(IGEP2_SMSC911X_GPIO, 0);
  165. } else {
  166. pr_err("IGEP v2: Could not obtain gpio for for SMSC911X IRQ\n");
  167. return;
  168. }
  169. platform_device_register(&igep2_smsc911x_device);
  170. }
  171. #else
  172. static inline void __init igep2_init_smsc911x(void) { }
  173. #endif
  174. static struct omap_board_config_kernel igep2_config[] __initdata = {
  175. };
  176. static struct regulator_consumer_supply igep2_vmmc1_supply = {
  177. .supply = "vmmc",
  178. };
  179. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  180. static struct regulator_init_data igep2_vmmc1 = {
  181. .constraints = {
  182. .min_uV = 1850000,
  183. .max_uV = 3150000,
  184. .valid_modes_mask = REGULATOR_MODE_NORMAL
  185. | REGULATOR_MODE_STANDBY,
  186. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  187. | REGULATOR_CHANGE_MODE
  188. | REGULATOR_CHANGE_STATUS,
  189. },
  190. .num_consumer_supplies = 1,
  191. .consumer_supplies = &igep2_vmmc1_supply,
  192. };
  193. static struct omap2_hsmmc_info mmc[] = {
  194. {
  195. .mmc = 1,
  196. .wires = 4,
  197. .gpio_cd = -EINVAL,
  198. .gpio_wp = -EINVAL,
  199. },
  200. {
  201. .mmc = 2,
  202. .wires = 4,
  203. .gpio_cd = -EINVAL,
  204. .gpio_wp = -EINVAL,
  205. },
  206. {} /* Terminator */
  207. };
  208. static int igep2_twl_gpio_setup(struct device *dev,
  209. unsigned gpio, unsigned ngpio)
  210. {
  211. /* gpio + 0 is "mmc0_cd" (input/IRQ) */
  212. mmc[0].gpio_cd = gpio + 0;
  213. omap2_hsmmc_init(mmc);
  214. /* link regulators to MMC adapters ... we "know" the
  215. * regulators will be set up only *after* we return.
  216. */
  217. igep2_vmmc1_supply.dev = mmc[0].dev;
  218. return 0;
  219. };
  220. static struct twl4030_gpio_platform_data igep2_gpio_data = {
  221. .gpio_base = OMAP_MAX_GPIO_LINES,
  222. .irq_base = TWL4030_GPIO_IRQ_BASE,
  223. .irq_end = TWL4030_GPIO_IRQ_END,
  224. .use_leds = false,
  225. .setup = igep2_twl_gpio_setup,
  226. };
  227. static struct twl4030_usb_data igep2_usb_data = {
  228. .usb_mode = T2_USB_MODE_ULPI,
  229. };
  230. static int igep2_enable_dvi(struct omap_dss_device *dssdev)
  231. {
  232. gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1);
  233. return 0;
  234. }
  235. static void igep2_disable_dvi(struct omap_dss_device *dssdev)
  236. {
  237. gpio_direction_output(IGEP2_GPIO_DVI_PUP, 0);
  238. }
  239. static struct omap_dss_device igep2_dvi_device = {
  240. .type = OMAP_DISPLAY_TYPE_DPI,
  241. .name = "dvi",
  242. .driver_name = "generic_panel",
  243. .phy.dpi.data_lines = 24,
  244. .platform_enable = igep2_enable_dvi,
  245. .platform_disable = igep2_disable_dvi,
  246. };
  247. static struct omap_dss_device *igep2_dss_devices[] = {
  248. &igep2_dvi_device
  249. };
  250. static struct omap_dss_board_info igep2_dss_data = {
  251. .num_devices = ARRAY_SIZE(igep2_dss_devices),
  252. .devices = igep2_dss_devices,
  253. .default_device = &igep2_dvi_device,
  254. };
  255. static struct platform_device igep2_dss_device = {
  256. .name = "omapdss",
  257. .id = -1,
  258. .dev = {
  259. .platform_data = &igep2_dss_data,
  260. },
  261. };
  262. static struct regulator_consumer_supply igep2_vpll2_supply = {
  263. .supply = "vdds_dsi",
  264. .dev = &igep2_dss_device.dev,
  265. };
  266. static struct regulator_init_data igep2_vpll2 = {
  267. .constraints = {
  268. .name = "VDVI",
  269. .min_uV = 1800000,
  270. .max_uV = 1800000,
  271. .apply_uV = true,
  272. .valid_modes_mask = REGULATOR_MODE_NORMAL
  273. | REGULATOR_MODE_STANDBY,
  274. .valid_ops_mask = REGULATOR_CHANGE_MODE
  275. | REGULATOR_CHANGE_STATUS,
  276. },
  277. .num_consumer_supplies = 1,
  278. .consumer_supplies = &igep2_vpll2_supply,
  279. };
  280. static void __init igep2_display_init(void)
  281. {
  282. if (gpio_request(IGEP2_GPIO_DVI_PUP, "GPIO_DVI_PUP") &&
  283. gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1))
  284. pr_err("IGEP v2: Could not obtain gpio GPIO_DVI_PUP\n");
  285. }
  286. static struct platform_device *igep2_devices[] __initdata = {
  287. &igep2_dss_device,
  288. };
  289. static void __init igep2_init_irq(void)
  290. {
  291. omap_board_config = igep2_config;
  292. omap_board_config_size = ARRAY_SIZE(igep2_config);
  293. omap2_init_common_hw(NULL, NULL);
  294. omap_init_irq();
  295. omap_gpio_init();
  296. }
  297. static struct twl4030_codec_audio_data igep2_audio_data = {
  298. .audio_mclk = 26000000,
  299. };
  300. static struct twl4030_codec_data igep2_codec_data = {
  301. .audio_mclk = 26000000,
  302. .audio = &igep2_audio_data,
  303. };
  304. static struct twl4030_platform_data igep2_twldata = {
  305. .irq_base = TWL4030_IRQ_BASE,
  306. .irq_end = TWL4030_IRQ_END,
  307. /* platform_data for children goes here */
  308. .usb = &igep2_usb_data,
  309. .codec = &igep2_codec_data,
  310. .gpio = &igep2_gpio_data,
  311. .vmmc1 = &igep2_vmmc1,
  312. .vpll2 = &igep2_vpll2,
  313. };
  314. static struct i2c_board_info __initdata igep2_i2c_boardinfo[] = {
  315. {
  316. I2C_BOARD_INFO("twl4030", 0x48),
  317. .flags = I2C_CLIENT_WAKE,
  318. .irq = INT_34XX_SYS_NIRQ,
  319. .platform_data = &igep2_twldata,
  320. },
  321. };
  322. static int __init igep2_i2c_init(void)
  323. {
  324. omap_register_i2c_bus(1, 2600, igep2_i2c_boardinfo,
  325. ARRAY_SIZE(igep2_i2c_boardinfo));
  326. /* Bus 3 is attached to the DVI port where devices like the pico DLP
  327. * projector don't work reliably with 400kHz */
  328. omap_register_i2c_bus(3, 100, NULL, 0);
  329. return 0;
  330. }
  331. static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
  332. .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
  333. .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
  334. .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
  335. .phy_reset = true,
  336. .reset_gpio_port[0] = -EINVAL,
  337. .reset_gpio_port[1] = IGEP2_GPIO_USBH_NRESET,
  338. .reset_gpio_port[2] = -EINVAL,
  339. };
  340. #ifdef CONFIG_OMAP_MUX
  341. static struct omap_board_mux board_mux[] __initdata = {
  342. { .reg_offset = OMAP_MUX_TERMINATOR },
  343. };
  344. #else
  345. #define board_mux NULL
  346. #endif
  347. static void __init igep2_init(void)
  348. {
  349. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  350. igep2_i2c_init();
  351. platform_add_devices(igep2_devices, ARRAY_SIZE(igep2_devices));
  352. omap_serial_init();
  353. usb_musb_init();
  354. usb_ehci_init(&ehci_pdata);
  355. igep2_flash_init();
  356. igep2_display_init();
  357. igep2_init_smsc911x();
  358. /* GPIO userspace leds */
  359. if ((gpio_request(IGEP2_GPIO_LED0_RED, "GPIO_LED0_RED") == 0) &&
  360. (gpio_direction_output(IGEP2_GPIO_LED0_RED, 1) == 0)) {
  361. gpio_export(IGEP2_GPIO_LED0_RED, 0);
  362. gpio_set_value(IGEP2_GPIO_LED0_RED, 0);
  363. } else
  364. pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_RED\n");
  365. if ((gpio_request(IGEP2_GPIO_LED0_GREEN, "GPIO_LED0_GREEN") == 0) &&
  366. (gpio_direction_output(IGEP2_GPIO_LED0_GREEN, 1) == 0)) {
  367. gpio_export(IGEP2_GPIO_LED0_GREEN, 0);
  368. gpio_set_value(IGEP2_GPIO_LED0_GREEN, 0);
  369. } else
  370. pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_GREEN\n");
  371. if ((gpio_request(IGEP2_GPIO_LED1_RED, "GPIO_LED1_RED") == 0) &&
  372. (gpio_direction_output(IGEP2_GPIO_LED1_RED, 1) == 0)) {
  373. gpio_export(IGEP2_GPIO_LED1_RED, 0);
  374. gpio_set_value(IGEP2_GPIO_LED1_RED, 0);
  375. } else
  376. pr_warning("IGEP v2: Could not obtain gpio GPIO_LED1_RED\n");
  377. }
  378. static void __init igep2_map_io(void)
  379. {
  380. omap2_set_globals_343x();
  381. omap34xx_map_common_io();
  382. }
  383. MACHINE_START(IGEP0020, "IGEP v2 board")
  384. .phys_io = 0x48000000,
  385. .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc,
  386. .boot_params = 0x80000100,
  387. .map_io = igep2_map_io,
  388. .init_irq = igep2_init_irq,
  389. .init_machine = igep2_init,
  390. .timer = &omap_timer,
  391. MACHINE_END