ssi.c 16 KB

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  1. /*
  2. * Renesas R-Car SSIU/SSI support
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. *
  7. * Based on fsi.c
  8. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/delay.h>
  15. #include "rsnd.h"
  16. #define RSND_SSI_NAME_SIZE 16
  17. /*
  18. * SSICR
  19. */
  20. #define FORCE (1 << 31) /* Fixed */
  21. #define DMEN (1 << 28) /* DMA Enable */
  22. #define UIEN (1 << 27) /* Underflow Interrupt Enable */
  23. #define OIEN (1 << 26) /* Overflow Interrupt Enable */
  24. #define IIEN (1 << 25) /* Idle Mode Interrupt Enable */
  25. #define DIEN (1 << 24) /* Data Interrupt Enable */
  26. #define DWL_8 (0 << 19) /* Data Word Length */
  27. #define DWL_16 (1 << 19) /* Data Word Length */
  28. #define DWL_18 (2 << 19) /* Data Word Length */
  29. #define DWL_20 (3 << 19) /* Data Word Length */
  30. #define DWL_22 (4 << 19) /* Data Word Length */
  31. #define DWL_24 (5 << 19) /* Data Word Length */
  32. #define DWL_32 (6 << 19) /* Data Word Length */
  33. #define SWL_32 (3 << 16) /* R/W System Word Length */
  34. #define SCKD (1 << 15) /* Serial Bit Clock Direction */
  35. #define SWSD (1 << 14) /* Serial WS Direction */
  36. #define SCKP (1 << 13) /* Serial Bit Clock Polarity */
  37. #define SWSP (1 << 12) /* Serial WS Polarity */
  38. #define SDTA (1 << 10) /* Serial Data Alignment */
  39. #define DEL (1 << 8) /* Serial Data Delay */
  40. #define CKDV(v) (v << 4) /* Serial Clock Division Ratio */
  41. #define TRMD (1 << 1) /* Transmit/Receive Mode Select */
  42. #define EN (1 << 0) /* SSI Module Enable */
  43. /*
  44. * SSISR
  45. */
  46. #define UIRQ (1 << 27) /* Underflow Error Interrupt Status */
  47. #define OIRQ (1 << 26) /* Overflow Error Interrupt Status */
  48. #define IIRQ (1 << 25) /* Idle Mode Interrupt Status */
  49. #define DIRQ (1 << 24) /* Data Interrupt Status Flag */
  50. /*
  51. * SSIWSR
  52. */
  53. #define CONT (1 << 8) /* WS Continue Function */
  54. struct rsnd_ssi {
  55. struct clk *clk;
  56. struct rsnd_ssi_platform_info *info; /* rcar_snd.h */
  57. struct rsnd_ssi *parent;
  58. struct rsnd_mod mod;
  59. struct rsnd_dai *rdai;
  60. struct rsnd_dai_stream *io;
  61. u32 cr_own;
  62. u32 cr_clk;
  63. u32 cr_etc;
  64. int err;
  65. int dma_offset;
  66. unsigned int usrcnt;
  67. unsigned int rate;
  68. };
  69. struct rsnd_ssiu {
  70. u32 ssi_mode0;
  71. u32 ssi_mode1;
  72. int ssi_nr;
  73. struct rsnd_ssi *ssi;
  74. };
  75. #define for_each_rsnd_ssi(pos, priv, i) \
  76. for (i = 0; \
  77. (i < rsnd_ssi_nr(priv)) && \
  78. ((pos) = ((struct rsnd_ssiu *)((priv)->ssiu))->ssi + i); \
  79. i++)
  80. #define rsnd_ssi_nr(priv) (((struct rsnd_ssiu *)((priv)->ssiu))->ssi_nr)
  81. #define rsnd_mod_to_ssi(_mod) container_of((_mod), struct rsnd_ssi, mod)
  82. #define rsnd_dma_to_ssi(dma) rsnd_mod_to_ssi(rsnd_dma_to_mod(dma))
  83. #define rsnd_ssi_pio_available(ssi) ((ssi)->info->pio_irq > 0)
  84. #define rsnd_ssi_dma_available(ssi) \
  85. rsnd_dma_available(rsnd_mod_to_dma(&(ssi)->mod))
  86. #define rsnd_ssi_clk_from_parent(ssi) ((ssi)->parent)
  87. #define rsnd_rdai_is_clk_master(rdai) ((rdai)->clk_master)
  88. #define rsnd_ssi_mode_flags(p) ((p)->info->flags)
  89. #define rsnd_ssi_dai_id(ssi) ((ssi)->info->dai_id)
  90. #define rsnd_ssi_to_ssiu(ssi)\
  91. (((struct rsnd_ssiu *)((ssi) - rsnd_mod_id(&(ssi)->mod))) - 1)
  92. static void rsnd_ssi_mode_init(struct rsnd_priv *priv,
  93. struct rsnd_ssiu *ssiu)
  94. {
  95. struct device *dev = rsnd_priv_to_dev(priv);
  96. struct rsnd_ssi *ssi;
  97. struct rsnd_mod *scu;
  98. u32 flags;
  99. u32 val;
  100. int i;
  101. /*
  102. * SSI_MODE0
  103. */
  104. ssiu->ssi_mode0 = 0;
  105. for_each_rsnd_ssi(ssi, priv, i) {
  106. flags = rsnd_ssi_mode_flags(ssi);
  107. scu = rsnd_scu_mod_get(priv, rsnd_mod_id(&ssi->mod));
  108. /* see also BUSIF_MODE */
  109. if (rsnd_scu_hpbif_is_enable(scu)) {
  110. dev_dbg(dev, "SSI%d uses DEPENDENT mode\n", i);
  111. } else {
  112. ssiu->ssi_mode0 |= (1 << i);
  113. dev_dbg(dev, "SSI%d uses INDEPENDENT mode\n", i);
  114. }
  115. }
  116. /*
  117. * SSI_MODE1
  118. */
  119. #define ssi_parent_set(p, sync, adg, ext) \
  120. do { \
  121. ssi->parent = ssiu->ssi + p; \
  122. if (flags & RSND_SSI_CLK_FROM_ADG) \
  123. val = adg; \
  124. else \
  125. val = ext; \
  126. if (flags & RSND_SSI_SYNC) \
  127. val |= sync; \
  128. } while (0)
  129. ssiu->ssi_mode1 = 0;
  130. for_each_rsnd_ssi(ssi, priv, i) {
  131. flags = rsnd_ssi_mode_flags(ssi);
  132. if (!(flags & RSND_SSI_CLK_PIN_SHARE))
  133. continue;
  134. val = 0;
  135. switch (i) {
  136. case 1:
  137. ssi_parent_set(0, (1 << 4), (0x2 << 0), (0x1 << 0));
  138. break;
  139. case 2:
  140. ssi_parent_set(0, (1 << 4), (0x2 << 2), (0x1 << 2));
  141. break;
  142. case 4:
  143. ssi_parent_set(3, (1 << 20), (0x2 << 16), (0x1 << 16));
  144. break;
  145. case 8:
  146. ssi_parent_set(7, 0, 0, 0);
  147. break;
  148. }
  149. ssiu->ssi_mode1 |= val;
  150. }
  151. }
  152. static void rsnd_ssi_mode_set(struct rsnd_ssi *ssi)
  153. {
  154. struct rsnd_ssiu *ssiu = rsnd_ssi_to_ssiu(ssi);
  155. rsnd_mod_write(&ssi->mod, SSI_MODE0, ssiu->ssi_mode0);
  156. rsnd_mod_write(&ssi->mod, SSI_MODE1, ssiu->ssi_mode1);
  157. }
  158. static void rsnd_ssi_status_check(struct rsnd_mod *mod,
  159. u32 bit)
  160. {
  161. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  162. struct device *dev = rsnd_priv_to_dev(priv);
  163. u32 status;
  164. int i;
  165. for (i = 0; i < 1024; i++) {
  166. status = rsnd_mod_read(mod, SSISR);
  167. if (status & bit)
  168. return;
  169. udelay(50);
  170. }
  171. dev_warn(dev, "status check failed\n");
  172. }
  173. static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi,
  174. unsigned int rate)
  175. {
  176. struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
  177. struct device *dev = rsnd_priv_to_dev(priv);
  178. int i, j, ret;
  179. int adg_clk_div_table[] = {
  180. 1, 6, /* see adg.c */
  181. };
  182. int ssi_clk_mul_table[] = {
  183. 1, 2, 4, 8, 16, 6, 12,
  184. };
  185. unsigned int main_rate;
  186. /*
  187. * Find best clock, and try to start ADG
  188. */
  189. for (i = 0; i < ARRAY_SIZE(adg_clk_div_table); i++) {
  190. for (j = 0; j < ARRAY_SIZE(ssi_clk_mul_table); j++) {
  191. /*
  192. * this driver is assuming that
  193. * system word is 64fs (= 2 x 32bit)
  194. * see rsnd_ssi_start()
  195. */
  196. main_rate = rate / adg_clk_div_table[i]
  197. * 32 * 2 * ssi_clk_mul_table[j];
  198. ret = rsnd_adg_ssi_clk_try_start(&ssi->mod, main_rate);
  199. if (0 == ret) {
  200. ssi->rate = rate;
  201. ssi->cr_clk = FORCE | SWL_32 |
  202. SCKD | SWSD | CKDV(j);
  203. dev_dbg(dev, "ssi%d outputs %u Hz\n",
  204. rsnd_mod_id(&ssi->mod), rate);
  205. return 0;
  206. }
  207. }
  208. }
  209. dev_err(dev, "unsupported clock rate\n");
  210. return -EIO;
  211. }
  212. static void rsnd_ssi_master_clk_stop(struct rsnd_ssi *ssi)
  213. {
  214. ssi->rate = 0;
  215. ssi->cr_clk = 0;
  216. rsnd_adg_ssi_clk_stop(&ssi->mod);
  217. }
  218. static void rsnd_ssi_hw_start(struct rsnd_ssi *ssi,
  219. struct rsnd_dai *rdai,
  220. struct rsnd_dai_stream *io)
  221. {
  222. struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
  223. struct device *dev = rsnd_priv_to_dev(priv);
  224. u32 cr;
  225. if (0 == ssi->usrcnt) {
  226. clk_enable(ssi->clk);
  227. if (rsnd_rdai_is_clk_master(rdai)) {
  228. struct snd_pcm_runtime *runtime;
  229. runtime = rsnd_io_to_runtime(io);
  230. if (rsnd_ssi_clk_from_parent(ssi))
  231. rsnd_ssi_hw_start(ssi->parent, rdai, io);
  232. else
  233. rsnd_ssi_master_clk_start(ssi, runtime->rate);
  234. }
  235. }
  236. cr = ssi->cr_own |
  237. ssi->cr_clk |
  238. ssi->cr_etc |
  239. EN;
  240. rsnd_mod_write(&ssi->mod, SSICR, cr);
  241. ssi->usrcnt++;
  242. dev_dbg(dev, "ssi%d hw started\n", rsnd_mod_id(&ssi->mod));
  243. }
  244. static void rsnd_ssi_hw_stop(struct rsnd_ssi *ssi,
  245. struct rsnd_dai *rdai)
  246. {
  247. struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
  248. struct device *dev = rsnd_priv_to_dev(priv);
  249. u32 cr;
  250. if (0 == ssi->usrcnt) /* stop might be called without start */
  251. return;
  252. ssi->usrcnt--;
  253. if (0 == ssi->usrcnt) {
  254. /*
  255. * disable all IRQ,
  256. * and, wait all data was sent
  257. */
  258. cr = ssi->cr_own |
  259. ssi->cr_clk;
  260. rsnd_mod_write(&ssi->mod, SSICR, cr | EN);
  261. rsnd_ssi_status_check(&ssi->mod, DIRQ);
  262. /*
  263. * disable SSI,
  264. * and, wait idle state
  265. */
  266. rsnd_mod_write(&ssi->mod, SSICR, cr); /* disabled all */
  267. rsnd_ssi_status_check(&ssi->mod, IIRQ);
  268. if (rsnd_rdai_is_clk_master(rdai)) {
  269. if (rsnd_ssi_clk_from_parent(ssi))
  270. rsnd_ssi_hw_stop(ssi->parent, rdai);
  271. else
  272. rsnd_ssi_master_clk_stop(ssi);
  273. }
  274. clk_disable(ssi->clk);
  275. }
  276. dev_dbg(dev, "ssi%d hw stopped\n", rsnd_mod_id(&ssi->mod));
  277. }
  278. /*
  279. * SSI mod common functions
  280. */
  281. static int rsnd_ssi_init(struct rsnd_mod *mod,
  282. struct rsnd_dai *rdai,
  283. struct rsnd_dai_stream *io)
  284. {
  285. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  286. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  287. struct device *dev = rsnd_priv_to_dev(priv);
  288. struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
  289. u32 cr;
  290. cr = FORCE;
  291. /*
  292. * always use 32bit system word for easy clock calculation.
  293. * see also rsnd_ssi_master_clk_enable()
  294. */
  295. cr |= SWL_32;
  296. /*
  297. * init clock settings for SSICR
  298. */
  299. switch (runtime->sample_bits) {
  300. case 16:
  301. cr |= DWL_16;
  302. break;
  303. case 32:
  304. cr |= DWL_24;
  305. break;
  306. default:
  307. return -EIO;
  308. }
  309. if (rdai->bit_clk_inv)
  310. cr |= SCKP;
  311. if (rdai->frm_clk_inv)
  312. cr |= SWSP;
  313. if (rdai->data_alignment)
  314. cr |= SDTA;
  315. if (rdai->sys_delay)
  316. cr |= DEL;
  317. if (rsnd_dai_is_play(rdai, io))
  318. cr |= TRMD;
  319. /*
  320. * set ssi parameter
  321. */
  322. ssi->rdai = rdai;
  323. ssi->io = io;
  324. ssi->cr_own = cr;
  325. ssi->err = -1; /* ignore 1st error */
  326. rsnd_ssi_mode_set(ssi);
  327. dev_dbg(dev, "%s.%d init\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
  328. return 0;
  329. }
  330. static int rsnd_ssi_quit(struct rsnd_mod *mod,
  331. struct rsnd_dai *rdai,
  332. struct rsnd_dai_stream *io)
  333. {
  334. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  335. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  336. struct device *dev = rsnd_priv_to_dev(priv);
  337. dev_dbg(dev, "%s.%d quit\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
  338. if (ssi->err > 0)
  339. dev_warn(dev, "ssi under/over flow err = %d\n", ssi->err);
  340. ssi->rdai = NULL;
  341. ssi->io = NULL;
  342. ssi->cr_own = 0;
  343. ssi->err = 0;
  344. return 0;
  345. }
  346. static void rsnd_ssi_record_error(struct rsnd_ssi *ssi, u32 status)
  347. {
  348. /* under/over flow error */
  349. if (status & (UIRQ | OIRQ)) {
  350. ssi->err++;
  351. /* clear error status */
  352. rsnd_mod_write(&ssi->mod, SSISR, 0);
  353. }
  354. }
  355. /*
  356. * SSI PIO
  357. */
  358. static irqreturn_t rsnd_ssi_pio_interrupt(int irq, void *data)
  359. {
  360. struct rsnd_ssi *ssi = data;
  361. struct rsnd_dai_stream *io = ssi->io;
  362. u32 status = rsnd_mod_read(&ssi->mod, SSISR);
  363. irqreturn_t ret = IRQ_NONE;
  364. if (io && (status & DIRQ)) {
  365. struct rsnd_dai *rdai = ssi->rdai;
  366. struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
  367. u32 *buf = (u32 *)(runtime->dma_area +
  368. rsnd_dai_pointer_offset(io, 0));
  369. rsnd_ssi_record_error(ssi, status);
  370. /*
  371. * 8/16/32 data can be assesse to TDR/RDR register
  372. * directly as 32bit data
  373. * see rsnd_ssi_init()
  374. */
  375. if (rsnd_dai_is_play(rdai, io))
  376. rsnd_mod_write(&ssi->mod, SSITDR, *buf);
  377. else
  378. *buf = rsnd_mod_read(&ssi->mod, SSIRDR);
  379. rsnd_dai_pointer_update(io, sizeof(*buf));
  380. ret = IRQ_HANDLED;
  381. }
  382. return ret;
  383. }
  384. static int rsnd_ssi_pio_start(struct rsnd_mod *mod,
  385. struct rsnd_dai *rdai,
  386. struct rsnd_dai_stream *io)
  387. {
  388. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  389. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  390. struct device *dev = rsnd_priv_to_dev(priv);
  391. /* enable PIO IRQ */
  392. ssi->cr_etc = UIEN | OIEN | DIEN;
  393. rsnd_ssi_hw_start(ssi, rdai, io);
  394. dev_dbg(dev, "%s.%d start\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
  395. return 0;
  396. }
  397. static int rsnd_ssi_pio_stop(struct rsnd_mod *mod,
  398. struct rsnd_dai *rdai,
  399. struct rsnd_dai_stream *io)
  400. {
  401. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  402. struct device *dev = rsnd_priv_to_dev(priv);
  403. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  404. dev_dbg(dev, "%s.%d stop\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
  405. ssi->cr_etc = 0;
  406. rsnd_ssi_hw_stop(ssi, rdai);
  407. return 0;
  408. }
  409. static struct rsnd_mod_ops rsnd_ssi_pio_ops = {
  410. .name = "ssi (pio)",
  411. .init = rsnd_ssi_init,
  412. .quit = rsnd_ssi_quit,
  413. .start = rsnd_ssi_pio_start,
  414. .stop = rsnd_ssi_pio_stop,
  415. };
  416. static int rsnd_ssi_dma_inquiry(struct rsnd_dma *dma, dma_addr_t *buf, int *len)
  417. {
  418. struct rsnd_ssi *ssi = rsnd_dma_to_ssi(dma);
  419. struct rsnd_dai_stream *io = ssi->io;
  420. struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
  421. *len = io->byte_per_period;
  422. *buf = runtime->dma_addr +
  423. rsnd_dai_pointer_offset(io, ssi->dma_offset + *len);
  424. ssi->dma_offset = *len; /* it cares A/B plane */
  425. return 0;
  426. }
  427. static int rsnd_ssi_dma_complete(struct rsnd_dma *dma)
  428. {
  429. struct rsnd_ssi *ssi = rsnd_dma_to_ssi(dma);
  430. struct rsnd_dai_stream *io = ssi->io;
  431. u32 status = rsnd_mod_read(&ssi->mod, SSISR);
  432. rsnd_ssi_record_error(ssi, status);
  433. rsnd_dai_pointer_update(ssi->io, io->byte_per_period);
  434. return 0;
  435. }
  436. static int rsnd_ssi_dma_start(struct rsnd_mod *mod,
  437. struct rsnd_dai *rdai,
  438. struct rsnd_dai_stream *io)
  439. {
  440. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  441. struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
  442. /* enable DMA transfer */
  443. ssi->cr_etc = DMEN;
  444. ssi->dma_offset = 0;
  445. rsnd_dma_start(dma);
  446. rsnd_ssi_hw_start(ssi, ssi->rdai, io);
  447. /* enable WS continue */
  448. if (rsnd_rdai_is_clk_master(rdai))
  449. rsnd_mod_write(&ssi->mod, SSIWSR, CONT);
  450. return 0;
  451. }
  452. static int rsnd_ssi_dma_stop(struct rsnd_mod *mod,
  453. struct rsnd_dai *rdai,
  454. struct rsnd_dai_stream *io)
  455. {
  456. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  457. struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
  458. ssi->cr_etc = 0;
  459. rsnd_ssi_hw_stop(ssi, rdai);
  460. rsnd_dma_stop(dma);
  461. return 0;
  462. }
  463. static struct rsnd_mod_ops rsnd_ssi_dma_ops = {
  464. .name = "ssi (dma)",
  465. .init = rsnd_ssi_init,
  466. .quit = rsnd_ssi_quit,
  467. .start = rsnd_ssi_dma_start,
  468. .stop = rsnd_ssi_dma_stop,
  469. };
  470. /*
  471. * Non SSI
  472. */
  473. static int rsnd_ssi_non(struct rsnd_mod *mod,
  474. struct rsnd_dai *rdai,
  475. struct rsnd_dai_stream *io)
  476. {
  477. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  478. struct device *dev = rsnd_priv_to_dev(priv);
  479. dev_dbg(dev, "%s\n", __func__);
  480. return 0;
  481. }
  482. static struct rsnd_mod_ops rsnd_ssi_non_ops = {
  483. .name = "ssi (non)",
  484. .init = rsnd_ssi_non,
  485. .quit = rsnd_ssi_non,
  486. .start = rsnd_ssi_non,
  487. .stop = rsnd_ssi_non,
  488. };
  489. /*
  490. * ssi mod function
  491. */
  492. struct rsnd_mod *rsnd_ssi_mod_get_frm_dai(struct rsnd_priv *priv,
  493. int dai_id, int is_play)
  494. {
  495. struct rsnd_ssi *ssi;
  496. int i, has_play;
  497. is_play = !!is_play;
  498. for_each_rsnd_ssi(ssi, priv, i) {
  499. if (rsnd_ssi_dai_id(ssi) != dai_id)
  500. continue;
  501. has_play = !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY);
  502. if (is_play == has_play)
  503. return &ssi->mod;
  504. }
  505. return NULL;
  506. }
  507. struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id)
  508. {
  509. BUG_ON(id < 0 || id >= rsnd_ssi_nr(priv));
  510. return &(((struct rsnd_ssiu *)(priv->ssiu))->ssi + id)->mod;
  511. }
  512. int rsnd_ssi_probe(struct platform_device *pdev,
  513. struct rcar_snd_info *info,
  514. struct rsnd_priv *priv)
  515. {
  516. struct rsnd_ssi_platform_info *pinfo;
  517. struct device *dev = rsnd_priv_to_dev(priv);
  518. struct rsnd_mod_ops *ops;
  519. struct clk *clk;
  520. struct rsnd_ssiu *ssiu;
  521. struct rsnd_ssi *ssi;
  522. char name[RSND_SSI_NAME_SIZE];
  523. int i, nr, ret;
  524. /*
  525. * init SSI
  526. */
  527. nr = info->ssi_info_nr;
  528. ssiu = devm_kzalloc(dev, sizeof(*ssiu) + (sizeof(*ssi) * nr),
  529. GFP_KERNEL);
  530. if (!ssiu) {
  531. dev_err(dev, "SSI allocate failed\n");
  532. return -ENOMEM;
  533. }
  534. priv->ssiu = ssiu;
  535. ssiu->ssi = (struct rsnd_ssi *)(ssiu + 1);
  536. ssiu->ssi_nr = nr;
  537. for_each_rsnd_ssi(ssi, priv, i) {
  538. pinfo = &info->ssi_info[i];
  539. snprintf(name, RSND_SSI_NAME_SIZE, "ssi.%d", i);
  540. clk = clk_get(dev, name);
  541. if (IS_ERR(clk))
  542. return PTR_ERR(clk);
  543. ssi->info = pinfo;
  544. ssi->clk = clk;
  545. ops = &rsnd_ssi_non_ops;
  546. /*
  547. * SSI DMA case
  548. */
  549. if (pinfo->dma_id > 0) {
  550. ret = rsnd_dma_init(
  551. priv, rsnd_mod_to_dma(&ssi->mod),
  552. (rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY),
  553. pinfo->dma_id,
  554. rsnd_ssi_dma_inquiry,
  555. rsnd_ssi_dma_complete);
  556. if (ret < 0)
  557. dev_info(dev, "SSI DMA failed. try PIO transter\n");
  558. else
  559. ops = &rsnd_ssi_dma_ops;
  560. dev_dbg(dev, "SSI%d use DMA transfer\n", i);
  561. }
  562. /*
  563. * SSI PIO case
  564. */
  565. if (!rsnd_ssi_dma_available(ssi) &&
  566. rsnd_ssi_pio_available(ssi)) {
  567. ret = devm_request_irq(dev, pinfo->pio_irq,
  568. &rsnd_ssi_pio_interrupt,
  569. IRQF_SHARED,
  570. dev_name(dev), ssi);
  571. if (ret) {
  572. dev_err(dev, "SSI request interrupt failed\n");
  573. return ret;
  574. }
  575. ops = &rsnd_ssi_pio_ops;
  576. dev_dbg(dev, "SSI%d use PIO transfer\n", i);
  577. }
  578. rsnd_mod_init(priv, &ssi->mod, ops, i);
  579. }
  580. rsnd_ssi_mode_init(priv, ssiu);
  581. dev_dbg(dev, "ssi probed\n");
  582. return 0;
  583. }
  584. void rsnd_ssi_remove(struct platform_device *pdev,
  585. struct rsnd_priv *priv)
  586. {
  587. struct rsnd_ssi *ssi;
  588. int i;
  589. for_each_rsnd_ssi(ssi, priv, i) {
  590. clk_put(ssi->clk);
  591. if (rsnd_ssi_dma_available(ssi))
  592. rsnd_dma_quit(priv, rsnd_mod_to_dma(&ssi->mod));
  593. }
  594. }