wm831x-dcdc.c 26 KB

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  1. /*
  2. * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/bitops.h>
  17. #include <linux/err.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/gpio.h>
  23. #include <linux/slab.h>
  24. #include <linux/mfd/wm831x/core.h>
  25. #include <linux/mfd/wm831x/regulator.h>
  26. #include <linux/mfd/wm831x/pdata.h>
  27. #define WM831X_BUCKV_MAX_SELECTOR 0x68
  28. #define WM831X_BUCKP_MAX_SELECTOR 0x66
  29. #define WM831X_DCDC_MODE_FAST 0
  30. #define WM831X_DCDC_MODE_NORMAL 1
  31. #define WM831X_DCDC_MODE_IDLE 2
  32. #define WM831X_DCDC_MODE_STANDBY 3
  33. #define WM831X_DCDC_MAX_NAME 6
  34. /* Register offsets in control block */
  35. #define WM831X_DCDC_CONTROL_1 0
  36. #define WM831X_DCDC_CONTROL_2 1
  37. #define WM831X_DCDC_ON_CONFIG 2
  38. #define WM831X_DCDC_SLEEP_CONTROL 3
  39. #define WM831X_DCDC_DVS_CONTROL 4
  40. /*
  41. * Shared
  42. */
  43. struct wm831x_dcdc {
  44. char name[WM831X_DCDC_MAX_NAME];
  45. struct regulator_desc desc;
  46. int base;
  47. struct wm831x *wm831x;
  48. struct regulator_dev *regulator;
  49. int dvs_gpio;
  50. int dvs_gpio_state;
  51. int on_vsel;
  52. int dvs_vsel;
  53. };
  54. static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev)
  55. {
  56. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  57. struct wm831x *wm831x = dcdc->wm831x;
  58. int mask = 1 << rdev_get_id(rdev);
  59. int reg;
  60. reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE);
  61. if (reg < 0)
  62. return reg;
  63. if (reg & mask)
  64. return 1;
  65. else
  66. return 0;
  67. }
  68. static int wm831x_dcdc_enable(struct regulator_dev *rdev)
  69. {
  70. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  71. struct wm831x *wm831x = dcdc->wm831x;
  72. int mask = 1 << rdev_get_id(rdev);
  73. return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask);
  74. }
  75. static int wm831x_dcdc_disable(struct regulator_dev *rdev)
  76. {
  77. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  78. struct wm831x *wm831x = dcdc->wm831x;
  79. int mask = 1 << rdev_get_id(rdev);
  80. return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0);
  81. }
  82. static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
  83. {
  84. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  85. struct wm831x *wm831x = dcdc->wm831x;
  86. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  87. int val;
  88. val = wm831x_reg_read(wm831x, reg);
  89. if (val < 0)
  90. return val;
  91. val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
  92. switch (val) {
  93. case WM831X_DCDC_MODE_FAST:
  94. return REGULATOR_MODE_FAST;
  95. case WM831X_DCDC_MODE_NORMAL:
  96. return REGULATOR_MODE_NORMAL;
  97. case WM831X_DCDC_MODE_STANDBY:
  98. return REGULATOR_MODE_STANDBY;
  99. case WM831X_DCDC_MODE_IDLE:
  100. return REGULATOR_MODE_IDLE;
  101. default:
  102. BUG();
  103. return -EINVAL;
  104. }
  105. }
  106. static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
  107. unsigned int mode)
  108. {
  109. int val;
  110. switch (mode) {
  111. case REGULATOR_MODE_FAST:
  112. val = WM831X_DCDC_MODE_FAST;
  113. break;
  114. case REGULATOR_MODE_NORMAL:
  115. val = WM831X_DCDC_MODE_NORMAL;
  116. break;
  117. case REGULATOR_MODE_STANDBY:
  118. val = WM831X_DCDC_MODE_STANDBY;
  119. break;
  120. case REGULATOR_MODE_IDLE:
  121. val = WM831X_DCDC_MODE_IDLE;
  122. break;
  123. default:
  124. return -EINVAL;
  125. }
  126. return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
  127. val << WM831X_DC1_ON_MODE_SHIFT);
  128. }
  129. static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
  130. {
  131. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  132. struct wm831x *wm831x = dcdc->wm831x;
  133. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  134. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  135. }
  136. static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
  137. unsigned int mode)
  138. {
  139. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  140. struct wm831x *wm831x = dcdc->wm831x;
  141. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  142. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  143. }
  144. static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
  145. {
  146. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  147. struct wm831x *wm831x = dcdc->wm831x;
  148. int ret;
  149. /* First, check for errors */
  150. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  151. if (ret < 0)
  152. return ret;
  153. if (ret & (1 << rdev_get_id(rdev))) {
  154. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  155. rdev_get_id(rdev) + 1);
  156. return REGULATOR_STATUS_ERROR;
  157. }
  158. /* DCDC1 and DCDC2 can additionally detect high voltage/current */
  159. if (rdev_get_id(rdev) < 2) {
  160. if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
  161. dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
  162. rdev_get_id(rdev) + 1);
  163. return REGULATOR_STATUS_ERROR;
  164. }
  165. if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
  166. dev_dbg(wm831x->dev, "DCDC%d over current\n",
  167. rdev_get_id(rdev) + 1);
  168. return REGULATOR_STATUS_ERROR;
  169. }
  170. }
  171. /* Is the regulator on? */
  172. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  173. if (ret < 0)
  174. return ret;
  175. if (!(ret & (1 << rdev_get_id(rdev))))
  176. return REGULATOR_STATUS_OFF;
  177. /* TODO: When we handle hardware control modes so we can report the
  178. * current mode. */
  179. return REGULATOR_STATUS_ON;
  180. }
  181. static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
  182. {
  183. struct wm831x_dcdc *dcdc = data;
  184. regulator_notifier_call_chain(dcdc->regulator,
  185. REGULATOR_EVENT_UNDER_VOLTAGE,
  186. NULL);
  187. return IRQ_HANDLED;
  188. }
  189. static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
  190. {
  191. struct wm831x_dcdc *dcdc = data;
  192. regulator_notifier_call_chain(dcdc->regulator,
  193. REGULATOR_EVENT_OVER_CURRENT,
  194. NULL);
  195. return IRQ_HANDLED;
  196. }
  197. /*
  198. * BUCKV specifics
  199. */
  200. static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
  201. unsigned selector)
  202. {
  203. if (selector <= 0x8)
  204. return 600000;
  205. if (selector <= WM831X_BUCKV_MAX_SELECTOR)
  206. return 600000 + ((selector - 0x8) * 12500);
  207. return -EINVAL;
  208. }
  209. static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev,
  210. int min_uV, int max_uV)
  211. {
  212. u16 vsel;
  213. if (min_uV < 600000)
  214. vsel = 0;
  215. else if (min_uV <= 1800000)
  216. vsel = ((min_uV - 600000) / 12500) + 8;
  217. else
  218. return -EINVAL;
  219. if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
  220. return -EINVAL;
  221. return vsel;
  222. }
  223. static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
  224. {
  225. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  226. if (state == dcdc->dvs_gpio_state)
  227. return 0;
  228. dcdc->dvs_gpio_state = state;
  229. gpio_set_value(dcdc->dvs_gpio, state);
  230. /* Should wait for DVS state change to be asserted if we have
  231. * a GPIO for it, for now assume the device is configured
  232. * for the fastest possible transition.
  233. */
  234. return 0;
  235. }
  236. static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
  237. int min_uV, int max_uV, unsigned *selector)
  238. {
  239. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  240. struct wm831x *wm831x = dcdc->wm831x;
  241. int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  242. int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
  243. int vsel, ret;
  244. vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV);
  245. if (vsel < 0)
  246. return vsel;
  247. *selector = vsel;
  248. /* If this value is already set then do a GPIO update if we can */
  249. if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
  250. return wm831x_buckv_set_dvs(rdev, 0);
  251. if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
  252. return wm831x_buckv_set_dvs(rdev, 1);
  253. /* Always set the ON status to the minimum voltage */
  254. ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
  255. if (ret < 0)
  256. return ret;
  257. dcdc->on_vsel = vsel;
  258. if (!dcdc->dvs_gpio)
  259. return ret;
  260. /* Kick the voltage transition now */
  261. ret = wm831x_buckv_set_dvs(rdev, 0);
  262. if (ret < 0)
  263. return ret;
  264. /*
  265. * If this VSEL is higher than the last one we've seen then
  266. * remember it as the DVS VSEL. This is optimised for CPUfreq
  267. * usage where we want to get to the highest voltage very
  268. * quickly.
  269. */
  270. if (vsel > dcdc->dvs_vsel) {
  271. ret = wm831x_set_bits(wm831x, dvs_reg,
  272. WM831X_DC1_DVS_VSEL_MASK,
  273. dcdc->dvs_vsel);
  274. if (ret == 0)
  275. dcdc->dvs_vsel = vsel;
  276. else
  277. dev_warn(wm831x->dev,
  278. "Failed to set DCDC DVS VSEL: %d\n", ret);
  279. }
  280. return 0;
  281. }
  282. static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
  283. int uV)
  284. {
  285. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  286. struct wm831x *wm831x = dcdc->wm831x;
  287. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  288. int vsel;
  289. vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV);
  290. if (vsel < 0)
  291. return vsel;
  292. return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
  293. }
  294. static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
  295. {
  296. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  297. if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
  298. return dcdc->dvs_vsel;
  299. else
  300. return dcdc->on_vsel;
  301. }
  302. /* Current limit options */
  303. static u16 wm831x_dcdc_ilim[] = {
  304. 125, 250, 375, 500, 625, 750, 875, 1000
  305. };
  306. static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
  307. int min_uA, int max_uA)
  308. {
  309. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  310. struct wm831x *wm831x = dcdc->wm831x;
  311. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  312. int i;
  313. for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) {
  314. if ((min_uA <= wm831x_dcdc_ilim[i]) &&
  315. (wm831x_dcdc_ilim[i] <= max_uA))
  316. break;
  317. }
  318. if (i == ARRAY_SIZE(wm831x_dcdc_ilim))
  319. return -EINVAL;
  320. return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK,
  321. i << WM831X_DC1_HC_THR_SHIFT);
  322. }
  323. static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
  324. {
  325. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  326. struct wm831x *wm831x = dcdc->wm831x;
  327. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  328. int val;
  329. val = wm831x_reg_read(wm831x, reg);
  330. if (val < 0)
  331. return val;
  332. val = (val & WM831X_DC1_HC_THR_MASK) >> WM831X_DC1_HC_THR_SHIFT;
  333. return wm831x_dcdc_ilim[val];
  334. }
  335. static struct regulator_ops wm831x_buckv_ops = {
  336. .set_voltage = wm831x_buckv_set_voltage,
  337. .get_voltage_sel = wm831x_buckv_get_voltage_sel,
  338. .list_voltage = wm831x_buckv_list_voltage,
  339. .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
  340. .set_current_limit = wm831x_buckv_set_current_limit,
  341. .get_current_limit = wm831x_buckv_get_current_limit,
  342. .is_enabled = wm831x_dcdc_is_enabled,
  343. .enable = wm831x_dcdc_enable,
  344. .disable = wm831x_dcdc_disable,
  345. .get_status = wm831x_dcdc_get_status,
  346. .get_mode = wm831x_dcdc_get_mode,
  347. .set_mode = wm831x_dcdc_set_mode,
  348. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  349. };
  350. /*
  351. * Set up DVS control. We just log errors since we can still run
  352. * (with reduced performance) if we fail.
  353. */
  354. static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
  355. struct wm831x_buckv_pdata *pdata)
  356. {
  357. struct wm831x *wm831x = dcdc->wm831x;
  358. int ret;
  359. u16 ctrl;
  360. if (!pdata || !pdata->dvs_gpio)
  361. return;
  362. ret = gpio_request(pdata->dvs_gpio, "DCDC DVS");
  363. if (ret < 0) {
  364. dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
  365. dcdc->name, ret);
  366. return;
  367. }
  368. /* gpiolib won't let us read the GPIO status so pick the higher
  369. * of the two existing voltages so we take it as platform data.
  370. */
  371. dcdc->dvs_gpio_state = pdata->dvs_init_state;
  372. ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state);
  373. if (ret < 0) {
  374. dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n",
  375. dcdc->name, ret);
  376. gpio_free(pdata->dvs_gpio);
  377. return;
  378. }
  379. dcdc->dvs_gpio = pdata->dvs_gpio;
  380. switch (pdata->dvs_control_src) {
  381. case 1:
  382. ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
  383. break;
  384. case 2:
  385. ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
  386. break;
  387. default:
  388. dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
  389. pdata->dvs_control_src, dcdc->name);
  390. return;
  391. }
  392. /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
  393. * to make bootstrapping a bit smoother.
  394. */
  395. if (!dcdc->dvs_vsel) {
  396. ret = wm831x_set_bits(wm831x,
  397. dcdc->base + WM831X_DCDC_DVS_CONTROL,
  398. WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
  399. if (ret == 0)
  400. dcdc->dvs_vsel = dcdc->on_vsel;
  401. else
  402. dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
  403. ret);
  404. }
  405. ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
  406. WM831X_DC1_DVS_SRC_MASK, ctrl);
  407. if (ret < 0) {
  408. dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
  409. dcdc->name, ret);
  410. }
  411. }
  412. static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
  413. {
  414. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  415. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  416. int id;
  417. struct wm831x_dcdc *dcdc;
  418. struct resource *res;
  419. int ret, irq;
  420. if (pdata && pdata->wm831x_num)
  421. id = (pdata->wm831x_num * 10) + 1;
  422. else
  423. id = 0;
  424. id = pdev->id - id;
  425. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  426. if (pdata == NULL || pdata->dcdc[id] == NULL)
  427. return -ENODEV;
  428. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
  429. GFP_KERNEL);
  430. if (dcdc == NULL) {
  431. dev_err(&pdev->dev, "Unable to allocate private data\n");
  432. return -ENOMEM;
  433. }
  434. dcdc->wm831x = wm831x;
  435. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  436. if (res == NULL) {
  437. dev_err(&pdev->dev, "No I/O resource\n");
  438. ret = -EINVAL;
  439. goto err;
  440. }
  441. dcdc->base = res->start;
  442. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  443. dcdc->desc.name = dcdc->name;
  444. dcdc->desc.id = id;
  445. dcdc->desc.type = REGULATOR_VOLTAGE;
  446. dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
  447. dcdc->desc.ops = &wm831x_buckv_ops;
  448. dcdc->desc.owner = THIS_MODULE;
  449. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  450. if (ret < 0) {
  451. dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
  452. goto err;
  453. }
  454. dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
  455. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
  456. if (ret < 0) {
  457. dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
  458. goto err;
  459. }
  460. dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
  461. if (pdata->dcdc[id])
  462. wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data);
  463. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  464. pdata->dcdc[id], dcdc, NULL);
  465. if (IS_ERR(dcdc->regulator)) {
  466. ret = PTR_ERR(dcdc->regulator);
  467. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  468. id + 1, ret);
  469. goto err;
  470. }
  471. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  472. ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
  473. IRQF_TRIGGER_RISING, dcdc->name, dcdc);
  474. if (ret != 0) {
  475. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  476. irq, ret);
  477. goto err_regulator;
  478. }
  479. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC"));
  480. ret = request_threaded_irq(irq, NULL, wm831x_dcdc_oc_irq,
  481. IRQF_TRIGGER_RISING, dcdc->name, dcdc);
  482. if (ret != 0) {
  483. dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
  484. irq, ret);
  485. goto err_uv;
  486. }
  487. platform_set_drvdata(pdev, dcdc);
  488. return 0;
  489. err_uv:
  490. free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")),
  491. dcdc);
  492. err_regulator:
  493. regulator_unregister(dcdc->regulator);
  494. err:
  495. if (dcdc->dvs_gpio)
  496. gpio_free(dcdc->dvs_gpio);
  497. return ret;
  498. }
  499. static __devexit int wm831x_buckv_remove(struct platform_device *pdev)
  500. {
  501. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  502. struct wm831x *wm831x = dcdc->wm831x;
  503. platform_set_drvdata(pdev, NULL);
  504. free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC")),
  505. dcdc);
  506. free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")),
  507. dcdc);
  508. regulator_unregister(dcdc->regulator);
  509. if (dcdc->dvs_gpio)
  510. gpio_free(dcdc->dvs_gpio);
  511. return 0;
  512. }
  513. static struct platform_driver wm831x_buckv_driver = {
  514. .probe = wm831x_buckv_probe,
  515. .remove = __devexit_p(wm831x_buckv_remove),
  516. .driver = {
  517. .name = "wm831x-buckv",
  518. .owner = THIS_MODULE,
  519. },
  520. };
  521. /*
  522. * BUCKP specifics
  523. */
  524. static int wm831x_buckp_list_voltage(struct regulator_dev *rdev,
  525. unsigned selector)
  526. {
  527. if (selector <= WM831X_BUCKP_MAX_SELECTOR)
  528. return 850000 + (selector * 25000);
  529. else
  530. return -EINVAL;
  531. }
  532. static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg,
  533. int min_uV, int max_uV, int *selector)
  534. {
  535. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  536. struct wm831x *wm831x = dcdc->wm831x;
  537. u16 vsel;
  538. if (min_uV <= 34000000)
  539. vsel = (min_uV - 850000) / 25000;
  540. else
  541. return -EINVAL;
  542. if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV)
  543. return -EINVAL;
  544. *selector = vsel;
  545. return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel);
  546. }
  547. static int wm831x_buckp_set_voltage(struct regulator_dev *rdev,
  548. int min_uV, int max_uV,
  549. unsigned *selector)
  550. {
  551. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  552. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  553. return wm831x_buckp_set_voltage_int(rdev, reg, min_uV, max_uV,
  554. selector);
  555. }
  556. static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev,
  557. int uV)
  558. {
  559. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  560. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  561. unsigned selector;
  562. return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV, &selector);
  563. }
  564. static int wm831x_buckp_get_voltage_sel(struct regulator_dev *rdev)
  565. {
  566. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  567. struct wm831x *wm831x = dcdc->wm831x;
  568. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  569. int val;
  570. val = wm831x_reg_read(wm831x, reg);
  571. if (val < 0)
  572. return val;
  573. return val & WM831X_DC3_ON_VSEL_MASK;
  574. }
  575. static struct regulator_ops wm831x_buckp_ops = {
  576. .set_voltage = wm831x_buckp_set_voltage,
  577. .get_voltage_sel = wm831x_buckp_get_voltage_sel,
  578. .list_voltage = wm831x_buckp_list_voltage,
  579. .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
  580. .is_enabled = wm831x_dcdc_is_enabled,
  581. .enable = wm831x_dcdc_enable,
  582. .disable = wm831x_dcdc_disable,
  583. .get_status = wm831x_dcdc_get_status,
  584. .get_mode = wm831x_dcdc_get_mode,
  585. .set_mode = wm831x_dcdc_set_mode,
  586. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  587. };
  588. static __devinit int wm831x_buckp_probe(struct platform_device *pdev)
  589. {
  590. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  591. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  592. int id;
  593. struct wm831x_dcdc *dcdc;
  594. struct resource *res;
  595. int ret, irq;
  596. if (pdata && pdata->wm831x_num)
  597. id = (pdata->wm831x_num * 10) + 1;
  598. else
  599. id = 0;
  600. id = pdev->id - id;
  601. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  602. if (pdata == NULL || pdata->dcdc[id] == NULL)
  603. return -ENODEV;
  604. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
  605. GFP_KERNEL);
  606. if (dcdc == NULL) {
  607. dev_err(&pdev->dev, "Unable to allocate private data\n");
  608. return -ENOMEM;
  609. }
  610. dcdc->wm831x = wm831x;
  611. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  612. if (res == NULL) {
  613. dev_err(&pdev->dev, "No I/O resource\n");
  614. ret = -EINVAL;
  615. goto err;
  616. }
  617. dcdc->base = res->start;
  618. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  619. dcdc->desc.name = dcdc->name;
  620. dcdc->desc.id = id;
  621. dcdc->desc.type = REGULATOR_VOLTAGE;
  622. dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
  623. dcdc->desc.ops = &wm831x_buckp_ops;
  624. dcdc->desc.owner = THIS_MODULE;
  625. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  626. pdata->dcdc[id], dcdc, NULL);
  627. if (IS_ERR(dcdc->regulator)) {
  628. ret = PTR_ERR(dcdc->regulator);
  629. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  630. id + 1, ret);
  631. goto err;
  632. }
  633. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  634. ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
  635. IRQF_TRIGGER_RISING, dcdc->name, dcdc);
  636. if (ret != 0) {
  637. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  638. irq, ret);
  639. goto err_regulator;
  640. }
  641. platform_set_drvdata(pdev, dcdc);
  642. return 0;
  643. err_regulator:
  644. regulator_unregister(dcdc->regulator);
  645. err:
  646. return ret;
  647. }
  648. static __devexit int wm831x_buckp_remove(struct platform_device *pdev)
  649. {
  650. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  651. platform_set_drvdata(pdev, NULL);
  652. free_irq(wm831x_irq(dcdc->wm831x, platform_get_irq_byname(pdev, "UV")),
  653. dcdc);
  654. regulator_unregister(dcdc->regulator);
  655. return 0;
  656. }
  657. static struct platform_driver wm831x_buckp_driver = {
  658. .probe = wm831x_buckp_probe,
  659. .remove = __devexit_p(wm831x_buckp_remove),
  660. .driver = {
  661. .name = "wm831x-buckp",
  662. .owner = THIS_MODULE,
  663. },
  664. };
  665. /*
  666. * DCDC boost convertors
  667. */
  668. static int wm831x_boostp_get_status(struct regulator_dev *rdev)
  669. {
  670. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  671. struct wm831x *wm831x = dcdc->wm831x;
  672. int ret;
  673. /* First, check for errors */
  674. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  675. if (ret < 0)
  676. return ret;
  677. if (ret & (1 << rdev_get_id(rdev))) {
  678. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  679. rdev_get_id(rdev) + 1);
  680. return REGULATOR_STATUS_ERROR;
  681. }
  682. /* Is the regulator on? */
  683. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  684. if (ret < 0)
  685. return ret;
  686. if (ret & (1 << rdev_get_id(rdev)))
  687. return REGULATOR_STATUS_ON;
  688. else
  689. return REGULATOR_STATUS_OFF;
  690. }
  691. static struct regulator_ops wm831x_boostp_ops = {
  692. .get_status = wm831x_boostp_get_status,
  693. .is_enabled = wm831x_dcdc_is_enabled,
  694. .enable = wm831x_dcdc_enable,
  695. .disable = wm831x_dcdc_disable,
  696. };
  697. static __devinit int wm831x_boostp_probe(struct platform_device *pdev)
  698. {
  699. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  700. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  701. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  702. struct wm831x_dcdc *dcdc;
  703. struct resource *res;
  704. int ret, irq;
  705. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  706. if (pdata == NULL || pdata->dcdc[id] == NULL)
  707. return -ENODEV;
  708. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  709. if (dcdc == NULL) {
  710. dev_err(&pdev->dev, "Unable to allocate private data\n");
  711. return -ENOMEM;
  712. }
  713. dcdc->wm831x = wm831x;
  714. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  715. if (res == NULL) {
  716. dev_err(&pdev->dev, "No I/O resource\n");
  717. ret = -EINVAL;
  718. goto err;
  719. }
  720. dcdc->base = res->start;
  721. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  722. dcdc->desc.name = dcdc->name;
  723. dcdc->desc.id = id;
  724. dcdc->desc.type = REGULATOR_VOLTAGE;
  725. dcdc->desc.ops = &wm831x_boostp_ops;
  726. dcdc->desc.owner = THIS_MODULE;
  727. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  728. pdata->dcdc[id], dcdc, NULL);
  729. if (IS_ERR(dcdc->regulator)) {
  730. ret = PTR_ERR(dcdc->regulator);
  731. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  732. id + 1, ret);
  733. goto err;
  734. }
  735. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  736. ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
  737. IRQF_TRIGGER_RISING, dcdc->name,
  738. dcdc);
  739. if (ret != 0) {
  740. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  741. irq, ret);
  742. goto err_regulator;
  743. }
  744. platform_set_drvdata(pdev, dcdc);
  745. return 0;
  746. err_regulator:
  747. regulator_unregister(dcdc->regulator);
  748. err:
  749. kfree(dcdc);
  750. return ret;
  751. }
  752. static __devexit int wm831x_boostp_remove(struct platform_device *pdev)
  753. {
  754. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  755. platform_set_drvdata(pdev, NULL);
  756. free_irq(wm831x_irq(dcdc->wm831x, platform_get_irq_byname(pdev, "UV")),
  757. dcdc);
  758. regulator_unregister(dcdc->regulator);
  759. kfree(dcdc);
  760. return 0;
  761. }
  762. static struct platform_driver wm831x_boostp_driver = {
  763. .probe = wm831x_boostp_probe,
  764. .remove = __devexit_p(wm831x_boostp_remove),
  765. .driver = {
  766. .name = "wm831x-boostp",
  767. .owner = THIS_MODULE,
  768. },
  769. };
  770. /*
  771. * External Power Enable
  772. *
  773. * These aren't actually DCDCs but look like them in hardware so share
  774. * code.
  775. */
  776. #define WM831X_EPE_BASE 6
  777. static struct regulator_ops wm831x_epe_ops = {
  778. .is_enabled = wm831x_dcdc_is_enabled,
  779. .enable = wm831x_dcdc_enable,
  780. .disable = wm831x_dcdc_disable,
  781. .get_status = wm831x_dcdc_get_status,
  782. };
  783. static __devinit int wm831x_epe_probe(struct platform_device *pdev)
  784. {
  785. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  786. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  787. int id = pdev->id % ARRAY_SIZE(pdata->epe);
  788. struct wm831x_dcdc *dcdc;
  789. int ret;
  790. dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
  791. if (pdata == NULL || pdata->epe[id] == NULL)
  792. return -ENODEV;
  793. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  794. if (dcdc == NULL) {
  795. dev_err(&pdev->dev, "Unable to allocate private data\n");
  796. return -ENOMEM;
  797. }
  798. dcdc->wm831x = wm831x;
  799. /* For current parts this is correct; probably need to revisit
  800. * in future.
  801. */
  802. snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
  803. dcdc->desc.name = dcdc->name;
  804. dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
  805. dcdc->desc.ops = &wm831x_epe_ops;
  806. dcdc->desc.type = REGULATOR_VOLTAGE;
  807. dcdc->desc.owner = THIS_MODULE;
  808. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  809. pdata->epe[id], dcdc, NULL);
  810. if (IS_ERR(dcdc->regulator)) {
  811. ret = PTR_ERR(dcdc->regulator);
  812. dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
  813. id + 1, ret);
  814. goto err;
  815. }
  816. platform_set_drvdata(pdev, dcdc);
  817. return 0;
  818. err:
  819. kfree(dcdc);
  820. return ret;
  821. }
  822. static __devexit int wm831x_epe_remove(struct platform_device *pdev)
  823. {
  824. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  825. platform_set_drvdata(pdev, NULL);
  826. regulator_unregister(dcdc->regulator);
  827. kfree(dcdc);
  828. return 0;
  829. }
  830. static struct platform_driver wm831x_epe_driver = {
  831. .probe = wm831x_epe_probe,
  832. .remove = __devexit_p(wm831x_epe_remove),
  833. .driver = {
  834. .name = "wm831x-epe",
  835. .owner = THIS_MODULE,
  836. },
  837. };
  838. static int __init wm831x_dcdc_init(void)
  839. {
  840. int ret;
  841. ret = platform_driver_register(&wm831x_buckv_driver);
  842. if (ret != 0)
  843. pr_err("Failed to register WM831x BUCKV driver: %d\n", ret);
  844. ret = platform_driver_register(&wm831x_buckp_driver);
  845. if (ret != 0)
  846. pr_err("Failed to register WM831x BUCKP driver: %d\n", ret);
  847. ret = platform_driver_register(&wm831x_boostp_driver);
  848. if (ret != 0)
  849. pr_err("Failed to register WM831x BOOST driver: %d\n", ret);
  850. ret = platform_driver_register(&wm831x_epe_driver);
  851. if (ret != 0)
  852. pr_err("Failed to register WM831x EPE driver: %d\n", ret);
  853. return 0;
  854. }
  855. subsys_initcall(wm831x_dcdc_init);
  856. static void __exit wm831x_dcdc_exit(void)
  857. {
  858. platform_driver_unregister(&wm831x_epe_driver);
  859. platform_driver_unregister(&wm831x_boostp_driver);
  860. platform_driver_unregister(&wm831x_buckp_driver);
  861. platform_driver_unregister(&wm831x_buckv_driver);
  862. }
  863. module_exit(wm831x_dcdc_exit);
  864. /* Module information */
  865. MODULE_AUTHOR("Mark Brown");
  866. MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
  867. MODULE_LICENSE("GPL");
  868. MODULE_ALIAS("platform:wm831x-buckv");
  869. MODULE_ALIAS("platform:wm831x-buckp");
  870. MODULE_ALIAS("platform:wm831x-epe");