e1000_main.c 136 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. char e1000_driver_name[] = "e1000";
  23. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  24. #ifndef CONFIG_E1000_NAPI
  25. #define DRIVERNAPI
  26. #else
  27. #define DRIVERNAPI "-NAPI"
  28. #endif
  29. #define DRV_VERSION "7.0.38-k4"DRIVERNAPI
  30. char e1000_driver_version[] = DRV_VERSION;
  31. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* e1000_pci_tbl - PCI Device ID Table
  33. *
  34. * Last entry must be all 0s
  35. *
  36. * Macro expands to...
  37. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  38. */
  39. static struct pci_device_id e1000_pci_tbl[] = {
  40. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  41. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  44. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  45. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  48. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  59. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  61. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  65. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  66. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  67. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  71. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  73. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  74. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  75. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  76. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  77. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  78. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  79. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  80. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  81. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  82. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  83. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  84. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  85. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  86. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  87. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  88. /* required last entry */
  89. {0,}
  90. };
  91. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  92. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  93. struct e1000_tx_ring *txdr);
  94. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  95. struct e1000_rx_ring *rxdr);
  96. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  97. struct e1000_tx_ring *tx_ring);
  98. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  99. struct e1000_rx_ring *rx_ring);
  100. /* Local Function Prototypes */
  101. static int e1000_init_module(void);
  102. static void e1000_exit_module(void);
  103. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  104. static void __devexit e1000_remove(struct pci_dev *pdev);
  105. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  106. static int e1000_sw_init(struct e1000_adapter *adapter);
  107. static int e1000_open(struct net_device *netdev);
  108. static int e1000_close(struct net_device *netdev);
  109. static void e1000_configure_tx(struct e1000_adapter *adapter);
  110. static void e1000_configure_rx(struct e1000_adapter *adapter);
  111. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  112. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  113. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  114. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  115. struct e1000_tx_ring *tx_ring);
  116. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  117. struct e1000_rx_ring *rx_ring);
  118. static void e1000_set_multi(struct net_device *netdev);
  119. static void e1000_update_phy_info(unsigned long data);
  120. static void e1000_watchdog(unsigned long data);
  121. static void e1000_82547_tx_fifo_stall(unsigned long data);
  122. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  123. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  124. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  125. static int e1000_set_mac(struct net_device *netdev, void *p);
  126. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  127. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  128. struct e1000_tx_ring *tx_ring);
  129. #ifdef CONFIG_E1000_NAPI
  130. static int e1000_clean(struct net_device *poll_dev, int *budget);
  131. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  132. struct e1000_rx_ring *rx_ring,
  133. int *work_done, int work_to_do);
  134. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  135. struct e1000_rx_ring *rx_ring,
  136. int *work_done, int work_to_do);
  137. #else
  138. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  139. struct e1000_rx_ring *rx_ring);
  140. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  141. struct e1000_rx_ring *rx_ring);
  142. #endif
  143. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  144. struct e1000_rx_ring *rx_ring,
  145. int cleaned_count);
  146. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  147. struct e1000_rx_ring *rx_ring,
  148. int cleaned_count);
  149. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  150. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  151. int cmd);
  152. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  153. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  154. static void e1000_tx_timeout(struct net_device *dev);
  155. static void e1000_reset_task(struct net_device *dev);
  156. static void e1000_smartspeed(struct e1000_adapter *adapter);
  157. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  158. struct sk_buff *skb);
  159. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  160. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  161. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  162. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  163. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  164. #ifdef CONFIG_PM
  165. static int e1000_resume(struct pci_dev *pdev);
  166. #endif
  167. static void e1000_shutdown(struct pci_dev *pdev);
  168. #ifdef CONFIG_NET_POLL_CONTROLLER
  169. /* for netdump / net console */
  170. static void e1000_netpoll (struct net_device *netdev);
  171. #endif
  172. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  173. pci_channel_state_t state);
  174. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  175. static void e1000_io_resume(struct pci_dev *pdev);
  176. static struct pci_error_handlers e1000_err_handler = {
  177. .error_detected = e1000_io_error_detected,
  178. .slot_reset = e1000_io_slot_reset,
  179. .resume = e1000_io_resume,
  180. };
  181. static struct pci_driver e1000_driver = {
  182. .name = e1000_driver_name,
  183. .id_table = e1000_pci_tbl,
  184. .probe = e1000_probe,
  185. .remove = __devexit_p(e1000_remove),
  186. /* Power Managment Hooks */
  187. .suspend = e1000_suspend,
  188. #ifdef CONFIG_PM
  189. .resume = e1000_resume,
  190. #endif
  191. .shutdown = e1000_shutdown,
  192. .err_handler = &e1000_err_handler
  193. };
  194. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  195. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  196. MODULE_LICENSE("GPL");
  197. MODULE_VERSION(DRV_VERSION);
  198. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  199. module_param(debug, int, 0);
  200. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  201. /**
  202. * e1000_init_module - Driver Registration Routine
  203. *
  204. * e1000_init_module is the first routine called when the driver is
  205. * loaded. All it does is register with the PCI subsystem.
  206. **/
  207. static int __init
  208. e1000_init_module(void)
  209. {
  210. int ret;
  211. printk(KERN_INFO "%s - version %s\n",
  212. e1000_driver_string, e1000_driver_version);
  213. printk(KERN_INFO "%s\n", e1000_copyright);
  214. ret = pci_module_init(&e1000_driver);
  215. return ret;
  216. }
  217. module_init(e1000_init_module);
  218. /**
  219. * e1000_exit_module - Driver Exit Cleanup Routine
  220. *
  221. * e1000_exit_module is called just before the driver is removed
  222. * from memory.
  223. **/
  224. static void __exit
  225. e1000_exit_module(void)
  226. {
  227. pci_unregister_driver(&e1000_driver);
  228. }
  229. module_exit(e1000_exit_module);
  230. static int e1000_request_irq(struct e1000_adapter *adapter)
  231. {
  232. struct net_device *netdev = adapter->netdev;
  233. int flags, err = 0;
  234. flags = SA_SHIRQ | SA_SAMPLE_RANDOM;
  235. #ifdef CONFIG_PCI_MSI
  236. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  237. adapter->have_msi = TRUE;
  238. if ((err = pci_enable_msi(adapter->pdev))) {
  239. DPRINTK(PROBE, ERR,
  240. "Unable to allocate MSI interrupt Error: %d\n", err);
  241. adapter->have_msi = FALSE;
  242. }
  243. }
  244. if (adapter->have_msi)
  245. flags &= ~SA_SHIRQ;
  246. #endif
  247. if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
  248. netdev->name, netdev)))
  249. DPRINTK(PROBE, ERR,
  250. "Unable to allocate interrupt Error: %d\n", err);
  251. return err;
  252. }
  253. static void e1000_free_irq(struct e1000_adapter *adapter)
  254. {
  255. struct net_device *netdev = adapter->netdev;
  256. free_irq(adapter->pdev->irq, netdev);
  257. #ifdef CONFIG_PCI_MSI
  258. if (adapter->have_msi)
  259. pci_disable_msi(adapter->pdev);
  260. #endif
  261. }
  262. /**
  263. * e1000_irq_disable - Mask off interrupt generation on the NIC
  264. * @adapter: board private structure
  265. **/
  266. static void
  267. e1000_irq_disable(struct e1000_adapter *adapter)
  268. {
  269. atomic_inc(&adapter->irq_sem);
  270. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  271. E1000_WRITE_FLUSH(&adapter->hw);
  272. synchronize_irq(adapter->pdev->irq);
  273. }
  274. /**
  275. * e1000_irq_enable - Enable default interrupt generation settings
  276. * @adapter: board private structure
  277. **/
  278. static void
  279. e1000_irq_enable(struct e1000_adapter *adapter)
  280. {
  281. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  282. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  283. E1000_WRITE_FLUSH(&adapter->hw);
  284. }
  285. }
  286. static void
  287. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  288. {
  289. struct net_device *netdev = adapter->netdev;
  290. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  291. uint16_t old_vid = adapter->mng_vlan_id;
  292. if (adapter->vlgrp) {
  293. if (!adapter->vlgrp->vlan_devices[vid]) {
  294. if (adapter->hw.mng_cookie.status &
  295. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  296. e1000_vlan_rx_add_vid(netdev, vid);
  297. adapter->mng_vlan_id = vid;
  298. } else
  299. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  300. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  301. (vid != old_vid) &&
  302. !adapter->vlgrp->vlan_devices[old_vid])
  303. e1000_vlan_rx_kill_vid(netdev, old_vid);
  304. } else
  305. adapter->mng_vlan_id = vid;
  306. }
  307. }
  308. /**
  309. * e1000_release_hw_control - release control of the h/w to f/w
  310. * @adapter: address of board private structure
  311. *
  312. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  313. * For ASF and Pass Through versions of f/w this means that the
  314. * driver is no longer loaded. For AMT version (only with 82573) i
  315. * of the f/w this means that the netowrk i/f is closed.
  316. *
  317. **/
  318. static void
  319. e1000_release_hw_control(struct e1000_adapter *adapter)
  320. {
  321. uint32_t ctrl_ext;
  322. uint32_t swsm;
  323. uint32_t extcnf;
  324. /* Let firmware taken over control of h/w */
  325. switch (adapter->hw.mac_type) {
  326. case e1000_82571:
  327. case e1000_82572:
  328. case e1000_80003es2lan:
  329. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  330. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  331. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  332. break;
  333. case e1000_82573:
  334. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  335. E1000_WRITE_REG(&adapter->hw, SWSM,
  336. swsm & ~E1000_SWSM_DRV_LOAD);
  337. case e1000_ich8lan:
  338. extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  339. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  340. extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
  341. break;
  342. default:
  343. break;
  344. }
  345. }
  346. /**
  347. * e1000_get_hw_control - get control of the h/w from f/w
  348. * @adapter: address of board private structure
  349. *
  350. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  351. * For ASF and Pass Through versions of f/w this means that
  352. * the driver is loaded. For AMT version (only with 82573)
  353. * of the f/w this means that the netowrk i/f is open.
  354. *
  355. **/
  356. static void
  357. e1000_get_hw_control(struct e1000_adapter *adapter)
  358. {
  359. uint32_t ctrl_ext;
  360. uint32_t swsm;
  361. uint32_t extcnf;
  362. /* Let firmware know the driver has taken over */
  363. switch (adapter->hw.mac_type) {
  364. case e1000_82571:
  365. case e1000_82572:
  366. case e1000_80003es2lan:
  367. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  368. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  369. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  370. break;
  371. case e1000_82573:
  372. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  373. E1000_WRITE_REG(&adapter->hw, SWSM,
  374. swsm | E1000_SWSM_DRV_LOAD);
  375. break;
  376. case e1000_ich8lan:
  377. extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
  378. E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
  379. extcnf | E1000_EXTCNF_CTRL_SWFLAG);
  380. break;
  381. default:
  382. break;
  383. }
  384. }
  385. int
  386. e1000_up(struct e1000_adapter *adapter)
  387. {
  388. struct net_device *netdev = adapter->netdev;
  389. int i;
  390. /* hardware has been reset, we need to reload some things */
  391. e1000_set_multi(netdev);
  392. e1000_restore_vlan(adapter);
  393. e1000_configure_tx(adapter);
  394. e1000_setup_rctl(adapter);
  395. e1000_configure_rx(adapter);
  396. /* call E1000_DESC_UNUSED which always leaves
  397. * at least 1 descriptor unused to make sure
  398. * next_to_use != next_to_clean */
  399. for (i = 0; i < adapter->num_rx_queues; i++) {
  400. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  401. adapter->alloc_rx_buf(adapter, ring,
  402. E1000_DESC_UNUSED(ring));
  403. }
  404. adapter->tx_queue_len = netdev->tx_queue_len;
  405. mod_timer(&adapter->watchdog_timer, jiffies);
  406. #ifdef CONFIG_E1000_NAPI
  407. netif_poll_enable(netdev);
  408. #endif
  409. e1000_irq_enable(adapter);
  410. return 0;
  411. }
  412. /**
  413. * e1000_power_up_phy - restore link in case the phy was powered down
  414. * @adapter: address of board private structure
  415. *
  416. * The phy may be powered down to save power and turn off link when the
  417. * driver is unloaded and wake on lan is not enabled (among others)
  418. * *** this routine MUST be followed by a call to e1000_reset ***
  419. *
  420. **/
  421. static void e1000_power_up_phy(struct e1000_adapter *adapter)
  422. {
  423. uint16_t mii_reg = 0;
  424. /* Just clear the power down bit to wake the phy back up */
  425. if (adapter->hw.media_type == e1000_media_type_copper) {
  426. /* according to the manual, the phy will retain its
  427. * settings across a power-down/up cycle */
  428. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  429. mii_reg &= ~MII_CR_POWER_DOWN;
  430. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  431. }
  432. }
  433. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  434. {
  435. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  436. e1000_check_mng_mode(&adapter->hw);
  437. /* Power down the PHY so no link is implied when interface is down
  438. * The PHY cannot be powered down if any of the following is TRUE
  439. * (a) WoL is enabled
  440. * (b) AMT is active
  441. * (c) SoL/IDER session is active */
  442. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  443. adapter->hw.mac_type != e1000_ich8lan &&
  444. adapter->hw.media_type == e1000_media_type_copper &&
  445. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  446. !mng_mode_enabled &&
  447. !e1000_check_phy_reset_block(&adapter->hw)) {
  448. uint16_t mii_reg = 0;
  449. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  450. mii_reg |= MII_CR_POWER_DOWN;
  451. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  452. mdelay(1);
  453. }
  454. }
  455. void
  456. e1000_down(struct e1000_adapter *adapter)
  457. {
  458. struct net_device *netdev = adapter->netdev;
  459. e1000_irq_disable(adapter);
  460. del_timer_sync(&adapter->tx_fifo_stall_timer);
  461. del_timer_sync(&adapter->watchdog_timer);
  462. del_timer_sync(&adapter->phy_info_timer);
  463. #ifdef CONFIG_E1000_NAPI
  464. netif_poll_disable(netdev);
  465. #endif
  466. netdev->tx_queue_len = adapter->tx_queue_len;
  467. adapter->link_speed = 0;
  468. adapter->link_duplex = 0;
  469. netif_carrier_off(netdev);
  470. netif_stop_queue(netdev);
  471. e1000_reset(adapter);
  472. e1000_clean_all_tx_rings(adapter);
  473. e1000_clean_all_rx_rings(adapter);
  474. }
  475. void
  476. e1000_reinit_locked(struct e1000_adapter *adapter)
  477. {
  478. WARN_ON(in_interrupt());
  479. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  480. msleep(1);
  481. e1000_down(adapter);
  482. e1000_up(adapter);
  483. clear_bit(__E1000_RESETTING, &adapter->flags);
  484. }
  485. void
  486. e1000_reset(struct e1000_adapter *adapter)
  487. {
  488. uint32_t pba, manc;
  489. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  490. /* Repartition Pba for greater than 9k mtu
  491. * To take effect CTRL.RST is required.
  492. */
  493. switch (adapter->hw.mac_type) {
  494. case e1000_82547:
  495. case e1000_82547_rev_2:
  496. pba = E1000_PBA_30K;
  497. break;
  498. case e1000_82571:
  499. case e1000_82572:
  500. case e1000_80003es2lan:
  501. pba = E1000_PBA_38K;
  502. break;
  503. case e1000_82573:
  504. pba = E1000_PBA_12K;
  505. break;
  506. case e1000_ich8lan:
  507. pba = E1000_PBA_8K;
  508. break;
  509. default:
  510. pba = E1000_PBA_48K;
  511. break;
  512. }
  513. if ((adapter->hw.mac_type != e1000_82573) &&
  514. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  515. pba -= 8; /* allocate more FIFO for Tx */
  516. if (adapter->hw.mac_type == e1000_82547) {
  517. adapter->tx_fifo_head = 0;
  518. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  519. adapter->tx_fifo_size =
  520. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  521. atomic_set(&adapter->tx_fifo_stall, 0);
  522. }
  523. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  524. /* flow control settings */
  525. /* Set the FC high water mark to 90% of the FIFO size.
  526. * Required to clear last 3 LSB */
  527. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  528. /* We can't use 90% on small FIFOs because the remainder
  529. * would be less than 1 full frame. In this case, we size
  530. * it to allow at least a full frame above the high water
  531. * mark. */
  532. if (pba < E1000_PBA_16K)
  533. fc_high_water_mark = (pba * 1024) - 1600;
  534. adapter->hw.fc_high_water = fc_high_water_mark;
  535. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  536. if (adapter->hw.mac_type == e1000_80003es2lan)
  537. adapter->hw.fc_pause_time = 0xFFFF;
  538. else
  539. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  540. adapter->hw.fc_send_xon = 1;
  541. adapter->hw.fc = adapter->hw.original_fc;
  542. /* Allow time for pending master requests to run */
  543. e1000_reset_hw(&adapter->hw);
  544. if (adapter->hw.mac_type >= e1000_82544)
  545. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  546. if (e1000_init_hw(&adapter->hw))
  547. DPRINTK(PROBE, ERR, "Hardware Error\n");
  548. e1000_update_mng_vlan(adapter);
  549. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  550. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  551. e1000_reset_adaptive(&adapter->hw);
  552. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  553. if (!adapter->smart_power_down &&
  554. (adapter->hw.mac_type == e1000_82571 ||
  555. adapter->hw.mac_type == e1000_82572)) {
  556. uint16_t phy_data = 0;
  557. /* speed up time to link by disabling smart power down, ignore
  558. * the return value of this function because there is nothing
  559. * different we would do if it failed */
  560. e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  561. &phy_data);
  562. phy_data &= ~IGP02E1000_PM_SPD;
  563. e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  564. phy_data);
  565. }
  566. if (adapter->hw.mac_type < e1000_ich8lan)
  567. /* FIXME: this code is duplicate and wrong for PCI Express */
  568. if (adapter->en_mng_pt) {
  569. manc = E1000_READ_REG(&adapter->hw, MANC);
  570. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  571. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  572. }
  573. }
  574. /**
  575. * e1000_probe - Device Initialization Routine
  576. * @pdev: PCI device information struct
  577. * @ent: entry in e1000_pci_tbl
  578. *
  579. * Returns 0 on success, negative on failure
  580. *
  581. * e1000_probe initializes an adapter identified by a pci_dev structure.
  582. * The OS initialization, configuring of the adapter private structure,
  583. * and a hardware reset occur.
  584. **/
  585. static int __devinit
  586. e1000_probe(struct pci_dev *pdev,
  587. const struct pci_device_id *ent)
  588. {
  589. struct net_device *netdev;
  590. struct e1000_adapter *adapter;
  591. unsigned long mmio_start, mmio_len;
  592. unsigned long flash_start, flash_len;
  593. static int cards_found = 0;
  594. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  595. int i, err, pci_using_dac;
  596. uint16_t eeprom_data;
  597. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  598. if ((err = pci_enable_device(pdev)))
  599. return err;
  600. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  601. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  602. pci_using_dac = 1;
  603. } else {
  604. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
  605. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  606. E1000_ERR("No usable DMA configuration, aborting\n");
  607. return err;
  608. }
  609. pci_using_dac = 0;
  610. }
  611. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  612. return err;
  613. pci_set_master(pdev);
  614. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  615. if (!netdev) {
  616. err = -ENOMEM;
  617. goto err_alloc_etherdev;
  618. }
  619. SET_MODULE_OWNER(netdev);
  620. SET_NETDEV_DEV(netdev, &pdev->dev);
  621. pci_set_drvdata(pdev, netdev);
  622. adapter = netdev_priv(netdev);
  623. adapter->netdev = netdev;
  624. adapter->pdev = pdev;
  625. adapter->hw.back = adapter;
  626. adapter->msg_enable = (1 << debug) - 1;
  627. mmio_start = pci_resource_start(pdev, BAR_0);
  628. mmio_len = pci_resource_len(pdev, BAR_0);
  629. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  630. if (!adapter->hw.hw_addr) {
  631. err = -EIO;
  632. goto err_ioremap;
  633. }
  634. for (i = BAR_1; i <= BAR_5; i++) {
  635. if (pci_resource_len(pdev, i) == 0)
  636. continue;
  637. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  638. adapter->hw.io_base = pci_resource_start(pdev, i);
  639. break;
  640. }
  641. }
  642. netdev->open = &e1000_open;
  643. netdev->stop = &e1000_close;
  644. netdev->hard_start_xmit = &e1000_xmit_frame;
  645. netdev->get_stats = &e1000_get_stats;
  646. netdev->set_multicast_list = &e1000_set_multi;
  647. netdev->set_mac_address = &e1000_set_mac;
  648. netdev->change_mtu = &e1000_change_mtu;
  649. netdev->do_ioctl = &e1000_ioctl;
  650. e1000_set_ethtool_ops(netdev);
  651. netdev->tx_timeout = &e1000_tx_timeout;
  652. netdev->watchdog_timeo = 5 * HZ;
  653. #ifdef CONFIG_E1000_NAPI
  654. netdev->poll = &e1000_clean;
  655. netdev->weight = 64;
  656. #endif
  657. netdev->vlan_rx_register = e1000_vlan_rx_register;
  658. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  659. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  660. #ifdef CONFIG_NET_POLL_CONTROLLER
  661. netdev->poll_controller = e1000_netpoll;
  662. #endif
  663. strcpy(netdev->name, pci_name(pdev));
  664. netdev->mem_start = mmio_start;
  665. netdev->mem_end = mmio_start + mmio_len;
  666. netdev->base_addr = adapter->hw.io_base;
  667. adapter->bd_number = cards_found;
  668. /* setup the private structure */
  669. if ((err = e1000_sw_init(adapter)))
  670. goto err_sw_init;
  671. /* Flash BAR mapping must happen after e1000_sw_init
  672. * because it depends on mac_type */
  673. if ((adapter->hw.mac_type == e1000_ich8lan) &&
  674. (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
  675. flash_start = pci_resource_start(pdev, 1);
  676. flash_len = pci_resource_len(pdev, 1);
  677. adapter->hw.flash_address = ioremap(flash_start, flash_len);
  678. if (!adapter->hw.flash_address) {
  679. err = -EIO;
  680. goto err_flashmap;
  681. }
  682. }
  683. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  684. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  685. /* if ksp3, indicate if it's port a being setup */
  686. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  687. e1000_ksp3_port_a == 0)
  688. adapter->ksp3_port_a = 1;
  689. e1000_ksp3_port_a++;
  690. /* Reset for multiple KP3 adapters */
  691. if (e1000_ksp3_port_a == 4)
  692. e1000_ksp3_port_a = 0;
  693. if (adapter->hw.mac_type >= e1000_82543) {
  694. netdev->features = NETIF_F_SG |
  695. NETIF_F_HW_CSUM |
  696. NETIF_F_HW_VLAN_TX |
  697. NETIF_F_HW_VLAN_RX |
  698. NETIF_F_HW_VLAN_FILTER;
  699. if (adapter->hw.mac_type == e1000_ich8lan)
  700. netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
  701. }
  702. #ifdef NETIF_F_TSO
  703. if ((adapter->hw.mac_type >= e1000_82544) &&
  704. (adapter->hw.mac_type != e1000_82547))
  705. netdev->features |= NETIF_F_TSO;
  706. #ifdef NETIF_F_TSO_IPV6
  707. if (adapter->hw.mac_type > e1000_82547_rev_2)
  708. netdev->features |= NETIF_F_TSO_IPV6;
  709. #endif
  710. #endif
  711. if (pci_using_dac)
  712. netdev->features |= NETIF_F_HIGHDMA;
  713. netdev->features |= NETIF_F_LLTX;
  714. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  715. /* initialize eeprom parameters */
  716. if (e1000_init_eeprom_params(&adapter->hw)) {
  717. E1000_ERR("EEPROM initialization failed\n");
  718. return -EIO;
  719. }
  720. /* before reading the EEPROM, reset the controller to
  721. * put the device in a known good starting state */
  722. e1000_reset_hw(&adapter->hw);
  723. /* make sure the EEPROM is good */
  724. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  725. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  726. err = -EIO;
  727. goto err_eeprom;
  728. }
  729. /* copy the MAC address out of the EEPROM */
  730. if (e1000_read_mac_addr(&adapter->hw))
  731. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  732. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  733. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  734. if (!is_valid_ether_addr(netdev->perm_addr)) {
  735. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  736. err = -EIO;
  737. goto err_eeprom;
  738. }
  739. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  740. e1000_get_bus_info(&adapter->hw);
  741. init_timer(&adapter->tx_fifo_stall_timer);
  742. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  743. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  744. init_timer(&adapter->watchdog_timer);
  745. adapter->watchdog_timer.function = &e1000_watchdog;
  746. adapter->watchdog_timer.data = (unsigned long) adapter;
  747. init_timer(&adapter->phy_info_timer);
  748. adapter->phy_info_timer.function = &e1000_update_phy_info;
  749. adapter->phy_info_timer.data = (unsigned long) adapter;
  750. INIT_WORK(&adapter->reset_task,
  751. (void (*)(void *))e1000_reset_task, netdev);
  752. /* we're going to reset, so assume we have no link for now */
  753. netif_carrier_off(netdev);
  754. netif_stop_queue(netdev);
  755. e1000_check_options(adapter);
  756. /* Initial Wake on LAN setting
  757. * If APM wake is enabled in the EEPROM,
  758. * enable the ACPI Magic Packet filter
  759. */
  760. switch (adapter->hw.mac_type) {
  761. case e1000_82542_rev2_0:
  762. case e1000_82542_rev2_1:
  763. case e1000_82543:
  764. break;
  765. case e1000_82544:
  766. e1000_read_eeprom(&adapter->hw,
  767. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  768. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  769. break;
  770. case e1000_ich8lan:
  771. e1000_read_eeprom(&adapter->hw,
  772. EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
  773. eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
  774. break;
  775. case e1000_82546:
  776. case e1000_82546_rev_3:
  777. case e1000_82571:
  778. case e1000_80003es2lan:
  779. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  780. e1000_read_eeprom(&adapter->hw,
  781. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  782. break;
  783. }
  784. /* Fall Through */
  785. default:
  786. e1000_read_eeprom(&adapter->hw,
  787. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  788. break;
  789. }
  790. if (eeprom_data & eeprom_apme_mask)
  791. adapter->wol |= E1000_WUFC_MAG;
  792. /* print bus type/speed/width info */
  793. {
  794. struct e1000_hw *hw = &adapter->hw;
  795. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  796. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  797. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  798. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  799. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  800. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  801. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  802. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  803. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  804. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  805. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  806. "32-bit"));
  807. }
  808. for (i = 0; i < 6; i++)
  809. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  810. /* reset the hardware with the new settings */
  811. e1000_reset(adapter);
  812. /* If the controller is 82573 and f/w is AMT, do not set
  813. * DRV_LOAD until the interface is up. For all other cases,
  814. * let the f/w know that the h/w is now under the control
  815. * of the driver. */
  816. if (adapter->hw.mac_type != e1000_82573 ||
  817. !e1000_check_mng_mode(&adapter->hw))
  818. e1000_get_hw_control(adapter);
  819. strcpy(netdev->name, "eth%d");
  820. if ((err = register_netdev(netdev)))
  821. goto err_register;
  822. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  823. cards_found++;
  824. return 0;
  825. err_register:
  826. if (adapter->hw.flash_address)
  827. iounmap(adapter->hw.flash_address);
  828. err_flashmap:
  829. err_sw_init:
  830. err_eeprom:
  831. iounmap(adapter->hw.hw_addr);
  832. err_ioremap:
  833. free_netdev(netdev);
  834. err_alloc_etherdev:
  835. pci_release_regions(pdev);
  836. return err;
  837. }
  838. /**
  839. * e1000_remove - Device Removal Routine
  840. * @pdev: PCI device information struct
  841. *
  842. * e1000_remove is called by the PCI subsystem to alert the driver
  843. * that it should release a PCI device. The could be caused by a
  844. * Hot-Plug event, or because the driver is going to be removed from
  845. * memory.
  846. **/
  847. static void __devexit
  848. e1000_remove(struct pci_dev *pdev)
  849. {
  850. struct net_device *netdev = pci_get_drvdata(pdev);
  851. struct e1000_adapter *adapter = netdev_priv(netdev);
  852. uint32_t manc;
  853. #ifdef CONFIG_E1000_NAPI
  854. int i;
  855. #endif
  856. flush_scheduled_work();
  857. if (adapter->hw.mac_type >= e1000_82540 &&
  858. adapter->hw.mac_type != e1000_ich8lan &&
  859. adapter->hw.media_type == e1000_media_type_copper) {
  860. manc = E1000_READ_REG(&adapter->hw, MANC);
  861. if (manc & E1000_MANC_SMBUS_EN) {
  862. manc |= E1000_MANC_ARP_EN;
  863. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  864. }
  865. }
  866. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  867. * would have already happened in close and is redundant. */
  868. e1000_release_hw_control(adapter);
  869. unregister_netdev(netdev);
  870. #ifdef CONFIG_E1000_NAPI
  871. for (i = 0; i < adapter->num_rx_queues; i++)
  872. dev_put(&adapter->polling_netdev[i]);
  873. #endif
  874. if (!e1000_check_phy_reset_block(&adapter->hw))
  875. e1000_phy_hw_reset(&adapter->hw);
  876. kfree(adapter->tx_ring);
  877. kfree(adapter->rx_ring);
  878. #ifdef CONFIG_E1000_NAPI
  879. kfree(adapter->polling_netdev);
  880. #endif
  881. iounmap(adapter->hw.hw_addr);
  882. if (adapter->hw.flash_address)
  883. iounmap(adapter->hw.flash_address);
  884. pci_release_regions(pdev);
  885. free_netdev(netdev);
  886. pci_disable_device(pdev);
  887. }
  888. /**
  889. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  890. * @adapter: board private structure to initialize
  891. *
  892. * e1000_sw_init initializes the Adapter private data structure.
  893. * Fields are initialized based on PCI device information and
  894. * OS network device settings (MTU size).
  895. **/
  896. static int __devinit
  897. e1000_sw_init(struct e1000_adapter *adapter)
  898. {
  899. struct e1000_hw *hw = &adapter->hw;
  900. struct net_device *netdev = adapter->netdev;
  901. struct pci_dev *pdev = adapter->pdev;
  902. #ifdef CONFIG_E1000_NAPI
  903. int i;
  904. #endif
  905. /* PCI config space info */
  906. hw->vendor_id = pdev->vendor;
  907. hw->device_id = pdev->device;
  908. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  909. hw->subsystem_id = pdev->subsystem_device;
  910. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  911. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  912. adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE;
  913. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  914. hw->max_frame_size = netdev->mtu +
  915. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  916. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  917. /* identify the MAC */
  918. if (e1000_set_mac_type(hw)) {
  919. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  920. return -EIO;
  921. }
  922. switch (hw->mac_type) {
  923. default:
  924. break;
  925. case e1000_82541:
  926. case e1000_82547:
  927. case e1000_82541_rev_2:
  928. case e1000_82547_rev_2:
  929. hw->phy_init_script = 1;
  930. break;
  931. }
  932. e1000_set_media_type(hw);
  933. hw->wait_autoneg_complete = FALSE;
  934. hw->tbi_compatibility_en = TRUE;
  935. hw->adaptive_ifs = TRUE;
  936. /* Copper options */
  937. if (hw->media_type == e1000_media_type_copper) {
  938. hw->mdix = AUTO_ALL_MODES;
  939. hw->disable_polarity_correction = FALSE;
  940. hw->master_slave = E1000_MASTER_SLAVE;
  941. }
  942. adapter->num_tx_queues = 1;
  943. adapter->num_rx_queues = 1;
  944. if (e1000_alloc_queues(adapter)) {
  945. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  946. return -ENOMEM;
  947. }
  948. #ifdef CONFIG_E1000_NAPI
  949. for (i = 0; i < adapter->num_rx_queues; i++) {
  950. adapter->polling_netdev[i].priv = adapter;
  951. adapter->polling_netdev[i].poll = &e1000_clean;
  952. adapter->polling_netdev[i].weight = 64;
  953. dev_hold(&adapter->polling_netdev[i]);
  954. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  955. }
  956. spin_lock_init(&adapter->tx_queue_lock);
  957. #endif
  958. atomic_set(&adapter->irq_sem, 1);
  959. spin_lock_init(&adapter->stats_lock);
  960. return 0;
  961. }
  962. /**
  963. * e1000_alloc_queues - Allocate memory for all rings
  964. * @adapter: board private structure to initialize
  965. *
  966. * We allocate one ring per queue at run-time since we don't know the
  967. * number of queues at compile-time. The polling_netdev array is
  968. * intended for Multiqueue, but should work fine with a single queue.
  969. **/
  970. static int __devinit
  971. e1000_alloc_queues(struct e1000_adapter *adapter)
  972. {
  973. int size;
  974. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  975. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  976. if (!adapter->tx_ring)
  977. return -ENOMEM;
  978. memset(adapter->tx_ring, 0, size);
  979. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  980. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  981. if (!adapter->rx_ring) {
  982. kfree(adapter->tx_ring);
  983. return -ENOMEM;
  984. }
  985. memset(adapter->rx_ring, 0, size);
  986. #ifdef CONFIG_E1000_NAPI
  987. size = sizeof(struct net_device) * adapter->num_rx_queues;
  988. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  989. if (!adapter->polling_netdev) {
  990. kfree(adapter->tx_ring);
  991. kfree(adapter->rx_ring);
  992. return -ENOMEM;
  993. }
  994. memset(adapter->polling_netdev, 0, size);
  995. #endif
  996. return E1000_SUCCESS;
  997. }
  998. /**
  999. * e1000_open - Called when a network interface is made active
  1000. * @netdev: network interface device structure
  1001. *
  1002. * Returns 0 on success, negative value on failure
  1003. *
  1004. * The open entry point is called when a network interface is made
  1005. * active by the system (IFF_UP). At this point all resources needed
  1006. * for transmit and receive operations are allocated, the interrupt
  1007. * handler is registered with the OS, the watchdog timer is started,
  1008. * and the stack is notified that the interface is ready.
  1009. **/
  1010. static int
  1011. e1000_open(struct net_device *netdev)
  1012. {
  1013. struct e1000_adapter *adapter = netdev_priv(netdev);
  1014. int err;
  1015. /* disallow open during test */
  1016. if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
  1017. return -EBUSY;
  1018. /* allocate transmit descriptors */
  1019. if ((err = e1000_setup_all_tx_resources(adapter)))
  1020. goto err_setup_tx;
  1021. /* allocate receive descriptors */
  1022. if ((err = e1000_setup_all_rx_resources(adapter)))
  1023. goto err_setup_rx;
  1024. err = e1000_request_irq(adapter);
  1025. if (err)
  1026. goto err_up;
  1027. e1000_power_up_phy(adapter);
  1028. if ((err = e1000_up(adapter)))
  1029. goto err_up;
  1030. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1031. if ((adapter->hw.mng_cookie.status &
  1032. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1033. e1000_update_mng_vlan(adapter);
  1034. }
  1035. /* If AMT is enabled, let the firmware know that the network
  1036. * interface is now open */
  1037. if (adapter->hw.mac_type == e1000_82573 &&
  1038. e1000_check_mng_mode(&adapter->hw))
  1039. e1000_get_hw_control(adapter);
  1040. return E1000_SUCCESS;
  1041. err_up:
  1042. e1000_free_all_rx_resources(adapter);
  1043. err_setup_rx:
  1044. e1000_free_all_tx_resources(adapter);
  1045. err_setup_tx:
  1046. e1000_reset(adapter);
  1047. return err;
  1048. }
  1049. /**
  1050. * e1000_close - Disables a network interface
  1051. * @netdev: network interface device structure
  1052. *
  1053. * Returns 0, this is not allowed to fail
  1054. *
  1055. * The close entry point is called when an interface is de-activated
  1056. * by the OS. The hardware is still under the drivers control, but
  1057. * needs to be disabled. A global MAC reset is issued to stop the
  1058. * hardware, and all transmit and receive resources are freed.
  1059. **/
  1060. static int
  1061. e1000_close(struct net_device *netdev)
  1062. {
  1063. struct e1000_adapter *adapter = netdev_priv(netdev);
  1064. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1065. e1000_down(adapter);
  1066. e1000_power_down_phy(adapter);
  1067. e1000_free_irq(adapter);
  1068. e1000_free_all_tx_resources(adapter);
  1069. e1000_free_all_rx_resources(adapter);
  1070. if ((adapter->hw.mng_cookie.status &
  1071. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1072. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1073. }
  1074. /* If AMT is enabled, let the firmware know that the network
  1075. * interface is now closed */
  1076. if (adapter->hw.mac_type == e1000_82573 &&
  1077. e1000_check_mng_mode(&adapter->hw))
  1078. e1000_release_hw_control(adapter);
  1079. return 0;
  1080. }
  1081. /**
  1082. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1083. * @adapter: address of board private structure
  1084. * @start: address of beginning of memory
  1085. * @len: length of memory
  1086. **/
  1087. static boolean_t
  1088. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1089. void *start, unsigned long len)
  1090. {
  1091. unsigned long begin = (unsigned long) start;
  1092. unsigned long end = begin + len;
  1093. /* First rev 82545 and 82546 need to not allow any memory
  1094. * write location to cross 64k boundary due to errata 23 */
  1095. if (adapter->hw.mac_type == e1000_82545 ||
  1096. adapter->hw.mac_type == e1000_82546) {
  1097. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1098. }
  1099. return TRUE;
  1100. }
  1101. /**
  1102. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1103. * @adapter: board private structure
  1104. * @txdr: tx descriptor ring (for a specific queue) to setup
  1105. *
  1106. * Return 0 on success, negative on failure
  1107. **/
  1108. static int
  1109. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1110. struct e1000_tx_ring *txdr)
  1111. {
  1112. struct pci_dev *pdev = adapter->pdev;
  1113. int size;
  1114. size = sizeof(struct e1000_buffer) * txdr->count;
  1115. txdr->buffer_info = vmalloc(size);
  1116. if (!txdr->buffer_info) {
  1117. DPRINTK(PROBE, ERR,
  1118. "Unable to allocate memory for the transmit descriptor ring\n");
  1119. return -ENOMEM;
  1120. }
  1121. memset(txdr->buffer_info, 0, size);
  1122. /* round up to nearest 4K */
  1123. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1124. E1000_ROUNDUP(txdr->size, 4096);
  1125. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1126. if (!txdr->desc) {
  1127. setup_tx_desc_die:
  1128. vfree(txdr->buffer_info);
  1129. DPRINTK(PROBE, ERR,
  1130. "Unable to allocate memory for the transmit descriptor ring\n");
  1131. return -ENOMEM;
  1132. }
  1133. /* Fix for errata 23, can't cross 64kB boundary */
  1134. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1135. void *olddesc = txdr->desc;
  1136. dma_addr_t olddma = txdr->dma;
  1137. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1138. "at %p\n", txdr->size, txdr->desc);
  1139. /* Try again, without freeing the previous */
  1140. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1141. /* Failed allocation, critical failure */
  1142. if (!txdr->desc) {
  1143. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1144. goto setup_tx_desc_die;
  1145. }
  1146. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1147. /* give up */
  1148. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1149. txdr->dma);
  1150. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1151. DPRINTK(PROBE, ERR,
  1152. "Unable to allocate aligned memory "
  1153. "for the transmit descriptor ring\n");
  1154. vfree(txdr->buffer_info);
  1155. return -ENOMEM;
  1156. } else {
  1157. /* Free old allocation, new allocation was successful */
  1158. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1159. }
  1160. }
  1161. memset(txdr->desc, 0, txdr->size);
  1162. txdr->next_to_use = 0;
  1163. txdr->next_to_clean = 0;
  1164. spin_lock_init(&txdr->tx_lock);
  1165. return 0;
  1166. }
  1167. /**
  1168. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1169. * (Descriptors) for all queues
  1170. * @adapter: board private structure
  1171. *
  1172. * If this function returns with an error, then it's possible one or
  1173. * more of the rings is populated (while the rest are not). It is the
  1174. * callers duty to clean those orphaned rings.
  1175. *
  1176. * Return 0 on success, negative on failure
  1177. **/
  1178. int
  1179. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1180. {
  1181. int i, err = 0;
  1182. for (i = 0; i < adapter->num_tx_queues; i++) {
  1183. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1184. if (err) {
  1185. DPRINTK(PROBE, ERR,
  1186. "Allocation for Tx Queue %u failed\n", i);
  1187. break;
  1188. }
  1189. }
  1190. return err;
  1191. }
  1192. /**
  1193. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1194. * @adapter: board private structure
  1195. *
  1196. * Configure the Tx unit of the MAC after a reset.
  1197. **/
  1198. static void
  1199. e1000_configure_tx(struct e1000_adapter *adapter)
  1200. {
  1201. uint64_t tdba;
  1202. struct e1000_hw *hw = &adapter->hw;
  1203. uint32_t tdlen, tctl, tipg, tarc;
  1204. uint32_t ipgr1, ipgr2;
  1205. /* Setup the HW Tx Head and Tail descriptor pointers */
  1206. switch (adapter->num_tx_queues) {
  1207. case 1:
  1208. default:
  1209. tdba = adapter->tx_ring[0].dma;
  1210. tdlen = adapter->tx_ring[0].count *
  1211. sizeof(struct e1000_tx_desc);
  1212. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1213. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1214. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1215. E1000_WRITE_REG(hw, TDT, 0);
  1216. E1000_WRITE_REG(hw, TDH, 0);
  1217. adapter->tx_ring[0].tdh = E1000_TDH;
  1218. adapter->tx_ring[0].tdt = E1000_TDT;
  1219. break;
  1220. }
  1221. /* Set the default values for the Tx Inter Packet Gap timer */
  1222. if (hw->media_type == e1000_media_type_fiber ||
  1223. hw->media_type == e1000_media_type_internal_serdes)
  1224. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1225. else
  1226. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1227. switch (hw->mac_type) {
  1228. case e1000_82542_rev2_0:
  1229. case e1000_82542_rev2_1:
  1230. tipg = DEFAULT_82542_TIPG_IPGT;
  1231. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1232. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1233. break;
  1234. case e1000_80003es2lan:
  1235. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1236. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1237. break;
  1238. default:
  1239. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1240. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1241. break;
  1242. }
  1243. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1244. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1245. E1000_WRITE_REG(hw, TIPG, tipg);
  1246. /* Set the Tx Interrupt Delay register */
  1247. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1248. if (hw->mac_type >= e1000_82540)
  1249. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1250. /* Program the Transmit Control Register */
  1251. tctl = E1000_READ_REG(hw, TCTL);
  1252. tctl &= ~E1000_TCTL_CT;
  1253. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1254. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1255. #ifdef DISABLE_MULR
  1256. /* disable Multiple Reads for debugging */
  1257. tctl &= ~E1000_TCTL_MULR;
  1258. #endif
  1259. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1260. tarc = E1000_READ_REG(hw, TARC0);
  1261. tarc |= ((1 << 25) | (1 << 21));
  1262. E1000_WRITE_REG(hw, TARC0, tarc);
  1263. tarc = E1000_READ_REG(hw, TARC1);
  1264. tarc |= (1 << 25);
  1265. if (tctl & E1000_TCTL_MULR)
  1266. tarc &= ~(1 << 28);
  1267. else
  1268. tarc |= (1 << 28);
  1269. E1000_WRITE_REG(hw, TARC1, tarc);
  1270. } else if (hw->mac_type == e1000_80003es2lan) {
  1271. tarc = E1000_READ_REG(hw, TARC0);
  1272. tarc |= 1;
  1273. if (hw->media_type == e1000_media_type_internal_serdes)
  1274. tarc |= (1 << 20);
  1275. E1000_WRITE_REG(hw, TARC0, tarc);
  1276. tarc = E1000_READ_REG(hw, TARC1);
  1277. tarc |= 1;
  1278. E1000_WRITE_REG(hw, TARC1, tarc);
  1279. }
  1280. e1000_config_collision_dist(hw);
  1281. /* Setup Transmit Descriptor Settings for eop descriptor */
  1282. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1283. E1000_TXD_CMD_IFCS;
  1284. if (hw->mac_type < e1000_82543)
  1285. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1286. else
  1287. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1288. /* Cache if we're 82544 running in PCI-X because we'll
  1289. * need this to apply a workaround later in the send path. */
  1290. if (hw->mac_type == e1000_82544 &&
  1291. hw->bus_type == e1000_bus_type_pcix)
  1292. adapter->pcix_82544 = 1;
  1293. E1000_WRITE_REG(hw, TCTL, tctl);
  1294. }
  1295. /**
  1296. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1297. * @adapter: board private structure
  1298. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1299. *
  1300. * Returns 0 on success, negative on failure
  1301. **/
  1302. static int
  1303. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1304. struct e1000_rx_ring *rxdr)
  1305. {
  1306. struct pci_dev *pdev = adapter->pdev;
  1307. int size, desc_len;
  1308. size = sizeof(struct e1000_buffer) * rxdr->count;
  1309. rxdr->buffer_info = vmalloc(size);
  1310. if (!rxdr->buffer_info) {
  1311. DPRINTK(PROBE, ERR,
  1312. "Unable to allocate memory for the receive descriptor ring\n");
  1313. return -ENOMEM;
  1314. }
  1315. memset(rxdr->buffer_info, 0, size);
  1316. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1317. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1318. if (!rxdr->ps_page) {
  1319. vfree(rxdr->buffer_info);
  1320. DPRINTK(PROBE, ERR,
  1321. "Unable to allocate memory for the receive descriptor ring\n");
  1322. return -ENOMEM;
  1323. }
  1324. memset(rxdr->ps_page, 0, size);
  1325. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1326. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1327. if (!rxdr->ps_page_dma) {
  1328. vfree(rxdr->buffer_info);
  1329. kfree(rxdr->ps_page);
  1330. DPRINTK(PROBE, ERR,
  1331. "Unable to allocate memory for the receive descriptor ring\n");
  1332. return -ENOMEM;
  1333. }
  1334. memset(rxdr->ps_page_dma, 0, size);
  1335. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1336. desc_len = sizeof(struct e1000_rx_desc);
  1337. else
  1338. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1339. /* Round up to nearest 4K */
  1340. rxdr->size = rxdr->count * desc_len;
  1341. E1000_ROUNDUP(rxdr->size, 4096);
  1342. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1343. if (!rxdr->desc) {
  1344. DPRINTK(PROBE, ERR,
  1345. "Unable to allocate memory for the receive descriptor ring\n");
  1346. setup_rx_desc_die:
  1347. vfree(rxdr->buffer_info);
  1348. kfree(rxdr->ps_page);
  1349. kfree(rxdr->ps_page_dma);
  1350. return -ENOMEM;
  1351. }
  1352. /* Fix for errata 23, can't cross 64kB boundary */
  1353. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1354. void *olddesc = rxdr->desc;
  1355. dma_addr_t olddma = rxdr->dma;
  1356. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1357. "at %p\n", rxdr->size, rxdr->desc);
  1358. /* Try again, without freeing the previous */
  1359. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1360. /* Failed allocation, critical failure */
  1361. if (!rxdr->desc) {
  1362. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1363. DPRINTK(PROBE, ERR,
  1364. "Unable to allocate memory "
  1365. "for the receive descriptor ring\n");
  1366. goto setup_rx_desc_die;
  1367. }
  1368. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1369. /* give up */
  1370. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1371. rxdr->dma);
  1372. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1373. DPRINTK(PROBE, ERR,
  1374. "Unable to allocate aligned memory "
  1375. "for the receive descriptor ring\n");
  1376. goto setup_rx_desc_die;
  1377. } else {
  1378. /* Free old allocation, new allocation was successful */
  1379. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1380. }
  1381. }
  1382. memset(rxdr->desc, 0, rxdr->size);
  1383. rxdr->next_to_clean = 0;
  1384. rxdr->next_to_use = 0;
  1385. return 0;
  1386. }
  1387. /**
  1388. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1389. * (Descriptors) for all queues
  1390. * @adapter: board private structure
  1391. *
  1392. * If this function returns with an error, then it's possible one or
  1393. * more of the rings is populated (while the rest are not). It is the
  1394. * callers duty to clean those orphaned rings.
  1395. *
  1396. * Return 0 on success, negative on failure
  1397. **/
  1398. int
  1399. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1400. {
  1401. int i, err = 0;
  1402. for (i = 0; i < adapter->num_rx_queues; i++) {
  1403. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1404. if (err) {
  1405. DPRINTK(PROBE, ERR,
  1406. "Allocation for Rx Queue %u failed\n", i);
  1407. break;
  1408. }
  1409. }
  1410. return err;
  1411. }
  1412. /**
  1413. * e1000_setup_rctl - configure the receive control registers
  1414. * @adapter: Board private structure
  1415. **/
  1416. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1417. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1418. static void
  1419. e1000_setup_rctl(struct e1000_adapter *adapter)
  1420. {
  1421. uint32_t rctl, rfctl;
  1422. uint32_t psrctl = 0;
  1423. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1424. uint32_t pages = 0;
  1425. #endif
  1426. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1427. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1428. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1429. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1430. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1431. if (adapter->hw.tbi_compatibility_on == 1)
  1432. rctl |= E1000_RCTL_SBP;
  1433. else
  1434. rctl &= ~E1000_RCTL_SBP;
  1435. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1436. rctl &= ~E1000_RCTL_LPE;
  1437. else
  1438. rctl |= E1000_RCTL_LPE;
  1439. /* Setup buffer sizes */
  1440. rctl &= ~E1000_RCTL_SZ_4096;
  1441. rctl |= E1000_RCTL_BSEX;
  1442. switch (adapter->rx_buffer_len) {
  1443. case E1000_RXBUFFER_256:
  1444. rctl |= E1000_RCTL_SZ_256;
  1445. rctl &= ~E1000_RCTL_BSEX;
  1446. break;
  1447. case E1000_RXBUFFER_512:
  1448. rctl |= E1000_RCTL_SZ_512;
  1449. rctl &= ~E1000_RCTL_BSEX;
  1450. break;
  1451. case E1000_RXBUFFER_1024:
  1452. rctl |= E1000_RCTL_SZ_1024;
  1453. rctl &= ~E1000_RCTL_BSEX;
  1454. break;
  1455. case E1000_RXBUFFER_2048:
  1456. default:
  1457. rctl |= E1000_RCTL_SZ_2048;
  1458. rctl &= ~E1000_RCTL_BSEX;
  1459. break;
  1460. case E1000_RXBUFFER_4096:
  1461. rctl |= E1000_RCTL_SZ_4096;
  1462. break;
  1463. case E1000_RXBUFFER_8192:
  1464. rctl |= E1000_RCTL_SZ_8192;
  1465. break;
  1466. case E1000_RXBUFFER_16384:
  1467. rctl |= E1000_RCTL_SZ_16384;
  1468. break;
  1469. }
  1470. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1471. /* 82571 and greater support packet-split where the protocol
  1472. * header is placed in skb->data and the packet data is
  1473. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1474. * In the case of a non-split, skb->data is linearly filled,
  1475. * followed by the page buffers. Therefore, skb->data is
  1476. * sized to hold the largest protocol header.
  1477. */
  1478. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1479. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1480. PAGE_SIZE <= 16384)
  1481. adapter->rx_ps_pages = pages;
  1482. else
  1483. adapter->rx_ps_pages = 0;
  1484. #endif
  1485. if (adapter->rx_ps_pages) {
  1486. /* Configure extra packet-split registers */
  1487. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1488. rfctl |= E1000_RFCTL_EXTEN;
  1489. /* disable IPv6 packet split support */
  1490. rfctl |= E1000_RFCTL_IPV6_DIS;
  1491. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1492. rctl |= E1000_RCTL_DTYP_PS;
  1493. psrctl |= adapter->rx_ps_bsize0 >>
  1494. E1000_PSRCTL_BSIZE0_SHIFT;
  1495. switch (adapter->rx_ps_pages) {
  1496. case 3:
  1497. psrctl |= PAGE_SIZE <<
  1498. E1000_PSRCTL_BSIZE3_SHIFT;
  1499. case 2:
  1500. psrctl |= PAGE_SIZE <<
  1501. E1000_PSRCTL_BSIZE2_SHIFT;
  1502. case 1:
  1503. psrctl |= PAGE_SIZE >>
  1504. E1000_PSRCTL_BSIZE1_SHIFT;
  1505. break;
  1506. }
  1507. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1508. }
  1509. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1510. }
  1511. /**
  1512. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1513. * @adapter: board private structure
  1514. *
  1515. * Configure the Rx unit of the MAC after a reset.
  1516. **/
  1517. static void
  1518. e1000_configure_rx(struct e1000_adapter *adapter)
  1519. {
  1520. uint64_t rdba;
  1521. struct e1000_hw *hw = &adapter->hw;
  1522. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1523. if (adapter->rx_ps_pages) {
  1524. /* this is a 32 byte descriptor */
  1525. rdlen = adapter->rx_ring[0].count *
  1526. sizeof(union e1000_rx_desc_packet_split);
  1527. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1528. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1529. } else {
  1530. rdlen = adapter->rx_ring[0].count *
  1531. sizeof(struct e1000_rx_desc);
  1532. adapter->clean_rx = e1000_clean_rx_irq;
  1533. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1534. }
  1535. /* disable receives while setting up the descriptors */
  1536. rctl = E1000_READ_REG(hw, RCTL);
  1537. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1538. /* set the Receive Delay Timer Register */
  1539. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1540. if (hw->mac_type >= e1000_82540) {
  1541. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1542. if (adapter->itr > 1)
  1543. E1000_WRITE_REG(hw, ITR,
  1544. 1000000000 / (adapter->itr * 256));
  1545. }
  1546. if (hw->mac_type >= e1000_82571) {
  1547. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1548. /* Reset delay timers after every interrupt */
  1549. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1550. #ifdef CONFIG_E1000_NAPI
  1551. /* Auto-Mask interrupts upon ICR read. */
  1552. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1553. #endif
  1554. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1555. E1000_WRITE_REG(hw, IAM, ~0);
  1556. E1000_WRITE_FLUSH(hw);
  1557. }
  1558. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1559. * the Base and Length of the Rx Descriptor Ring */
  1560. switch (adapter->num_rx_queues) {
  1561. case 1:
  1562. default:
  1563. rdba = adapter->rx_ring[0].dma;
  1564. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1565. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1566. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1567. E1000_WRITE_REG(hw, RDT, 0);
  1568. E1000_WRITE_REG(hw, RDH, 0);
  1569. adapter->rx_ring[0].rdh = E1000_RDH;
  1570. adapter->rx_ring[0].rdt = E1000_RDT;
  1571. break;
  1572. }
  1573. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1574. if (hw->mac_type >= e1000_82543) {
  1575. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1576. if (adapter->rx_csum == TRUE) {
  1577. rxcsum |= E1000_RXCSUM_TUOFL;
  1578. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1579. * Must be used in conjunction with packet-split. */
  1580. if ((hw->mac_type >= e1000_82571) &&
  1581. (adapter->rx_ps_pages)) {
  1582. rxcsum |= E1000_RXCSUM_IPPCSE;
  1583. }
  1584. } else {
  1585. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1586. /* don't need to clear IPPCSE as it defaults to 0 */
  1587. }
  1588. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1589. }
  1590. /* Enable Receives */
  1591. E1000_WRITE_REG(hw, RCTL, rctl);
  1592. }
  1593. /**
  1594. * e1000_free_tx_resources - Free Tx Resources per Queue
  1595. * @adapter: board private structure
  1596. * @tx_ring: Tx descriptor ring for a specific queue
  1597. *
  1598. * Free all transmit software resources
  1599. **/
  1600. static void
  1601. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1602. struct e1000_tx_ring *tx_ring)
  1603. {
  1604. struct pci_dev *pdev = adapter->pdev;
  1605. e1000_clean_tx_ring(adapter, tx_ring);
  1606. vfree(tx_ring->buffer_info);
  1607. tx_ring->buffer_info = NULL;
  1608. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1609. tx_ring->desc = NULL;
  1610. }
  1611. /**
  1612. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1613. * @adapter: board private structure
  1614. *
  1615. * Free all transmit software resources
  1616. **/
  1617. void
  1618. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1619. {
  1620. int i;
  1621. for (i = 0; i < adapter->num_tx_queues; i++)
  1622. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1623. }
  1624. static void
  1625. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1626. struct e1000_buffer *buffer_info)
  1627. {
  1628. if (buffer_info->dma) {
  1629. pci_unmap_page(adapter->pdev,
  1630. buffer_info->dma,
  1631. buffer_info->length,
  1632. PCI_DMA_TODEVICE);
  1633. }
  1634. if (buffer_info->skb)
  1635. dev_kfree_skb_any(buffer_info->skb);
  1636. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1637. }
  1638. /**
  1639. * e1000_clean_tx_ring - Free Tx Buffers
  1640. * @adapter: board private structure
  1641. * @tx_ring: ring to be cleaned
  1642. **/
  1643. static void
  1644. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1645. struct e1000_tx_ring *tx_ring)
  1646. {
  1647. struct e1000_buffer *buffer_info;
  1648. unsigned long size;
  1649. unsigned int i;
  1650. /* Free all the Tx ring sk_buffs */
  1651. for (i = 0; i < tx_ring->count; i++) {
  1652. buffer_info = &tx_ring->buffer_info[i];
  1653. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1654. }
  1655. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1656. memset(tx_ring->buffer_info, 0, size);
  1657. /* Zero out the descriptor ring */
  1658. memset(tx_ring->desc, 0, tx_ring->size);
  1659. tx_ring->next_to_use = 0;
  1660. tx_ring->next_to_clean = 0;
  1661. tx_ring->last_tx_tso = 0;
  1662. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1663. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1664. }
  1665. /**
  1666. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1667. * @adapter: board private structure
  1668. **/
  1669. static void
  1670. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1671. {
  1672. int i;
  1673. for (i = 0; i < adapter->num_tx_queues; i++)
  1674. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1675. }
  1676. /**
  1677. * e1000_free_rx_resources - Free Rx Resources
  1678. * @adapter: board private structure
  1679. * @rx_ring: ring to clean the resources from
  1680. *
  1681. * Free all receive software resources
  1682. **/
  1683. static void
  1684. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1685. struct e1000_rx_ring *rx_ring)
  1686. {
  1687. struct pci_dev *pdev = adapter->pdev;
  1688. e1000_clean_rx_ring(adapter, rx_ring);
  1689. vfree(rx_ring->buffer_info);
  1690. rx_ring->buffer_info = NULL;
  1691. kfree(rx_ring->ps_page);
  1692. rx_ring->ps_page = NULL;
  1693. kfree(rx_ring->ps_page_dma);
  1694. rx_ring->ps_page_dma = NULL;
  1695. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1696. rx_ring->desc = NULL;
  1697. }
  1698. /**
  1699. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1700. * @adapter: board private structure
  1701. *
  1702. * Free all receive software resources
  1703. **/
  1704. void
  1705. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1706. {
  1707. int i;
  1708. for (i = 0; i < adapter->num_rx_queues; i++)
  1709. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1710. }
  1711. /**
  1712. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1713. * @adapter: board private structure
  1714. * @rx_ring: ring to free buffers from
  1715. **/
  1716. static void
  1717. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1718. struct e1000_rx_ring *rx_ring)
  1719. {
  1720. struct e1000_buffer *buffer_info;
  1721. struct e1000_ps_page *ps_page;
  1722. struct e1000_ps_page_dma *ps_page_dma;
  1723. struct pci_dev *pdev = adapter->pdev;
  1724. unsigned long size;
  1725. unsigned int i, j;
  1726. /* Free all the Rx ring sk_buffs */
  1727. for (i = 0; i < rx_ring->count; i++) {
  1728. buffer_info = &rx_ring->buffer_info[i];
  1729. if (buffer_info->skb) {
  1730. pci_unmap_single(pdev,
  1731. buffer_info->dma,
  1732. buffer_info->length,
  1733. PCI_DMA_FROMDEVICE);
  1734. dev_kfree_skb(buffer_info->skb);
  1735. buffer_info->skb = NULL;
  1736. }
  1737. ps_page = &rx_ring->ps_page[i];
  1738. ps_page_dma = &rx_ring->ps_page_dma[i];
  1739. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1740. if (!ps_page->ps_page[j]) break;
  1741. pci_unmap_page(pdev,
  1742. ps_page_dma->ps_page_dma[j],
  1743. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1744. ps_page_dma->ps_page_dma[j] = 0;
  1745. put_page(ps_page->ps_page[j]);
  1746. ps_page->ps_page[j] = NULL;
  1747. }
  1748. }
  1749. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1750. memset(rx_ring->buffer_info, 0, size);
  1751. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1752. memset(rx_ring->ps_page, 0, size);
  1753. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1754. memset(rx_ring->ps_page_dma, 0, size);
  1755. /* Zero out the descriptor ring */
  1756. memset(rx_ring->desc, 0, rx_ring->size);
  1757. rx_ring->next_to_clean = 0;
  1758. rx_ring->next_to_use = 0;
  1759. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1760. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1761. }
  1762. /**
  1763. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1764. * @adapter: board private structure
  1765. **/
  1766. static void
  1767. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1768. {
  1769. int i;
  1770. for (i = 0; i < adapter->num_rx_queues; i++)
  1771. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1772. }
  1773. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1774. * and memory write and invalidate disabled for certain operations
  1775. */
  1776. static void
  1777. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1778. {
  1779. struct net_device *netdev = adapter->netdev;
  1780. uint32_t rctl;
  1781. e1000_pci_clear_mwi(&adapter->hw);
  1782. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1783. rctl |= E1000_RCTL_RST;
  1784. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1785. E1000_WRITE_FLUSH(&adapter->hw);
  1786. mdelay(5);
  1787. if (netif_running(netdev))
  1788. e1000_clean_all_rx_rings(adapter);
  1789. }
  1790. static void
  1791. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1792. {
  1793. struct net_device *netdev = adapter->netdev;
  1794. uint32_t rctl;
  1795. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1796. rctl &= ~E1000_RCTL_RST;
  1797. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1798. E1000_WRITE_FLUSH(&adapter->hw);
  1799. mdelay(5);
  1800. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1801. e1000_pci_set_mwi(&adapter->hw);
  1802. if (netif_running(netdev)) {
  1803. /* No need to loop, because 82542 supports only 1 queue */
  1804. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1805. e1000_configure_rx(adapter);
  1806. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1807. }
  1808. }
  1809. /**
  1810. * e1000_set_mac - Change the Ethernet Address of the NIC
  1811. * @netdev: network interface device structure
  1812. * @p: pointer to an address structure
  1813. *
  1814. * Returns 0 on success, negative on failure
  1815. **/
  1816. static int
  1817. e1000_set_mac(struct net_device *netdev, void *p)
  1818. {
  1819. struct e1000_adapter *adapter = netdev_priv(netdev);
  1820. struct sockaddr *addr = p;
  1821. if (!is_valid_ether_addr(addr->sa_data))
  1822. return -EADDRNOTAVAIL;
  1823. /* 82542 2.0 needs to be in reset to write receive address registers */
  1824. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1825. e1000_enter_82542_rst(adapter);
  1826. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1827. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1828. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1829. /* With 82571 controllers, LAA may be overwritten (with the default)
  1830. * due to controller reset from the other port. */
  1831. if (adapter->hw.mac_type == e1000_82571) {
  1832. /* activate the work around */
  1833. adapter->hw.laa_is_present = 1;
  1834. /* Hold a copy of the LAA in RAR[14] This is done so that
  1835. * between the time RAR[0] gets clobbered and the time it
  1836. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1837. * of the RARs and no incoming packets directed to this port
  1838. * are dropped. Eventaully the LAA will be in RAR[0] and
  1839. * RAR[14] */
  1840. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1841. E1000_RAR_ENTRIES - 1);
  1842. }
  1843. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1844. e1000_leave_82542_rst(adapter);
  1845. return 0;
  1846. }
  1847. /**
  1848. * e1000_set_multi - Multicast and Promiscuous mode set
  1849. * @netdev: network interface device structure
  1850. *
  1851. * The set_multi entry point is called whenever the multicast address
  1852. * list or the network interface flags are updated. This routine is
  1853. * responsible for configuring the hardware for proper multicast,
  1854. * promiscuous mode, and all-multi behavior.
  1855. **/
  1856. static void
  1857. e1000_set_multi(struct net_device *netdev)
  1858. {
  1859. struct e1000_adapter *adapter = netdev_priv(netdev);
  1860. struct e1000_hw *hw = &adapter->hw;
  1861. struct dev_mc_list *mc_ptr;
  1862. uint32_t rctl;
  1863. uint32_t hash_value;
  1864. int i, rar_entries = E1000_RAR_ENTRIES;
  1865. int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
  1866. E1000_NUM_MTA_REGISTERS_ICH8LAN :
  1867. E1000_NUM_MTA_REGISTERS;
  1868. if (adapter->hw.mac_type == e1000_ich8lan)
  1869. rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
  1870. /* reserve RAR[14] for LAA over-write work-around */
  1871. if (adapter->hw.mac_type == e1000_82571)
  1872. rar_entries--;
  1873. /* Check for Promiscuous and All Multicast modes */
  1874. rctl = E1000_READ_REG(hw, RCTL);
  1875. if (netdev->flags & IFF_PROMISC) {
  1876. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1877. } else if (netdev->flags & IFF_ALLMULTI) {
  1878. rctl |= E1000_RCTL_MPE;
  1879. rctl &= ~E1000_RCTL_UPE;
  1880. } else {
  1881. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1882. }
  1883. E1000_WRITE_REG(hw, RCTL, rctl);
  1884. /* 82542 2.0 needs to be in reset to write receive address registers */
  1885. if (hw->mac_type == e1000_82542_rev2_0)
  1886. e1000_enter_82542_rst(adapter);
  1887. /* load the first 14 multicast address into the exact filters 1-14
  1888. * RAR 0 is used for the station MAC adddress
  1889. * if there are not 14 addresses, go ahead and clear the filters
  1890. * -- with 82571 controllers only 0-13 entries are filled here
  1891. */
  1892. mc_ptr = netdev->mc_list;
  1893. for (i = 1; i < rar_entries; i++) {
  1894. if (mc_ptr) {
  1895. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1896. mc_ptr = mc_ptr->next;
  1897. } else {
  1898. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1899. E1000_WRITE_FLUSH(hw);
  1900. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1901. E1000_WRITE_FLUSH(hw);
  1902. }
  1903. }
  1904. /* clear the old settings from the multicast hash table */
  1905. for (i = 0; i < mta_reg_count; i++) {
  1906. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1907. E1000_WRITE_FLUSH(hw);
  1908. }
  1909. /* load any remaining addresses into the hash table */
  1910. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1911. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1912. e1000_mta_set(hw, hash_value);
  1913. }
  1914. if (hw->mac_type == e1000_82542_rev2_0)
  1915. e1000_leave_82542_rst(adapter);
  1916. }
  1917. /* Need to wait a few seconds after link up to get diagnostic information from
  1918. * the phy */
  1919. static void
  1920. e1000_update_phy_info(unsigned long data)
  1921. {
  1922. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1923. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1924. }
  1925. /**
  1926. * e1000_82547_tx_fifo_stall - Timer Call-back
  1927. * @data: pointer to adapter cast into an unsigned long
  1928. **/
  1929. static void
  1930. e1000_82547_tx_fifo_stall(unsigned long data)
  1931. {
  1932. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1933. struct net_device *netdev = adapter->netdev;
  1934. uint32_t tctl;
  1935. if (atomic_read(&adapter->tx_fifo_stall)) {
  1936. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1937. E1000_READ_REG(&adapter->hw, TDH)) &&
  1938. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1939. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1940. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1941. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1942. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1943. E1000_WRITE_REG(&adapter->hw, TCTL,
  1944. tctl & ~E1000_TCTL_EN);
  1945. E1000_WRITE_REG(&adapter->hw, TDFT,
  1946. adapter->tx_head_addr);
  1947. E1000_WRITE_REG(&adapter->hw, TDFH,
  1948. adapter->tx_head_addr);
  1949. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1950. adapter->tx_head_addr);
  1951. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1952. adapter->tx_head_addr);
  1953. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1954. E1000_WRITE_FLUSH(&adapter->hw);
  1955. adapter->tx_fifo_head = 0;
  1956. atomic_set(&adapter->tx_fifo_stall, 0);
  1957. netif_wake_queue(netdev);
  1958. } else {
  1959. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1960. }
  1961. }
  1962. }
  1963. /**
  1964. * e1000_watchdog - Timer Call-back
  1965. * @data: pointer to adapter cast into an unsigned long
  1966. **/
  1967. static void
  1968. e1000_watchdog(unsigned long data)
  1969. {
  1970. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1971. struct net_device *netdev = adapter->netdev;
  1972. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1973. uint32_t link, tctl;
  1974. int32_t ret_val;
  1975. ret_val = e1000_check_for_link(&adapter->hw);
  1976. if ((ret_val == E1000_ERR_PHY) &&
  1977. (adapter->hw.phy_type == e1000_phy_igp_3) &&
  1978. (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
  1979. /* See e1000_kumeran_lock_loss_workaround() */
  1980. DPRINTK(LINK, INFO,
  1981. "Gigabit has been disabled, downgrading speed\n");
  1982. }
  1983. if (adapter->hw.mac_type == e1000_82573) {
  1984. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1985. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1986. e1000_update_mng_vlan(adapter);
  1987. }
  1988. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1989. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1990. link = !adapter->hw.serdes_link_down;
  1991. else
  1992. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1993. if (link) {
  1994. if (!netif_carrier_ok(netdev)) {
  1995. boolean_t txb2b = 1;
  1996. e1000_get_speed_and_duplex(&adapter->hw,
  1997. &adapter->link_speed,
  1998. &adapter->link_duplex);
  1999. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  2000. adapter->link_speed,
  2001. adapter->link_duplex == FULL_DUPLEX ?
  2002. "Full Duplex" : "Half Duplex");
  2003. /* tweak tx_queue_len according to speed/duplex
  2004. * and adjust the timeout factor */
  2005. netdev->tx_queue_len = adapter->tx_queue_len;
  2006. adapter->tx_timeout_factor = 1;
  2007. switch (adapter->link_speed) {
  2008. case SPEED_10:
  2009. txb2b = 0;
  2010. netdev->tx_queue_len = 10;
  2011. adapter->tx_timeout_factor = 8;
  2012. break;
  2013. case SPEED_100:
  2014. txb2b = 0;
  2015. netdev->tx_queue_len = 100;
  2016. /* maybe add some timeout factor ? */
  2017. break;
  2018. }
  2019. if ((adapter->hw.mac_type == e1000_82571 ||
  2020. adapter->hw.mac_type == e1000_82572) &&
  2021. txb2b == 0) {
  2022. #define SPEED_MODE_BIT (1 << 21)
  2023. uint32_t tarc0;
  2024. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  2025. tarc0 &= ~SPEED_MODE_BIT;
  2026. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  2027. }
  2028. #ifdef NETIF_F_TSO
  2029. /* disable TSO for pcie and 10/100 speeds, to avoid
  2030. * some hardware issues */
  2031. if (!adapter->tso_force &&
  2032. adapter->hw.bus_type == e1000_bus_type_pci_express){
  2033. switch (adapter->link_speed) {
  2034. case SPEED_10:
  2035. case SPEED_100:
  2036. DPRINTK(PROBE,INFO,
  2037. "10/100 speed: disabling TSO\n");
  2038. netdev->features &= ~NETIF_F_TSO;
  2039. break;
  2040. case SPEED_1000:
  2041. netdev->features |= NETIF_F_TSO;
  2042. break;
  2043. default:
  2044. /* oops */
  2045. break;
  2046. }
  2047. }
  2048. #endif
  2049. /* enable transmits in the hardware, need to do this
  2050. * after setting TARC0 */
  2051. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  2052. tctl |= E1000_TCTL_EN;
  2053. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2054. netif_carrier_on(netdev);
  2055. netif_wake_queue(netdev);
  2056. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2057. adapter->smartspeed = 0;
  2058. }
  2059. } else {
  2060. if (netif_carrier_ok(netdev)) {
  2061. adapter->link_speed = 0;
  2062. adapter->link_duplex = 0;
  2063. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2064. netif_carrier_off(netdev);
  2065. netif_stop_queue(netdev);
  2066. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2067. /* 80003ES2LAN workaround--
  2068. * For packet buffer work-around on link down event;
  2069. * disable receives in the ISR and
  2070. * reset device here in the watchdog
  2071. */
  2072. if (adapter->hw.mac_type == e1000_80003es2lan) {
  2073. /* reset device */
  2074. schedule_work(&adapter->reset_task);
  2075. }
  2076. }
  2077. e1000_smartspeed(adapter);
  2078. }
  2079. e1000_update_stats(adapter);
  2080. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2081. adapter->tpt_old = adapter->stats.tpt;
  2082. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2083. adapter->colc_old = adapter->stats.colc;
  2084. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2085. adapter->gorcl_old = adapter->stats.gorcl;
  2086. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2087. adapter->gotcl_old = adapter->stats.gotcl;
  2088. e1000_update_adaptive(&adapter->hw);
  2089. if (!netif_carrier_ok(netdev)) {
  2090. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2091. /* We've lost link, so the controller stops DMA,
  2092. * but we've got queued Tx work that's never going
  2093. * to get done, so reset controller to flush Tx.
  2094. * (Do the reset outside of interrupt context). */
  2095. adapter->tx_timeout_count++;
  2096. schedule_work(&adapter->reset_task);
  2097. }
  2098. }
  2099. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2100. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2101. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2102. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2103. * else is between 2000-8000. */
  2104. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2105. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2106. adapter->gotcl - adapter->gorcl :
  2107. adapter->gorcl - adapter->gotcl) / 10000;
  2108. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2109. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2110. }
  2111. /* Cause software interrupt to ensure rx ring is cleaned */
  2112. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2113. /* Force detection of hung controller every watchdog period */
  2114. adapter->detect_tx_hung = TRUE;
  2115. /* With 82571 controllers, LAA may be overwritten due to controller
  2116. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2117. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2118. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2119. /* Reset the timer */
  2120. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2121. }
  2122. #define E1000_TX_FLAGS_CSUM 0x00000001
  2123. #define E1000_TX_FLAGS_VLAN 0x00000002
  2124. #define E1000_TX_FLAGS_TSO 0x00000004
  2125. #define E1000_TX_FLAGS_IPV4 0x00000008
  2126. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2127. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2128. static int
  2129. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2130. struct sk_buff *skb)
  2131. {
  2132. #ifdef NETIF_F_TSO
  2133. struct e1000_context_desc *context_desc;
  2134. struct e1000_buffer *buffer_info;
  2135. unsigned int i;
  2136. uint32_t cmd_length = 0;
  2137. uint16_t ipcse = 0, tucse, mss;
  2138. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2139. int err;
  2140. if (skb_shinfo(skb)->tso_size) {
  2141. if (skb_header_cloned(skb)) {
  2142. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2143. if (err)
  2144. return err;
  2145. }
  2146. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2147. mss = skb_shinfo(skb)->tso_size;
  2148. if (skb->protocol == htons(ETH_P_IP)) {
  2149. skb->nh.iph->tot_len = 0;
  2150. skb->nh.iph->check = 0;
  2151. skb->h.th->check =
  2152. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2153. skb->nh.iph->daddr,
  2154. 0,
  2155. IPPROTO_TCP,
  2156. 0);
  2157. cmd_length = E1000_TXD_CMD_IP;
  2158. ipcse = skb->h.raw - skb->data - 1;
  2159. #ifdef NETIF_F_TSO_IPV6
  2160. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2161. skb->nh.ipv6h->payload_len = 0;
  2162. skb->h.th->check =
  2163. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2164. &skb->nh.ipv6h->daddr,
  2165. 0,
  2166. IPPROTO_TCP,
  2167. 0);
  2168. ipcse = 0;
  2169. #endif
  2170. }
  2171. ipcss = skb->nh.raw - skb->data;
  2172. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2173. tucss = skb->h.raw - skb->data;
  2174. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2175. tucse = 0;
  2176. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2177. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2178. i = tx_ring->next_to_use;
  2179. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2180. buffer_info = &tx_ring->buffer_info[i];
  2181. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2182. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2183. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2184. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2185. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2186. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2187. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2188. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2189. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2190. buffer_info->time_stamp = jiffies;
  2191. if (++i == tx_ring->count) i = 0;
  2192. tx_ring->next_to_use = i;
  2193. return TRUE;
  2194. }
  2195. #endif
  2196. return FALSE;
  2197. }
  2198. static boolean_t
  2199. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2200. struct sk_buff *skb)
  2201. {
  2202. struct e1000_context_desc *context_desc;
  2203. struct e1000_buffer *buffer_info;
  2204. unsigned int i;
  2205. uint8_t css;
  2206. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2207. css = skb->h.raw - skb->data;
  2208. i = tx_ring->next_to_use;
  2209. buffer_info = &tx_ring->buffer_info[i];
  2210. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2211. context_desc->upper_setup.tcp_fields.tucss = css;
  2212. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2213. context_desc->upper_setup.tcp_fields.tucse = 0;
  2214. context_desc->tcp_seg_setup.data = 0;
  2215. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2216. buffer_info->time_stamp = jiffies;
  2217. if (unlikely(++i == tx_ring->count)) i = 0;
  2218. tx_ring->next_to_use = i;
  2219. return TRUE;
  2220. }
  2221. return FALSE;
  2222. }
  2223. #define E1000_MAX_TXD_PWR 12
  2224. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2225. static int
  2226. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2227. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2228. unsigned int nr_frags, unsigned int mss)
  2229. {
  2230. struct e1000_buffer *buffer_info;
  2231. unsigned int len = skb->len;
  2232. unsigned int offset = 0, size, count = 0, i;
  2233. unsigned int f;
  2234. len -= skb->data_len;
  2235. i = tx_ring->next_to_use;
  2236. while (len) {
  2237. buffer_info = &tx_ring->buffer_info[i];
  2238. size = min(len, max_per_txd);
  2239. #ifdef NETIF_F_TSO
  2240. /* Workaround for Controller erratum --
  2241. * descriptor for non-tso packet in a linear SKB that follows a
  2242. * tso gets written back prematurely before the data is fully
  2243. * DMA'd to the controller */
  2244. if (!skb->data_len && tx_ring->last_tx_tso &&
  2245. !skb_shinfo(skb)->tso_size) {
  2246. tx_ring->last_tx_tso = 0;
  2247. size -= 4;
  2248. }
  2249. /* Workaround for premature desc write-backs
  2250. * in TSO mode. Append 4-byte sentinel desc */
  2251. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2252. size -= 4;
  2253. #endif
  2254. /* work-around for errata 10 and it applies
  2255. * to all controllers in PCI-X mode
  2256. * The fix is to make sure that the first descriptor of a
  2257. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2258. */
  2259. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2260. (size > 2015) && count == 0))
  2261. size = 2015;
  2262. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2263. * terminating buffers within evenly-aligned dwords. */
  2264. if (unlikely(adapter->pcix_82544 &&
  2265. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2266. size > 4))
  2267. size -= 4;
  2268. buffer_info->length = size;
  2269. buffer_info->dma =
  2270. pci_map_single(adapter->pdev,
  2271. skb->data + offset,
  2272. size,
  2273. PCI_DMA_TODEVICE);
  2274. buffer_info->time_stamp = jiffies;
  2275. len -= size;
  2276. offset += size;
  2277. count++;
  2278. if (unlikely(++i == tx_ring->count)) i = 0;
  2279. }
  2280. for (f = 0; f < nr_frags; f++) {
  2281. struct skb_frag_struct *frag;
  2282. frag = &skb_shinfo(skb)->frags[f];
  2283. len = frag->size;
  2284. offset = frag->page_offset;
  2285. while (len) {
  2286. buffer_info = &tx_ring->buffer_info[i];
  2287. size = min(len, max_per_txd);
  2288. #ifdef NETIF_F_TSO
  2289. /* Workaround for premature desc write-backs
  2290. * in TSO mode. Append 4-byte sentinel desc */
  2291. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2292. size -= 4;
  2293. #endif
  2294. /* Workaround for potential 82544 hang in PCI-X.
  2295. * Avoid terminating buffers within evenly-aligned
  2296. * dwords. */
  2297. if (unlikely(adapter->pcix_82544 &&
  2298. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2299. size > 4))
  2300. size -= 4;
  2301. buffer_info->length = size;
  2302. buffer_info->dma =
  2303. pci_map_page(adapter->pdev,
  2304. frag->page,
  2305. offset,
  2306. size,
  2307. PCI_DMA_TODEVICE);
  2308. buffer_info->time_stamp = jiffies;
  2309. len -= size;
  2310. offset += size;
  2311. count++;
  2312. if (unlikely(++i == tx_ring->count)) i = 0;
  2313. }
  2314. }
  2315. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2316. tx_ring->buffer_info[i].skb = skb;
  2317. tx_ring->buffer_info[first].next_to_watch = i;
  2318. return count;
  2319. }
  2320. static void
  2321. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2322. int tx_flags, int count)
  2323. {
  2324. struct e1000_tx_desc *tx_desc = NULL;
  2325. struct e1000_buffer *buffer_info;
  2326. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2327. unsigned int i;
  2328. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2329. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2330. E1000_TXD_CMD_TSE;
  2331. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2332. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2333. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2334. }
  2335. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2336. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2337. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2338. }
  2339. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2340. txd_lower |= E1000_TXD_CMD_VLE;
  2341. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2342. }
  2343. i = tx_ring->next_to_use;
  2344. while (count--) {
  2345. buffer_info = &tx_ring->buffer_info[i];
  2346. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2347. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2348. tx_desc->lower.data =
  2349. cpu_to_le32(txd_lower | buffer_info->length);
  2350. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2351. if (unlikely(++i == tx_ring->count)) i = 0;
  2352. }
  2353. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2354. /* Force memory writes to complete before letting h/w
  2355. * know there are new descriptors to fetch. (Only
  2356. * applicable for weak-ordered memory model archs,
  2357. * such as IA-64). */
  2358. wmb();
  2359. tx_ring->next_to_use = i;
  2360. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2361. }
  2362. /**
  2363. * 82547 workaround to avoid controller hang in half-duplex environment.
  2364. * The workaround is to avoid queuing a large packet that would span
  2365. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2366. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2367. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2368. * to the beginning of the Tx FIFO.
  2369. **/
  2370. #define E1000_FIFO_HDR 0x10
  2371. #define E1000_82547_PAD_LEN 0x3E0
  2372. static int
  2373. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2374. {
  2375. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2376. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2377. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2378. if (adapter->link_duplex != HALF_DUPLEX)
  2379. goto no_fifo_stall_required;
  2380. if (atomic_read(&adapter->tx_fifo_stall))
  2381. return 1;
  2382. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2383. atomic_set(&adapter->tx_fifo_stall, 1);
  2384. return 1;
  2385. }
  2386. no_fifo_stall_required:
  2387. adapter->tx_fifo_head += skb_fifo_len;
  2388. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2389. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2390. return 0;
  2391. }
  2392. #define MINIMUM_DHCP_PACKET_SIZE 282
  2393. static int
  2394. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2395. {
  2396. struct e1000_hw *hw = &adapter->hw;
  2397. uint16_t length, offset;
  2398. if (vlan_tx_tag_present(skb)) {
  2399. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2400. ( adapter->hw.mng_cookie.status &
  2401. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2402. return 0;
  2403. }
  2404. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2405. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2406. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2407. const struct iphdr *ip =
  2408. (struct iphdr *)((uint8_t *)skb->data+14);
  2409. if (IPPROTO_UDP == ip->protocol) {
  2410. struct udphdr *udp =
  2411. (struct udphdr *)((uint8_t *)ip +
  2412. (ip->ihl << 2));
  2413. if (ntohs(udp->dest) == 67) {
  2414. offset = (uint8_t *)udp + 8 - skb->data;
  2415. length = skb->len - offset;
  2416. return e1000_mng_write_dhcp_info(hw,
  2417. (uint8_t *)udp + 8,
  2418. length);
  2419. }
  2420. }
  2421. }
  2422. }
  2423. return 0;
  2424. }
  2425. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2426. static int
  2427. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2428. {
  2429. struct e1000_adapter *adapter = netdev_priv(netdev);
  2430. struct e1000_tx_ring *tx_ring;
  2431. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2432. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2433. unsigned int tx_flags = 0;
  2434. unsigned int len = skb->len;
  2435. unsigned long flags;
  2436. unsigned int nr_frags = 0;
  2437. unsigned int mss = 0;
  2438. int count = 0;
  2439. int tso;
  2440. unsigned int f;
  2441. len -= skb->data_len;
  2442. tx_ring = adapter->tx_ring;
  2443. if (unlikely(skb->len <= 0)) {
  2444. dev_kfree_skb_any(skb);
  2445. return NETDEV_TX_OK;
  2446. }
  2447. #ifdef NETIF_F_TSO
  2448. mss = skb_shinfo(skb)->tso_size;
  2449. /* The controller does a simple calculation to
  2450. * make sure there is enough room in the FIFO before
  2451. * initiating the DMA for each buffer. The calc is:
  2452. * 4 = ceil(buffer len/mss). To make sure we don't
  2453. * overrun the FIFO, adjust the max buffer len if mss
  2454. * drops. */
  2455. if (mss) {
  2456. uint8_t hdr_len;
  2457. max_per_txd = min(mss << 2, max_per_txd);
  2458. max_txd_pwr = fls(max_per_txd) - 1;
  2459. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2460. * points to just header, pull a few bytes of payload from
  2461. * frags into skb->data */
  2462. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2463. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2464. switch (adapter->hw.mac_type) {
  2465. unsigned int pull_size;
  2466. case e1000_82571:
  2467. case e1000_82572:
  2468. case e1000_82573:
  2469. case e1000_ich8lan:
  2470. pull_size = min((unsigned int)4, skb->data_len);
  2471. if (!__pskb_pull_tail(skb, pull_size)) {
  2472. DPRINTK(DRV, ERR,
  2473. "__pskb_pull_tail failed.\n");
  2474. dev_kfree_skb_any(skb);
  2475. return NETDEV_TX_OK;
  2476. }
  2477. len = skb->len - skb->data_len;
  2478. break;
  2479. default:
  2480. /* do nothing */
  2481. break;
  2482. }
  2483. }
  2484. }
  2485. /* reserve a descriptor for the offload context */
  2486. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2487. count++;
  2488. count++;
  2489. #else
  2490. if (skb->ip_summed == CHECKSUM_HW)
  2491. count++;
  2492. #endif
  2493. #ifdef NETIF_F_TSO
  2494. /* Controller Erratum workaround */
  2495. if (!skb->data_len && tx_ring->last_tx_tso &&
  2496. !skb_shinfo(skb)->tso_size)
  2497. count++;
  2498. #endif
  2499. count += TXD_USE_COUNT(len, max_txd_pwr);
  2500. if (adapter->pcix_82544)
  2501. count++;
  2502. /* work-around for errata 10 and it applies to all controllers
  2503. * in PCI-X mode, so add one more descriptor to the count
  2504. */
  2505. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2506. (len > 2015)))
  2507. count++;
  2508. nr_frags = skb_shinfo(skb)->nr_frags;
  2509. for (f = 0; f < nr_frags; f++)
  2510. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2511. max_txd_pwr);
  2512. if (adapter->pcix_82544)
  2513. count += nr_frags;
  2514. if (adapter->hw.tx_pkt_filtering &&
  2515. (adapter->hw.mac_type == e1000_82573))
  2516. e1000_transfer_dhcp_info(adapter, skb);
  2517. local_irq_save(flags);
  2518. if (!spin_trylock(&tx_ring->tx_lock)) {
  2519. /* Collision - tell upper layer to requeue */
  2520. local_irq_restore(flags);
  2521. return NETDEV_TX_LOCKED;
  2522. }
  2523. /* need: count + 2 desc gap to keep tail from touching
  2524. * head, otherwise try next time */
  2525. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2526. netif_stop_queue(netdev);
  2527. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2528. return NETDEV_TX_BUSY;
  2529. }
  2530. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2531. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2532. netif_stop_queue(netdev);
  2533. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2534. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2535. return NETDEV_TX_BUSY;
  2536. }
  2537. }
  2538. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2539. tx_flags |= E1000_TX_FLAGS_VLAN;
  2540. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2541. }
  2542. first = tx_ring->next_to_use;
  2543. tso = e1000_tso(adapter, tx_ring, skb);
  2544. if (tso < 0) {
  2545. dev_kfree_skb_any(skb);
  2546. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2547. return NETDEV_TX_OK;
  2548. }
  2549. if (likely(tso)) {
  2550. tx_ring->last_tx_tso = 1;
  2551. tx_flags |= E1000_TX_FLAGS_TSO;
  2552. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2553. tx_flags |= E1000_TX_FLAGS_CSUM;
  2554. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2555. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2556. * no longer assume, we must. */
  2557. if (likely(skb->protocol == htons(ETH_P_IP)))
  2558. tx_flags |= E1000_TX_FLAGS_IPV4;
  2559. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2560. e1000_tx_map(adapter, tx_ring, skb, first,
  2561. max_per_txd, nr_frags, mss));
  2562. netdev->trans_start = jiffies;
  2563. /* Make sure there is space in the ring for the next send. */
  2564. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2565. netif_stop_queue(netdev);
  2566. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2567. return NETDEV_TX_OK;
  2568. }
  2569. /**
  2570. * e1000_tx_timeout - Respond to a Tx Hang
  2571. * @netdev: network interface device structure
  2572. **/
  2573. static void
  2574. e1000_tx_timeout(struct net_device *netdev)
  2575. {
  2576. struct e1000_adapter *adapter = netdev_priv(netdev);
  2577. /* Do the reset outside of interrupt context */
  2578. adapter->tx_timeout_count++;
  2579. schedule_work(&adapter->reset_task);
  2580. }
  2581. static void
  2582. e1000_reset_task(struct net_device *netdev)
  2583. {
  2584. struct e1000_adapter *adapter = netdev_priv(netdev);
  2585. e1000_reinit_locked(adapter);
  2586. }
  2587. /**
  2588. * e1000_get_stats - Get System Network Statistics
  2589. * @netdev: network interface device structure
  2590. *
  2591. * Returns the address of the device statistics structure.
  2592. * The statistics are actually updated from the timer callback.
  2593. **/
  2594. static struct net_device_stats *
  2595. e1000_get_stats(struct net_device *netdev)
  2596. {
  2597. struct e1000_adapter *adapter = netdev_priv(netdev);
  2598. /* only return the current stats */
  2599. return &adapter->net_stats;
  2600. }
  2601. /**
  2602. * e1000_change_mtu - Change the Maximum Transfer Unit
  2603. * @netdev: network interface device structure
  2604. * @new_mtu: new value for maximum frame size
  2605. *
  2606. * Returns 0 on success, negative on failure
  2607. **/
  2608. static int
  2609. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2610. {
  2611. struct e1000_adapter *adapter = netdev_priv(netdev);
  2612. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2613. uint16_t eeprom_data = 0;
  2614. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2615. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2616. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2617. return -EINVAL;
  2618. }
  2619. /* Adapter-specific max frame size limits. */
  2620. switch (adapter->hw.mac_type) {
  2621. case e1000_undefined ... e1000_82542_rev2_1:
  2622. case e1000_ich8lan:
  2623. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2624. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2625. return -EINVAL;
  2626. }
  2627. break;
  2628. case e1000_82573:
  2629. /* only enable jumbo frames if ASPM is disabled completely
  2630. * this means both bits must be zero in 0x1A bits 3:2 */
  2631. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2632. &eeprom_data);
  2633. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2634. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2635. DPRINTK(PROBE, ERR,
  2636. "Jumbo Frames not supported.\n");
  2637. return -EINVAL;
  2638. }
  2639. break;
  2640. }
  2641. /* fall through to get support */
  2642. case e1000_82571:
  2643. case e1000_82572:
  2644. case e1000_80003es2lan:
  2645. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2646. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2647. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2648. return -EINVAL;
  2649. }
  2650. break;
  2651. default:
  2652. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2653. break;
  2654. }
  2655. /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2656. * means we reserve 2 more, this pushes us to allocate from the next
  2657. * larger slab size
  2658. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2659. if (max_frame <= E1000_RXBUFFER_256)
  2660. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  2661. else if (max_frame <= E1000_RXBUFFER_512)
  2662. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  2663. else if (max_frame <= E1000_RXBUFFER_1024)
  2664. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  2665. else if (max_frame <= E1000_RXBUFFER_2048)
  2666. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2667. else if (max_frame <= E1000_RXBUFFER_4096)
  2668. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2669. else if (max_frame <= E1000_RXBUFFER_8192)
  2670. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2671. else if (max_frame <= E1000_RXBUFFER_16384)
  2672. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2673. /* adjust allocation if LPE protects us, and we aren't using SBP */
  2674. #define MAXIMUM_ETHERNET_VLAN_SIZE 1522
  2675. if (!adapter->hw.tbi_compatibility_on &&
  2676. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  2677. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  2678. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  2679. netdev->mtu = new_mtu;
  2680. if (netif_running(netdev))
  2681. e1000_reinit_locked(adapter);
  2682. adapter->hw.max_frame_size = max_frame;
  2683. return 0;
  2684. }
  2685. /**
  2686. * e1000_update_stats - Update the board statistics counters
  2687. * @adapter: board private structure
  2688. **/
  2689. void
  2690. e1000_update_stats(struct e1000_adapter *adapter)
  2691. {
  2692. struct e1000_hw *hw = &adapter->hw;
  2693. struct pci_dev *pdev = adapter->pdev;
  2694. unsigned long flags;
  2695. uint16_t phy_tmp;
  2696. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2697. /*
  2698. * Prevent stats update while adapter is being reset, or if the pci
  2699. * connection is down.
  2700. */
  2701. if (adapter->link_speed == 0)
  2702. return;
  2703. if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
  2704. return;
  2705. spin_lock_irqsave(&adapter->stats_lock, flags);
  2706. /* these counters are modified from e1000_adjust_tbi_stats,
  2707. * called from the interrupt context, so they must only
  2708. * be written while holding adapter->stats_lock
  2709. */
  2710. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2711. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2712. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2713. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2714. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2715. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2716. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2717. if (adapter->hw.mac_type != e1000_ich8lan) {
  2718. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2719. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2720. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2721. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2722. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2723. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2724. }
  2725. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2726. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2727. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2728. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2729. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2730. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2731. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2732. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2733. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2734. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2735. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2736. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2737. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2738. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2739. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2740. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2741. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2742. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2743. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2744. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2745. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2746. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2747. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2748. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2749. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2750. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2751. if (adapter->hw.mac_type != e1000_ich8lan) {
  2752. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2753. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2754. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2755. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2756. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2757. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2758. }
  2759. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2760. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2761. /* used for adaptive IFS */
  2762. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2763. adapter->stats.tpt += hw->tx_packet_delta;
  2764. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2765. adapter->stats.colc += hw->collision_delta;
  2766. if (hw->mac_type >= e1000_82543) {
  2767. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2768. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2769. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2770. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2771. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2772. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2773. }
  2774. if (hw->mac_type > e1000_82547_rev_2) {
  2775. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2776. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2777. if (adapter->hw.mac_type != e1000_ich8lan) {
  2778. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2779. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2780. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2781. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2782. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2783. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2784. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2785. }
  2786. }
  2787. /* Fill out the OS statistics structure */
  2788. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2789. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2790. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2791. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2792. adapter->net_stats.multicast = adapter->stats.mprc;
  2793. adapter->net_stats.collisions = adapter->stats.colc;
  2794. /* Rx Errors */
  2795. /* RLEC on some newer hardware can be incorrect so build
  2796. * our own version based on RUC and ROC */
  2797. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2798. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2799. adapter->stats.ruc + adapter->stats.roc +
  2800. adapter->stats.cexterr;
  2801. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2802. adapter->stats.roc;
  2803. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2804. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2805. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2806. /* Tx Errors */
  2807. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2808. adapter->stats.latecol;
  2809. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2810. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2811. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2812. /* Tx Dropped needs to be maintained elsewhere */
  2813. /* Phy Stats */
  2814. if (hw->media_type == e1000_media_type_copper) {
  2815. if ((adapter->link_speed == SPEED_1000) &&
  2816. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2817. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2818. adapter->phy_stats.idle_errors += phy_tmp;
  2819. }
  2820. if ((hw->mac_type <= e1000_82546) &&
  2821. (hw->phy_type == e1000_phy_m88) &&
  2822. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2823. adapter->phy_stats.receive_errors += phy_tmp;
  2824. }
  2825. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2826. }
  2827. /**
  2828. * e1000_intr - Interrupt Handler
  2829. * @irq: interrupt number
  2830. * @data: pointer to a network interface device structure
  2831. * @pt_regs: CPU registers structure
  2832. **/
  2833. static irqreturn_t
  2834. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2835. {
  2836. struct net_device *netdev = data;
  2837. struct e1000_adapter *adapter = netdev_priv(netdev);
  2838. struct e1000_hw *hw = &adapter->hw;
  2839. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2840. #ifndef CONFIG_E1000_NAPI
  2841. int i;
  2842. #else
  2843. /* Interrupt Auto-Mask...upon reading ICR,
  2844. * interrupts are masked. No need for the
  2845. * IMC write, but it does mean we should
  2846. * account for it ASAP. */
  2847. if (likely(hw->mac_type >= e1000_82571))
  2848. atomic_inc(&adapter->irq_sem);
  2849. #endif
  2850. if (unlikely(!icr)) {
  2851. #ifdef CONFIG_E1000_NAPI
  2852. if (hw->mac_type >= e1000_82571)
  2853. e1000_irq_enable(adapter);
  2854. #endif
  2855. return IRQ_NONE; /* Not our interrupt */
  2856. }
  2857. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2858. hw->get_link_status = 1;
  2859. /* 80003ES2LAN workaround--
  2860. * For packet buffer work-around on link down event;
  2861. * disable receives here in the ISR and
  2862. * reset adapter in watchdog
  2863. */
  2864. if (netif_carrier_ok(netdev) &&
  2865. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2866. /* disable receives */
  2867. rctl = E1000_READ_REG(hw, RCTL);
  2868. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2869. }
  2870. mod_timer(&adapter->watchdog_timer, jiffies);
  2871. }
  2872. #ifdef CONFIG_E1000_NAPI
  2873. if (unlikely(hw->mac_type < e1000_82571)) {
  2874. atomic_inc(&adapter->irq_sem);
  2875. E1000_WRITE_REG(hw, IMC, ~0);
  2876. E1000_WRITE_FLUSH(hw);
  2877. }
  2878. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2879. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2880. else
  2881. e1000_irq_enable(adapter);
  2882. #else
  2883. /* Writing IMC and IMS is needed for 82547.
  2884. * Due to Hub Link bus being occupied, an interrupt
  2885. * de-assertion message is not able to be sent.
  2886. * When an interrupt assertion message is generated later,
  2887. * two messages are re-ordered and sent out.
  2888. * That causes APIC to think 82547 is in de-assertion
  2889. * state, while 82547 is in assertion state, resulting
  2890. * in dead lock. Writing IMC forces 82547 into
  2891. * de-assertion state.
  2892. */
  2893. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2894. atomic_inc(&adapter->irq_sem);
  2895. E1000_WRITE_REG(hw, IMC, ~0);
  2896. }
  2897. for (i = 0; i < E1000_MAX_INTR; i++)
  2898. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2899. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2900. break;
  2901. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2902. e1000_irq_enable(adapter);
  2903. #endif
  2904. return IRQ_HANDLED;
  2905. }
  2906. #ifdef CONFIG_E1000_NAPI
  2907. /**
  2908. * e1000_clean - NAPI Rx polling callback
  2909. * @adapter: board private structure
  2910. **/
  2911. static int
  2912. e1000_clean(struct net_device *poll_dev, int *budget)
  2913. {
  2914. struct e1000_adapter *adapter;
  2915. int work_to_do = min(*budget, poll_dev->quota);
  2916. int tx_cleaned = 0, i = 0, work_done = 0;
  2917. /* Must NOT use netdev_priv macro here. */
  2918. adapter = poll_dev->priv;
  2919. /* Keep link state information with original netdev */
  2920. if (!netif_carrier_ok(adapter->netdev))
  2921. goto quit_polling;
  2922. while (poll_dev != &adapter->polling_netdev[i]) {
  2923. i++;
  2924. BUG_ON(i == adapter->num_rx_queues);
  2925. }
  2926. if (likely(adapter->num_tx_queues == 1)) {
  2927. /* e1000_clean is called per-cpu. This lock protects
  2928. * tx_ring[0] from being cleaned by multiple cpus
  2929. * simultaneously. A failure obtaining the lock means
  2930. * tx_ring[0] is currently being cleaned anyway. */
  2931. if (spin_trylock(&adapter->tx_queue_lock)) {
  2932. tx_cleaned = e1000_clean_tx_irq(adapter,
  2933. &adapter->tx_ring[0]);
  2934. spin_unlock(&adapter->tx_queue_lock);
  2935. }
  2936. } else
  2937. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2938. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2939. &work_done, work_to_do);
  2940. *budget -= work_done;
  2941. poll_dev->quota -= work_done;
  2942. /* If no Tx and not enough Rx work done, exit the polling mode */
  2943. if ((!tx_cleaned && (work_done == 0)) ||
  2944. !netif_running(adapter->netdev)) {
  2945. quit_polling:
  2946. netif_rx_complete(poll_dev);
  2947. e1000_irq_enable(adapter);
  2948. return 0;
  2949. }
  2950. return 1;
  2951. }
  2952. #endif
  2953. /**
  2954. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2955. * @adapter: board private structure
  2956. **/
  2957. static boolean_t
  2958. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2959. struct e1000_tx_ring *tx_ring)
  2960. {
  2961. struct net_device *netdev = adapter->netdev;
  2962. struct e1000_tx_desc *tx_desc, *eop_desc;
  2963. struct e1000_buffer *buffer_info;
  2964. unsigned int i, eop;
  2965. #ifdef CONFIG_E1000_NAPI
  2966. unsigned int count = 0;
  2967. #endif
  2968. boolean_t cleaned = FALSE;
  2969. i = tx_ring->next_to_clean;
  2970. eop = tx_ring->buffer_info[i].next_to_watch;
  2971. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2972. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2973. for (cleaned = FALSE; !cleaned; ) {
  2974. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2975. buffer_info = &tx_ring->buffer_info[i];
  2976. cleaned = (i == eop);
  2977. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2978. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2979. if (unlikely(++i == tx_ring->count)) i = 0;
  2980. }
  2981. eop = tx_ring->buffer_info[i].next_to_watch;
  2982. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2983. #ifdef CONFIG_E1000_NAPI
  2984. #define E1000_TX_WEIGHT 64
  2985. /* weight of a sort for tx, to avoid endless transmit cleanup */
  2986. if (count++ == E1000_TX_WEIGHT) break;
  2987. #endif
  2988. }
  2989. tx_ring->next_to_clean = i;
  2990. #define TX_WAKE_THRESHOLD 32
  2991. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2992. netif_carrier_ok(netdev))) {
  2993. spin_lock(&tx_ring->tx_lock);
  2994. if (netif_queue_stopped(netdev) &&
  2995. (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
  2996. netif_wake_queue(netdev);
  2997. spin_unlock(&tx_ring->tx_lock);
  2998. }
  2999. if (adapter->detect_tx_hung) {
  3000. /* Detect a transmit hang in hardware, this serializes the
  3001. * check with the clearing of time_stamp and movement of i */
  3002. adapter->detect_tx_hung = FALSE;
  3003. if (tx_ring->buffer_info[eop].dma &&
  3004. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  3005. (adapter->tx_timeout_factor * HZ))
  3006. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  3007. E1000_STATUS_TXOFF)) {
  3008. /* detected Tx unit hang */
  3009. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  3010. " Tx Queue <%lu>\n"
  3011. " TDH <%x>\n"
  3012. " TDT <%x>\n"
  3013. " next_to_use <%x>\n"
  3014. " next_to_clean <%x>\n"
  3015. "buffer_info[next_to_clean]\n"
  3016. " time_stamp <%lx>\n"
  3017. " next_to_watch <%x>\n"
  3018. " jiffies <%lx>\n"
  3019. " next_to_watch.status <%x>\n",
  3020. (unsigned long)((tx_ring - adapter->tx_ring) /
  3021. sizeof(struct e1000_tx_ring)),
  3022. readl(adapter->hw.hw_addr + tx_ring->tdh),
  3023. readl(adapter->hw.hw_addr + tx_ring->tdt),
  3024. tx_ring->next_to_use,
  3025. tx_ring->next_to_clean,
  3026. tx_ring->buffer_info[eop].time_stamp,
  3027. eop,
  3028. jiffies,
  3029. eop_desc->upper.fields.status);
  3030. netif_stop_queue(netdev);
  3031. }
  3032. }
  3033. return cleaned;
  3034. }
  3035. /**
  3036. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3037. * @adapter: board private structure
  3038. * @status_err: receive descriptor status and error fields
  3039. * @csum: receive descriptor csum field
  3040. * @sk_buff: socket buffer with received data
  3041. **/
  3042. static void
  3043. e1000_rx_checksum(struct e1000_adapter *adapter,
  3044. uint32_t status_err, uint32_t csum,
  3045. struct sk_buff *skb)
  3046. {
  3047. uint16_t status = (uint16_t)status_err;
  3048. uint8_t errors = (uint8_t)(status_err >> 24);
  3049. skb->ip_summed = CHECKSUM_NONE;
  3050. /* 82543 or newer only */
  3051. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  3052. /* Ignore Checksum bit is set */
  3053. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3054. /* TCP/UDP checksum error bit is set */
  3055. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3056. /* let the stack verify checksum errors */
  3057. adapter->hw_csum_err++;
  3058. return;
  3059. }
  3060. /* TCP/UDP Checksum has not been calculated */
  3061. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  3062. if (!(status & E1000_RXD_STAT_TCPCS))
  3063. return;
  3064. } else {
  3065. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  3066. return;
  3067. }
  3068. /* It must be a TCP or UDP packet with a valid checksum */
  3069. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3070. /* TCP checksum is good */
  3071. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3072. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3073. /* IP fragment with UDP payload */
  3074. /* Hardware complements the payload checksum, so we undo it
  3075. * and then put the value in host order for further stack use.
  3076. */
  3077. csum = ntohl(csum ^ 0xFFFF);
  3078. skb->csum = csum;
  3079. skb->ip_summed = CHECKSUM_HW;
  3080. }
  3081. adapter->hw_csum_good++;
  3082. }
  3083. /**
  3084. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3085. * @adapter: board private structure
  3086. **/
  3087. static boolean_t
  3088. #ifdef CONFIG_E1000_NAPI
  3089. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3090. struct e1000_rx_ring *rx_ring,
  3091. int *work_done, int work_to_do)
  3092. #else
  3093. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3094. struct e1000_rx_ring *rx_ring)
  3095. #endif
  3096. {
  3097. struct net_device *netdev = adapter->netdev;
  3098. struct pci_dev *pdev = adapter->pdev;
  3099. struct e1000_rx_desc *rx_desc, *next_rxd;
  3100. struct e1000_buffer *buffer_info, *next_buffer;
  3101. unsigned long flags;
  3102. uint32_t length;
  3103. uint8_t last_byte;
  3104. unsigned int i;
  3105. int cleaned_count = 0;
  3106. boolean_t cleaned = FALSE;
  3107. i = rx_ring->next_to_clean;
  3108. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3109. buffer_info = &rx_ring->buffer_info[i];
  3110. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3111. struct sk_buff *skb;
  3112. u8 status;
  3113. #ifdef CONFIG_E1000_NAPI
  3114. if (*work_done >= work_to_do)
  3115. break;
  3116. (*work_done)++;
  3117. #endif
  3118. status = rx_desc->status;
  3119. skb = buffer_info->skb;
  3120. buffer_info->skb = NULL;
  3121. prefetch(skb->data - NET_IP_ALIGN);
  3122. if (++i == rx_ring->count) i = 0;
  3123. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3124. prefetch(next_rxd);
  3125. next_buffer = &rx_ring->buffer_info[i];
  3126. cleaned = TRUE;
  3127. cleaned_count++;
  3128. pci_unmap_single(pdev,
  3129. buffer_info->dma,
  3130. buffer_info->length,
  3131. PCI_DMA_FROMDEVICE);
  3132. length = le16_to_cpu(rx_desc->length);
  3133. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3134. /* All receives must fit into a single buffer */
  3135. E1000_DBG("%s: Receive packet consumed multiple"
  3136. " buffers\n", netdev->name);
  3137. /* recycle */
  3138. buffer_info-> skb = skb;
  3139. goto next_desc;
  3140. }
  3141. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3142. last_byte = *(skb->data + length - 1);
  3143. if (TBI_ACCEPT(&adapter->hw, status,
  3144. rx_desc->errors, length, last_byte)) {
  3145. spin_lock_irqsave(&adapter->stats_lock, flags);
  3146. e1000_tbi_adjust_stats(&adapter->hw,
  3147. &adapter->stats,
  3148. length, skb->data);
  3149. spin_unlock_irqrestore(&adapter->stats_lock,
  3150. flags);
  3151. length--;
  3152. } else {
  3153. /* recycle */
  3154. buffer_info->skb = skb;
  3155. goto next_desc;
  3156. }
  3157. }
  3158. /* code added for copybreak, this should improve
  3159. * performance for small packets with large amounts
  3160. * of reassembly being done in the stack */
  3161. #define E1000_CB_LENGTH 256
  3162. if (length < E1000_CB_LENGTH) {
  3163. struct sk_buff *new_skb =
  3164. dev_alloc_skb(length + NET_IP_ALIGN);
  3165. if (new_skb) {
  3166. skb_reserve(new_skb, NET_IP_ALIGN);
  3167. new_skb->dev = netdev;
  3168. memcpy(new_skb->data - NET_IP_ALIGN,
  3169. skb->data - NET_IP_ALIGN,
  3170. length + NET_IP_ALIGN);
  3171. /* save the skb in buffer_info as good */
  3172. buffer_info->skb = skb;
  3173. skb = new_skb;
  3174. skb_put(skb, length);
  3175. }
  3176. } else
  3177. skb_put(skb, length);
  3178. /* end copybreak code */
  3179. /* Receive Checksum Offload */
  3180. e1000_rx_checksum(adapter,
  3181. (uint32_t)(status) |
  3182. ((uint32_t)(rx_desc->errors) << 24),
  3183. le16_to_cpu(rx_desc->csum), skb);
  3184. skb->protocol = eth_type_trans(skb, netdev);
  3185. #ifdef CONFIG_E1000_NAPI
  3186. if (unlikely(adapter->vlgrp &&
  3187. (status & E1000_RXD_STAT_VP))) {
  3188. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3189. le16_to_cpu(rx_desc->special) &
  3190. E1000_RXD_SPC_VLAN_MASK);
  3191. } else {
  3192. netif_receive_skb(skb);
  3193. }
  3194. #else /* CONFIG_E1000_NAPI */
  3195. if (unlikely(adapter->vlgrp &&
  3196. (status & E1000_RXD_STAT_VP))) {
  3197. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3198. le16_to_cpu(rx_desc->special) &
  3199. E1000_RXD_SPC_VLAN_MASK);
  3200. } else {
  3201. netif_rx(skb);
  3202. }
  3203. #endif /* CONFIG_E1000_NAPI */
  3204. netdev->last_rx = jiffies;
  3205. next_desc:
  3206. rx_desc->status = 0;
  3207. /* return some buffers to hardware, one at a time is too slow */
  3208. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3209. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3210. cleaned_count = 0;
  3211. }
  3212. /* use prefetched values */
  3213. rx_desc = next_rxd;
  3214. buffer_info = next_buffer;
  3215. }
  3216. rx_ring->next_to_clean = i;
  3217. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3218. if (cleaned_count)
  3219. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3220. return cleaned;
  3221. }
  3222. /**
  3223. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3224. * @adapter: board private structure
  3225. **/
  3226. static boolean_t
  3227. #ifdef CONFIG_E1000_NAPI
  3228. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3229. struct e1000_rx_ring *rx_ring,
  3230. int *work_done, int work_to_do)
  3231. #else
  3232. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3233. struct e1000_rx_ring *rx_ring)
  3234. #endif
  3235. {
  3236. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3237. struct net_device *netdev = adapter->netdev;
  3238. struct pci_dev *pdev = adapter->pdev;
  3239. struct e1000_buffer *buffer_info, *next_buffer;
  3240. struct e1000_ps_page *ps_page;
  3241. struct e1000_ps_page_dma *ps_page_dma;
  3242. struct sk_buff *skb;
  3243. unsigned int i, j;
  3244. uint32_t length, staterr;
  3245. int cleaned_count = 0;
  3246. boolean_t cleaned = FALSE;
  3247. i = rx_ring->next_to_clean;
  3248. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3249. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3250. buffer_info = &rx_ring->buffer_info[i];
  3251. while (staterr & E1000_RXD_STAT_DD) {
  3252. ps_page = &rx_ring->ps_page[i];
  3253. ps_page_dma = &rx_ring->ps_page_dma[i];
  3254. #ifdef CONFIG_E1000_NAPI
  3255. if (unlikely(*work_done >= work_to_do))
  3256. break;
  3257. (*work_done)++;
  3258. #endif
  3259. skb = buffer_info->skb;
  3260. /* in the packet split case this is header only */
  3261. prefetch(skb->data - NET_IP_ALIGN);
  3262. if (++i == rx_ring->count) i = 0;
  3263. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3264. prefetch(next_rxd);
  3265. next_buffer = &rx_ring->buffer_info[i];
  3266. cleaned = TRUE;
  3267. cleaned_count++;
  3268. pci_unmap_single(pdev, buffer_info->dma,
  3269. buffer_info->length,
  3270. PCI_DMA_FROMDEVICE);
  3271. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3272. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3273. " the full packet\n", netdev->name);
  3274. dev_kfree_skb_irq(skb);
  3275. goto next_desc;
  3276. }
  3277. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3278. dev_kfree_skb_irq(skb);
  3279. goto next_desc;
  3280. }
  3281. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3282. if (unlikely(!length)) {
  3283. E1000_DBG("%s: Last part of the packet spanning"
  3284. " multiple descriptors\n", netdev->name);
  3285. dev_kfree_skb_irq(skb);
  3286. goto next_desc;
  3287. }
  3288. /* Good Receive */
  3289. skb_put(skb, length);
  3290. {
  3291. /* this looks ugly, but it seems compiler issues make it
  3292. more efficient than reusing j */
  3293. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3294. /* page alloc/put takes too long and effects small packet
  3295. * throughput, so unsplit small packets and save the alloc/put*/
  3296. if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3297. u8 *vaddr;
  3298. /* there is no documentation about how to call
  3299. * kmap_atomic, so we can't hold the mapping
  3300. * very long */
  3301. pci_dma_sync_single_for_cpu(pdev,
  3302. ps_page_dma->ps_page_dma[0],
  3303. PAGE_SIZE,
  3304. PCI_DMA_FROMDEVICE);
  3305. vaddr = kmap_atomic(ps_page->ps_page[0],
  3306. KM_SKB_DATA_SOFTIRQ);
  3307. memcpy(skb->tail, vaddr, l1);
  3308. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3309. pci_dma_sync_single_for_device(pdev,
  3310. ps_page_dma->ps_page_dma[0],
  3311. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3312. skb_put(skb, l1);
  3313. length += l1;
  3314. goto copydone;
  3315. } /* if */
  3316. }
  3317. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3318. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3319. break;
  3320. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3321. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3322. ps_page_dma->ps_page_dma[j] = 0;
  3323. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3324. length);
  3325. ps_page->ps_page[j] = NULL;
  3326. skb->len += length;
  3327. skb->data_len += length;
  3328. skb->truesize += length;
  3329. }
  3330. copydone:
  3331. e1000_rx_checksum(adapter, staterr,
  3332. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3333. skb->protocol = eth_type_trans(skb, netdev);
  3334. if (likely(rx_desc->wb.upper.header_status &
  3335. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3336. adapter->rx_hdr_split++;
  3337. #ifdef CONFIG_E1000_NAPI
  3338. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3339. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3340. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3341. E1000_RXD_SPC_VLAN_MASK);
  3342. } else {
  3343. netif_receive_skb(skb);
  3344. }
  3345. #else /* CONFIG_E1000_NAPI */
  3346. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3347. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3348. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3349. E1000_RXD_SPC_VLAN_MASK);
  3350. } else {
  3351. netif_rx(skb);
  3352. }
  3353. #endif /* CONFIG_E1000_NAPI */
  3354. netdev->last_rx = jiffies;
  3355. next_desc:
  3356. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3357. buffer_info->skb = NULL;
  3358. /* return some buffers to hardware, one at a time is too slow */
  3359. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3360. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3361. cleaned_count = 0;
  3362. }
  3363. /* use prefetched values */
  3364. rx_desc = next_rxd;
  3365. buffer_info = next_buffer;
  3366. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3367. }
  3368. rx_ring->next_to_clean = i;
  3369. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3370. if (cleaned_count)
  3371. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3372. return cleaned;
  3373. }
  3374. /**
  3375. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3376. * @adapter: address of board private structure
  3377. **/
  3378. static void
  3379. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3380. struct e1000_rx_ring *rx_ring,
  3381. int cleaned_count)
  3382. {
  3383. struct net_device *netdev = adapter->netdev;
  3384. struct pci_dev *pdev = adapter->pdev;
  3385. struct e1000_rx_desc *rx_desc;
  3386. struct e1000_buffer *buffer_info;
  3387. struct sk_buff *skb;
  3388. unsigned int i;
  3389. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3390. i = rx_ring->next_to_use;
  3391. buffer_info = &rx_ring->buffer_info[i];
  3392. while (cleaned_count--) {
  3393. if (!(skb = buffer_info->skb))
  3394. skb = dev_alloc_skb(bufsz);
  3395. else {
  3396. skb_trim(skb, 0);
  3397. goto map_skb;
  3398. }
  3399. if (unlikely(!skb)) {
  3400. /* Better luck next round */
  3401. adapter->alloc_rx_buff_failed++;
  3402. break;
  3403. }
  3404. /* Fix for errata 23, can't cross 64kB boundary */
  3405. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3406. struct sk_buff *oldskb = skb;
  3407. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3408. "at %p\n", bufsz, skb->data);
  3409. /* Try again, without freeing the previous */
  3410. skb = dev_alloc_skb(bufsz);
  3411. /* Failed allocation, critical failure */
  3412. if (!skb) {
  3413. dev_kfree_skb(oldskb);
  3414. break;
  3415. }
  3416. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3417. /* give up */
  3418. dev_kfree_skb(skb);
  3419. dev_kfree_skb(oldskb);
  3420. break; /* while !buffer_info->skb */
  3421. } else {
  3422. /* Use new allocation */
  3423. dev_kfree_skb(oldskb);
  3424. }
  3425. }
  3426. /* Make buffer alignment 2 beyond a 16 byte boundary
  3427. * this will result in a 16 byte aligned IP header after
  3428. * the 14 byte MAC header is removed
  3429. */
  3430. skb_reserve(skb, NET_IP_ALIGN);
  3431. skb->dev = netdev;
  3432. buffer_info->skb = skb;
  3433. buffer_info->length = adapter->rx_buffer_len;
  3434. map_skb:
  3435. buffer_info->dma = pci_map_single(pdev,
  3436. skb->data,
  3437. adapter->rx_buffer_len,
  3438. PCI_DMA_FROMDEVICE);
  3439. /* Fix for errata 23, can't cross 64kB boundary */
  3440. if (!e1000_check_64k_bound(adapter,
  3441. (void *)(unsigned long)buffer_info->dma,
  3442. adapter->rx_buffer_len)) {
  3443. DPRINTK(RX_ERR, ERR,
  3444. "dma align check failed: %u bytes at %p\n",
  3445. adapter->rx_buffer_len,
  3446. (void *)(unsigned long)buffer_info->dma);
  3447. dev_kfree_skb(skb);
  3448. buffer_info->skb = NULL;
  3449. pci_unmap_single(pdev, buffer_info->dma,
  3450. adapter->rx_buffer_len,
  3451. PCI_DMA_FROMDEVICE);
  3452. break; /* while !buffer_info->skb */
  3453. }
  3454. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3455. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3456. if (unlikely(++i == rx_ring->count))
  3457. i = 0;
  3458. buffer_info = &rx_ring->buffer_info[i];
  3459. }
  3460. if (likely(rx_ring->next_to_use != i)) {
  3461. rx_ring->next_to_use = i;
  3462. if (unlikely(i-- == 0))
  3463. i = (rx_ring->count - 1);
  3464. /* Force memory writes to complete before letting h/w
  3465. * know there are new descriptors to fetch. (Only
  3466. * applicable for weak-ordered memory model archs,
  3467. * such as IA-64). */
  3468. wmb();
  3469. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3470. }
  3471. }
  3472. /**
  3473. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3474. * @adapter: address of board private structure
  3475. **/
  3476. static void
  3477. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3478. struct e1000_rx_ring *rx_ring,
  3479. int cleaned_count)
  3480. {
  3481. struct net_device *netdev = adapter->netdev;
  3482. struct pci_dev *pdev = adapter->pdev;
  3483. union e1000_rx_desc_packet_split *rx_desc;
  3484. struct e1000_buffer *buffer_info;
  3485. struct e1000_ps_page *ps_page;
  3486. struct e1000_ps_page_dma *ps_page_dma;
  3487. struct sk_buff *skb;
  3488. unsigned int i, j;
  3489. i = rx_ring->next_to_use;
  3490. buffer_info = &rx_ring->buffer_info[i];
  3491. ps_page = &rx_ring->ps_page[i];
  3492. ps_page_dma = &rx_ring->ps_page_dma[i];
  3493. while (cleaned_count--) {
  3494. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3495. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3496. if (j < adapter->rx_ps_pages) {
  3497. if (likely(!ps_page->ps_page[j])) {
  3498. ps_page->ps_page[j] =
  3499. alloc_page(GFP_ATOMIC);
  3500. if (unlikely(!ps_page->ps_page[j])) {
  3501. adapter->alloc_rx_buff_failed++;
  3502. goto no_buffers;
  3503. }
  3504. ps_page_dma->ps_page_dma[j] =
  3505. pci_map_page(pdev,
  3506. ps_page->ps_page[j],
  3507. 0, PAGE_SIZE,
  3508. PCI_DMA_FROMDEVICE);
  3509. }
  3510. /* Refresh the desc even if buffer_addrs didn't
  3511. * change because each write-back erases
  3512. * this info.
  3513. */
  3514. rx_desc->read.buffer_addr[j+1] =
  3515. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3516. } else
  3517. rx_desc->read.buffer_addr[j+1] = ~0;
  3518. }
  3519. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3520. if (unlikely(!skb)) {
  3521. adapter->alloc_rx_buff_failed++;
  3522. break;
  3523. }
  3524. /* Make buffer alignment 2 beyond a 16 byte boundary
  3525. * this will result in a 16 byte aligned IP header after
  3526. * the 14 byte MAC header is removed
  3527. */
  3528. skb_reserve(skb, NET_IP_ALIGN);
  3529. skb->dev = netdev;
  3530. buffer_info->skb = skb;
  3531. buffer_info->length = adapter->rx_ps_bsize0;
  3532. buffer_info->dma = pci_map_single(pdev, skb->data,
  3533. adapter->rx_ps_bsize0,
  3534. PCI_DMA_FROMDEVICE);
  3535. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3536. if (unlikely(++i == rx_ring->count)) i = 0;
  3537. buffer_info = &rx_ring->buffer_info[i];
  3538. ps_page = &rx_ring->ps_page[i];
  3539. ps_page_dma = &rx_ring->ps_page_dma[i];
  3540. }
  3541. no_buffers:
  3542. if (likely(rx_ring->next_to_use != i)) {
  3543. rx_ring->next_to_use = i;
  3544. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3545. /* Force memory writes to complete before letting h/w
  3546. * know there are new descriptors to fetch. (Only
  3547. * applicable for weak-ordered memory model archs,
  3548. * such as IA-64). */
  3549. wmb();
  3550. /* Hardware increments by 16 bytes, but packet split
  3551. * descriptors are 32 bytes...so we increment tail
  3552. * twice as much.
  3553. */
  3554. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3555. }
  3556. }
  3557. /**
  3558. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3559. * @adapter:
  3560. **/
  3561. static void
  3562. e1000_smartspeed(struct e1000_adapter *adapter)
  3563. {
  3564. uint16_t phy_status;
  3565. uint16_t phy_ctrl;
  3566. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3567. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3568. return;
  3569. if (adapter->smartspeed == 0) {
  3570. /* If Master/Slave config fault is asserted twice,
  3571. * we assume back-to-back */
  3572. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3573. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3574. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3575. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3576. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3577. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3578. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3579. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3580. phy_ctrl);
  3581. adapter->smartspeed++;
  3582. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3583. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3584. &phy_ctrl)) {
  3585. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3586. MII_CR_RESTART_AUTO_NEG);
  3587. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3588. phy_ctrl);
  3589. }
  3590. }
  3591. return;
  3592. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3593. /* If still no link, perhaps using 2/3 pair cable */
  3594. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3595. phy_ctrl |= CR_1000T_MS_ENABLE;
  3596. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3597. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3598. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3599. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3600. MII_CR_RESTART_AUTO_NEG);
  3601. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3602. }
  3603. }
  3604. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3605. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3606. adapter->smartspeed = 0;
  3607. }
  3608. /**
  3609. * e1000_ioctl -
  3610. * @netdev:
  3611. * @ifreq:
  3612. * @cmd:
  3613. **/
  3614. static int
  3615. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3616. {
  3617. switch (cmd) {
  3618. case SIOCGMIIPHY:
  3619. case SIOCGMIIREG:
  3620. case SIOCSMIIREG:
  3621. return e1000_mii_ioctl(netdev, ifr, cmd);
  3622. default:
  3623. return -EOPNOTSUPP;
  3624. }
  3625. }
  3626. /**
  3627. * e1000_mii_ioctl -
  3628. * @netdev:
  3629. * @ifreq:
  3630. * @cmd:
  3631. **/
  3632. static int
  3633. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3634. {
  3635. struct e1000_adapter *adapter = netdev_priv(netdev);
  3636. struct mii_ioctl_data *data = if_mii(ifr);
  3637. int retval;
  3638. uint16_t mii_reg;
  3639. uint16_t spddplx;
  3640. unsigned long flags;
  3641. if (adapter->hw.media_type != e1000_media_type_copper)
  3642. return -EOPNOTSUPP;
  3643. switch (cmd) {
  3644. case SIOCGMIIPHY:
  3645. data->phy_id = adapter->hw.phy_addr;
  3646. break;
  3647. case SIOCGMIIREG:
  3648. if (!capable(CAP_NET_ADMIN))
  3649. return -EPERM;
  3650. spin_lock_irqsave(&adapter->stats_lock, flags);
  3651. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3652. &data->val_out)) {
  3653. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3654. return -EIO;
  3655. }
  3656. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3657. break;
  3658. case SIOCSMIIREG:
  3659. if (!capable(CAP_NET_ADMIN))
  3660. return -EPERM;
  3661. if (data->reg_num & ~(0x1F))
  3662. return -EFAULT;
  3663. mii_reg = data->val_in;
  3664. spin_lock_irqsave(&adapter->stats_lock, flags);
  3665. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3666. mii_reg)) {
  3667. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3668. return -EIO;
  3669. }
  3670. if (adapter->hw.media_type == e1000_media_type_copper) {
  3671. switch (data->reg_num) {
  3672. case PHY_CTRL:
  3673. if (mii_reg & MII_CR_POWER_DOWN)
  3674. break;
  3675. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3676. adapter->hw.autoneg = 1;
  3677. adapter->hw.autoneg_advertised = 0x2F;
  3678. } else {
  3679. if (mii_reg & 0x40)
  3680. spddplx = SPEED_1000;
  3681. else if (mii_reg & 0x2000)
  3682. spddplx = SPEED_100;
  3683. else
  3684. spddplx = SPEED_10;
  3685. spddplx += (mii_reg & 0x100)
  3686. ? DUPLEX_FULL :
  3687. DUPLEX_HALF;
  3688. retval = e1000_set_spd_dplx(adapter,
  3689. spddplx);
  3690. if (retval) {
  3691. spin_unlock_irqrestore(
  3692. &adapter->stats_lock,
  3693. flags);
  3694. return retval;
  3695. }
  3696. }
  3697. if (netif_running(adapter->netdev))
  3698. e1000_reinit_locked(adapter);
  3699. else
  3700. e1000_reset(adapter);
  3701. break;
  3702. case M88E1000_PHY_SPEC_CTRL:
  3703. case M88E1000_EXT_PHY_SPEC_CTRL:
  3704. if (e1000_phy_reset(&adapter->hw)) {
  3705. spin_unlock_irqrestore(
  3706. &adapter->stats_lock, flags);
  3707. return -EIO;
  3708. }
  3709. break;
  3710. }
  3711. } else {
  3712. switch (data->reg_num) {
  3713. case PHY_CTRL:
  3714. if (mii_reg & MII_CR_POWER_DOWN)
  3715. break;
  3716. if (netif_running(adapter->netdev))
  3717. e1000_reinit_locked(adapter);
  3718. else
  3719. e1000_reset(adapter);
  3720. break;
  3721. }
  3722. }
  3723. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3724. break;
  3725. default:
  3726. return -EOPNOTSUPP;
  3727. }
  3728. return E1000_SUCCESS;
  3729. }
  3730. void
  3731. e1000_pci_set_mwi(struct e1000_hw *hw)
  3732. {
  3733. struct e1000_adapter *adapter = hw->back;
  3734. int ret_val = pci_set_mwi(adapter->pdev);
  3735. if (ret_val)
  3736. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3737. }
  3738. void
  3739. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3740. {
  3741. struct e1000_adapter *adapter = hw->back;
  3742. pci_clear_mwi(adapter->pdev);
  3743. }
  3744. void
  3745. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3746. {
  3747. struct e1000_adapter *adapter = hw->back;
  3748. pci_read_config_word(adapter->pdev, reg, value);
  3749. }
  3750. void
  3751. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3752. {
  3753. struct e1000_adapter *adapter = hw->back;
  3754. pci_write_config_word(adapter->pdev, reg, *value);
  3755. }
  3756. uint32_t
  3757. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3758. {
  3759. return inl(port);
  3760. }
  3761. void
  3762. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3763. {
  3764. outl(value, port);
  3765. }
  3766. static void
  3767. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3768. {
  3769. struct e1000_adapter *adapter = netdev_priv(netdev);
  3770. uint32_t ctrl, rctl;
  3771. e1000_irq_disable(adapter);
  3772. adapter->vlgrp = grp;
  3773. if (grp) {
  3774. /* enable VLAN tag insert/strip */
  3775. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3776. ctrl |= E1000_CTRL_VME;
  3777. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3778. if (adapter->hw.mac_type != e1000_ich8lan) {
  3779. /* enable VLAN receive filtering */
  3780. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3781. rctl |= E1000_RCTL_VFE;
  3782. rctl &= ~E1000_RCTL_CFIEN;
  3783. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3784. e1000_update_mng_vlan(adapter);
  3785. }
  3786. } else {
  3787. /* disable VLAN tag insert/strip */
  3788. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3789. ctrl &= ~E1000_CTRL_VME;
  3790. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3791. if (adapter->hw.mac_type != e1000_ich8lan) {
  3792. /* disable VLAN filtering */
  3793. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3794. rctl &= ~E1000_RCTL_VFE;
  3795. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3796. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3797. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3798. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3799. }
  3800. }
  3801. }
  3802. e1000_irq_enable(adapter);
  3803. }
  3804. static void
  3805. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3806. {
  3807. struct e1000_adapter *adapter = netdev_priv(netdev);
  3808. uint32_t vfta, index;
  3809. if ((adapter->hw.mng_cookie.status &
  3810. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3811. (vid == adapter->mng_vlan_id))
  3812. return;
  3813. /* add VID to filter table */
  3814. index = (vid >> 5) & 0x7F;
  3815. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3816. vfta |= (1 << (vid & 0x1F));
  3817. e1000_write_vfta(&adapter->hw, index, vfta);
  3818. }
  3819. static void
  3820. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3821. {
  3822. struct e1000_adapter *adapter = netdev_priv(netdev);
  3823. uint32_t vfta, index;
  3824. e1000_irq_disable(adapter);
  3825. if (adapter->vlgrp)
  3826. adapter->vlgrp->vlan_devices[vid] = NULL;
  3827. e1000_irq_enable(adapter);
  3828. if ((adapter->hw.mng_cookie.status &
  3829. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3830. (vid == adapter->mng_vlan_id)) {
  3831. /* release control to f/w */
  3832. e1000_release_hw_control(adapter);
  3833. return;
  3834. }
  3835. /* remove VID from filter table */
  3836. index = (vid >> 5) & 0x7F;
  3837. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3838. vfta &= ~(1 << (vid & 0x1F));
  3839. e1000_write_vfta(&adapter->hw, index, vfta);
  3840. }
  3841. static void
  3842. e1000_restore_vlan(struct e1000_adapter *adapter)
  3843. {
  3844. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3845. if (adapter->vlgrp) {
  3846. uint16_t vid;
  3847. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3848. if (!adapter->vlgrp->vlan_devices[vid])
  3849. continue;
  3850. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3851. }
  3852. }
  3853. }
  3854. int
  3855. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3856. {
  3857. adapter->hw.autoneg = 0;
  3858. /* Fiber NICs only allow 1000 gbps Full duplex */
  3859. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3860. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3861. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3862. return -EINVAL;
  3863. }
  3864. switch (spddplx) {
  3865. case SPEED_10 + DUPLEX_HALF:
  3866. adapter->hw.forced_speed_duplex = e1000_10_half;
  3867. break;
  3868. case SPEED_10 + DUPLEX_FULL:
  3869. adapter->hw.forced_speed_duplex = e1000_10_full;
  3870. break;
  3871. case SPEED_100 + DUPLEX_HALF:
  3872. adapter->hw.forced_speed_duplex = e1000_100_half;
  3873. break;
  3874. case SPEED_100 + DUPLEX_FULL:
  3875. adapter->hw.forced_speed_duplex = e1000_100_full;
  3876. break;
  3877. case SPEED_1000 + DUPLEX_FULL:
  3878. adapter->hw.autoneg = 1;
  3879. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3880. break;
  3881. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3882. default:
  3883. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3884. return -EINVAL;
  3885. }
  3886. return 0;
  3887. }
  3888. #ifdef CONFIG_PM
  3889. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3890. * bus we're on (PCI(X) vs. PCI-E)
  3891. */
  3892. #define PCIE_CONFIG_SPACE_LEN 256
  3893. #define PCI_CONFIG_SPACE_LEN 64
  3894. static int
  3895. e1000_pci_save_state(struct e1000_adapter *adapter)
  3896. {
  3897. struct pci_dev *dev = adapter->pdev;
  3898. int size;
  3899. int i;
  3900. if (adapter->hw.mac_type >= e1000_82571)
  3901. size = PCIE_CONFIG_SPACE_LEN;
  3902. else
  3903. size = PCI_CONFIG_SPACE_LEN;
  3904. WARN_ON(adapter->config_space != NULL);
  3905. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3906. if (!adapter->config_space) {
  3907. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3908. return -ENOMEM;
  3909. }
  3910. for (i = 0; i < (size / 4); i++)
  3911. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3912. return 0;
  3913. }
  3914. static void
  3915. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3916. {
  3917. struct pci_dev *dev = adapter->pdev;
  3918. int size;
  3919. int i;
  3920. if (adapter->config_space == NULL)
  3921. return;
  3922. if (adapter->hw.mac_type >= e1000_82571)
  3923. size = PCIE_CONFIG_SPACE_LEN;
  3924. else
  3925. size = PCI_CONFIG_SPACE_LEN;
  3926. for (i = 0; i < (size / 4); i++)
  3927. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3928. kfree(adapter->config_space);
  3929. adapter->config_space = NULL;
  3930. return;
  3931. }
  3932. #endif /* CONFIG_PM */
  3933. static int
  3934. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3935. {
  3936. struct net_device *netdev = pci_get_drvdata(pdev);
  3937. struct e1000_adapter *adapter = netdev_priv(netdev);
  3938. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3939. uint32_t wufc = adapter->wol;
  3940. #ifdef CONFIG_PM
  3941. int retval = 0;
  3942. #endif
  3943. netif_device_detach(netdev);
  3944. if (netif_running(netdev)) {
  3945. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  3946. e1000_down(adapter);
  3947. }
  3948. #ifdef CONFIG_PM
  3949. /* Implement our own version of pci_save_state(pdev) because pci-
  3950. * express adapters have 256-byte config spaces. */
  3951. retval = e1000_pci_save_state(adapter);
  3952. if (retval)
  3953. return retval;
  3954. #endif
  3955. status = E1000_READ_REG(&adapter->hw, STATUS);
  3956. if (status & E1000_STATUS_LU)
  3957. wufc &= ~E1000_WUFC_LNKC;
  3958. if (wufc) {
  3959. e1000_setup_rctl(adapter);
  3960. e1000_set_multi(netdev);
  3961. /* turn on all-multi mode if wake on multicast is enabled */
  3962. if (adapter->wol & E1000_WUFC_MC) {
  3963. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3964. rctl |= E1000_RCTL_MPE;
  3965. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3966. }
  3967. if (adapter->hw.mac_type >= e1000_82540) {
  3968. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3969. /* advertise wake from D3Cold */
  3970. #define E1000_CTRL_ADVD3WUC 0x00100000
  3971. /* phy power management enable */
  3972. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3973. ctrl |= E1000_CTRL_ADVD3WUC |
  3974. E1000_CTRL_EN_PHY_PWR_MGMT;
  3975. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3976. }
  3977. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3978. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3979. /* keep the laser running in D3 */
  3980. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3981. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3982. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3983. }
  3984. /* Allow time for pending master requests to run */
  3985. e1000_disable_pciex_master(&adapter->hw);
  3986. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3987. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3988. pci_enable_wake(pdev, PCI_D3hot, 1);
  3989. pci_enable_wake(pdev, PCI_D3cold, 1);
  3990. } else {
  3991. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3992. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3993. pci_enable_wake(pdev, PCI_D3hot, 0);
  3994. pci_enable_wake(pdev, PCI_D3cold, 0);
  3995. }
  3996. /* FIXME: this code is incorrect for PCI Express */
  3997. if (adapter->hw.mac_type >= e1000_82540 &&
  3998. adapter->hw.mac_type != e1000_ich8lan &&
  3999. adapter->hw.media_type == e1000_media_type_copper) {
  4000. manc = E1000_READ_REG(&adapter->hw, MANC);
  4001. if (manc & E1000_MANC_SMBUS_EN) {
  4002. manc |= E1000_MANC_ARP_EN;
  4003. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4004. pci_enable_wake(pdev, PCI_D3hot, 1);
  4005. pci_enable_wake(pdev, PCI_D3cold, 1);
  4006. }
  4007. }
  4008. if (adapter->hw.phy_type == e1000_phy_igp_3)
  4009. e1000_phy_powerdown_workaround(&adapter->hw);
  4010. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  4011. * would have already happened in close and is redundant. */
  4012. e1000_release_hw_control(adapter);
  4013. pci_disable_device(pdev);
  4014. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4015. return 0;
  4016. }
  4017. #ifdef CONFIG_PM
  4018. static int
  4019. e1000_resume(struct pci_dev *pdev)
  4020. {
  4021. struct net_device *netdev = pci_get_drvdata(pdev);
  4022. struct e1000_adapter *adapter = netdev_priv(netdev);
  4023. uint32_t manc, ret_val;
  4024. pci_set_power_state(pdev, PCI_D0);
  4025. e1000_pci_restore_state(adapter);
  4026. ret_val = pci_enable_device(pdev);
  4027. pci_set_master(pdev);
  4028. pci_enable_wake(pdev, PCI_D3hot, 0);
  4029. pci_enable_wake(pdev, PCI_D3cold, 0);
  4030. e1000_reset(adapter);
  4031. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4032. if (netif_running(netdev))
  4033. e1000_up(adapter);
  4034. netif_device_attach(netdev);
  4035. /* FIXME: this code is incorrect for PCI Express */
  4036. if (adapter->hw.mac_type >= e1000_82540 &&
  4037. adapter->hw.mac_type != e1000_ich8lan &&
  4038. adapter->hw.media_type == e1000_media_type_copper) {
  4039. manc = E1000_READ_REG(&adapter->hw, MANC);
  4040. manc &= ~(E1000_MANC_ARP_EN);
  4041. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4042. }
  4043. /* If the controller is 82573 and f/w is AMT, do not set
  4044. * DRV_LOAD until the interface is up. For all other cases,
  4045. * let the f/w know that the h/w is now under the control
  4046. * of the driver. */
  4047. if (adapter->hw.mac_type != e1000_82573 ||
  4048. !e1000_check_mng_mode(&adapter->hw))
  4049. e1000_get_hw_control(adapter);
  4050. return 0;
  4051. }
  4052. #endif
  4053. static void e1000_shutdown(struct pci_dev *pdev)
  4054. {
  4055. e1000_suspend(pdev, PMSG_SUSPEND);
  4056. }
  4057. #ifdef CONFIG_NET_POLL_CONTROLLER
  4058. /*
  4059. * Polling 'interrupt' - used by things like netconsole to send skbs
  4060. * without having to re-enable interrupts. It's not called while
  4061. * the interrupt routine is executing.
  4062. */
  4063. static void
  4064. e1000_netpoll(struct net_device *netdev)
  4065. {
  4066. struct e1000_adapter *adapter = netdev_priv(netdev);
  4067. disable_irq(adapter->pdev->irq);
  4068. e1000_intr(adapter->pdev->irq, netdev, NULL);
  4069. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  4070. #ifndef CONFIG_E1000_NAPI
  4071. adapter->clean_rx(adapter, adapter->rx_ring);
  4072. #endif
  4073. enable_irq(adapter->pdev->irq);
  4074. }
  4075. #endif
  4076. /**
  4077. * e1000_io_error_detected - called when PCI error is detected
  4078. * @pdev: Pointer to PCI device
  4079. * @state: The current pci conneection state
  4080. *
  4081. * This function is called after a PCI bus error affecting
  4082. * this device has been detected.
  4083. */
  4084. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  4085. {
  4086. struct net_device *netdev = pci_get_drvdata(pdev);
  4087. struct e1000_adapter *adapter = netdev->priv;
  4088. netif_device_detach(netdev);
  4089. if (netif_running(netdev))
  4090. e1000_down(adapter);
  4091. /* Request a slot slot reset. */
  4092. return PCI_ERS_RESULT_NEED_RESET;
  4093. }
  4094. /**
  4095. * e1000_io_slot_reset - called after the pci bus has been reset.
  4096. * @pdev: Pointer to PCI device
  4097. *
  4098. * Restart the card from scratch, as if from a cold-boot. Implementation
  4099. * resembles the first-half of the e1000_resume routine.
  4100. */
  4101. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4102. {
  4103. struct net_device *netdev = pci_get_drvdata(pdev);
  4104. struct e1000_adapter *adapter = netdev->priv;
  4105. if (pci_enable_device(pdev)) {
  4106. printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
  4107. return PCI_ERS_RESULT_DISCONNECT;
  4108. }
  4109. pci_set_master(pdev);
  4110. pci_enable_wake(pdev, 3, 0);
  4111. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  4112. /* Perform card reset only on one instance of the card */
  4113. if (PCI_FUNC (pdev->devfn) != 0)
  4114. return PCI_ERS_RESULT_RECOVERED;
  4115. e1000_reset(adapter);
  4116. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4117. return PCI_ERS_RESULT_RECOVERED;
  4118. }
  4119. /**
  4120. * e1000_io_resume - called when traffic can start flowing again.
  4121. * @pdev: Pointer to PCI device
  4122. *
  4123. * This callback is called when the error recovery driver tells us that
  4124. * its OK to resume normal operation. Implementation resembles the
  4125. * second-half of the e1000_resume routine.
  4126. */
  4127. static void e1000_io_resume(struct pci_dev *pdev)
  4128. {
  4129. struct net_device *netdev = pci_get_drvdata(pdev);
  4130. struct e1000_adapter *adapter = netdev->priv;
  4131. uint32_t manc, swsm;
  4132. if (netif_running(netdev)) {
  4133. if (e1000_up(adapter)) {
  4134. printk("e1000: can't bring device back up after reset\n");
  4135. return;
  4136. }
  4137. }
  4138. netif_device_attach(netdev);
  4139. if (adapter->hw.mac_type >= e1000_82540 &&
  4140. adapter->hw.media_type == e1000_media_type_copper) {
  4141. manc = E1000_READ_REG(&adapter->hw, MANC);
  4142. manc &= ~(E1000_MANC_ARP_EN);
  4143. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4144. }
  4145. switch (adapter->hw.mac_type) {
  4146. case e1000_82573:
  4147. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  4148. E1000_WRITE_REG(&adapter->hw, SWSM,
  4149. swsm | E1000_SWSM_DRV_LOAD);
  4150. break;
  4151. default:
  4152. break;
  4153. }
  4154. if (netif_running(netdev))
  4155. mod_timer(&adapter->watchdog_timer, jiffies);
  4156. }
  4157. /* e1000_main.c */