devices.c 15 KB

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  1. /*
  2. * Copyright (C) 2010,2011 Google, Inc.
  3. *
  4. * Author:
  5. * Colin Cross <ccross@android.com>
  6. * Erik Gilling <ccross@android.com>
  7. *
  8. * This software is licensed under the terms of the GNU General Public
  9. * License version 2, as published by the Free Software Foundation, and
  10. * may be copied, distributed, and modified under those terms.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. */
  18. #include <linux/resource.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/fsl_devices.h>
  22. #include <linux/serial_8250.h>
  23. #include <linux/i2c-tegra.h>
  24. #include <mach/irqs.h>
  25. #include <mach/iomap.h>
  26. #include <mach/dma.h>
  27. #include <mach/usb_phy.h>
  28. #include "gpio-names.h"
  29. #include "devices.h"
  30. static struct resource gpio_resource[] = {
  31. [0] = {
  32. .start = TEGRA_GPIO_BASE,
  33. .end = TEGRA_GPIO_BASE + TEGRA_GPIO_SIZE-1,
  34. .flags = IORESOURCE_MEM,
  35. },
  36. [1] = {
  37. .start = INT_GPIO1,
  38. .end = INT_GPIO1,
  39. .flags = IORESOURCE_IRQ,
  40. },
  41. [2] = {
  42. .start = INT_GPIO2,
  43. .end = INT_GPIO2,
  44. .flags = IORESOURCE_IRQ,
  45. },
  46. [3] = {
  47. .start = INT_GPIO3,
  48. .end = INT_GPIO3,
  49. .flags = IORESOURCE_IRQ,
  50. },
  51. [4] = {
  52. .start = INT_GPIO4,
  53. .end = INT_GPIO4,
  54. .flags = IORESOURCE_IRQ,
  55. },
  56. [5] = {
  57. .start = INT_GPIO5,
  58. .end = INT_GPIO5,
  59. .flags = IORESOURCE_IRQ,
  60. },
  61. [6] = {
  62. .start = INT_GPIO6,
  63. .end = INT_GPIO6,
  64. .flags = IORESOURCE_IRQ,
  65. },
  66. [7] = {
  67. .start = INT_GPIO7,
  68. .end = INT_GPIO7,
  69. .flags = IORESOURCE_IRQ,
  70. },
  71. };
  72. struct platform_device tegra_gpio_device = {
  73. .name = "tegra-gpio",
  74. .id = -1,
  75. .resource = gpio_resource,
  76. .num_resources = ARRAY_SIZE(gpio_resource),
  77. };
  78. static struct resource pinmux_resource[] = {
  79. [0] = {
  80. /* Tri-state registers */
  81. .start = TEGRA_APB_MISC_BASE + 0x14,
  82. .end = TEGRA_APB_MISC_BASE + 0x20 + 3,
  83. .flags = IORESOURCE_MEM,
  84. },
  85. [1] = {
  86. /* Mux registers */
  87. .start = TEGRA_APB_MISC_BASE + 0x80,
  88. .end = TEGRA_APB_MISC_BASE + 0x9c + 3,
  89. .flags = IORESOURCE_MEM,
  90. },
  91. [2] = {
  92. /* Pull-up/down registers */
  93. .start = TEGRA_APB_MISC_BASE + 0xa0,
  94. .end = TEGRA_APB_MISC_BASE + 0xb0 + 3,
  95. .flags = IORESOURCE_MEM,
  96. },
  97. [3] = {
  98. /* Pad control registers */
  99. .start = TEGRA_APB_MISC_BASE + 0x868,
  100. .end = TEGRA_APB_MISC_BASE + 0x90c + 3,
  101. .flags = IORESOURCE_MEM,
  102. },
  103. };
  104. struct platform_device tegra_pinmux_device = {
  105. .name = "tegra20-pinctrl",
  106. .id = -1,
  107. .resource = pinmux_resource,
  108. .num_resources = ARRAY_SIZE(pinmux_resource),
  109. };
  110. static struct resource i2c_resource1[] = {
  111. [0] = {
  112. .start = INT_I2C,
  113. .end = INT_I2C,
  114. .flags = IORESOURCE_IRQ,
  115. },
  116. [1] = {
  117. .start = TEGRA_I2C_BASE,
  118. .end = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
  119. .flags = IORESOURCE_MEM,
  120. },
  121. };
  122. static struct resource i2c_resource2[] = {
  123. [0] = {
  124. .start = INT_I2C2,
  125. .end = INT_I2C2,
  126. .flags = IORESOURCE_IRQ,
  127. },
  128. [1] = {
  129. .start = TEGRA_I2C2_BASE,
  130. .end = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
  131. .flags = IORESOURCE_MEM,
  132. },
  133. };
  134. static struct resource i2c_resource3[] = {
  135. [0] = {
  136. .start = INT_I2C3,
  137. .end = INT_I2C3,
  138. .flags = IORESOURCE_IRQ,
  139. },
  140. [1] = {
  141. .start = TEGRA_I2C3_BASE,
  142. .end = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
  143. .flags = IORESOURCE_MEM,
  144. },
  145. };
  146. static struct resource i2c_resource4[] = {
  147. [0] = {
  148. .start = INT_DVC,
  149. .end = INT_DVC,
  150. .flags = IORESOURCE_IRQ,
  151. },
  152. [1] = {
  153. .start = TEGRA_DVC_BASE,
  154. .end = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
  155. .flags = IORESOURCE_MEM,
  156. },
  157. };
  158. static struct tegra_i2c_platform_data tegra_i2c1_platform_data = {
  159. .bus_clk_rate = 400000,
  160. };
  161. static struct tegra_i2c_platform_data tegra_i2c2_platform_data = {
  162. .bus_clk_rate = 400000,
  163. };
  164. static struct tegra_i2c_platform_data tegra_i2c3_platform_data = {
  165. .bus_clk_rate = 400000,
  166. };
  167. static struct tegra_i2c_platform_data tegra_dvc_platform_data = {
  168. .bus_clk_rate = 400000,
  169. };
  170. struct platform_device tegra_i2c_device1 = {
  171. .name = "tegra-i2c",
  172. .id = 0,
  173. .resource = i2c_resource1,
  174. .num_resources = ARRAY_SIZE(i2c_resource1),
  175. .dev = {
  176. .platform_data = &tegra_i2c1_platform_data,
  177. },
  178. };
  179. struct platform_device tegra_i2c_device2 = {
  180. .name = "tegra-i2c",
  181. .id = 1,
  182. .resource = i2c_resource2,
  183. .num_resources = ARRAY_SIZE(i2c_resource2),
  184. .dev = {
  185. .platform_data = &tegra_i2c2_platform_data,
  186. },
  187. };
  188. struct platform_device tegra_i2c_device3 = {
  189. .name = "tegra-i2c",
  190. .id = 2,
  191. .resource = i2c_resource3,
  192. .num_resources = ARRAY_SIZE(i2c_resource3),
  193. .dev = {
  194. .platform_data = &tegra_i2c3_platform_data,
  195. },
  196. };
  197. struct platform_device tegra_i2c_device4 = {
  198. .name = "tegra-i2c",
  199. .id = 3,
  200. .resource = i2c_resource4,
  201. .num_resources = ARRAY_SIZE(i2c_resource4),
  202. .dev = {
  203. .platform_data = &tegra_dvc_platform_data,
  204. },
  205. };
  206. static struct resource spi_resource1[] = {
  207. [0] = {
  208. .start = INT_S_LINK1,
  209. .end = INT_S_LINK1,
  210. .flags = IORESOURCE_IRQ,
  211. },
  212. [1] = {
  213. .start = TEGRA_SPI1_BASE,
  214. .end = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
  215. .flags = IORESOURCE_MEM,
  216. },
  217. };
  218. static struct resource spi_resource2[] = {
  219. [0] = {
  220. .start = INT_SPI_2,
  221. .end = INT_SPI_2,
  222. .flags = IORESOURCE_IRQ,
  223. },
  224. [1] = {
  225. .start = TEGRA_SPI2_BASE,
  226. .end = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
  227. .flags = IORESOURCE_MEM,
  228. },
  229. };
  230. static struct resource spi_resource3[] = {
  231. [0] = {
  232. .start = INT_SPI_3,
  233. .end = INT_SPI_3,
  234. .flags = IORESOURCE_IRQ,
  235. },
  236. [1] = {
  237. .start = TEGRA_SPI3_BASE,
  238. .end = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
  239. .flags = IORESOURCE_MEM,
  240. },
  241. };
  242. static struct resource spi_resource4[] = {
  243. [0] = {
  244. .start = INT_SPI_4,
  245. .end = INT_SPI_4,
  246. .flags = IORESOURCE_IRQ,
  247. },
  248. [1] = {
  249. .start = TEGRA_SPI4_BASE,
  250. .end = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
  251. .flags = IORESOURCE_MEM,
  252. },
  253. };
  254. struct platform_device tegra_spi_device1 = {
  255. .name = "spi_tegra",
  256. .id = 0,
  257. .resource = spi_resource1,
  258. .num_resources = ARRAY_SIZE(spi_resource1),
  259. .dev = {
  260. .coherent_dma_mask = 0xffffffff,
  261. },
  262. };
  263. struct platform_device tegra_spi_device2 = {
  264. .name = "spi_tegra",
  265. .id = 1,
  266. .resource = spi_resource2,
  267. .num_resources = ARRAY_SIZE(spi_resource2),
  268. .dev = {
  269. .coherent_dma_mask = 0xffffffff,
  270. },
  271. };
  272. struct platform_device tegra_spi_device3 = {
  273. .name = "spi_tegra",
  274. .id = 2,
  275. .resource = spi_resource3,
  276. .num_resources = ARRAY_SIZE(spi_resource3),
  277. .dev = {
  278. .coherent_dma_mask = 0xffffffff,
  279. },
  280. };
  281. struct platform_device tegra_spi_device4 = {
  282. .name = "spi_tegra",
  283. .id = 3,
  284. .resource = spi_resource4,
  285. .num_resources = ARRAY_SIZE(spi_resource4),
  286. .dev = {
  287. .coherent_dma_mask = 0xffffffff,
  288. },
  289. };
  290. static struct resource sdhci_resource1[] = {
  291. [0] = {
  292. .start = INT_SDMMC1,
  293. .end = INT_SDMMC1,
  294. .flags = IORESOURCE_IRQ,
  295. },
  296. [1] = {
  297. .start = TEGRA_SDMMC1_BASE,
  298. .end = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
  299. .flags = IORESOURCE_MEM,
  300. },
  301. };
  302. static struct resource sdhci_resource2[] = {
  303. [0] = {
  304. .start = INT_SDMMC2,
  305. .end = INT_SDMMC2,
  306. .flags = IORESOURCE_IRQ,
  307. },
  308. [1] = {
  309. .start = TEGRA_SDMMC2_BASE,
  310. .end = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
  311. .flags = IORESOURCE_MEM,
  312. },
  313. };
  314. static struct resource sdhci_resource3[] = {
  315. [0] = {
  316. .start = INT_SDMMC3,
  317. .end = INT_SDMMC3,
  318. .flags = IORESOURCE_IRQ,
  319. },
  320. [1] = {
  321. .start = TEGRA_SDMMC3_BASE,
  322. .end = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
  323. .flags = IORESOURCE_MEM,
  324. },
  325. };
  326. static struct resource sdhci_resource4[] = {
  327. [0] = {
  328. .start = INT_SDMMC4,
  329. .end = INT_SDMMC4,
  330. .flags = IORESOURCE_IRQ,
  331. },
  332. [1] = {
  333. .start = TEGRA_SDMMC4_BASE,
  334. .end = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
  335. .flags = IORESOURCE_MEM,
  336. },
  337. };
  338. /* board files should fill in platform_data register the devices themselvs.
  339. * See board-harmony.c for an example
  340. */
  341. struct platform_device tegra_sdhci_device1 = {
  342. .name = "sdhci-tegra",
  343. .id = 0,
  344. .resource = sdhci_resource1,
  345. .num_resources = ARRAY_SIZE(sdhci_resource1),
  346. };
  347. struct platform_device tegra_sdhci_device2 = {
  348. .name = "sdhci-tegra",
  349. .id = 1,
  350. .resource = sdhci_resource2,
  351. .num_resources = ARRAY_SIZE(sdhci_resource2),
  352. };
  353. struct platform_device tegra_sdhci_device3 = {
  354. .name = "sdhci-tegra",
  355. .id = 2,
  356. .resource = sdhci_resource3,
  357. .num_resources = ARRAY_SIZE(sdhci_resource3),
  358. };
  359. struct platform_device tegra_sdhci_device4 = {
  360. .name = "sdhci-tegra",
  361. .id = 3,
  362. .resource = sdhci_resource4,
  363. .num_resources = ARRAY_SIZE(sdhci_resource4),
  364. };
  365. static struct resource tegra_usb1_resources[] = {
  366. [0] = {
  367. .start = TEGRA_USB_BASE,
  368. .end = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
  369. .flags = IORESOURCE_MEM,
  370. },
  371. [1] = {
  372. .start = INT_USB,
  373. .end = INT_USB,
  374. .flags = IORESOURCE_IRQ,
  375. },
  376. };
  377. static struct resource tegra_usb2_resources[] = {
  378. [0] = {
  379. .start = TEGRA_USB2_BASE,
  380. .end = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
  381. .flags = IORESOURCE_MEM,
  382. },
  383. [1] = {
  384. .start = INT_USB2,
  385. .end = INT_USB2,
  386. .flags = IORESOURCE_IRQ,
  387. },
  388. };
  389. static struct resource tegra_usb3_resources[] = {
  390. [0] = {
  391. .start = TEGRA_USB3_BASE,
  392. .end = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
  393. .flags = IORESOURCE_MEM,
  394. },
  395. [1] = {
  396. .start = INT_USB3,
  397. .end = INT_USB3,
  398. .flags = IORESOURCE_IRQ,
  399. },
  400. };
  401. struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
  402. .reset_gpio = -1,
  403. .clk = "cdev2",
  404. };
  405. struct tegra_ehci_platform_data tegra_ehci1_pdata = {
  406. .operating_mode = TEGRA_USB_OTG,
  407. .power_down_on_bus_suspend = 1,
  408. .vbus_gpio = -1,
  409. };
  410. struct tegra_ehci_platform_data tegra_ehci2_pdata = {
  411. .phy_config = &tegra_ehci2_ulpi_phy_config,
  412. .operating_mode = TEGRA_USB_HOST,
  413. .power_down_on_bus_suspend = 1,
  414. .vbus_gpio = -1,
  415. };
  416. struct tegra_ehci_platform_data tegra_ehci3_pdata = {
  417. .operating_mode = TEGRA_USB_HOST,
  418. .power_down_on_bus_suspend = 1,
  419. .vbus_gpio = -1,
  420. };
  421. static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
  422. struct platform_device tegra_ehci1_device = {
  423. .name = "tegra-ehci",
  424. .id = 0,
  425. .dev = {
  426. .dma_mask = &tegra_ehci_dmamask,
  427. .coherent_dma_mask = DMA_BIT_MASK(32),
  428. .platform_data = &tegra_ehci1_pdata,
  429. },
  430. .resource = tegra_usb1_resources,
  431. .num_resources = ARRAY_SIZE(tegra_usb1_resources),
  432. };
  433. struct platform_device tegra_ehci2_device = {
  434. .name = "tegra-ehci",
  435. .id = 1,
  436. .dev = {
  437. .dma_mask = &tegra_ehci_dmamask,
  438. .coherent_dma_mask = DMA_BIT_MASK(32),
  439. .platform_data = &tegra_ehci2_pdata,
  440. },
  441. .resource = tegra_usb2_resources,
  442. .num_resources = ARRAY_SIZE(tegra_usb2_resources),
  443. };
  444. struct platform_device tegra_ehci3_device = {
  445. .name = "tegra-ehci",
  446. .id = 2,
  447. .dev = {
  448. .dma_mask = &tegra_ehci_dmamask,
  449. .coherent_dma_mask = DMA_BIT_MASK(32),
  450. .platform_data = &tegra_ehci3_pdata,
  451. },
  452. .resource = tegra_usb3_resources,
  453. .num_resources = ARRAY_SIZE(tegra_usb3_resources),
  454. };
  455. static struct resource tegra_pmu_resources[] = {
  456. [0] = {
  457. .start = INT_CPU0_PMU_INTR,
  458. .end = INT_CPU0_PMU_INTR,
  459. .flags = IORESOURCE_IRQ,
  460. },
  461. [1] = {
  462. .start = INT_CPU1_PMU_INTR,
  463. .end = INT_CPU1_PMU_INTR,
  464. .flags = IORESOURCE_IRQ,
  465. },
  466. };
  467. struct platform_device tegra_pmu_device = {
  468. .name = "arm-pmu",
  469. .id = -1,
  470. .num_resources = ARRAY_SIZE(tegra_pmu_resources),
  471. .resource = tegra_pmu_resources,
  472. };
  473. static struct resource tegra_uarta_resources[] = {
  474. [0] = {
  475. .start = TEGRA_UARTA_BASE,
  476. .end = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
  477. .flags = IORESOURCE_MEM,
  478. },
  479. [1] = {
  480. .start = INT_UARTA,
  481. .end = INT_UARTA,
  482. .flags = IORESOURCE_IRQ,
  483. },
  484. };
  485. static struct resource tegra_uartb_resources[] = {
  486. [0] = {
  487. .start = TEGRA_UARTB_BASE,
  488. .end = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
  489. .flags = IORESOURCE_MEM,
  490. },
  491. [1] = {
  492. .start = INT_UARTB,
  493. .end = INT_UARTB,
  494. .flags = IORESOURCE_IRQ,
  495. },
  496. };
  497. static struct resource tegra_uartc_resources[] = {
  498. [0] = {
  499. .start = TEGRA_UARTC_BASE,
  500. .end = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
  501. .flags = IORESOURCE_MEM,
  502. },
  503. [1] = {
  504. .start = INT_UARTC,
  505. .end = INT_UARTC,
  506. .flags = IORESOURCE_IRQ,
  507. },
  508. };
  509. static struct resource tegra_uartd_resources[] = {
  510. [0] = {
  511. .start = TEGRA_UARTD_BASE,
  512. .end = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
  513. .flags = IORESOURCE_MEM,
  514. },
  515. [1] = {
  516. .start = INT_UARTD,
  517. .end = INT_UARTD,
  518. .flags = IORESOURCE_IRQ,
  519. },
  520. };
  521. static struct resource tegra_uarte_resources[] = {
  522. [0] = {
  523. .start = TEGRA_UARTE_BASE,
  524. .end = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
  525. .flags = IORESOURCE_MEM,
  526. },
  527. [1] = {
  528. .start = INT_UARTE,
  529. .end = INT_UARTE,
  530. .flags = IORESOURCE_IRQ,
  531. },
  532. };
  533. struct platform_device tegra_uarta_device = {
  534. .name = "tegra_uart",
  535. .id = 0,
  536. .num_resources = ARRAY_SIZE(tegra_uarta_resources),
  537. .resource = tegra_uarta_resources,
  538. .dev = {
  539. .coherent_dma_mask = DMA_BIT_MASK(32),
  540. },
  541. };
  542. struct platform_device tegra_uartb_device = {
  543. .name = "tegra_uart",
  544. .id = 1,
  545. .num_resources = ARRAY_SIZE(tegra_uartb_resources),
  546. .resource = tegra_uartb_resources,
  547. .dev = {
  548. .coherent_dma_mask = DMA_BIT_MASK(32),
  549. },
  550. };
  551. struct platform_device tegra_uartc_device = {
  552. .name = "tegra_uart",
  553. .id = 2,
  554. .num_resources = ARRAY_SIZE(tegra_uartc_resources),
  555. .resource = tegra_uartc_resources,
  556. .dev = {
  557. .coherent_dma_mask = DMA_BIT_MASK(32),
  558. },
  559. };
  560. struct platform_device tegra_uartd_device = {
  561. .name = "tegra_uart",
  562. .id = 3,
  563. .num_resources = ARRAY_SIZE(tegra_uartd_resources),
  564. .resource = tegra_uartd_resources,
  565. .dev = {
  566. .coherent_dma_mask = DMA_BIT_MASK(32),
  567. },
  568. };
  569. struct platform_device tegra_uarte_device = {
  570. .name = "tegra_uart",
  571. .id = 4,
  572. .num_resources = ARRAY_SIZE(tegra_uarte_resources),
  573. .resource = tegra_uarte_resources,
  574. .dev = {
  575. .coherent_dma_mask = DMA_BIT_MASK(32),
  576. },
  577. };
  578. static struct resource i2s_resource1[] = {
  579. [0] = {
  580. .start = INT_I2S1,
  581. .end = INT_I2S1,
  582. .flags = IORESOURCE_IRQ
  583. },
  584. [1] = {
  585. .start = TEGRA_DMA_REQ_SEL_I2S_1,
  586. .end = TEGRA_DMA_REQ_SEL_I2S_1,
  587. .flags = IORESOURCE_DMA
  588. },
  589. [2] = {
  590. .start = TEGRA_I2S1_BASE,
  591. .end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
  592. .flags = IORESOURCE_MEM
  593. }
  594. };
  595. static struct resource i2s_resource2[] = {
  596. [0] = {
  597. .start = INT_I2S2,
  598. .end = INT_I2S2,
  599. .flags = IORESOURCE_IRQ
  600. },
  601. [1] = {
  602. .start = TEGRA_DMA_REQ_SEL_I2S2_1,
  603. .end = TEGRA_DMA_REQ_SEL_I2S2_1,
  604. .flags = IORESOURCE_DMA
  605. },
  606. [2] = {
  607. .start = TEGRA_I2S2_BASE,
  608. .end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
  609. .flags = IORESOURCE_MEM
  610. }
  611. };
  612. struct platform_device tegra_i2s_device1 = {
  613. .name = "tegra20-i2s",
  614. .id = 0,
  615. .resource = i2s_resource1,
  616. .num_resources = ARRAY_SIZE(i2s_resource1),
  617. };
  618. struct platform_device tegra_i2s_device2 = {
  619. .name = "tegra20-i2s",
  620. .id = 1,
  621. .resource = i2s_resource2,
  622. .num_resources = ARRAY_SIZE(i2s_resource2),
  623. };
  624. static struct resource tegra_das_resources[] = {
  625. [0] = {
  626. .start = TEGRA_APB_MISC_DAS_BASE,
  627. .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
  628. .flags = IORESOURCE_MEM,
  629. },
  630. };
  631. struct platform_device tegra_das_device = {
  632. .name = "tegra20-das",
  633. .id = -1,
  634. .num_resources = ARRAY_SIZE(tegra_das_resources),
  635. .resource = tegra_das_resources,
  636. };