mmu.c 40 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703
  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "kvm.h"
  21. #include "x86.h"
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <asm/page.h>
  28. #include <asm/cmpxchg.h>
  29. #undef MMU_DEBUG
  30. #undef AUDIT
  31. #ifdef AUDIT
  32. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  33. #else
  34. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  35. #endif
  36. #ifdef MMU_DEBUG
  37. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  38. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  39. #else
  40. #define pgprintk(x...) do { } while (0)
  41. #define rmap_printk(x...) do { } while (0)
  42. #endif
  43. #if defined(MMU_DEBUG) || defined(AUDIT)
  44. static int dbg = 1;
  45. #endif
  46. #ifndef MMU_DEBUG
  47. #define ASSERT(x) do { } while (0)
  48. #else
  49. #define ASSERT(x) \
  50. if (!(x)) { \
  51. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  52. __FILE__, __LINE__, #x); \
  53. }
  54. #endif
  55. #define PT64_PT_BITS 9
  56. #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  57. #define PT32_PT_BITS 10
  58. #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  59. #define PT_WRITABLE_SHIFT 1
  60. #define PT_PRESENT_MASK (1ULL << 0)
  61. #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  62. #define PT_USER_MASK (1ULL << 2)
  63. #define PT_PWT_MASK (1ULL << 3)
  64. #define PT_PCD_MASK (1ULL << 4)
  65. #define PT_ACCESSED_MASK (1ULL << 5)
  66. #define PT_DIRTY_MASK (1ULL << 6)
  67. #define PT_PAGE_SIZE_MASK (1ULL << 7)
  68. #define PT_PAT_MASK (1ULL << 7)
  69. #define PT_GLOBAL_MASK (1ULL << 8)
  70. #define PT64_NX_MASK (1ULL << 63)
  71. #define PT_PAT_SHIFT 7
  72. #define PT_DIR_PAT_SHIFT 12
  73. #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  74. #define PT32_DIR_PSE36_SIZE 4
  75. #define PT32_DIR_PSE36_SHIFT 13
  76. #define PT32_DIR_PSE36_MASK \
  77. (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  78. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  79. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  80. #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  81. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  82. #define PT64_LEVEL_BITS 9
  83. #define PT64_LEVEL_SHIFT(level) \
  84. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  85. #define PT64_LEVEL_MASK(level) \
  86. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  87. #define PT64_INDEX(address, level)\
  88. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  89. #define PT32_LEVEL_BITS 10
  90. #define PT32_LEVEL_SHIFT(level) \
  91. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  92. #define PT32_LEVEL_MASK(level) \
  93. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  94. #define PT32_INDEX(address, level)\
  95. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  96. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  97. #define PT64_DIR_BASE_ADDR_MASK \
  98. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  99. #define PT32_BASE_ADDR_MASK PAGE_MASK
  100. #define PT32_DIR_BASE_ADDR_MASK \
  101. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  102. #define PFERR_PRESENT_MASK (1U << 0)
  103. #define PFERR_WRITE_MASK (1U << 1)
  104. #define PFERR_USER_MASK (1U << 2)
  105. #define PFERR_FETCH_MASK (1U << 4)
  106. #define PT64_ROOT_LEVEL 4
  107. #define PT32_ROOT_LEVEL 2
  108. #define PT32E_ROOT_LEVEL 3
  109. #define PT_DIRECTORY_LEVEL 2
  110. #define PT_PAGE_TABLE_LEVEL 1
  111. #define RMAP_EXT 4
  112. struct kvm_rmap_desc {
  113. u64 *shadow_ptes[RMAP_EXT];
  114. struct kvm_rmap_desc *more;
  115. };
  116. static struct kmem_cache *pte_chain_cache;
  117. static struct kmem_cache *rmap_desc_cache;
  118. static struct kmem_cache *mmu_page_header_cache;
  119. static u64 __read_mostly shadow_trap_nonpresent_pte;
  120. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  121. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  122. {
  123. shadow_trap_nonpresent_pte = trap_pte;
  124. shadow_notrap_nonpresent_pte = notrap_pte;
  125. }
  126. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  127. static int is_write_protection(struct kvm_vcpu *vcpu)
  128. {
  129. return vcpu->cr0 & X86_CR0_WP;
  130. }
  131. static int is_cpuid_PSE36(void)
  132. {
  133. return 1;
  134. }
  135. static int is_nx(struct kvm_vcpu *vcpu)
  136. {
  137. return vcpu->shadow_efer & EFER_NX;
  138. }
  139. static int is_present_pte(unsigned long pte)
  140. {
  141. return pte & PT_PRESENT_MASK;
  142. }
  143. static int is_shadow_present_pte(u64 pte)
  144. {
  145. pte &= ~PT_SHADOW_IO_MARK;
  146. return pte != shadow_trap_nonpresent_pte
  147. && pte != shadow_notrap_nonpresent_pte;
  148. }
  149. static int is_writeble_pte(unsigned long pte)
  150. {
  151. return pte & PT_WRITABLE_MASK;
  152. }
  153. static int is_dirty_pte(unsigned long pte)
  154. {
  155. return pte & PT_DIRTY_MASK;
  156. }
  157. static int is_io_pte(unsigned long pte)
  158. {
  159. return pte & PT_SHADOW_IO_MARK;
  160. }
  161. static int is_rmap_pte(u64 pte)
  162. {
  163. return pte != shadow_trap_nonpresent_pte
  164. && pte != shadow_notrap_nonpresent_pte;
  165. }
  166. static void set_shadow_pte(u64 *sptep, u64 spte)
  167. {
  168. #ifdef CONFIG_X86_64
  169. set_64bit((unsigned long *)sptep, spte);
  170. #else
  171. set_64bit((unsigned long long *)sptep, spte);
  172. #endif
  173. }
  174. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  175. struct kmem_cache *base_cache, int min)
  176. {
  177. void *obj;
  178. if (cache->nobjs >= min)
  179. return 0;
  180. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  181. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  182. if (!obj)
  183. return -ENOMEM;
  184. cache->objects[cache->nobjs++] = obj;
  185. }
  186. return 0;
  187. }
  188. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  189. {
  190. while (mc->nobjs)
  191. kfree(mc->objects[--mc->nobjs]);
  192. }
  193. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  194. int min)
  195. {
  196. struct page *page;
  197. if (cache->nobjs >= min)
  198. return 0;
  199. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  200. page = alloc_page(GFP_KERNEL);
  201. if (!page)
  202. return -ENOMEM;
  203. set_page_private(page, 0);
  204. cache->objects[cache->nobjs++] = page_address(page);
  205. }
  206. return 0;
  207. }
  208. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  209. {
  210. while (mc->nobjs)
  211. free_page((unsigned long)mc->objects[--mc->nobjs]);
  212. }
  213. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  214. {
  215. int r;
  216. kvm_mmu_free_some_pages(vcpu);
  217. r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
  218. pte_chain_cache, 4);
  219. if (r)
  220. goto out;
  221. r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
  222. rmap_desc_cache, 1);
  223. if (r)
  224. goto out;
  225. r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8);
  226. if (r)
  227. goto out;
  228. r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
  229. mmu_page_header_cache, 4);
  230. out:
  231. return r;
  232. }
  233. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  234. {
  235. mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
  236. mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
  237. mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
  238. mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
  239. }
  240. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  241. size_t size)
  242. {
  243. void *p;
  244. BUG_ON(!mc->nobjs);
  245. p = mc->objects[--mc->nobjs];
  246. memset(p, 0, size);
  247. return p;
  248. }
  249. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  250. {
  251. return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
  252. sizeof(struct kvm_pte_chain));
  253. }
  254. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  255. {
  256. kfree(pc);
  257. }
  258. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  259. {
  260. return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
  261. sizeof(struct kvm_rmap_desc));
  262. }
  263. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  264. {
  265. kfree(rd);
  266. }
  267. /*
  268. * Take gfn and return the reverse mapping to it.
  269. * Note: gfn must be unaliased before this function get called
  270. */
  271. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
  272. {
  273. struct kvm_memory_slot *slot;
  274. slot = gfn_to_memslot(kvm, gfn);
  275. return &slot->rmap[gfn - slot->base_gfn];
  276. }
  277. /*
  278. * Reverse mapping data structures:
  279. *
  280. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  281. * that points to page_address(page).
  282. *
  283. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  284. * containing more mappings.
  285. */
  286. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
  287. {
  288. struct kvm_mmu_page *page;
  289. struct kvm_rmap_desc *desc;
  290. unsigned long *rmapp;
  291. int i;
  292. if (!is_rmap_pte(*spte))
  293. return;
  294. gfn = unalias_gfn(vcpu->kvm, gfn);
  295. page = page_header(__pa(spte));
  296. page->gfns[spte - page->spt] = gfn;
  297. rmapp = gfn_to_rmap(vcpu->kvm, gfn);
  298. if (!*rmapp) {
  299. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  300. *rmapp = (unsigned long)spte;
  301. } else if (!(*rmapp & 1)) {
  302. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  303. desc = mmu_alloc_rmap_desc(vcpu);
  304. desc->shadow_ptes[0] = (u64 *)*rmapp;
  305. desc->shadow_ptes[1] = spte;
  306. *rmapp = (unsigned long)desc | 1;
  307. } else {
  308. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  309. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  310. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  311. desc = desc->more;
  312. if (desc->shadow_ptes[RMAP_EXT-1]) {
  313. desc->more = mmu_alloc_rmap_desc(vcpu);
  314. desc = desc->more;
  315. }
  316. for (i = 0; desc->shadow_ptes[i]; ++i)
  317. ;
  318. desc->shadow_ptes[i] = spte;
  319. }
  320. }
  321. static void rmap_desc_remove_entry(unsigned long *rmapp,
  322. struct kvm_rmap_desc *desc,
  323. int i,
  324. struct kvm_rmap_desc *prev_desc)
  325. {
  326. int j;
  327. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  328. ;
  329. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  330. desc->shadow_ptes[j] = NULL;
  331. if (j != 0)
  332. return;
  333. if (!prev_desc && !desc->more)
  334. *rmapp = (unsigned long)desc->shadow_ptes[0];
  335. else
  336. if (prev_desc)
  337. prev_desc->more = desc->more;
  338. else
  339. *rmapp = (unsigned long)desc->more | 1;
  340. mmu_free_rmap_desc(desc);
  341. }
  342. static void rmap_remove(struct kvm *kvm, u64 *spte)
  343. {
  344. struct kvm_rmap_desc *desc;
  345. struct kvm_rmap_desc *prev_desc;
  346. struct kvm_mmu_page *page;
  347. unsigned long *rmapp;
  348. int i;
  349. if (!is_rmap_pte(*spte))
  350. return;
  351. page = page_header(__pa(spte));
  352. kvm_release_page(pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >>
  353. PAGE_SHIFT));
  354. rmapp = gfn_to_rmap(kvm, page->gfns[spte - page->spt]);
  355. if (!*rmapp) {
  356. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  357. BUG();
  358. } else if (!(*rmapp & 1)) {
  359. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  360. if ((u64 *)*rmapp != spte) {
  361. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  362. spte, *spte);
  363. BUG();
  364. }
  365. *rmapp = 0;
  366. } else {
  367. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  368. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  369. prev_desc = NULL;
  370. while (desc) {
  371. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  372. if (desc->shadow_ptes[i] == spte) {
  373. rmap_desc_remove_entry(rmapp,
  374. desc, i,
  375. prev_desc);
  376. return;
  377. }
  378. prev_desc = desc;
  379. desc = desc->more;
  380. }
  381. BUG();
  382. }
  383. }
  384. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  385. {
  386. struct kvm_rmap_desc *desc;
  387. struct kvm_rmap_desc *prev_desc;
  388. u64 *prev_spte;
  389. int i;
  390. if (!*rmapp)
  391. return NULL;
  392. else if (!(*rmapp & 1)) {
  393. if (!spte)
  394. return (u64 *)*rmapp;
  395. return NULL;
  396. }
  397. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  398. prev_desc = NULL;
  399. prev_spte = NULL;
  400. while (desc) {
  401. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  402. if (prev_spte == spte)
  403. return desc->shadow_ptes[i];
  404. prev_spte = desc->shadow_ptes[i];
  405. }
  406. desc = desc->more;
  407. }
  408. return NULL;
  409. }
  410. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  411. {
  412. unsigned long *rmapp;
  413. u64 *spte;
  414. gfn = unalias_gfn(kvm, gfn);
  415. rmapp = gfn_to_rmap(kvm, gfn);
  416. spte = rmap_next(kvm, rmapp, NULL);
  417. while (spte) {
  418. BUG_ON(!spte);
  419. BUG_ON(!(*spte & PT_PRESENT_MASK));
  420. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  421. if (is_writeble_pte(*spte))
  422. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  423. kvm_flush_remote_tlbs(kvm);
  424. spte = rmap_next(kvm, rmapp, spte);
  425. }
  426. }
  427. #ifdef MMU_DEBUG
  428. static int is_empty_shadow_page(u64 *spt)
  429. {
  430. u64 *pos;
  431. u64 *end;
  432. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  433. if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
  434. printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
  435. pos, *pos);
  436. return 0;
  437. }
  438. return 1;
  439. }
  440. #endif
  441. static void kvm_mmu_free_page(struct kvm *kvm,
  442. struct kvm_mmu_page *page_head)
  443. {
  444. ASSERT(is_empty_shadow_page(page_head->spt));
  445. list_del(&page_head->link);
  446. __free_page(virt_to_page(page_head->spt));
  447. __free_page(virt_to_page(page_head->gfns));
  448. kfree(page_head);
  449. ++kvm->n_free_mmu_pages;
  450. }
  451. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  452. {
  453. return gfn;
  454. }
  455. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  456. u64 *parent_pte)
  457. {
  458. struct kvm_mmu_page *page;
  459. if (!vcpu->kvm->n_free_mmu_pages)
  460. return NULL;
  461. page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
  462. sizeof *page);
  463. page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  464. page->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  465. set_page_private(virt_to_page(page->spt), (unsigned long)page);
  466. list_add(&page->link, &vcpu->kvm->active_mmu_pages);
  467. ASSERT(is_empty_shadow_page(page->spt));
  468. page->slot_bitmap = 0;
  469. page->multimapped = 0;
  470. page->parent_pte = parent_pte;
  471. --vcpu->kvm->n_free_mmu_pages;
  472. return page;
  473. }
  474. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  475. struct kvm_mmu_page *page, u64 *parent_pte)
  476. {
  477. struct kvm_pte_chain *pte_chain;
  478. struct hlist_node *node;
  479. int i;
  480. if (!parent_pte)
  481. return;
  482. if (!page->multimapped) {
  483. u64 *old = page->parent_pte;
  484. if (!old) {
  485. page->parent_pte = parent_pte;
  486. return;
  487. }
  488. page->multimapped = 1;
  489. pte_chain = mmu_alloc_pte_chain(vcpu);
  490. INIT_HLIST_HEAD(&page->parent_ptes);
  491. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  492. pte_chain->parent_ptes[0] = old;
  493. }
  494. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
  495. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  496. continue;
  497. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  498. if (!pte_chain->parent_ptes[i]) {
  499. pte_chain->parent_ptes[i] = parent_pte;
  500. return;
  501. }
  502. }
  503. pte_chain = mmu_alloc_pte_chain(vcpu);
  504. BUG_ON(!pte_chain);
  505. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  506. pte_chain->parent_ptes[0] = parent_pte;
  507. }
  508. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
  509. u64 *parent_pte)
  510. {
  511. struct kvm_pte_chain *pte_chain;
  512. struct hlist_node *node;
  513. int i;
  514. if (!page->multimapped) {
  515. BUG_ON(page->parent_pte != parent_pte);
  516. page->parent_pte = NULL;
  517. return;
  518. }
  519. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
  520. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  521. if (!pte_chain->parent_ptes[i])
  522. break;
  523. if (pte_chain->parent_ptes[i] != parent_pte)
  524. continue;
  525. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  526. && pte_chain->parent_ptes[i + 1]) {
  527. pte_chain->parent_ptes[i]
  528. = pte_chain->parent_ptes[i + 1];
  529. ++i;
  530. }
  531. pte_chain->parent_ptes[i] = NULL;
  532. if (i == 0) {
  533. hlist_del(&pte_chain->link);
  534. mmu_free_pte_chain(pte_chain);
  535. if (hlist_empty(&page->parent_ptes)) {
  536. page->multimapped = 0;
  537. page->parent_pte = NULL;
  538. }
  539. }
  540. return;
  541. }
  542. BUG();
  543. }
  544. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm,
  545. gfn_t gfn)
  546. {
  547. unsigned index;
  548. struct hlist_head *bucket;
  549. struct kvm_mmu_page *page;
  550. struct hlist_node *node;
  551. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  552. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  553. bucket = &kvm->mmu_page_hash[index];
  554. hlist_for_each_entry(page, node, bucket, hash_link)
  555. if (page->gfn == gfn && !page->role.metaphysical) {
  556. pgprintk("%s: found role %x\n",
  557. __FUNCTION__, page->role.word);
  558. return page;
  559. }
  560. return NULL;
  561. }
  562. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  563. gfn_t gfn,
  564. gva_t gaddr,
  565. unsigned level,
  566. int metaphysical,
  567. unsigned hugepage_access,
  568. u64 *parent_pte)
  569. {
  570. union kvm_mmu_page_role role;
  571. unsigned index;
  572. unsigned quadrant;
  573. struct hlist_head *bucket;
  574. struct kvm_mmu_page *page;
  575. struct hlist_node *node;
  576. role.word = 0;
  577. role.glevels = vcpu->mmu.root_level;
  578. role.level = level;
  579. role.metaphysical = metaphysical;
  580. role.hugepage_access = hugepage_access;
  581. if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
  582. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  583. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  584. role.quadrant = quadrant;
  585. }
  586. pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
  587. gfn, role.word);
  588. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  589. bucket = &vcpu->kvm->mmu_page_hash[index];
  590. hlist_for_each_entry(page, node, bucket, hash_link)
  591. if (page->gfn == gfn && page->role.word == role.word) {
  592. mmu_page_add_parent_pte(vcpu, page, parent_pte);
  593. pgprintk("%s: found\n", __FUNCTION__);
  594. return page;
  595. }
  596. page = kvm_mmu_alloc_page(vcpu, parent_pte);
  597. if (!page)
  598. return page;
  599. pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
  600. page->gfn = gfn;
  601. page->role = role;
  602. hlist_add_head(&page->hash_link, bucket);
  603. vcpu->mmu.prefetch_page(vcpu, page);
  604. if (!metaphysical)
  605. rmap_write_protect(vcpu->kvm, gfn);
  606. return page;
  607. }
  608. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  609. struct kvm_mmu_page *page)
  610. {
  611. unsigned i;
  612. u64 *pt;
  613. u64 ent;
  614. pt = page->spt;
  615. if (page->role.level == PT_PAGE_TABLE_LEVEL) {
  616. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  617. if (is_shadow_present_pte(pt[i]))
  618. rmap_remove(kvm, &pt[i]);
  619. pt[i] = shadow_trap_nonpresent_pte;
  620. }
  621. kvm_flush_remote_tlbs(kvm);
  622. return;
  623. }
  624. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  625. ent = pt[i];
  626. pt[i] = shadow_trap_nonpresent_pte;
  627. if (!is_shadow_present_pte(ent))
  628. continue;
  629. ent &= PT64_BASE_ADDR_MASK;
  630. mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
  631. }
  632. kvm_flush_remote_tlbs(kvm);
  633. }
  634. static void kvm_mmu_put_page(struct kvm_mmu_page *page,
  635. u64 *parent_pte)
  636. {
  637. mmu_page_remove_parent_pte(page, parent_pte);
  638. }
  639. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  640. {
  641. int i;
  642. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  643. if (kvm->vcpus[i])
  644. kvm->vcpus[i]->last_pte_updated = NULL;
  645. }
  646. static void kvm_mmu_zap_page(struct kvm *kvm,
  647. struct kvm_mmu_page *page)
  648. {
  649. u64 *parent_pte;
  650. ++kvm->stat.mmu_shadow_zapped;
  651. while (page->multimapped || page->parent_pte) {
  652. if (!page->multimapped)
  653. parent_pte = page->parent_pte;
  654. else {
  655. struct kvm_pte_chain *chain;
  656. chain = container_of(page->parent_ptes.first,
  657. struct kvm_pte_chain, link);
  658. parent_pte = chain->parent_ptes[0];
  659. }
  660. BUG_ON(!parent_pte);
  661. kvm_mmu_put_page(page, parent_pte);
  662. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  663. }
  664. kvm_mmu_page_unlink_children(kvm, page);
  665. if (!page->root_count) {
  666. hlist_del(&page->hash_link);
  667. kvm_mmu_free_page(kvm, page);
  668. } else
  669. list_move(&page->link, &kvm->active_mmu_pages);
  670. kvm_mmu_reset_last_pte_updated(kvm);
  671. }
  672. /*
  673. * Changing the number of mmu pages allocated to the vm
  674. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  675. */
  676. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  677. {
  678. /*
  679. * If we set the number of mmu pages to be smaller be than the
  680. * number of actived pages , we must to free some mmu pages before we
  681. * change the value
  682. */
  683. if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) >
  684. kvm_nr_mmu_pages) {
  685. int n_used_mmu_pages = kvm->n_alloc_mmu_pages
  686. - kvm->n_free_mmu_pages;
  687. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  688. struct kvm_mmu_page *page;
  689. page = container_of(kvm->active_mmu_pages.prev,
  690. struct kvm_mmu_page, link);
  691. kvm_mmu_zap_page(kvm, page);
  692. n_used_mmu_pages--;
  693. }
  694. kvm->n_free_mmu_pages = 0;
  695. }
  696. else
  697. kvm->n_free_mmu_pages += kvm_nr_mmu_pages
  698. - kvm->n_alloc_mmu_pages;
  699. kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages;
  700. }
  701. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  702. {
  703. unsigned index;
  704. struct hlist_head *bucket;
  705. struct kvm_mmu_page *page;
  706. struct hlist_node *node, *n;
  707. int r;
  708. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  709. r = 0;
  710. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  711. bucket = &kvm->mmu_page_hash[index];
  712. hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
  713. if (page->gfn == gfn && !page->role.metaphysical) {
  714. pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
  715. page->role.word);
  716. kvm_mmu_zap_page(kvm, page);
  717. r = 1;
  718. }
  719. return r;
  720. }
  721. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  722. {
  723. struct kvm_mmu_page *page;
  724. while ((page = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  725. pgprintk("%s: zap %lx %x\n",
  726. __FUNCTION__, gfn, page->role.word);
  727. kvm_mmu_zap_page(kvm, page);
  728. }
  729. }
  730. static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
  731. {
  732. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
  733. struct kvm_mmu_page *page_head = page_header(__pa(pte));
  734. __set_bit(slot, &page_head->slot_bitmap);
  735. }
  736. hpa_t gpa_to_hpa(struct kvm *kvm, gpa_t gpa)
  737. {
  738. struct page *page;
  739. hpa_t hpa;
  740. ASSERT((gpa & HPA_ERR_MASK) == 0);
  741. page = gfn_to_page(kvm, gpa >> PAGE_SHIFT);
  742. hpa = ((hpa_t)page_to_pfn(page) << PAGE_SHIFT) | (gpa & (PAGE_SIZE-1));
  743. if (is_error_page(page))
  744. return hpa | HPA_ERR_MASK;
  745. return hpa;
  746. }
  747. hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
  748. {
  749. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  750. if (gpa == UNMAPPED_GVA)
  751. return UNMAPPED_GVA;
  752. return gpa_to_hpa(vcpu->kvm, gpa);
  753. }
  754. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  755. {
  756. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  757. if (gpa == UNMAPPED_GVA)
  758. return NULL;
  759. return pfn_to_page(gpa_to_hpa(vcpu->kvm, gpa) >> PAGE_SHIFT);
  760. }
  761. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  762. {
  763. }
  764. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
  765. {
  766. int level = PT32E_ROOT_LEVEL;
  767. hpa_t table_addr = vcpu->mmu.root_hpa;
  768. for (; ; level--) {
  769. u32 index = PT64_INDEX(v, level);
  770. u64 *table;
  771. u64 pte;
  772. ASSERT(VALID_PAGE(table_addr));
  773. table = __va(table_addr);
  774. if (level == 1) {
  775. int was_rmapped;
  776. pte = table[index];
  777. was_rmapped = is_rmap_pte(pte);
  778. if (is_shadow_present_pte(pte) && is_writeble_pte(pte))
  779. return 0;
  780. mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
  781. page_header_update_slot(vcpu->kvm, table, v);
  782. table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
  783. PT_USER_MASK;
  784. if (!was_rmapped)
  785. rmap_add(vcpu, &table[index], v >> PAGE_SHIFT);
  786. else
  787. kvm_release_page(pfn_to_page(p >> PAGE_SHIFT));
  788. return 0;
  789. }
  790. if (table[index] == shadow_trap_nonpresent_pte) {
  791. struct kvm_mmu_page *new_table;
  792. gfn_t pseudo_gfn;
  793. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  794. >> PAGE_SHIFT;
  795. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  796. v, level - 1,
  797. 1, 3, &table[index]);
  798. if (!new_table) {
  799. pgprintk("nonpaging_map: ENOMEM\n");
  800. kvm_release_page(pfn_to_page(p >> PAGE_SHIFT));
  801. return -ENOMEM;
  802. }
  803. table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
  804. | PT_WRITABLE_MASK | PT_USER_MASK;
  805. }
  806. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  807. }
  808. }
  809. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  810. struct kvm_mmu_page *sp)
  811. {
  812. int i;
  813. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  814. sp->spt[i] = shadow_trap_nonpresent_pte;
  815. }
  816. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  817. {
  818. int i;
  819. struct kvm_mmu_page *page;
  820. if (!VALID_PAGE(vcpu->mmu.root_hpa))
  821. return;
  822. #ifdef CONFIG_X86_64
  823. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  824. hpa_t root = vcpu->mmu.root_hpa;
  825. page = page_header(root);
  826. --page->root_count;
  827. vcpu->mmu.root_hpa = INVALID_PAGE;
  828. return;
  829. }
  830. #endif
  831. for (i = 0; i < 4; ++i) {
  832. hpa_t root = vcpu->mmu.pae_root[i];
  833. if (root) {
  834. root &= PT64_BASE_ADDR_MASK;
  835. page = page_header(root);
  836. --page->root_count;
  837. }
  838. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  839. }
  840. vcpu->mmu.root_hpa = INVALID_PAGE;
  841. }
  842. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  843. {
  844. int i;
  845. gfn_t root_gfn;
  846. struct kvm_mmu_page *page;
  847. root_gfn = vcpu->cr3 >> PAGE_SHIFT;
  848. #ifdef CONFIG_X86_64
  849. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  850. hpa_t root = vcpu->mmu.root_hpa;
  851. ASSERT(!VALID_PAGE(root));
  852. page = kvm_mmu_get_page(vcpu, root_gfn, 0,
  853. PT64_ROOT_LEVEL, 0, 0, NULL);
  854. root = __pa(page->spt);
  855. ++page->root_count;
  856. vcpu->mmu.root_hpa = root;
  857. return;
  858. }
  859. #endif
  860. for (i = 0; i < 4; ++i) {
  861. hpa_t root = vcpu->mmu.pae_root[i];
  862. ASSERT(!VALID_PAGE(root));
  863. if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
  864. if (!is_present_pte(vcpu->pdptrs[i])) {
  865. vcpu->mmu.pae_root[i] = 0;
  866. continue;
  867. }
  868. root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
  869. } else if (vcpu->mmu.root_level == 0)
  870. root_gfn = 0;
  871. page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  872. PT32_ROOT_LEVEL, !is_paging(vcpu),
  873. 0, NULL);
  874. root = __pa(page->spt);
  875. ++page->root_count;
  876. vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
  877. }
  878. vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
  879. }
  880. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  881. {
  882. return vaddr;
  883. }
  884. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  885. u32 error_code)
  886. {
  887. gpa_t addr = gva;
  888. hpa_t paddr;
  889. int r;
  890. r = mmu_topup_memory_caches(vcpu);
  891. if (r)
  892. return r;
  893. ASSERT(vcpu);
  894. ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
  895. paddr = gpa_to_hpa(vcpu->kvm, addr & PT64_BASE_ADDR_MASK);
  896. if (is_error_hpa(paddr)) {
  897. kvm_release_page(pfn_to_page((paddr & PT64_BASE_ADDR_MASK)
  898. >> PAGE_SHIFT));
  899. return 1;
  900. }
  901. return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
  902. }
  903. static void nonpaging_free(struct kvm_vcpu *vcpu)
  904. {
  905. mmu_free_roots(vcpu);
  906. }
  907. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  908. {
  909. struct kvm_mmu *context = &vcpu->mmu;
  910. context->new_cr3 = nonpaging_new_cr3;
  911. context->page_fault = nonpaging_page_fault;
  912. context->gva_to_gpa = nonpaging_gva_to_gpa;
  913. context->free = nonpaging_free;
  914. context->prefetch_page = nonpaging_prefetch_page;
  915. context->root_level = 0;
  916. context->shadow_root_level = PT32E_ROOT_LEVEL;
  917. context->root_hpa = INVALID_PAGE;
  918. return 0;
  919. }
  920. static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  921. {
  922. ++vcpu->stat.tlb_flush;
  923. kvm_x86_ops->tlb_flush(vcpu);
  924. }
  925. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  926. {
  927. pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
  928. mmu_free_roots(vcpu);
  929. }
  930. static void inject_page_fault(struct kvm_vcpu *vcpu,
  931. u64 addr,
  932. u32 err_code)
  933. {
  934. kvm_x86_ops->inject_page_fault(vcpu, addr, err_code);
  935. }
  936. static void paging_free(struct kvm_vcpu *vcpu)
  937. {
  938. nonpaging_free(vcpu);
  939. }
  940. #define PTTYPE 64
  941. #include "paging_tmpl.h"
  942. #undef PTTYPE
  943. #define PTTYPE 32
  944. #include "paging_tmpl.h"
  945. #undef PTTYPE
  946. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  947. {
  948. struct kvm_mmu *context = &vcpu->mmu;
  949. ASSERT(is_pae(vcpu));
  950. context->new_cr3 = paging_new_cr3;
  951. context->page_fault = paging64_page_fault;
  952. context->gva_to_gpa = paging64_gva_to_gpa;
  953. context->prefetch_page = paging64_prefetch_page;
  954. context->free = paging_free;
  955. context->root_level = level;
  956. context->shadow_root_level = level;
  957. context->root_hpa = INVALID_PAGE;
  958. return 0;
  959. }
  960. static int paging64_init_context(struct kvm_vcpu *vcpu)
  961. {
  962. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  963. }
  964. static int paging32_init_context(struct kvm_vcpu *vcpu)
  965. {
  966. struct kvm_mmu *context = &vcpu->mmu;
  967. context->new_cr3 = paging_new_cr3;
  968. context->page_fault = paging32_page_fault;
  969. context->gva_to_gpa = paging32_gva_to_gpa;
  970. context->free = paging_free;
  971. context->prefetch_page = paging32_prefetch_page;
  972. context->root_level = PT32_ROOT_LEVEL;
  973. context->shadow_root_level = PT32E_ROOT_LEVEL;
  974. context->root_hpa = INVALID_PAGE;
  975. return 0;
  976. }
  977. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  978. {
  979. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  980. }
  981. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  982. {
  983. ASSERT(vcpu);
  984. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  985. if (!is_paging(vcpu))
  986. return nonpaging_init_context(vcpu);
  987. else if (is_long_mode(vcpu))
  988. return paging64_init_context(vcpu);
  989. else if (is_pae(vcpu))
  990. return paging32E_init_context(vcpu);
  991. else
  992. return paging32_init_context(vcpu);
  993. }
  994. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  995. {
  996. ASSERT(vcpu);
  997. if (VALID_PAGE(vcpu->mmu.root_hpa)) {
  998. vcpu->mmu.free(vcpu);
  999. vcpu->mmu.root_hpa = INVALID_PAGE;
  1000. }
  1001. }
  1002. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1003. {
  1004. destroy_kvm_mmu(vcpu);
  1005. return init_kvm_mmu(vcpu);
  1006. }
  1007. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1008. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1009. {
  1010. int r;
  1011. mutex_lock(&vcpu->kvm->lock);
  1012. r = mmu_topup_memory_caches(vcpu);
  1013. if (r)
  1014. goto out;
  1015. mmu_alloc_roots(vcpu);
  1016. kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
  1017. kvm_mmu_flush_tlb(vcpu);
  1018. out:
  1019. mutex_unlock(&vcpu->kvm->lock);
  1020. return r;
  1021. }
  1022. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1023. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1024. {
  1025. mmu_free_roots(vcpu);
  1026. }
  1027. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1028. struct kvm_mmu_page *page,
  1029. u64 *spte)
  1030. {
  1031. u64 pte;
  1032. struct kvm_mmu_page *child;
  1033. pte = *spte;
  1034. if (is_shadow_present_pte(pte)) {
  1035. if (page->role.level == PT_PAGE_TABLE_LEVEL)
  1036. rmap_remove(vcpu->kvm, spte);
  1037. else {
  1038. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1039. mmu_page_remove_parent_pte(child, spte);
  1040. }
  1041. }
  1042. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1043. kvm_flush_remote_tlbs(vcpu->kvm);
  1044. }
  1045. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1046. struct kvm_mmu_page *page,
  1047. u64 *spte,
  1048. const void *new, int bytes,
  1049. int offset_in_pte)
  1050. {
  1051. if (page->role.level != PT_PAGE_TABLE_LEVEL) {
  1052. ++vcpu->kvm->stat.mmu_pde_zapped;
  1053. return;
  1054. }
  1055. ++vcpu->kvm->stat.mmu_pte_updated;
  1056. if (page->role.glevels == PT32_ROOT_LEVEL)
  1057. paging32_update_pte(vcpu, page, spte, new, bytes,
  1058. offset_in_pte);
  1059. else
  1060. paging64_update_pte(vcpu, page, spte, new, bytes,
  1061. offset_in_pte);
  1062. }
  1063. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1064. {
  1065. u64 *spte = vcpu->last_pte_updated;
  1066. return !!(spte && (*spte & PT_ACCESSED_MASK));
  1067. }
  1068. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1069. const u8 *new, int bytes)
  1070. {
  1071. gfn_t gfn = gpa >> PAGE_SHIFT;
  1072. struct kvm_mmu_page *page;
  1073. struct hlist_node *node, *n;
  1074. struct hlist_head *bucket;
  1075. unsigned index;
  1076. u64 *spte;
  1077. unsigned offset = offset_in_page(gpa);
  1078. unsigned pte_size;
  1079. unsigned page_offset;
  1080. unsigned misaligned;
  1081. unsigned quadrant;
  1082. int level;
  1083. int flooded = 0;
  1084. int npte;
  1085. pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
  1086. ++vcpu->kvm->stat.mmu_pte_write;
  1087. kvm_mmu_audit(vcpu, "pre pte write");
  1088. if (gfn == vcpu->last_pt_write_gfn
  1089. && !last_updated_pte_accessed(vcpu)) {
  1090. ++vcpu->last_pt_write_count;
  1091. if (vcpu->last_pt_write_count >= 3)
  1092. flooded = 1;
  1093. } else {
  1094. vcpu->last_pt_write_gfn = gfn;
  1095. vcpu->last_pt_write_count = 1;
  1096. vcpu->last_pte_updated = NULL;
  1097. }
  1098. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  1099. bucket = &vcpu->kvm->mmu_page_hash[index];
  1100. hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
  1101. if (page->gfn != gfn || page->role.metaphysical)
  1102. continue;
  1103. pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1104. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1105. misaligned |= bytes < 4;
  1106. if (misaligned || flooded) {
  1107. /*
  1108. * Misaligned accesses are too much trouble to fix
  1109. * up; also, they usually indicate a page is not used
  1110. * as a page table.
  1111. *
  1112. * If we're seeing too many writes to a page,
  1113. * it may no longer be a page table, or we may be
  1114. * forking, in which case it is better to unmap the
  1115. * page.
  1116. */
  1117. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1118. gpa, bytes, page->role.word);
  1119. kvm_mmu_zap_page(vcpu->kvm, page);
  1120. ++vcpu->kvm->stat.mmu_flooded;
  1121. continue;
  1122. }
  1123. page_offset = offset;
  1124. level = page->role.level;
  1125. npte = 1;
  1126. if (page->role.glevels == PT32_ROOT_LEVEL) {
  1127. page_offset <<= 1; /* 32->64 */
  1128. /*
  1129. * A 32-bit pde maps 4MB while the shadow pdes map
  1130. * only 2MB. So we need to double the offset again
  1131. * and zap two pdes instead of one.
  1132. */
  1133. if (level == PT32_ROOT_LEVEL) {
  1134. page_offset &= ~7; /* kill rounding error */
  1135. page_offset <<= 1;
  1136. npte = 2;
  1137. }
  1138. quadrant = page_offset >> PAGE_SHIFT;
  1139. page_offset &= ~PAGE_MASK;
  1140. if (quadrant != page->role.quadrant)
  1141. continue;
  1142. }
  1143. spte = &page->spt[page_offset / sizeof(*spte)];
  1144. while (npte--) {
  1145. mmu_pte_write_zap_pte(vcpu, page, spte);
  1146. mmu_pte_write_new_pte(vcpu, page, spte, new, bytes,
  1147. page_offset & (pte_size - 1));
  1148. ++spte;
  1149. }
  1150. }
  1151. kvm_mmu_audit(vcpu, "post pte write");
  1152. }
  1153. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1154. {
  1155. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  1156. return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1157. }
  1158. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1159. {
  1160. while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
  1161. struct kvm_mmu_page *page;
  1162. page = container_of(vcpu->kvm->active_mmu_pages.prev,
  1163. struct kvm_mmu_page, link);
  1164. kvm_mmu_zap_page(vcpu->kvm, page);
  1165. ++vcpu->kvm->stat.mmu_recycled;
  1166. }
  1167. }
  1168. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  1169. {
  1170. int r;
  1171. enum emulation_result er;
  1172. mutex_lock(&vcpu->kvm->lock);
  1173. r = vcpu->mmu.page_fault(vcpu, cr2, error_code);
  1174. if (r < 0)
  1175. goto out;
  1176. if (!r) {
  1177. r = 1;
  1178. goto out;
  1179. }
  1180. r = mmu_topup_memory_caches(vcpu);
  1181. if (r)
  1182. goto out;
  1183. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  1184. mutex_unlock(&vcpu->kvm->lock);
  1185. switch (er) {
  1186. case EMULATE_DONE:
  1187. return 1;
  1188. case EMULATE_DO_MMIO:
  1189. ++vcpu->stat.mmio_exits;
  1190. return 0;
  1191. case EMULATE_FAIL:
  1192. kvm_report_emulation_failure(vcpu, "pagetable");
  1193. return 1;
  1194. default:
  1195. BUG();
  1196. }
  1197. out:
  1198. mutex_unlock(&vcpu->kvm->lock);
  1199. return r;
  1200. }
  1201. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  1202. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1203. {
  1204. struct kvm_mmu_page *page;
  1205. while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
  1206. page = container_of(vcpu->kvm->active_mmu_pages.next,
  1207. struct kvm_mmu_page, link);
  1208. kvm_mmu_zap_page(vcpu->kvm, page);
  1209. }
  1210. free_page((unsigned long)vcpu->mmu.pae_root);
  1211. }
  1212. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1213. {
  1214. struct page *page;
  1215. int i;
  1216. ASSERT(vcpu);
  1217. if (vcpu->kvm->n_requested_mmu_pages)
  1218. vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages;
  1219. else
  1220. vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages;
  1221. /*
  1222. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1223. * Therefore we need to allocate shadow page tables in the first
  1224. * 4GB of memory, which happens to fit the DMA32 zone.
  1225. */
  1226. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1227. if (!page)
  1228. goto error_1;
  1229. vcpu->mmu.pae_root = page_address(page);
  1230. for (i = 0; i < 4; ++i)
  1231. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  1232. return 0;
  1233. error_1:
  1234. free_mmu_pages(vcpu);
  1235. return -ENOMEM;
  1236. }
  1237. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1238. {
  1239. ASSERT(vcpu);
  1240. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1241. return alloc_mmu_pages(vcpu);
  1242. }
  1243. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1244. {
  1245. ASSERT(vcpu);
  1246. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1247. return init_kvm_mmu(vcpu);
  1248. }
  1249. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1250. {
  1251. ASSERT(vcpu);
  1252. destroy_kvm_mmu(vcpu);
  1253. free_mmu_pages(vcpu);
  1254. mmu_free_memory_caches(vcpu);
  1255. }
  1256. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1257. {
  1258. struct kvm_mmu_page *page;
  1259. list_for_each_entry(page, &kvm->active_mmu_pages, link) {
  1260. int i;
  1261. u64 *pt;
  1262. if (!test_bit(slot, &page->slot_bitmap))
  1263. continue;
  1264. pt = page->spt;
  1265. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1266. /* avoid RMW */
  1267. if (pt[i] & PT_WRITABLE_MASK)
  1268. pt[i] &= ~PT_WRITABLE_MASK;
  1269. }
  1270. }
  1271. void kvm_mmu_zap_all(struct kvm *kvm)
  1272. {
  1273. struct kvm_mmu_page *page, *node;
  1274. list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link)
  1275. kvm_mmu_zap_page(kvm, page);
  1276. kvm_flush_remote_tlbs(kvm);
  1277. }
  1278. void kvm_mmu_module_exit(void)
  1279. {
  1280. if (pte_chain_cache)
  1281. kmem_cache_destroy(pte_chain_cache);
  1282. if (rmap_desc_cache)
  1283. kmem_cache_destroy(rmap_desc_cache);
  1284. if (mmu_page_header_cache)
  1285. kmem_cache_destroy(mmu_page_header_cache);
  1286. }
  1287. int kvm_mmu_module_init(void)
  1288. {
  1289. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1290. sizeof(struct kvm_pte_chain),
  1291. 0, 0, NULL);
  1292. if (!pte_chain_cache)
  1293. goto nomem;
  1294. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1295. sizeof(struct kvm_rmap_desc),
  1296. 0, 0, NULL);
  1297. if (!rmap_desc_cache)
  1298. goto nomem;
  1299. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1300. sizeof(struct kvm_mmu_page),
  1301. 0, 0, NULL);
  1302. if (!mmu_page_header_cache)
  1303. goto nomem;
  1304. return 0;
  1305. nomem:
  1306. kvm_mmu_module_exit();
  1307. return -ENOMEM;
  1308. }
  1309. #ifdef AUDIT
  1310. static const char *audit_msg;
  1311. static gva_t canonicalize(gva_t gva)
  1312. {
  1313. #ifdef CONFIG_X86_64
  1314. gva = (long long)(gva << 16) >> 16;
  1315. #endif
  1316. return gva;
  1317. }
  1318. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1319. gva_t va, int level)
  1320. {
  1321. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1322. int i;
  1323. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1324. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1325. u64 ent = pt[i];
  1326. if (ent == shadow_trap_nonpresent_pte)
  1327. continue;
  1328. va = canonicalize(va);
  1329. if (level > 1) {
  1330. if (ent == shadow_notrap_nonpresent_pte)
  1331. printk(KERN_ERR "audit: (%s) nontrapping pte"
  1332. " in nonleaf level: levels %d gva %lx"
  1333. " level %d pte %llx\n", audit_msg,
  1334. vcpu->mmu.root_level, va, level, ent);
  1335. audit_mappings_page(vcpu, ent, va, level - 1);
  1336. } else {
  1337. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
  1338. hpa_t hpa = gpa_to_hpa(vcpu, gpa);
  1339. struct page *page;
  1340. if (is_shadow_present_pte(ent)
  1341. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1342. printk(KERN_ERR "xx audit error: (%s) levels %d"
  1343. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  1344. audit_msg, vcpu->mmu.root_level,
  1345. va, gpa, hpa, ent,
  1346. is_shadow_present_pte(ent));
  1347. else if (ent == shadow_notrap_nonpresent_pte
  1348. && !is_error_hpa(hpa))
  1349. printk(KERN_ERR "audit: (%s) notrap shadow,"
  1350. " valid guest gva %lx\n", audit_msg, va);
  1351. page = pfn_to_page((gpa & PT64_BASE_ADDR_MASK)
  1352. >> PAGE_SHIFT);
  1353. kvm_release_page(page);
  1354. }
  1355. }
  1356. }
  1357. static void audit_mappings(struct kvm_vcpu *vcpu)
  1358. {
  1359. unsigned i;
  1360. if (vcpu->mmu.root_level == 4)
  1361. audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
  1362. else
  1363. for (i = 0; i < 4; ++i)
  1364. if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
  1365. audit_mappings_page(vcpu,
  1366. vcpu->mmu.pae_root[i],
  1367. i << 30,
  1368. 2);
  1369. }
  1370. static int count_rmaps(struct kvm_vcpu *vcpu)
  1371. {
  1372. int nmaps = 0;
  1373. int i, j, k;
  1374. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1375. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1376. struct kvm_rmap_desc *d;
  1377. for (j = 0; j < m->npages; ++j) {
  1378. unsigned long *rmapp = &m->rmap[j];
  1379. if (!*rmapp)
  1380. continue;
  1381. if (!(*rmapp & 1)) {
  1382. ++nmaps;
  1383. continue;
  1384. }
  1385. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  1386. while (d) {
  1387. for (k = 0; k < RMAP_EXT; ++k)
  1388. if (d->shadow_ptes[k])
  1389. ++nmaps;
  1390. else
  1391. break;
  1392. d = d->more;
  1393. }
  1394. }
  1395. }
  1396. return nmaps;
  1397. }
  1398. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1399. {
  1400. int nmaps = 0;
  1401. struct kvm_mmu_page *page;
  1402. int i;
  1403. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1404. u64 *pt = page->spt;
  1405. if (page->role.level != PT_PAGE_TABLE_LEVEL)
  1406. continue;
  1407. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1408. u64 ent = pt[i];
  1409. if (!(ent & PT_PRESENT_MASK))
  1410. continue;
  1411. if (!(ent & PT_WRITABLE_MASK))
  1412. continue;
  1413. ++nmaps;
  1414. }
  1415. }
  1416. return nmaps;
  1417. }
  1418. static void audit_rmap(struct kvm_vcpu *vcpu)
  1419. {
  1420. int n_rmap = count_rmaps(vcpu);
  1421. int n_actual = count_writable_mappings(vcpu);
  1422. if (n_rmap != n_actual)
  1423. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  1424. __FUNCTION__, audit_msg, n_rmap, n_actual);
  1425. }
  1426. static void audit_write_protection(struct kvm_vcpu *vcpu)
  1427. {
  1428. struct kvm_mmu_page *page;
  1429. struct kvm_memory_slot *slot;
  1430. unsigned long *rmapp;
  1431. gfn_t gfn;
  1432. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1433. if (page->role.metaphysical)
  1434. continue;
  1435. slot = gfn_to_memslot(vcpu->kvm, page->gfn);
  1436. gfn = unalias_gfn(vcpu->kvm, page->gfn);
  1437. rmapp = &slot->rmap[gfn - slot->base_gfn];
  1438. if (*rmapp)
  1439. printk(KERN_ERR "%s: (%s) shadow page has writable"
  1440. " mappings: gfn %lx role %x\n",
  1441. __FUNCTION__, audit_msg, page->gfn,
  1442. page->role.word);
  1443. }
  1444. }
  1445. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  1446. {
  1447. int olddbg = dbg;
  1448. dbg = 0;
  1449. audit_msg = msg;
  1450. audit_rmap(vcpu);
  1451. audit_write_protection(vcpu);
  1452. audit_mappings(vcpu);
  1453. dbg = olddbg;
  1454. }
  1455. #endif