main.c 60 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. unsigned long flags;
  100. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  101. if (--sc->ps_usecount != 0)
  102. goto unlock;
  103. spin_lock(&common->cc_lock);
  104. ath_hw_cycle_counters_update(common);
  105. spin_unlock(&common->cc_lock);
  106. if (sc->ps_idle)
  107. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  108. else if (sc->ps_enabled &&
  109. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  110. PS_WAIT_FOR_CAB |
  111. PS_WAIT_FOR_PSPOLL_DATA |
  112. PS_WAIT_FOR_TX_ACK)))
  113. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  114. unlock:
  115. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  116. }
  117. void ath_start_ani(struct ath_common *common)
  118. {
  119. struct ath_hw *ah = common->ah;
  120. unsigned long timestamp = jiffies_to_msecs(jiffies);
  121. struct ath_softc *sc = (struct ath_softc *) common->priv;
  122. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  123. return;
  124. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  125. return;
  126. common->ani.longcal_timer = timestamp;
  127. common->ani.shortcal_timer = timestamp;
  128. common->ani.checkani_timer = timestamp;
  129. mod_timer(&common->ani.timer,
  130. jiffies +
  131. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  132. }
  133. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  134. {
  135. struct ath_hw *ah = sc->sc_ah;
  136. struct ath9k_channel *chan = &ah->channels[channel];
  137. struct survey_info *survey = &sc->survey[channel];
  138. if (chan->noisefloor) {
  139. survey->filled |= SURVEY_INFO_NOISE_DBM;
  140. survey->noise = chan->noisefloor;
  141. }
  142. }
  143. /*
  144. * Updates the survey statistics and returns the busy time since last
  145. * update in %, if the measurement duration was long enough for the
  146. * result to be useful, -1 otherwise.
  147. */
  148. static int ath_update_survey_stats(struct ath_softc *sc)
  149. {
  150. struct ath_hw *ah = sc->sc_ah;
  151. struct ath_common *common = ath9k_hw_common(ah);
  152. int pos = ah->curchan - &ah->channels[0];
  153. struct survey_info *survey = &sc->survey[pos];
  154. struct ath_cycle_counters *cc = &common->cc_survey;
  155. unsigned int div = common->clockrate * 1000;
  156. int ret = 0;
  157. if (!ah->curchan)
  158. return -1;
  159. if (ah->power_mode == ATH9K_PM_AWAKE)
  160. ath_hw_cycle_counters_update(common);
  161. if (cc->cycles > 0) {
  162. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  163. SURVEY_INFO_CHANNEL_TIME_BUSY |
  164. SURVEY_INFO_CHANNEL_TIME_RX |
  165. SURVEY_INFO_CHANNEL_TIME_TX;
  166. survey->channel_time += cc->cycles / div;
  167. survey->channel_time_busy += cc->rx_busy / div;
  168. survey->channel_time_rx += cc->rx_frame / div;
  169. survey->channel_time_tx += cc->tx_frame / div;
  170. }
  171. if (cc->cycles < div)
  172. return -1;
  173. if (cc->cycles > 0)
  174. ret = cc->rx_busy * 100 / cc->cycles;
  175. memset(cc, 0, sizeof(*cc));
  176. ath_update_survey_nf(sc, pos);
  177. return ret;
  178. }
  179. /*
  180. * Set/change channels. If the channel is really being changed, it's done
  181. * by reseting the chip. To accomplish this we must first cleanup any pending
  182. * DMA, then restart stuff.
  183. */
  184. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  185. struct ath9k_channel *hchan)
  186. {
  187. struct ath_hw *ah = sc->sc_ah;
  188. struct ath_common *common = ath9k_hw_common(ah);
  189. struct ieee80211_conf *conf = &common->hw->conf;
  190. bool fastcc = true, stopped;
  191. struct ieee80211_channel *channel = hw->conf.channel;
  192. struct ath9k_hw_cal_data *caldata = NULL;
  193. int r;
  194. if (sc->sc_flags & SC_OP_INVALID)
  195. return -EIO;
  196. sc->hw_busy_count = 0;
  197. del_timer_sync(&common->ani.timer);
  198. cancel_work_sync(&sc->paprd_work);
  199. cancel_work_sync(&sc->hw_check_work);
  200. cancel_delayed_work_sync(&sc->tx_complete_work);
  201. cancel_delayed_work_sync(&sc->hw_pll_work);
  202. ath9k_ps_wakeup(sc);
  203. spin_lock_bh(&sc->sc_pcu_lock);
  204. /*
  205. * This is only performed if the channel settings have
  206. * actually changed.
  207. *
  208. * To switch channels clear any pending DMA operations;
  209. * wait long enough for the RX fifo to drain, reset the
  210. * hardware at the new frequency, and then re-enable
  211. * the relevant bits of the h/w.
  212. */
  213. ath9k_hw_disable_interrupts(ah);
  214. stopped = ath_drain_all_txq(sc, false);
  215. if (!ath_stoprecv(sc))
  216. stopped = false;
  217. if (!ath9k_hw_check_alive(ah))
  218. stopped = false;
  219. /* XXX: do not flush receive queue here. We don't want
  220. * to flush data frames already in queue because of
  221. * changing channel. */
  222. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  223. fastcc = false;
  224. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  225. caldata = &sc->caldata;
  226. ath_dbg(common, ATH_DBG_CONFIG,
  227. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  228. sc->sc_ah->curchan->channel,
  229. channel->center_freq, conf_is_ht40(conf),
  230. fastcc);
  231. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  232. if (r) {
  233. ath_err(common,
  234. "Unable to reset channel (%u MHz), reset status %d\n",
  235. channel->center_freq, r);
  236. goto ps_restore;
  237. }
  238. if (ath_startrecv(sc) != 0) {
  239. ath_err(common, "Unable to restart recv logic\n");
  240. r = -EIO;
  241. goto ps_restore;
  242. }
  243. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  244. sc->config.txpowlimit, &sc->curtxpow);
  245. ath9k_hw_set_interrupts(ah, ah->imask);
  246. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  247. if (sc->sc_flags & SC_OP_BEACONS)
  248. ath_set_beacon(sc);
  249. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  250. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  251. if (!common->disable_ani)
  252. ath_start_ani(common);
  253. }
  254. ps_restore:
  255. ieee80211_wake_queues(hw);
  256. spin_unlock_bh(&sc->sc_pcu_lock);
  257. ath9k_ps_restore(sc);
  258. return r;
  259. }
  260. static void ath_paprd_activate(struct ath_softc *sc)
  261. {
  262. struct ath_hw *ah = sc->sc_ah;
  263. struct ath9k_hw_cal_data *caldata = ah->caldata;
  264. struct ath_common *common = ath9k_hw_common(ah);
  265. int chain;
  266. if (!caldata || !caldata->paprd_done)
  267. return;
  268. ath9k_ps_wakeup(sc);
  269. ar9003_paprd_enable(ah, false);
  270. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  271. if (!(common->tx_chainmask & BIT(chain)))
  272. continue;
  273. ar9003_paprd_populate_single_table(ah, caldata, chain);
  274. }
  275. ar9003_paprd_enable(ah, true);
  276. ath9k_ps_restore(sc);
  277. }
  278. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  279. {
  280. struct ieee80211_hw *hw = sc->hw;
  281. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  282. struct ath_hw *ah = sc->sc_ah;
  283. struct ath_common *common = ath9k_hw_common(ah);
  284. struct ath_tx_control txctl;
  285. int time_left;
  286. memset(&txctl, 0, sizeof(txctl));
  287. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  288. memset(tx_info, 0, sizeof(*tx_info));
  289. tx_info->band = hw->conf.channel->band;
  290. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  291. tx_info->control.rates[0].idx = 0;
  292. tx_info->control.rates[0].count = 1;
  293. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  294. tx_info->control.rates[1].idx = -1;
  295. init_completion(&sc->paprd_complete);
  296. txctl.paprd = BIT(chain);
  297. if (ath_tx_start(hw, skb, &txctl) != 0) {
  298. ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
  299. dev_kfree_skb_any(skb);
  300. return false;
  301. }
  302. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  303. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  304. if (!time_left)
  305. ath_dbg(common, ATH_DBG_CALIBRATE,
  306. "Timeout waiting for paprd training on TX chain %d\n",
  307. chain);
  308. return !!time_left;
  309. }
  310. void ath_paprd_calibrate(struct work_struct *work)
  311. {
  312. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  313. struct ieee80211_hw *hw = sc->hw;
  314. struct ath_hw *ah = sc->sc_ah;
  315. struct ieee80211_hdr *hdr;
  316. struct sk_buff *skb = NULL;
  317. struct ath9k_hw_cal_data *caldata = ah->caldata;
  318. struct ath_common *common = ath9k_hw_common(ah);
  319. int ftype;
  320. int chain_ok = 0;
  321. int chain;
  322. int len = 1800;
  323. if (!caldata)
  324. return;
  325. ath9k_ps_wakeup(sc);
  326. if (ar9003_paprd_init_table(ah) < 0)
  327. goto fail_paprd;
  328. skb = alloc_skb(len, GFP_KERNEL);
  329. if (!skb)
  330. goto fail_paprd;
  331. skb_put(skb, len);
  332. memset(skb->data, 0, len);
  333. hdr = (struct ieee80211_hdr *)skb->data;
  334. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  335. hdr->frame_control = cpu_to_le16(ftype);
  336. hdr->duration_id = cpu_to_le16(10);
  337. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  338. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  339. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  340. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  341. if (!(common->tx_chainmask & BIT(chain)))
  342. continue;
  343. chain_ok = 0;
  344. ath_dbg(common, ATH_DBG_CALIBRATE,
  345. "Sending PAPRD frame for thermal measurement "
  346. "on chain %d\n", chain);
  347. if (!ath_paprd_send_frame(sc, skb, chain))
  348. goto fail_paprd;
  349. ar9003_paprd_setup_gain_table(ah, chain);
  350. ath_dbg(common, ATH_DBG_CALIBRATE,
  351. "Sending PAPRD training frame on chain %d\n", chain);
  352. if (!ath_paprd_send_frame(sc, skb, chain))
  353. goto fail_paprd;
  354. if (!ar9003_paprd_is_done(ah)) {
  355. ath_dbg(common, ATH_DBG_CALIBRATE,
  356. "PAPRD not yet done on chain %d\n", chain);
  357. break;
  358. }
  359. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  360. ath_dbg(common, ATH_DBG_CALIBRATE,
  361. "PAPRD create curve failed on chain %d\n",
  362. chain);
  363. break;
  364. }
  365. chain_ok = 1;
  366. }
  367. kfree_skb(skb);
  368. if (chain_ok) {
  369. caldata->paprd_done = true;
  370. ath_paprd_activate(sc);
  371. }
  372. fail_paprd:
  373. ath9k_ps_restore(sc);
  374. }
  375. /*
  376. * This routine performs the periodic noise floor calibration function
  377. * that is used to adjust and optimize the chip performance. This
  378. * takes environmental changes (location, temperature) into account.
  379. * When the task is complete, it reschedules itself depending on the
  380. * appropriate interval that was calculated.
  381. */
  382. void ath_ani_calibrate(unsigned long data)
  383. {
  384. struct ath_softc *sc = (struct ath_softc *)data;
  385. struct ath_hw *ah = sc->sc_ah;
  386. struct ath_common *common = ath9k_hw_common(ah);
  387. bool longcal = false;
  388. bool shortcal = false;
  389. bool aniflag = false;
  390. unsigned int timestamp = jiffies_to_msecs(jiffies);
  391. u32 cal_interval, short_cal_interval, long_cal_interval;
  392. unsigned long flags;
  393. if (ah->caldata && ah->caldata->nfcal_interference)
  394. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  395. else
  396. long_cal_interval = ATH_LONG_CALINTERVAL;
  397. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  398. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  399. /* Only calibrate if awake */
  400. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  401. goto set_timer;
  402. ath9k_ps_wakeup(sc);
  403. /* Long calibration runs independently of short calibration. */
  404. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  405. longcal = true;
  406. ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  407. common->ani.longcal_timer = timestamp;
  408. }
  409. /* Short calibration applies only while caldone is false */
  410. if (!common->ani.caldone) {
  411. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  412. shortcal = true;
  413. ath_dbg(common, ATH_DBG_ANI,
  414. "shortcal @%lu\n", jiffies);
  415. common->ani.shortcal_timer = timestamp;
  416. common->ani.resetcal_timer = timestamp;
  417. }
  418. } else {
  419. if ((timestamp - common->ani.resetcal_timer) >=
  420. ATH_RESTART_CALINTERVAL) {
  421. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  422. if (common->ani.caldone)
  423. common->ani.resetcal_timer = timestamp;
  424. }
  425. }
  426. /* Verify whether we must check ANI */
  427. if ((timestamp - common->ani.checkani_timer) >=
  428. ah->config.ani_poll_interval) {
  429. aniflag = true;
  430. common->ani.checkani_timer = timestamp;
  431. }
  432. /* Call ANI routine if necessary */
  433. if (aniflag) {
  434. spin_lock_irqsave(&common->cc_lock, flags);
  435. ath9k_hw_ani_monitor(ah, ah->curchan);
  436. ath_update_survey_stats(sc);
  437. spin_unlock_irqrestore(&common->cc_lock, flags);
  438. }
  439. /* Perform calibration if necessary */
  440. if (longcal || shortcal) {
  441. common->ani.caldone =
  442. ath9k_hw_calibrate(ah, ah->curchan,
  443. common->rx_chainmask, longcal);
  444. }
  445. ath9k_ps_restore(sc);
  446. set_timer:
  447. /*
  448. * Set timer interval based on previous results.
  449. * The interval must be the shortest necessary to satisfy ANI,
  450. * short calibration and long calibration.
  451. */
  452. cal_interval = ATH_LONG_CALINTERVAL;
  453. if (sc->sc_ah->config.enable_ani)
  454. cal_interval = min(cal_interval,
  455. (u32)ah->config.ani_poll_interval);
  456. if (!common->ani.caldone)
  457. cal_interval = min(cal_interval, (u32)short_cal_interval);
  458. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  459. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  460. if (!ah->caldata->paprd_done)
  461. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  462. else if (!ah->paprd_table_write_done)
  463. ath_paprd_activate(sc);
  464. }
  465. }
  466. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  467. {
  468. struct ath_node *an;
  469. struct ath_hw *ah = sc->sc_ah;
  470. an = (struct ath_node *)sta->drv_priv;
  471. #ifdef CONFIG_ATH9K_DEBUGFS
  472. spin_lock(&sc->nodes_lock);
  473. list_add(&an->list, &sc->nodes);
  474. spin_unlock(&sc->nodes_lock);
  475. an->sta = sta;
  476. #endif
  477. if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
  478. sc->sc_flags |= SC_OP_ENABLE_APM;
  479. if (sc->sc_flags & SC_OP_TXAGGR) {
  480. ath_tx_node_init(sc, an);
  481. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  482. sta->ht_cap.ampdu_factor);
  483. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  484. }
  485. }
  486. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  487. {
  488. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  489. #ifdef CONFIG_ATH9K_DEBUGFS
  490. spin_lock(&sc->nodes_lock);
  491. list_del(&an->list);
  492. spin_unlock(&sc->nodes_lock);
  493. an->sta = NULL;
  494. #endif
  495. if (sc->sc_flags & SC_OP_TXAGGR)
  496. ath_tx_node_cleanup(sc, an);
  497. }
  498. void ath_hw_check(struct work_struct *work)
  499. {
  500. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  501. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  502. unsigned long flags;
  503. int busy;
  504. ath9k_ps_wakeup(sc);
  505. if (ath9k_hw_check_alive(sc->sc_ah))
  506. goto out;
  507. spin_lock_irqsave(&common->cc_lock, flags);
  508. busy = ath_update_survey_stats(sc);
  509. spin_unlock_irqrestore(&common->cc_lock, flags);
  510. ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
  511. "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
  512. if (busy >= 99) {
  513. if (++sc->hw_busy_count >= 3)
  514. ath_reset(sc, true);
  515. } else if (busy >= 0)
  516. sc->hw_busy_count = 0;
  517. out:
  518. ath9k_ps_restore(sc);
  519. }
  520. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  521. {
  522. static int count;
  523. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  524. if (pll_sqsum >= 0x40000) {
  525. count++;
  526. if (count == 3) {
  527. /* Rx is hung for more than 500ms. Reset it */
  528. ath_dbg(common, ATH_DBG_RESET,
  529. "Possible RX hang, resetting");
  530. ath_reset(sc, true);
  531. count = 0;
  532. }
  533. } else
  534. count = 0;
  535. }
  536. void ath_hw_pll_work(struct work_struct *work)
  537. {
  538. struct ath_softc *sc = container_of(work, struct ath_softc,
  539. hw_pll_work.work);
  540. u32 pll_sqsum;
  541. if (AR_SREV_9485(sc->sc_ah)) {
  542. ath9k_ps_wakeup(sc);
  543. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  544. ath9k_ps_restore(sc);
  545. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  546. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  547. }
  548. }
  549. void ath9k_tasklet(unsigned long data)
  550. {
  551. struct ath_softc *sc = (struct ath_softc *)data;
  552. struct ath_hw *ah = sc->sc_ah;
  553. struct ath_common *common = ath9k_hw_common(ah);
  554. u32 status = sc->intrstatus;
  555. u32 rxmask;
  556. if ((status & ATH9K_INT_FATAL) ||
  557. (status & ATH9K_INT_BB_WATCHDOG)) {
  558. ath_reset(sc, true);
  559. return;
  560. }
  561. ath9k_ps_wakeup(sc);
  562. spin_lock(&sc->sc_pcu_lock);
  563. /*
  564. * Only run the baseband hang check if beacons stop working in AP or
  565. * IBSS mode, because it has a high false positive rate. For station
  566. * mode it should not be necessary, since the upper layers will detect
  567. * this through a beacon miss automatically and the following channel
  568. * change will trigger a hardware reset anyway
  569. */
  570. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  571. !ath9k_hw_check_alive(ah))
  572. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  573. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  574. /*
  575. * TSF sync does not look correct; remain awake to sync with
  576. * the next Beacon.
  577. */
  578. ath_dbg(common, ATH_DBG_PS,
  579. "TSFOOR - Sync with next Beacon\n");
  580. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC |
  581. PS_TSFOOR_SYNC;
  582. }
  583. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  584. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  585. ATH9K_INT_RXORN);
  586. else
  587. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  588. if (status & rxmask) {
  589. /* Check for high priority Rx first */
  590. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  591. (status & ATH9K_INT_RXHP))
  592. ath_rx_tasklet(sc, 0, true);
  593. ath_rx_tasklet(sc, 0, false);
  594. }
  595. if (status & ATH9K_INT_TX) {
  596. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  597. ath_tx_edma_tasklet(sc);
  598. else
  599. ath_tx_tasklet(sc);
  600. }
  601. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  602. if (status & ATH9K_INT_GENTIMER)
  603. ath_gen_timer_isr(sc->sc_ah);
  604. /* re-enable hardware interrupt */
  605. ath9k_hw_enable_interrupts(ah);
  606. spin_unlock(&sc->sc_pcu_lock);
  607. ath9k_ps_restore(sc);
  608. }
  609. irqreturn_t ath_isr(int irq, void *dev)
  610. {
  611. #define SCHED_INTR ( \
  612. ATH9K_INT_FATAL | \
  613. ATH9K_INT_BB_WATCHDOG | \
  614. ATH9K_INT_RXORN | \
  615. ATH9K_INT_RXEOL | \
  616. ATH9K_INT_RX | \
  617. ATH9K_INT_RXLP | \
  618. ATH9K_INT_RXHP | \
  619. ATH9K_INT_TX | \
  620. ATH9K_INT_BMISS | \
  621. ATH9K_INT_CST | \
  622. ATH9K_INT_TSFOOR | \
  623. ATH9K_INT_GENTIMER)
  624. struct ath_softc *sc = dev;
  625. struct ath_hw *ah = sc->sc_ah;
  626. struct ath_common *common = ath9k_hw_common(ah);
  627. enum ath9k_int status;
  628. bool sched = false;
  629. /*
  630. * The hardware is not ready/present, don't
  631. * touch anything. Note this can happen early
  632. * on if the IRQ is shared.
  633. */
  634. if (sc->sc_flags & SC_OP_INVALID)
  635. return IRQ_NONE;
  636. /* shared irq, not for us */
  637. if (!ath9k_hw_intrpend(ah))
  638. return IRQ_NONE;
  639. /*
  640. * Figure out the reason(s) for the interrupt. Note
  641. * that the hal returns a pseudo-ISR that may include
  642. * bits we haven't explicitly enabled so we mask the
  643. * value to insure we only process bits we requested.
  644. */
  645. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  646. status &= ah->imask; /* discard unasked-for bits */
  647. /*
  648. * If there are no status bits set, then this interrupt was not
  649. * for me (should have been caught above).
  650. */
  651. if (!status)
  652. return IRQ_NONE;
  653. /* Cache the status */
  654. sc->intrstatus = status;
  655. if (status & SCHED_INTR)
  656. sched = true;
  657. /*
  658. * If a FATAL or RXORN interrupt is received, we have to reset the
  659. * chip immediately.
  660. */
  661. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  662. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  663. goto chip_reset;
  664. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  665. (status & ATH9K_INT_BB_WATCHDOG)) {
  666. spin_lock(&common->cc_lock);
  667. ath_hw_cycle_counters_update(common);
  668. ar9003_hw_bb_watchdog_dbg_info(ah);
  669. spin_unlock(&common->cc_lock);
  670. goto chip_reset;
  671. }
  672. if (status & ATH9K_INT_SWBA)
  673. tasklet_schedule(&sc->bcon_tasklet);
  674. if (status & ATH9K_INT_TXURN)
  675. ath9k_hw_updatetxtriglevel(ah, true);
  676. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  677. if (status & ATH9K_INT_RXEOL) {
  678. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  679. ath9k_hw_set_interrupts(ah, ah->imask);
  680. }
  681. }
  682. if (status & ATH9K_INT_MIB) {
  683. /*
  684. * Disable interrupts until we service the MIB
  685. * interrupt; otherwise it will continue to
  686. * fire.
  687. */
  688. ath9k_hw_disable_interrupts(ah);
  689. /*
  690. * Let the hal handle the event. We assume
  691. * it will clear whatever condition caused
  692. * the interrupt.
  693. */
  694. spin_lock(&common->cc_lock);
  695. ath9k_hw_proc_mib_event(ah);
  696. spin_unlock(&common->cc_lock);
  697. ath9k_hw_enable_interrupts(ah);
  698. }
  699. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  700. if (status & ATH9K_INT_TIM_TIMER) {
  701. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  702. goto chip_reset;
  703. /* Clear RxAbort bit so that we can
  704. * receive frames */
  705. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  706. ath9k_hw_setrxabort(sc->sc_ah, 0);
  707. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  708. }
  709. chip_reset:
  710. ath_debug_stat_interrupt(sc, status);
  711. if (sched) {
  712. /* turn off every interrupt */
  713. ath9k_hw_disable_interrupts(ah);
  714. tasklet_schedule(&sc->intr_tq);
  715. }
  716. return IRQ_HANDLED;
  717. #undef SCHED_INTR
  718. }
  719. static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  720. {
  721. struct ath_hw *ah = sc->sc_ah;
  722. struct ath_common *common = ath9k_hw_common(ah);
  723. struct ieee80211_channel *channel = hw->conf.channel;
  724. int r;
  725. ath9k_ps_wakeup(sc);
  726. spin_lock_bh(&sc->sc_pcu_lock);
  727. ath9k_hw_configpcipowersave(ah, 0, 0);
  728. if (!ah->curchan)
  729. ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
  730. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  731. if (r) {
  732. ath_err(common,
  733. "Unable to reset channel (%u MHz), reset status %d\n",
  734. channel->center_freq, r);
  735. }
  736. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  737. sc->config.txpowlimit, &sc->curtxpow);
  738. if (ath_startrecv(sc) != 0) {
  739. ath_err(common, "Unable to restart recv logic\n");
  740. goto out;
  741. }
  742. if (sc->sc_flags & SC_OP_BEACONS)
  743. ath_set_beacon(sc); /* restart beacons */
  744. /* Re-Enable interrupts */
  745. ath9k_hw_set_interrupts(ah, ah->imask);
  746. /* Enable LED */
  747. ath9k_hw_cfg_output(ah, ah->led_pin,
  748. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  749. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  750. ieee80211_wake_queues(hw);
  751. ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
  752. out:
  753. spin_unlock_bh(&sc->sc_pcu_lock);
  754. ath9k_ps_restore(sc);
  755. }
  756. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  757. {
  758. struct ath_hw *ah = sc->sc_ah;
  759. struct ieee80211_channel *channel = hw->conf.channel;
  760. int r;
  761. ath9k_ps_wakeup(sc);
  762. cancel_delayed_work_sync(&sc->hw_pll_work);
  763. spin_lock_bh(&sc->sc_pcu_lock);
  764. ieee80211_stop_queues(hw);
  765. /*
  766. * Keep the LED on when the radio is disabled
  767. * during idle unassociated state.
  768. */
  769. if (!sc->ps_idle) {
  770. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  771. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  772. }
  773. /* Disable interrupts */
  774. ath9k_hw_disable_interrupts(ah);
  775. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  776. ath_stoprecv(sc); /* turn off frame recv */
  777. ath_flushrecv(sc); /* flush recv queue */
  778. if (!ah->curchan)
  779. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  780. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  781. if (r) {
  782. ath_err(ath9k_hw_common(sc->sc_ah),
  783. "Unable to reset channel (%u MHz), reset status %d\n",
  784. channel->center_freq, r);
  785. }
  786. ath9k_hw_phy_disable(ah);
  787. ath9k_hw_configpcipowersave(ah, 1, 1);
  788. spin_unlock_bh(&sc->sc_pcu_lock);
  789. ath9k_ps_restore(sc);
  790. }
  791. int ath_reset(struct ath_softc *sc, bool retry_tx)
  792. {
  793. struct ath_hw *ah = sc->sc_ah;
  794. struct ath_common *common = ath9k_hw_common(ah);
  795. struct ieee80211_hw *hw = sc->hw;
  796. int r;
  797. sc->hw_busy_count = 0;
  798. /* Stop ANI */
  799. del_timer_sync(&common->ani.timer);
  800. ath9k_ps_wakeup(sc);
  801. spin_lock_bh(&sc->sc_pcu_lock);
  802. ieee80211_stop_queues(hw);
  803. ath9k_hw_disable_interrupts(ah);
  804. ath_drain_all_txq(sc, retry_tx);
  805. ath_stoprecv(sc);
  806. ath_flushrecv(sc);
  807. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  808. if (r)
  809. ath_err(common,
  810. "Unable to reset hardware; reset status %d\n", r);
  811. if (ath_startrecv(sc) != 0)
  812. ath_err(common, "Unable to start recv logic\n");
  813. /*
  814. * We may be doing a reset in response to a request
  815. * that changes the channel so update any state that
  816. * might change as a result.
  817. */
  818. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  819. sc->config.txpowlimit, &sc->curtxpow);
  820. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  821. ath_set_beacon(sc); /* restart beacons */
  822. ath9k_hw_set_interrupts(ah, ah->imask);
  823. if (retry_tx) {
  824. int i;
  825. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  826. if (ATH_TXQ_SETUP(sc, i)) {
  827. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  828. ath_txq_schedule(sc, &sc->tx.txq[i]);
  829. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  830. }
  831. }
  832. }
  833. ieee80211_wake_queues(hw);
  834. spin_unlock_bh(&sc->sc_pcu_lock);
  835. /* Start ANI */
  836. if (!common->disable_ani)
  837. ath_start_ani(common);
  838. ath9k_ps_restore(sc);
  839. return r;
  840. }
  841. /**********************/
  842. /* mac80211 callbacks */
  843. /**********************/
  844. static int ath9k_start(struct ieee80211_hw *hw)
  845. {
  846. struct ath_softc *sc = hw->priv;
  847. struct ath_hw *ah = sc->sc_ah;
  848. struct ath_common *common = ath9k_hw_common(ah);
  849. struct ieee80211_channel *curchan = hw->conf.channel;
  850. struct ath9k_channel *init_channel;
  851. int r;
  852. ath_dbg(common, ATH_DBG_CONFIG,
  853. "Starting driver with initial channel: %d MHz\n",
  854. curchan->center_freq);
  855. ath9k_ps_wakeup(sc);
  856. mutex_lock(&sc->mutex);
  857. /* setup initial channel */
  858. sc->chan_idx = curchan->hw_value;
  859. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  860. /* Reset SERDES registers */
  861. ath9k_hw_configpcipowersave(ah, 0, 0);
  862. /*
  863. * The basic interface to setting the hardware in a good
  864. * state is ``reset''. On return the hardware is known to
  865. * be powered up and with interrupts disabled. This must
  866. * be followed by initialization of the appropriate bits
  867. * and then setup of the interrupt mask.
  868. */
  869. spin_lock_bh(&sc->sc_pcu_lock);
  870. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  871. if (r) {
  872. ath_err(common,
  873. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  874. r, curchan->center_freq);
  875. spin_unlock_bh(&sc->sc_pcu_lock);
  876. goto mutex_unlock;
  877. }
  878. /*
  879. * This is needed only to setup initial state
  880. * but it's best done after a reset.
  881. */
  882. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  883. sc->config.txpowlimit, &sc->curtxpow);
  884. /*
  885. * Setup the hardware after reset:
  886. * The receive engine is set going.
  887. * Frame transmit is handled entirely
  888. * in the frame output path; there's nothing to do
  889. * here except setup the interrupt mask.
  890. */
  891. if (ath_startrecv(sc) != 0) {
  892. ath_err(common, "Unable to start recv logic\n");
  893. r = -EIO;
  894. spin_unlock_bh(&sc->sc_pcu_lock);
  895. goto mutex_unlock;
  896. }
  897. spin_unlock_bh(&sc->sc_pcu_lock);
  898. /* Setup our intr mask. */
  899. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  900. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  901. ATH9K_INT_GLOBAL;
  902. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  903. ah->imask |= ATH9K_INT_RXHP |
  904. ATH9K_INT_RXLP |
  905. ATH9K_INT_BB_WATCHDOG;
  906. else
  907. ah->imask |= ATH9K_INT_RX;
  908. ah->imask |= ATH9K_INT_GTT;
  909. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  910. ah->imask |= ATH9K_INT_CST;
  911. sc->sc_flags &= ~SC_OP_INVALID;
  912. sc->sc_ah->is_monitoring = false;
  913. /* Disable BMISS interrupt when we're not associated */
  914. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  915. ath9k_hw_set_interrupts(ah, ah->imask);
  916. ieee80211_wake_queues(hw);
  917. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  918. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  919. !ah->btcoex_hw.enabled) {
  920. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  921. AR_STOMP_LOW_WLAN_WGHT);
  922. ath9k_hw_btcoex_enable(ah);
  923. if (common->bus_ops->bt_coex_prep)
  924. common->bus_ops->bt_coex_prep(common);
  925. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  926. ath9k_btcoex_timer_resume(sc);
  927. }
  928. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  929. common->bus_ops->extn_synch_en(common);
  930. mutex_unlock:
  931. mutex_unlock(&sc->mutex);
  932. ath9k_ps_restore(sc);
  933. return r;
  934. }
  935. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  936. {
  937. struct ath_softc *sc = hw->priv;
  938. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  939. struct ath_tx_control txctl;
  940. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  941. if (sc->ps_enabled) {
  942. /*
  943. * mac80211 does not set PM field for normal data frames, so we
  944. * need to update that based on the current PS mode.
  945. */
  946. if (ieee80211_is_data(hdr->frame_control) &&
  947. !ieee80211_is_nullfunc(hdr->frame_control) &&
  948. !ieee80211_has_pm(hdr->frame_control)) {
  949. ath_dbg(common, ATH_DBG_PS,
  950. "Add PM=1 for a TX frame while in PS mode\n");
  951. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  952. }
  953. }
  954. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  955. /*
  956. * We are using PS-Poll and mac80211 can request TX while in
  957. * power save mode. Need to wake up hardware for the TX to be
  958. * completed and if needed, also for RX of buffered frames.
  959. */
  960. ath9k_ps_wakeup(sc);
  961. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  962. ath9k_hw_setrxabort(sc->sc_ah, 0);
  963. if (ieee80211_is_pspoll(hdr->frame_control)) {
  964. ath_dbg(common, ATH_DBG_PS,
  965. "Sending PS-Poll to pick a buffered frame\n");
  966. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  967. } else {
  968. ath_dbg(common, ATH_DBG_PS,
  969. "Wake up to complete TX\n");
  970. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  971. }
  972. /*
  973. * The actual restore operation will happen only after
  974. * the sc_flags bit is cleared. We are just dropping
  975. * the ps_usecount here.
  976. */
  977. ath9k_ps_restore(sc);
  978. }
  979. memset(&txctl, 0, sizeof(struct ath_tx_control));
  980. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  981. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  982. if (ath_tx_start(hw, skb, &txctl) != 0) {
  983. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  984. goto exit;
  985. }
  986. return;
  987. exit:
  988. dev_kfree_skb_any(skb);
  989. }
  990. static void ath9k_stop(struct ieee80211_hw *hw)
  991. {
  992. struct ath_softc *sc = hw->priv;
  993. struct ath_hw *ah = sc->sc_ah;
  994. struct ath_common *common = ath9k_hw_common(ah);
  995. mutex_lock(&sc->mutex);
  996. cancel_delayed_work_sync(&sc->tx_complete_work);
  997. cancel_delayed_work_sync(&sc->hw_pll_work);
  998. cancel_work_sync(&sc->paprd_work);
  999. cancel_work_sync(&sc->hw_check_work);
  1000. if (sc->sc_flags & SC_OP_INVALID) {
  1001. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1002. mutex_unlock(&sc->mutex);
  1003. return;
  1004. }
  1005. /* Ensure HW is awake when we try to shut it down. */
  1006. ath9k_ps_wakeup(sc);
  1007. if (ah->btcoex_hw.enabled) {
  1008. ath9k_hw_btcoex_disable(ah);
  1009. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1010. ath9k_btcoex_timer_pause(sc);
  1011. }
  1012. spin_lock_bh(&sc->sc_pcu_lock);
  1013. /* prevent tasklets to enable interrupts once we disable them */
  1014. ah->imask &= ~ATH9K_INT_GLOBAL;
  1015. /* make sure h/w will not generate any interrupt
  1016. * before setting the invalid flag. */
  1017. ath9k_hw_disable_interrupts(ah);
  1018. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1019. ath_drain_all_txq(sc, false);
  1020. ath_stoprecv(sc);
  1021. ath9k_hw_phy_disable(ah);
  1022. } else
  1023. sc->rx.rxlink = NULL;
  1024. if (sc->rx.frag) {
  1025. dev_kfree_skb_any(sc->rx.frag);
  1026. sc->rx.frag = NULL;
  1027. }
  1028. /* disable HAL and put h/w to sleep */
  1029. ath9k_hw_disable(ah);
  1030. spin_unlock_bh(&sc->sc_pcu_lock);
  1031. /* we can now sync irq and kill any running tasklets, since we already
  1032. * disabled interrupts and not holding a spin lock */
  1033. synchronize_irq(sc->irq);
  1034. tasklet_kill(&sc->intr_tq);
  1035. tasklet_kill(&sc->bcon_tasklet);
  1036. ath9k_ps_restore(sc);
  1037. sc->ps_idle = true;
  1038. ath_radio_disable(sc, hw);
  1039. sc->sc_flags |= SC_OP_INVALID;
  1040. mutex_unlock(&sc->mutex);
  1041. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1042. }
  1043. bool ath9k_uses_beacons(int type)
  1044. {
  1045. switch (type) {
  1046. case NL80211_IFTYPE_AP:
  1047. case NL80211_IFTYPE_ADHOC:
  1048. case NL80211_IFTYPE_MESH_POINT:
  1049. return true;
  1050. default:
  1051. return false;
  1052. }
  1053. }
  1054. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1055. struct ieee80211_vif *vif)
  1056. {
  1057. struct ath_vif *avp = (void *)vif->drv_priv;
  1058. ath9k_set_beaconing_status(sc, false);
  1059. ath_beacon_return(sc, avp);
  1060. ath9k_set_beaconing_status(sc, true);
  1061. sc->sc_flags &= ~SC_OP_BEACONS;
  1062. }
  1063. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1064. {
  1065. struct ath9k_vif_iter_data *iter_data = data;
  1066. int i;
  1067. if (iter_data->hw_macaddr)
  1068. for (i = 0; i < ETH_ALEN; i++)
  1069. iter_data->mask[i] &=
  1070. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1071. switch (vif->type) {
  1072. case NL80211_IFTYPE_AP:
  1073. iter_data->naps++;
  1074. break;
  1075. case NL80211_IFTYPE_STATION:
  1076. iter_data->nstations++;
  1077. break;
  1078. case NL80211_IFTYPE_ADHOC:
  1079. iter_data->nadhocs++;
  1080. break;
  1081. case NL80211_IFTYPE_MESH_POINT:
  1082. iter_data->nmeshes++;
  1083. break;
  1084. case NL80211_IFTYPE_WDS:
  1085. iter_data->nwds++;
  1086. break;
  1087. default:
  1088. iter_data->nothers++;
  1089. break;
  1090. }
  1091. }
  1092. /* Called with sc->mutex held. */
  1093. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1094. struct ieee80211_vif *vif,
  1095. struct ath9k_vif_iter_data *iter_data)
  1096. {
  1097. struct ath_softc *sc = hw->priv;
  1098. struct ath_hw *ah = sc->sc_ah;
  1099. struct ath_common *common = ath9k_hw_common(ah);
  1100. /*
  1101. * Use the hardware MAC address as reference, the hardware uses it
  1102. * together with the BSSID mask when matching addresses.
  1103. */
  1104. memset(iter_data, 0, sizeof(*iter_data));
  1105. iter_data->hw_macaddr = common->macaddr;
  1106. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1107. if (vif)
  1108. ath9k_vif_iter(iter_data, vif->addr, vif);
  1109. /* Get list of all active MAC addresses */
  1110. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1111. iter_data);
  1112. }
  1113. /* Called with sc->mutex held. */
  1114. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1115. struct ieee80211_vif *vif)
  1116. {
  1117. struct ath_softc *sc = hw->priv;
  1118. struct ath_hw *ah = sc->sc_ah;
  1119. struct ath_common *common = ath9k_hw_common(ah);
  1120. struct ath9k_vif_iter_data iter_data;
  1121. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1122. /* Set BSSID mask. */
  1123. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1124. ath_hw_setbssidmask(common);
  1125. /* Set op-mode & TSF */
  1126. if (iter_data.naps > 0) {
  1127. ath9k_hw_set_tsfadjust(ah, 1);
  1128. sc->sc_flags |= SC_OP_TSF_RESET;
  1129. ah->opmode = NL80211_IFTYPE_AP;
  1130. } else {
  1131. ath9k_hw_set_tsfadjust(ah, 0);
  1132. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1133. if (iter_data.nmeshes)
  1134. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1135. else if (iter_data.nwds)
  1136. ah->opmode = NL80211_IFTYPE_AP;
  1137. else if (iter_data.nadhocs)
  1138. ah->opmode = NL80211_IFTYPE_ADHOC;
  1139. else
  1140. ah->opmode = NL80211_IFTYPE_STATION;
  1141. }
  1142. /*
  1143. * Enable MIB interrupts when there are hardware phy counters.
  1144. */
  1145. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1146. if (ah->config.enable_ani)
  1147. ah->imask |= ATH9K_INT_MIB;
  1148. ah->imask |= ATH9K_INT_TSFOOR;
  1149. } else {
  1150. ah->imask &= ~ATH9K_INT_MIB;
  1151. ah->imask &= ~ATH9K_INT_TSFOOR;
  1152. }
  1153. ath9k_hw_set_interrupts(ah, ah->imask);
  1154. /* Set up ANI */
  1155. if (iter_data.naps > 0) {
  1156. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1157. if (!common->disable_ani) {
  1158. sc->sc_flags |= SC_OP_ANI_RUN;
  1159. ath_start_ani(common);
  1160. }
  1161. } else {
  1162. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1163. del_timer_sync(&common->ani.timer);
  1164. }
  1165. }
  1166. /* Called with sc->mutex held, vif counts set up properly. */
  1167. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1168. struct ieee80211_vif *vif)
  1169. {
  1170. struct ath_softc *sc = hw->priv;
  1171. ath9k_calculate_summary_state(hw, vif);
  1172. if (ath9k_uses_beacons(vif->type)) {
  1173. int error;
  1174. /* This may fail because upper levels do not have beacons
  1175. * properly configured yet. That's OK, we assume it
  1176. * will be properly configured and then we will be notified
  1177. * in the info_changed method and set up beacons properly
  1178. * there.
  1179. */
  1180. ath9k_set_beaconing_status(sc, false);
  1181. error = ath_beacon_alloc(sc, vif);
  1182. if (!error)
  1183. ath_beacon_config(sc, vif);
  1184. ath9k_set_beaconing_status(sc, true);
  1185. }
  1186. }
  1187. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1188. struct ieee80211_vif *vif)
  1189. {
  1190. struct ath_softc *sc = hw->priv;
  1191. struct ath_hw *ah = sc->sc_ah;
  1192. struct ath_common *common = ath9k_hw_common(ah);
  1193. int ret = 0;
  1194. ath9k_ps_wakeup(sc);
  1195. mutex_lock(&sc->mutex);
  1196. switch (vif->type) {
  1197. case NL80211_IFTYPE_STATION:
  1198. case NL80211_IFTYPE_WDS:
  1199. case NL80211_IFTYPE_ADHOC:
  1200. case NL80211_IFTYPE_AP:
  1201. case NL80211_IFTYPE_MESH_POINT:
  1202. break;
  1203. default:
  1204. ath_err(common, "Interface type %d not yet supported\n",
  1205. vif->type);
  1206. ret = -EOPNOTSUPP;
  1207. goto out;
  1208. }
  1209. if (ath9k_uses_beacons(vif->type)) {
  1210. if (sc->nbcnvifs >= ATH_BCBUF) {
  1211. ath_err(common, "Not enough beacon buffers when adding"
  1212. " new interface of type: %i\n",
  1213. vif->type);
  1214. ret = -ENOBUFS;
  1215. goto out;
  1216. }
  1217. }
  1218. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1219. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1220. sc->nvifs > 0)) {
  1221. ath_err(common, "Cannot create ADHOC interface when other"
  1222. " interfaces already exist.\n");
  1223. ret = -EINVAL;
  1224. goto out;
  1225. }
  1226. ath_dbg(common, ATH_DBG_CONFIG,
  1227. "Attach a VIF of type: %d\n", vif->type);
  1228. sc->nvifs++;
  1229. ath9k_do_vif_add_setup(hw, vif);
  1230. out:
  1231. mutex_unlock(&sc->mutex);
  1232. ath9k_ps_restore(sc);
  1233. return ret;
  1234. }
  1235. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1236. struct ieee80211_vif *vif,
  1237. enum nl80211_iftype new_type,
  1238. bool p2p)
  1239. {
  1240. struct ath_softc *sc = hw->priv;
  1241. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1242. int ret = 0;
  1243. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1244. mutex_lock(&sc->mutex);
  1245. ath9k_ps_wakeup(sc);
  1246. /* See if new interface type is valid. */
  1247. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1248. (sc->nvifs > 1)) {
  1249. ath_err(common, "When using ADHOC, it must be the only"
  1250. " interface.\n");
  1251. ret = -EINVAL;
  1252. goto out;
  1253. }
  1254. if (ath9k_uses_beacons(new_type) &&
  1255. !ath9k_uses_beacons(vif->type)) {
  1256. if (sc->nbcnvifs >= ATH_BCBUF) {
  1257. ath_err(common, "No beacon slot available\n");
  1258. ret = -ENOBUFS;
  1259. goto out;
  1260. }
  1261. }
  1262. /* Clean up old vif stuff */
  1263. if (ath9k_uses_beacons(vif->type))
  1264. ath9k_reclaim_beacon(sc, vif);
  1265. /* Add new settings */
  1266. vif->type = new_type;
  1267. vif->p2p = p2p;
  1268. ath9k_do_vif_add_setup(hw, vif);
  1269. out:
  1270. ath9k_ps_restore(sc);
  1271. mutex_unlock(&sc->mutex);
  1272. return ret;
  1273. }
  1274. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1275. struct ieee80211_vif *vif)
  1276. {
  1277. struct ath_softc *sc = hw->priv;
  1278. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1279. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1280. ath9k_ps_wakeup(sc);
  1281. mutex_lock(&sc->mutex);
  1282. sc->nvifs--;
  1283. /* Reclaim beacon resources */
  1284. if (ath9k_uses_beacons(vif->type))
  1285. ath9k_reclaim_beacon(sc, vif);
  1286. ath9k_calculate_summary_state(hw, NULL);
  1287. mutex_unlock(&sc->mutex);
  1288. ath9k_ps_restore(sc);
  1289. }
  1290. static void ath9k_enable_ps(struct ath_softc *sc)
  1291. {
  1292. struct ath_hw *ah = sc->sc_ah;
  1293. sc->ps_enabled = true;
  1294. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1295. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1296. ah->imask |= ATH9K_INT_TIM_TIMER;
  1297. ath9k_hw_set_interrupts(ah, ah->imask);
  1298. }
  1299. ath9k_hw_setrxabort(ah, 1);
  1300. }
  1301. }
  1302. static void ath9k_disable_ps(struct ath_softc *sc)
  1303. {
  1304. struct ath_hw *ah = sc->sc_ah;
  1305. sc->ps_enabled = false;
  1306. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1307. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1308. ath9k_hw_setrxabort(ah, 0);
  1309. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1310. PS_WAIT_FOR_CAB |
  1311. PS_WAIT_FOR_PSPOLL_DATA |
  1312. PS_WAIT_FOR_TX_ACK);
  1313. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1314. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1315. ath9k_hw_set_interrupts(ah, ah->imask);
  1316. }
  1317. }
  1318. }
  1319. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1320. {
  1321. struct ath_softc *sc = hw->priv;
  1322. struct ath_hw *ah = sc->sc_ah;
  1323. struct ath_common *common = ath9k_hw_common(ah);
  1324. struct ieee80211_conf *conf = &hw->conf;
  1325. bool disable_radio = false;
  1326. mutex_lock(&sc->mutex);
  1327. /*
  1328. * Leave this as the first check because we need to turn on the
  1329. * radio if it was disabled before prior to processing the rest
  1330. * of the changes. Likewise we must only disable the radio towards
  1331. * the end.
  1332. */
  1333. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1334. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1335. if (!sc->ps_idle) {
  1336. ath_radio_enable(sc, hw);
  1337. ath_dbg(common, ATH_DBG_CONFIG,
  1338. "not-idle: enabling radio\n");
  1339. } else {
  1340. disable_radio = true;
  1341. }
  1342. }
  1343. /*
  1344. * We just prepare to enable PS. We have to wait until our AP has
  1345. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1346. * those ACKs and end up retransmitting the same null data frames.
  1347. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1348. */
  1349. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1350. unsigned long flags;
  1351. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1352. if (conf->flags & IEEE80211_CONF_PS)
  1353. ath9k_enable_ps(sc);
  1354. else
  1355. ath9k_disable_ps(sc);
  1356. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1357. }
  1358. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1359. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1360. ath_dbg(common, ATH_DBG_CONFIG,
  1361. "Monitor mode is enabled\n");
  1362. sc->sc_ah->is_monitoring = true;
  1363. } else {
  1364. ath_dbg(common, ATH_DBG_CONFIG,
  1365. "Monitor mode is disabled\n");
  1366. sc->sc_ah->is_monitoring = false;
  1367. }
  1368. }
  1369. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1370. struct ieee80211_channel *curchan = hw->conf.channel;
  1371. int pos = curchan->hw_value;
  1372. int old_pos = -1;
  1373. unsigned long flags;
  1374. if (ah->curchan)
  1375. old_pos = ah->curchan - &ah->channels[0];
  1376. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1377. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1378. else
  1379. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1380. ath_dbg(common, ATH_DBG_CONFIG,
  1381. "Set channel: %d MHz type: %d\n",
  1382. curchan->center_freq, conf->channel_type);
  1383. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1384. curchan, conf->channel_type);
  1385. /* update survey stats for the old channel before switching */
  1386. spin_lock_irqsave(&common->cc_lock, flags);
  1387. ath_update_survey_stats(sc);
  1388. spin_unlock_irqrestore(&common->cc_lock, flags);
  1389. /*
  1390. * If the operating channel changes, change the survey in-use flags
  1391. * along with it.
  1392. * Reset the survey data for the new channel, unless we're switching
  1393. * back to the operating channel from an off-channel operation.
  1394. */
  1395. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1396. sc->cur_survey != &sc->survey[pos]) {
  1397. if (sc->cur_survey)
  1398. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1399. sc->cur_survey = &sc->survey[pos];
  1400. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1401. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1402. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1403. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1404. }
  1405. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1406. ath_err(common, "Unable to set channel\n");
  1407. mutex_unlock(&sc->mutex);
  1408. return -EINVAL;
  1409. }
  1410. /*
  1411. * The most recent snapshot of channel->noisefloor for the old
  1412. * channel is only available after the hardware reset. Copy it to
  1413. * the survey stats now.
  1414. */
  1415. if (old_pos >= 0)
  1416. ath_update_survey_nf(sc, old_pos);
  1417. }
  1418. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1419. ath_dbg(common, ATH_DBG_CONFIG,
  1420. "Set power: %d\n", conf->power_level);
  1421. sc->config.txpowlimit = 2 * conf->power_level;
  1422. ath9k_ps_wakeup(sc);
  1423. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1424. sc->config.txpowlimit, &sc->curtxpow);
  1425. ath9k_ps_restore(sc);
  1426. }
  1427. if (disable_radio) {
  1428. ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1429. ath_radio_disable(sc, hw);
  1430. }
  1431. mutex_unlock(&sc->mutex);
  1432. return 0;
  1433. }
  1434. #define SUPPORTED_FILTERS \
  1435. (FIF_PROMISC_IN_BSS | \
  1436. FIF_ALLMULTI | \
  1437. FIF_CONTROL | \
  1438. FIF_PSPOLL | \
  1439. FIF_OTHER_BSS | \
  1440. FIF_BCN_PRBRESP_PROMISC | \
  1441. FIF_PROBE_REQ | \
  1442. FIF_FCSFAIL)
  1443. /* FIXME: sc->sc_full_reset ? */
  1444. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1445. unsigned int changed_flags,
  1446. unsigned int *total_flags,
  1447. u64 multicast)
  1448. {
  1449. struct ath_softc *sc = hw->priv;
  1450. u32 rfilt;
  1451. changed_flags &= SUPPORTED_FILTERS;
  1452. *total_flags &= SUPPORTED_FILTERS;
  1453. sc->rx.rxfilter = *total_flags;
  1454. ath9k_ps_wakeup(sc);
  1455. rfilt = ath_calcrxfilter(sc);
  1456. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1457. ath9k_ps_restore(sc);
  1458. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1459. "Set HW RX filter: 0x%x\n", rfilt);
  1460. }
  1461. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1462. struct ieee80211_vif *vif,
  1463. struct ieee80211_sta *sta)
  1464. {
  1465. struct ath_softc *sc = hw->priv;
  1466. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1467. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1468. struct ieee80211_key_conf ps_key = { };
  1469. ath_node_attach(sc, sta);
  1470. if (vif->type != NL80211_IFTYPE_AP &&
  1471. vif->type != NL80211_IFTYPE_AP_VLAN)
  1472. return 0;
  1473. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1474. return 0;
  1475. }
  1476. static void ath9k_del_ps_key(struct ath_softc *sc,
  1477. struct ieee80211_vif *vif,
  1478. struct ieee80211_sta *sta)
  1479. {
  1480. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1481. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1482. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1483. if (!an->ps_key)
  1484. return;
  1485. ath_key_delete(common, &ps_key);
  1486. }
  1487. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1488. struct ieee80211_vif *vif,
  1489. struct ieee80211_sta *sta)
  1490. {
  1491. struct ath_softc *sc = hw->priv;
  1492. ath9k_del_ps_key(sc, vif, sta);
  1493. ath_node_detach(sc, sta);
  1494. return 0;
  1495. }
  1496. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1497. struct ieee80211_vif *vif,
  1498. enum sta_notify_cmd cmd,
  1499. struct ieee80211_sta *sta)
  1500. {
  1501. struct ath_softc *sc = hw->priv;
  1502. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1503. switch (cmd) {
  1504. case STA_NOTIFY_SLEEP:
  1505. an->sleeping = true;
  1506. if (ath_tx_aggr_sleep(sc, an))
  1507. ieee80211_sta_set_tim(sta);
  1508. break;
  1509. case STA_NOTIFY_AWAKE:
  1510. an->sleeping = false;
  1511. ath_tx_aggr_wakeup(sc, an);
  1512. break;
  1513. }
  1514. }
  1515. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1516. const struct ieee80211_tx_queue_params *params)
  1517. {
  1518. struct ath_softc *sc = hw->priv;
  1519. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1520. struct ath_txq *txq;
  1521. struct ath9k_tx_queue_info qi;
  1522. int ret = 0;
  1523. if (queue >= WME_NUM_AC)
  1524. return 0;
  1525. txq = sc->tx.txq_map[queue];
  1526. ath9k_ps_wakeup(sc);
  1527. mutex_lock(&sc->mutex);
  1528. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1529. qi.tqi_aifs = params->aifs;
  1530. qi.tqi_cwmin = params->cw_min;
  1531. qi.tqi_cwmax = params->cw_max;
  1532. qi.tqi_burstTime = params->txop;
  1533. ath_dbg(common, ATH_DBG_CONFIG,
  1534. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1535. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1536. params->cw_max, params->txop);
  1537. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1538. if (ret)
  1539. ath_err(common, "TXQ Update failed\n");
  1540. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1541. if (queue == WME_AC_BE && !ret)
  1542. ath_beaconq_config(sc);
  1543. mutex_unlock(&sc->mutex);
  1544. ath9k_ps_restore(sc);
  1545. return ret;
  1546. }
  1547. static int ath9k_set_key(struct ieee80211_hw *hw,
  1548. enum set_key_cmd cmd,
  1549. struct ieee80211_vif *vif,
  1550. struct ieee80211_sta *sta,
  1551. struct ieee80211_key_conf *key)
  1552. {
  1553. struct ath_softc *sc = hw->priv;
  1554. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1555. int ret = 0;
  1556. if (ath9k_modparam_nohwcrypt)
  1557. return -ENOSPC;
  1558. if (vif->type == NL80211_IFTYPE_ADHOC &&
  1559. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1560. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1561. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1562. /*
  1563. * For now, disable hw crypto for the RSN IBSS group keys. This
  1564. * could be optimized in the future to use a modified key cache
  1565. * design to support per-STA RX GTK, but until that gets
  1566. * implemented, use of software crypto for group addressed
  1567. * frames is a acceptable to allow RSN IBSS to be used.
  1568. */
  1569. return -EOPNOTSUPP;
  1570. }
  1571. mutex_lock(&sc->mutex);
  1572. ath9k_ps_wakeup(sc);
  1573. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1574. switch (cmd) {
  1575. case SET_KEY:
  1576. if (sta)
  1577. ath9k_del_ps_key(sc, vif, sta);
  1578. ret = ath_key_config(common, vif, sta, key);
  1579. if (ret >= 0) {
  1580. key->hw_key_idx = ret;
  1581. /* push IV and Michael MIC generation to stack */
  1582. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1583. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1584. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1585. if (sc->sc_ah->sw_mgmt_crypto &&
  1586. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1587. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1588. ret = 0;
  1589. }
  1590. break;
  1591. case DISABLE_KEY:
  1592. ath_key_delete(common, key);
  1593. break;
  1594. default:
  1595. ret = -EINVAL;
  1596. }
  1597. ath9k_ps_restore(sc);
  1598. mutex_unlock(&sc->mutex);
  1599. return ret;
  1600. }
  1601. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1602. {
  1603. struct ath_softc *sc = data;
  1604. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1605. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1606. struct ath_vif *avp = (void *)vif->drv_priv;
  1607. /*
  1608. * Skip iteration if primary station vif's bss info
  1609. * was not changed
  1610. */
  1611. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1612. return;
  1613. if (bss_conf->assoc) {
  1614. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1615. avp->primary_sta_vif = true;
  1616. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1617. common->curaid = bss_conf->aid;
  1618. ath9k_hw_write_associd(sc->sc_ah);
  1619. ath_dbg(common, ATH_DBG_CONFIG,
  1620. "Bss Info ASSOC %d, bssid: %pM\n",
  1621. bss_conf->aid, common->curbssid);
  1622. ath_beacon_config(sc, vif);
  1623. /*
  1624. * Request a re-configuration of Beacon related timers
  1625. * on the receipt of the first Beacon frame (i.e.,
  1626. * after time sync with the AP).
  1627. */
  1628. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1629. /* Reset rssi stats */
  1630. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1631. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1632. if (!common->disable_ani) {
  1633. sc->sc_flags |= SC_OP_ANI_RUN;
  1634. ath_start_ani(common);
  1635. }
  1636. }
  1637. }
  1638. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1639. {
  1640. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1641. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1642. struct ath_vif *avp = (void *)vif->drv_priv;
  1643. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1644. return;
  1645. /* Reconfigure bss info */
  1646. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1647. ath_dbg(common, ATH_DBG_CONFIG,
  1648. "Bss Info DISASSOC %d, bssid %pM\n",
  1649. common->curaid, common->curbssid);
  1650. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1651. avp->primary_sta_vif = false;
  1652. memset(common->curbssid, 0, ETH_ALEN);
  1653. common->curaid = 0;
  1654. }
  1655. ieee80211_iterate_active_interfaces_atomic(
  1656. sc->hw, ath9k_bss_iter, sc);
  1657. /*
  1658. * None of station vifs are associated.
  1659. * Clear bssid & aid
  1660. */
  1661. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1662. ath9k_hw_write_associd(sc->sc_ah);
  1663. /* Stop ANI */
  1664. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1665. del_timer_sync(&common->ani.timer);
  1666. }
  1667. }
  1668. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1669. struct ieee80211_vif *vif,
  1670. struct ieee80211_bss_conf *bss_conf,
  1671. u32 changed)
  1672. {
  1673. struct ath_softc *sc = hw->priv;
  1674. struct ath_hw *ah = sc->sc_ah;
  1675. struct ath_common *common = ath9k_hw_common(ah);
  1676. struct ath_vif *avp = (void *)vif->drv_priv;
  1677. int slottime;
  1678. int error;
  1679. ath9k_ps_wakeup(sc);
  1680. mutex_lock(&sc->mutex);
  1681. if (changed & BSS_CHANGED_BSSID) {
  1682. ath9k_config_bss(sc, vif);
  1683. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1684. common->curbssid, common->curaid);
  1685. }
  1686. if (changed & BSS_CHANGED_IBSS) {
  1687. /* There can be only one vif available */
  1688. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1689. common->curaid = bss_conf->aid;
  1690. ath9k_hw_write_associd(sc->sc_ah);
  1691. if (bss_conf->ibss_joined) {
  1692. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1693. if (!common->disable_ani) {
  1694. sc->sc_flags |= SC_OP_ANI_RUN;
  1695. ath_start_ani(common);
  1696. }
  1697. } else {
  1698. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1699. del_timer_sync(&common->ani.timer);
  1700. }
  1701. }
  1702. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1703. if ((changed & BSS_CHANGED_BEACON) ||
  1704. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1705. ath9k_set_beaconing_status(sc, false);
  1706. error = ath_beacon_alloc(sc, vif);
  1707. if (!error)
  1708. ath_beacon_config(sc, vif);
  1709. ath9k_set_beaconing_status(sc, true);
  1710. }
  1711. if (changed & BSS_CHANGED_ERP_SLOT) {
  1712. if (bss_conf->use_short_slot)
  1713. slottime = 9;
  1714. else
  1715. slottime = 20;
  1716. if (vif->type == NL80211_IFTYPE_AP) {
  1717. /*
  1718. * Defer update, so that connected stations can adjust
  1719. * their settings at the same time.
  1720. * See beacon.c for more details
  1721. */
  1722. sc->beacon.slottime = slottime;
  1723. sc->beacon.updateslot = UPDATE;
  1724. } else {
  1725. ah->slottime = slottime;
  1726. ath9k_hw_init_global_settings(ah);
  1727. }
  1728. }
  1729. /* Disable transmission of beacons */
  1730. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1731. !bss_conf->enable_beacon) {
  1732. ath9k_set_beaconing_status(sc, false);
  1733. avp->is_bslot_active = false;
  1734. ath9k_set_beaconing_status(sc, true);
  1735. }
  1736. if (changed & BSS_CHANGED_BEACON_INT) {
  1737. /*
  1738. * In case of AP mode, the HW TSF has to be reset
  1739. * when the beacon interval changes.
  1740. */
  1741. if (vif->type == NL80211_IFTYPE_AP) {
  1742. sc->sc_flags |= SC_OP_TSF_RESET;
  1743. ath9k_set_beaconing_status(sc, false);
  1744. error = ath_beacon_alloc(sc, vif);
  1745. if (!error)
  1746. ath_beacon_config(sc, vif);
  1747. ath9k_set_beaconing_status(sc, true);
  1748. } else
  1749. ath_beacon_config(sc, vif);
  1750. }
  1751. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1752. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1753. bss_conf->use_short_preamble);
  1754. if (bss_conf->use_short_preamble)
  1755. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1756. else
  1757. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1758. }
  1759. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1760. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1761. bss_conf->use_cts_prot);
  1762. if (bss_conf->use_cts_prot &&
  1763. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1764. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1765. else
  1766. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1767. }
  1768. mutex_unlock(&sc->mutex);
  1769. ath9k_ps_restore(sc);
  1770. }
  1771. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1772. {
  1773. struct ath_softc *sc = hw->priv;
  1774. u64 tsf;
  1775. mutex_lock(&sc->mutex);
  1776. ath9k_ps_wakeup(sc);
  1777. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1778. ath9k_ps_restore(sc);
  1779. mutex_unlock(&sc->mutex);
  1780. return tsf;
  1781. }
  1782. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1783. {
  1784. struct ath_softc *sc = hw->priv;
  1785. mutex_lock(&sc->mutex);
  1786. ath9k_ps_wakeup(sc);
  1787. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1788. ath9k_ps_restore(sc);
  1789. mutex_unlock(&sc->mutex);
  1790. }
  1791. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1792. {
  1793. struct ath_softc *sc = hw->priv;
  1794. mutex_lock(&sc->mutex);
  1795. ath9k_ps_wakeup(sc);
  1796. ath9k_hw_reset_tsf(sc->sc_ah);
  1797. ath9k_ps_restore(sc);
  1798. mutex_unlock(&sc->mutex);
  1799. }
  1800. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1801. struct ieee80211_vif *vif,
  1802. enum ieee80211_ampdu_mlme_action action,
  1803. struct ieee80211_sta *sta,
  1804. u16 tid, u16 *ssn, u8 buf_size)
  1805. {
  1806. struct ath_softc *sc = hw->priv;
  1807. int ret = 0;
  1808. local_bh_disable();
  1809. switch (action) {
  1810. case IEEE80211_AMPDU_RX_START:
  1811. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1812. ret = -ENOTSUPP;
  1813. break;
  1814. case IEEE80211_AMPDU_RX_STOP:
  1815. break;
  1816. case IEEE80211_AMPDU_TX_START:
  1817. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1818. return -EOPNOTSUPP;
  1819. ath9k_ps_wakeup(sc);
  1820. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1821. if (!ret)
  1822. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1823. ath9k_ps_restore(sc);
  1824. break;
  1825. case IEEE80211_AMPDU_TX_STOP:
  1826. ath9k_ps_wakeup(sc);
  1827. ath_tx_aggr_stop(sc, sta, tid);
  1828. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1829. ath9k_ps_restore(sc);
  1830. break;
  1831. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1832. ath9k_ps_wakeup(sc);
  1833. ath_tx_aggr_resume(sc, sta, tid);
  1834. ath9k_ps_restore(sc);
  1835. break;
  1836. default:
  1837. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1838. }
  1839. local_bh_enable();
  1840. return ret;
  1841. }
  1842. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1843. struct survey_info *survey)
  1844. {
  1845. struct ath_softc *sc = hw->priv;
  1846. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1847. struct ieee80211_supported_band *sband;
  1848. struct ieee80211_channel *chan;
  1849. unsigned long flags;
  1850. int pos;
  1851. spin_lock_irqsave(&common->cc_lock, flags);
  1852. if (idx == 0)
  1853. ath_update_survey_stats(sc);
  1854. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1855. if (sband && idx >= sband->n_channels) {
  1856. idx -= sband->n_channels;
  1857. sband = NULL;
  1858. }
  1859. if (!sband)
  1860. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1861. if (!sband || idx >= sband->n_channels) {
  1862. spin_unlock_irqrestore(&common->cc_lock, flags);
  1863. return -ENOENT;
  1864. }
  1865. chan = &sband->channels[idx];
  1866. pos = chan->hw_value;
  1867. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1868. survey->channel = chan;
  1869. spin_unlock_irqrestore(&common->cc_lock, flags);
  1870. return 0;
  1871. }
  1872. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1873. {
  1874. struct ath_softc *sc = hw->priv;
  1875. struct ath_hw *ah = sc->sc_ah;
  1876. mutex_lock(&sc->mutex);
  1877. ah->coverage_class = coverage_class;
  1878. ath9k_hw_init_global_settings(ah);
  1879. mutex_unlock(&sc->mutex);
  1880. }
  1881. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1882. {
  1883. struct ath_softc *sc = hw->priv;
  1884. struct ath_hw *ah = sc->sc_ah;
  1885. struct ath_common *common = ath9k_hw_common(ah);
  1886. int timeout = 200; /* ms */
  1887. int i, j;
  1888. bool drain_txq;
  1889. mutex_lock(&sc->mutex);
  1890. cancel_delayed_work_sync(&sc->tx_complete_work);
  1891. if (sc->sc_flags & SC_OP_INVALID) {
  1892. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1893. mutex_unlock(&sc->mutex);
  1894. return;
  1895. }
  1896. if (drop)
  1897. timeout = 1;
  1898. for (j = 0; j < timeout; j++) {
  1899. bool npend = false;
  1900. if (j)
  1901. usleep_range(1000, 2000);
  1902. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1903. if (!ATH_TXQ_SETUP(sc, i))
  1904. continue;
  1905. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1906. if (npend)
  1907. break;
  1908. }
  1909. if (!npend)
  1910. goto out;
  1911. }
  1912. ath9k_ps_wakeup(sc);
  1913. spin_lock_bh(&sc->sc_pcu_lock);
  1914. drain_txq = ath_drain_all_txq(sc, false);
  1915. spin_unlock_bh(&sc->sc_pcu_lock);
  1916. if (!drain_txq)
  1917. ath_reset(sc, false);
  1918. ath9k_ps_restore(sc);
  1919. ieee80211_wake_queues(hw);
  1920. out:
  1921. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1922. mutex_unlock(&sc->mutex);
  1923. }
  1924. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1925. {
  1926. struct ath_softc *sc = hw->priv;
  1927. int i;
  1928. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1929. if (!ATH_TXQ_SETUP(sc, i))
  1930. continue;
  1931. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1932. return true;
  1933. }
  1934. return false;
  1935. }
  1936. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1937. {
  1938. struct ath_softc *sc = hw->priv;
  1939. struct ath_hw *ah = sc->sc_ah;
  1940. struct ieee80211_vif *vif;
  1941. struct ath_vif *avp;
  1942. struct ath_buf *bf;
  1943. struct ath_tx_status ts;
  1944. int status;
  1945. vif = sc->beacon.bslot[0];
  1946. if (!vif)
  1947. return 0;
  1948. avp = (void *)vif->drv_priv;
  1949. if (!avp->is_bslot_active)
  1950. return 0;
  1951. if (!sc->beacon.tx_processed) {
  1952. tasklet_disable(&sc->bcon_tasklet);
  1953. bf = avp->av_bcbuf;
  1954. if (!bf || !bf->bf_mpdu)
  1955. goto skip;
  1956. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1957. if (status == -EINPROGRESS)
  1958. goto skip;
  1959. sc->beacon.tx_processed = true;
  1960. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1961. skip:
  1962. tasklet_enable(&sc->bcon_tasklet);
  1963. }
  1964. return sc->beacon.tx_last;
  1965. }
  1966. struct ieee80211_ops ath9k_ops = {
  1967. .tx = ath9k_tx,
  1968. .start = ath9k_start,
  1969. .stop = ath9k_stop,
  1970. .add_interface = ath9k_add_interface,
  1971. .change_interface = ath9k_change_interface,
  1972. .remove_interface = ath9k_remove_interface,
  1973. .config = ath9k_config,
  1974. .configure_filter = ath9k_configure_filter,
  1975. .sta_add = ath9k_sta_add,
  1976. .sta_remove = ath9k_sta_remove,
  1977. .sta_notify = ath9k_sta_notify,
  1978. .conf_tx = ath9k_conf_tx,
  1979. .bss_info_changed = ath9k_bss_info_changed,
  1980. .set_key = ath9k_set_key,
  1981. .get_tsf = ath9k_get_tsf,
  1982. .set_tsf = ath9k_set_tsf,
  1983. .reset_tsf = ath9k_reset_tsf,
  1984. .ampdu_action = ath9k_ampdu_action,
  1985. .get_survey = ath9k_get_survey,
  1986. .rfkill_poll = ath9k_rfkill_poll_state,
  1987. .set_coverage_class = ath9k_set_coverage_class,
  1988. .flush = ath9k_flush,
  1989. .tx_frames_pending = ath9k_tx_frames_pending,
  1990. .tx_last_beacon = ath9k_tx_last_beacon,
  1991. };