board-bockw.c 9.8 KB

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  1. /*
  2. * Bock-W board support
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. * Copyright (C) 2013 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/mfd/tmio.h>
  22. #include <linux/mmc/host.h>
  23. #include <linux/mmc/sh_mobile_sdhi.h>
  24. #include <linux/mmc/sh_mmcif.h>
  25. #include <linux/mtd/partitions.h>
  26. #include <linux/pinctrl/machine.h>
  27. #include <linux/platform_data/usb-rcar-phy.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/regulator/fixed.h>
  30. #include <linux/regulator/machine.h>
  31. #include <linux/smsc911x.h>
  32. #include <linux/spi/spi.h>
  33. #include <linux/spi/flash.h>
  34. #include <media/soc_camera.h>
  35. #include <mach/common.h>
  36. #include <mach/irqs.h>
  37. #include <mach/r8a7778.h>
  38. #include <asm/mach/arch.h>
  39. /*
  40. * CN9(Upper side) SCIF/RCAN selection
  41. *
  42. * 1,4 3,6
  43. * SW40 SCIF RCAN
  44. * SW41 SCIF RCAN
  45. */
  46. /*
  47. * MMC (CN26) pin
  48. *
  49. * SW6 (D2) 3 pin
  50. * SW7 (D5) ON
  51. * SW8 (D3) 3 pin
  52. * SW10 (D4) 1 pin
  53. * SW12 (CLK) 1 pin
  54. * SW13 (D6) 3 pin
  55. * SW14 (CMD) ON
  56. * SW15 (D6) 1 pin
  57. * SW16 (D0) ON
  58. * SW17 (D1) ON
  59. * SW18 (D7) 3 pin
  60. * SW19 (MMC) 1 pin
  61. */
  62. /* Dummy supplies, where voltage doesn't matter */
  63. static struct regulator_consumer_supply dummy_supplies[] = {
  64. REGULATOR_SUPPLY("vddvario", "smsc911x"),
  65. REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  66. };
  67. static struct smsc911x_platform_config smsc911x_data __initdata = {
  68. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  69. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  70. .flags = SMSC911X_USE_32BIT,
  71. .phy_interface = PHY_INTERFACE_MODE_MII,
  72. };
  73. static struct resource smsc911x_resources[] __initdata = {
  74. DEFINE_RES_MEM(0x18300000, 0x1000),
  75. DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
  76. };
  77. /* USB */
  78. static struct resource usb_phy_resources[] __initdata = {
  79. DEFINE_RES_MEM(0xffe70800, 0x100),
  80. DEFINE_RES_MEM(0xffe76000, 0x100),
  81. };
  82. static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
  83. /* SDHI */
  84. static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
  85. .tmio_caps = MMC_CAP_SD_HIGHSPEED,
  86. .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  87. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
  88. };
  89. static struct resource sdhi0_resources[] __initdata = {
  90. DEFINE_RES_MEM(0xFFE4C000, 0x100),
  91. DEFINE_RES_IRQ(gic_iid(0x77)),
  92. };
  93. /* Ether */
  94. static struct resource ether_resources[] __initdata = {
  95. DEFINE_RES_MEM(0xfde00000, 0x400),
  96. DEFINE_RES_IRQ(gic_iid(0x89)),
  97. };
  98. static struct sh_eth_plat_data ether_platform_data __initdata = {
  99. .phy = 0x01,
  100. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  101. .phy_interface = PHY_INTERFACE_MODE_RMII,
  102. /*
  103. * Although the LINK signal is available on the board, it's connected to
  104. * the link/activity LED output of the PHY, thus the link disappears and
  105. * reappears after each packet. We'd be better off ignoring such signal
  106. * and getting the link state from the PHY indirectly.
  107. */
  108. .no_ether_link = 1,
  109. };
  110. /* I2C */
  111. static struct i2c_board_info i2c0_devices[] = {
  112. {
  113. I2C_BOARD_INFO("rx8581", 0x51),
  114. },
  115. };
  116. /* HSPI*/
  117. static struct mtd_partition m25p80_spi_flash_partitions[] = {
  118. {
  119. .name = "data(spi)",
  120. .size = 0x0100000,
  121. .offset = 0,
  122. },
  123. };
  124. static struct flash_platform_data spi_flash_data = {
  125. .name = "m25p80",
  126. .type = "s25fl008k",
  127. .parts = m25p80_spi_flash_partitions,
  128. .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
  129. };
  130. static struct spi_board_info spi_board_info[] __initdata = {
  131. {
  132. .modalias = "m25p80",
  133. .max_speed_hz = 104000000,
  134. .chip_select = 0,
  135. .bus_num = 0,
  136. .mode = SPI_MODE_0,
  137. .platform_data = &spi_flash_data,
  138. },
  139. };
  140. /* MMC */
  141. static struct resource mmc_resources[] __initdata = {
  142. DEFINE_RES_MEM(0xffe4e000, 0x100),
  143. DEFINE_RES_IRQ(gic_iid(0x5d)),
  144. };
  145. static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
  146. .sup_pclk = 0,
  147. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  148. .caps = MMC_CAP_4_BIT_DATA |
  149. MMC_CAP_8_BIT_DATA |
  150. MMC_CAP_NEEDS_POLL,
  151. };
  152. /* In the default configuration both decoders reside on I2C bus 0 */
  153. #define BOCKW_CAMERA(idx) \
  154. static struct i2c_board_info camera##idx##_info = { \
  155. I2C_BOARD_INFO("ml86v7667", 0x41 + 2 * (idx)), \
  156. }; \
  157. \
  158. static struct soc_camera_link iclink##idx##_ml86v7667 __initdata = { \
  159. .bus_id = idx, \
  160. .i2c_adapter_id = 0, \
  161. .board_info = &camera##idx##_info, \
  162. }
  163. BOCKW_CAMERA(0);
  164. BOCKW_CAMERA(1);
  165. /* VIN */
  166. static struct rcar_vin_platform_data vin_platform_data __initdata = {
  167. .flags = RCAR_VIN_BT656,
  168. };
  169. #define R8A7778_VIN(idx) \
  170. static struct resource vin##idx##_resources[] __initdata = { \
  171. DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000), \
  172. DEFINE_RES_IRQ(gic_iid(0x5a)), \
  173. }; \
  174. \
  175. static struct platform_device_info vin##idx##_info __initdata = { \
  176. .parent = &platform_bus, \
  177. .name = "r8a7778-vin", \
  178. .id = idx, \
  179. .res = vin##idx##_resources, \
  180. .num_res = ARRAY_SIZE(vin##idx##_resources), \
  181. .dma_mask = DMA_BIT_MASK(32), \
  182. .data = &vin_platform_data, \
  183. .size_data = sizeof(vin_platform_data), \
  184. }
  185. R8A7778_VIN(0);
  186. R8A7778_VIN(1);
  187. static const struct pinctrl_map bockw_pinctrl_map[] = {
  188. /* Ether */
  189. PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
  190. "ether_rmii", "ether"),
  191. /* HSPI0 */
  192. PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
  193. "hspi0_a", "hspi0"),
  194. /* MMC */
  195. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
  196. "mmc_data8", "mmc"),
  197. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
  198. "mmc_ctrl", "mmc"),
  199. /* SCIF0 */
  200. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
  201. "scif0_data_a", "scif0"),
  202. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
  203. "scif0_ctrl", "scif0"),
  204. /* USB */
  205. PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
  206. "usb0", "usb0"),
  207. PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
  208. "usb1", "usb1"),
  209. /* SDHI0 */
  210. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  211. "sdhi0_data4", "sdhi0"),
  212. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  213. "sdhi0_ctrl", "sdhi0"),
  214. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  215. "sdhi0_cd", "sdhi0"),
  216. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  217. "sdhi0_wp", "sdhi0"),
  218. /* VIN0 */
  219. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
  220. "vin0_clk", "vin0"),
  221. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
  222. "vin0_data8", "vin0"),
  223. /* VIN1 */
  224. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
  225. "vin1_clk", "vin1"),
  226. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
  227. "vin1_data8", "vin1"),
  228. };
  229. #define FPGA 0x18200000
  230. #define IRQ0MR 0x30
  231. #define PFC 0xfffc0000
  232. #define PUPR4 0x110
  233. static void __init bockw_init(void)
  234. {
  235. void __iomem *base;
  236. r8a7778_clock_init();
  237. r8a7778_init_irq_extpin(1);
  238. r8a7778_add_standard_devices();
  239. platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
  240. ether_resources,
  241. ARRAY_SIZE(ether_resources),
  242. &ether_platform_data,
  243. sizeof(ether_platform_data));
  244. platform_device_register_full(&vin0_info);
  245. /* VIN1 has a pin conflict with Ether */
  246. if (!IS_ENABLED(CONFIG_SH_ETH))
  247. platform_device_register_full(&vin1_info);
  248. platform_device_register_data(&platform_bus, "soc-camera-pdrv", 0,
  249. &iclink0_ml86v7667,
  250. sizeof(iclink0_ml86v7667));
  251. platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
  252. &iclink1_ml86v7667,
  253. sizeof(iclink1_ml86v7667));
  254. i2c_register_board_info(0, i2c0_devices,
  255. ARRAY_SIZE(i2c0_devices));
  256. spi_register_board_info(spi_board_info,
  257. ARRAY_SIZE(spi_board_info));
  258. pinctrl_register_mappings(bockw_pinctrl_map,
  259. ARRAY_SIZE(bockw_pinctrl_map));
  260. r8a7778_pinmux_init();
  261. platform_device_register_resndata(
  262. &platform_bus, "sh_mmcif", -1,
  263. mmc_resources, ARRAY_SIZE(mmc_resources),
  264. &sh_mmcif_plat, sizeof(struct sh_mmcif_plat_data));
  265. platform_device_register_resndata(
  266. &platform_bus, "rcar_usb_phy", -1,
  267. usb_phy_resources,
  268. ARRAY_SIZE(usb_phy_resources),
  269. &usb_phy_platform_data,
  270. sizeof(struct rcar_phy_platform_data));
  271. /* for SMSC */
  272. base = ioremap_nocache(FPGA, SZ_1M);
  273. if (base) {
  274. /*
  275. * CAUTION
  276. *
  277. * IRQ0/1 is cascaded interrupt from FPGA.
  278. * it should be cared in the future
  279. * Now, it is assuming IRQ0 was used only from SMSC.
  280. */
  281. u16 val = ioread16(base + IRQ0MR);
  282. val &= ~(1 << 4); /* enable SMSC911x */
  283. iowrite16(val, base + IRQ0MR);
  284. iounmap(base);
  285. regulator_register_fixed(0, dummy_supplies,
  286. ARRAY_SIZE(dummy_supplies));
  287. platform_device_register_resndata(
  288. &platform_bus, "smsc911x", -1,
  289. smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
  290. &smsc911x_data, sizeof(smsc911x_data));
  291. }
  292. /* for SDHI */
  293. base = ioremap_nocache(PFC, 0x200);
  294. if (base) {
  295. /*
  296. * FIXME
  297. *
  298. * SDHI CD/WP pin needs pull-up
  299. */
  300. iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
  301. iounmap(base);
  302. platform_device_register_resndata(
  303. &platform_bus, "sh_mobile_sdhi", 0,
  304. sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
  305. &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
  306. }
  307. }
  308. static const char *bockw_boards_compat_dt[] __initdata = {
  309. "renesas,bockw",
  310. NULL,
  311. };
  312. DT_MACHINE_START(BOCKW_DT, "bockw")
  313. .init_early = r8a7778_init_delay,
  314. .init_irq = r8a7778_init_irq_dt,
  315. .init_machine = bockw_init,
  316. .dt_compat = bockw_boards_compat_dt,
  317. .init_late = r8a7778_init_late,
  318. MACHINE_END