kvm.h 14 KB

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  1. #ifndef __KVM_H
  2. #define __KVM_H
  3. /*
  4. * This work is licensed under the terms of the GNU GPL, version 2. See
  5. * the COPYING file in the top-level directory.
  6. */
  7. #include <linux/types.h>
  8. #include <linux/list.h>
  9. #include <linux/mutex.h>
  10. #include <linux/spinlock.h>
  11. #include <linux/mm.h>
  12. #include "vmx.h"
  13. #include <linux/kvm.h>
  14. #define CR0_PE_MASK (1ULL << 0)
  15. #define CR0_TS_MASK (1ULL << 3)
  16. #define CR0_NE_MASK (1ULL << 5)
  17. #define CR0_WP_MASK (1ULL << 16)
  18. #define CR0_NW_MASK (1ULL << 29)
  19. #define CR0_CD_MASK (1ULL << 30)
  20. #define CR0_PG_MASK (1ULL << 31)
  21. #define CR3_WPT_MASK (1ULL << 3)
  22. #define CR3_PCD_MASK (1ULL << 4)
  23. #define CR3_RESEVED_BITS 0x07ULL
  24. #define CR3_L_MODE_RESEVED_BITS (~((1ULL << 40) - 1) | 0x0fe7ULL)
  25. #define CR3_FLAGS_MASK ((1ULL << 5) - 1)
  26. #define CR4_VME_MASK (1ULL << 0)
  27. #define CR4_PSE_MASK (1ULL << 4)
  28. #define CR4_PAE_MASK (1ULL << 5)
  29. #define CR4_PGE_MASK (1ULL << 7)
  30. #define CR4_VMXE_MASK (1ULL << 13)
  31. #define KVM_GUEST_CR0_MASK \
  32. (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK \
  33. | CR0_NW_MASK | CR0_CD_MASK)
  34. #define KVM_VM_CR0_ALWAYS_ON \
  35. (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK)
  36. #define KVM_GUEST_CR4_MASK \
  37. (CR4_PSE_MASK | CR4_PAE_MASK | CR4_PGE_MASK | CR4_VMXE_MASK | CR4_VME_MASK)
  38. #define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK)
  39. #define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK | CR4_VME_MASK)
  40. #define INVALID_PAGE (~(hpa_t)0)
  41. #define UNMAPPED_GVA (~(gpa_t)0)
  42. #define KVM_MAX_VCPUS 1
  43. #define KVM_MEMORY_SLOTS 4
  44. #define KVM_NUM_MMU_PAGES 256
  45. #define FX_IMAGE_SIZE 512
  46. #define FX_IMAGE_ALIGN 16
  47. #define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN)
  48. #define DE_VECTOR 0
  49. #define DF_VECTOR 8
  50. #define TS_VECTOR 10
  51. #define NP_VECTOR 11
  52. #define SS_VECTOR 12
  53. #define GP_VECTOR 13
  54. #define PF_VECTOR 14
  55. #define SELECTOR_TI_MASK (1 << 2)
  56. #define SELECTOR_RPL_MASK 0x03
  57. #define IOPL_SHIFT 12
  58. /*
  59. * Address types:
  60. *
  61. * gva - guest virtual address
  62. * gpa - guest physical address
  63. * gfn - guest frame number
  64. * hva - host virtual address
  65. * hpa - host physical address
  66. * hfn - host frame number
  67. */
  68. typedef unsigned long gva_t;
  69. typedef u64 gpa_t;
  70. typedef unsigned long gfn_t;
  71. typedef unsigned long hva_t;
  72. typedef u64 hpa_t;
  73. typedef unsigned long hfn_t;
  74. struct kvm_mmu_page {
  75. struct list_head link;
  76. hpa_t page_hpa;
  77. unsigned long slot_bitmap; /* One bit set per slot which has memory
  78. * in this shadow page.
  79. */
  80. int global; /* Set if all ptes in this page are global */
  81. u64 *parent_pte;
  82. };
  83. struct vmcs {
  84. u32 revision_id;
  85. u32 abort;
  86. char data[0];
  87. };
  88. #define vmx_msr_entry kvm_msr_entry
  89. struct kvm_vcpu;
  90. /*
  91. * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
  92. * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
  93. * mode.
  94. */
  95. struct kvm_mmu {
  96. void (*new_cr3)(struct kvm_vcpu *vcpu);
  97. int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
  98. void (*inval_page)(struct kvm_vcpu *vcpu, gva_t gva);
  99. void (*free)(struct kvm_vcpu *vcpu);
  100. gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
  101. hpa_t root_hpa;
  102. int root_level;
  103. int shadow_root_level;
  104. };
  105. struct kvm_guest_debug {
  106. int enabled;
  107. unsigned long bp[4];
  108. int singlestep;
  109. };
  110. enum {
  111. VCPU_REGS_RAX = 0,
  112. VCPU_REGS_RCX = 1,
  113. VCPU_REGS_RDX = 2,
  114. VCPU_REGS_RBX = 3,
  115. VCPU_REGS_RSP = 4,
  116. VCPU_REGS_RBP = 5,
  117. VCPU_REGS_RSI = 6,
  118. VCPU_REGS_RDI = 7,
  119. #ifdef CONFIG_X86_64
  120. VCPU_REGS_R8 = 8,
  121. VCPU_REGS_R9 = 9,
  122. VCPU_REGS_R10 = 10,
  123. VCPU_REGS_R11 = 11,
  124. VCPU_REGS_R12 = 12,
  125. VCPU_REGS_R13 = 13,
  126. VCPU_REGS_R14 = 14,
  127. VCPU_REGS_R15 = 15,
  128. #endif
  129. NR_VCPU_REGS
  130. };
  131. enum {
  132. VCPU_SREG_CS,
  133. VCPU_SREG_DS,
  134. VCPU_SREG_ES,
  135. VCPU_SREG_FS,
  136. VCPU_SREG_GS,
  137. VCPU_SREG_SS,
  138. VCPU_SREG_TR,
  139. VCPU_SREG_LDTR,
  140. };
  141. struct kvm_vcpu {
  142. struct kvm *kvm;
  143. union {
  144. struct vmcs *vmcs;
  145. struct vcpu_svm *svm;
  146. };
  147. struct mutex mutex;
  148. int cpu;
  149. int launched;
  150. int interrupt_window_open;
  151. unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
  152. #define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long)
  153. unsigned long irq_pending[NR_IRQ_WORDS];
  154. unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
  155. unsigned long rip; /* needs vcpu_load_rsp_rip() */
  156. unsigned long cr0;
  157. unsigned long cr2;
  158. unsigned long cr3;
  159. unsigned long cr4;
  160. unsigned long cr8;
  161. u64 shadow_efer;
  162. u64 apic_base;
  163. int nmsrs;
  164. struct vmx_msr_entry *guest_msrs;
  165. struct vmx_msr_entry *host_msrs;
  166. struct list_head free_pages;
  167. struct kvm_mmu_page page_header_buf[KVM_NUM_MMU_PAGES];
  168. struct kvm_mmu mmu;
  169. struct kvm_guest_debug guest_debug;
  170. char fx_buf[FX_BUF_SIZE];
  171. char *host_fx_image;
  172. char *guest_fx_image;
  173. int mmio_needed;
  174. int mmio_read_completed;
  175. int mmio_is_write;
  176. int mmio_size;
  177. unsigned char mmio_data[8];
  178. gpa_t mmio_phys_addr;
  179. struct {
  180. int active;
  181. u8 save_iopl;
  182. struct kvm_save_segment {
  183. u16 selector;
  184. unsigned long base;
  185. u32 limit;
  186. u32 ar;
  187. } tr, es, ds, fs, gs;
  188. } rmode;
  189. };
  190. struct kvm_memory_slot {
  191. gfn_t base_gfn;
  192. unsigned long npages;
  193. unsigned long flags;
  194. struct page **phys_mem;
  195. unsigned long *dirty_bitmap;
  196. };
  197. struct kvm {
  198. spinlock_t lock; /* protects everything except vcpus */
  199. int nmemslots;
  200. struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS];
  201. struct list_head active_mmu_pages;
  202. struct kvm_vcpu vcpus[KVM_MAX_VCPUS];
  203. int memory_config_version;
  204. int busy;
  205. unsigned long rmap_overflow;
  206. };
  207. struct kvm_stat {
  208. u32 pf_fixed;
  209. u32 pf_guest;
  210. u32 tlb_flush;
  211. u32 invlpg;
  212. u32 exits;
  213. u32 io_exits;
  214. u32 mmio_exits;
  215. u32 signal_exits;
  216. u32 irq_window_exits;
  217. u32 halt_exits;
  218. u32 request_irq_exits;
  219. u32 irq_exits;
  220. };
  221. struct descriptor_table {
  222. u16 limit;
  223. unsigned long base;
  224. } __attribute__((packed));
  225. struct kvm_arch_ops {
  226. int (*cpu_has_kvm_support)(void); /* __init */
  227. int (*disabled_by_bios)(void); /* __init */
  228. void (*hardware_enable)(void *dummy); /* __init */
  229. void (*hardware_disable)(void *dummy);
  230. int (*hardware_setup)(void); /* __init */
  231. void (*hardware_unsetup)(void); /* __exit */
  232. int (*vcpu_create)(struct kvm_vcpu *vcpu);
  233. void (*vcpu_free)(struct kvm_vcpu *vcpu);
  234. struct kvm_vcpu *(*vcpu_load)(struct kvm_vcpu *vcpu);
  235. void (*vcpu_put)(struct kvm_vcpu *vcpu);
  236. int (*set_guest_debug)(struct kvm_vcpu *vcpu,
  237. struct kvm_debug_guest *dbg);
  238. int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
  239. int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
  240. u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
  241. void (*get_segment)(struct kvm_vcpu *vcpu,
  242. struct kvm_segment *var, int seg);
  243. void (*set_segment)(struct kvm_vcpu *vcpu,
  244. struct kvm_segment *var, int seg);
  245. void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
  246. void (*decache_cr0_cr4_guest_bits)(struct kvm_vcpu *vcpu);
  247. void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
  248. void (*set_cr0_no_modeswitch)(struct kvm_vcpu *vcpu,
  249. unsigned long cr0);
  250. void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
  251. void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
  252. void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
  253. void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
  254. void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
  255. void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
  256. void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
  257. unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
  258. void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
  259. int *exception);
  260. void (*cache_regs)(struct kvm_vcpu *vcpu);
  261. void (*decache_regs)(struct kvm_vcpu *vcpu);
  262. unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
  263. void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
  264. void (*invlpg)(struct kvm_vcpu *vcpu, gva_t addr);
  265. void (*tlb_flush)(struct kvm_vcpu *vcpu);
  266. void (*inject_page_fault)(struct kvm_vcpu *vcpu,
  267. unsigned long addr, u32 err_code);
  268. void (*inject_gp)(struct kvm_vcpu *vcpu, unsigned err_code);
  269. int (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
  270. int (*vcpu_setup)(struct kvm_vcpu *vcpu);
  271. void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
  272. };
  273. extern struct kvm_stat kvm_stat;
  274. extern struct kvm_arch_ops *kvm_arch_ops;
  275. #define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt)
  276. #define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt)
  277. int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module);
  278. void kvm_exit_arch(void);
  279. void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
  280. int kvm_mmu_create(struct kvm_vcpu *vcpu);
  281. int kvm_mmu_setup(struct kvm_vcpu *vcpu);
  282. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
  283. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
  284. hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa);
  285. #define HPA_MSB ((sizeof(hpa_t) * 8) - 1)
  286. #define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB)
  287. static inline int is_error_hpa(hpa_t hpa) { return hpa >> HPA_MSB; }
  288. hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva);
  289. void kvm_emulator_want_group7_invlpg(void);
  290. extern hpa_t bad_page_address;
  291. static inline struct page *gfn_to_page(struct kvm_memory_slot *slot, gfn_t gfn)
  292. {
  293. return slot->phys_mem[gfn - slot->base_gfn];
  294. }
  295. struct kvm_memory_slot *gfn_to_memslot(struct kvm *kvm, gfn_t gfn);
  296. void mark_page_dirty(struct kvm *kvm, gfn_t gfn);
  297. enum emulation_result {
  298. EMULATE_DONE, /* no further processing */
  299. EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
  300. EMULATE_FAIL, /* can't emulate this instruction */
  301. };
  302. int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
  303. unsigned long cr2, u16 error_code);
  304. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
  305. void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
  306. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  307. unsigned long *rflags);
  308. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
  309. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
  310. unsigned long *rflags);
  311. struct x86_emulate_ctxt;
  312. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
  313. int emulate_clts(struct kvm_vcpu *vcpu);
  314. int emulator_get_dr(struct x86_emulate_ctxt* ctxt, int dr,
  315. unsigned long *dest);
  316. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
  317. unsigned long value);
  318. void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
  319. void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
  320. void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
  321. void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
  322. void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
  323. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
  324. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
  325. void fx_init(struct kvm_vcpu *vcpu);
  326. void load_msrs(struct vmx_msr_entry *e, int n);
  327. void save_msrs(struct vmx_msr_entry *e, int n);
  328. void kvm_resched(struct kvm_vcpu *vcpu);
  329. int kvm_read_guest(struct kvm_vcpu *vcpu,
  330. gva_t addr,
  331. unsigned long size,
  332. void *dest);
  333. int kvm_write_guest(struct kvm_vcpu *vcpu,
  334. gva_t addr,
  335. unsigned long size,
  336. void *data);
  337. unsigned long segment_base(u16 selector);
  338. static inline struct page *_gfn_to_page(struct kvm *kvm, gfn_t gfn)
  339. {
  340. struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
  341. return (slot) ? slot->phys_mem[gfn - slot->base_gfn] : NULL;
  342. }
  343. static inline int is_long_mode(struct kvm_vcpu *vcpu)
  344. {
  345. #ifdef CONFIG_X86_64
  346. return vcpu->shadow_efer & EFER_LME;
  347. #else
  348. return 0;
  349. #endif
  350. }
  351. static inline int is_pae(struct kvm_vcpu *vcpu)
  352. {
  353. return vcpu->cr4 & CR4_PAE_MASK;
  354. }
  355. static inline int is_pse(struct kvm_vcpu *vcpu)
  356. {
  357. return vcpu->cr4 & CR4_PSE_MASK;
  358. }
  359. static inline int is_paging(struct kvm_vcpu *vcpu)
  360. {
  361. return vcpu->cr0 & CR0_PG_MASK;
  362. }
  363. static inline int memslot_id(struct kvm *kvm, struct kvm_memory_slot *slot)
  364. {
  365. return slot - kvm->memslots;
  366. }
  367. static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
  368. {
  369. struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
  370. return (struct kvm_mmu_page *)page->private;
  371. }
  372. static inline u16 read_fs(void)
  373. {
  374. u16 seg;
  375. asm ("mov %%fs, %0" : "=g"(seg));
  376. return seg;
  377. }
  378. static inline u16 read_gs(void)
  379. {
  380. u16 seg;
  381. asm ("mov %%gs, %0" : "=g"(seg));
  382. return seg;
  383. }
  384. static inline u16 read_ldt(void)
  385. {
  386. u16 ldt;
  387. asm ("sldt %0" : "=g"(ldt));
  388. return ldt;
  389. }
  390. static inline void load_fs(u16 sel)
  391. {
  392. asm ("mov %0, %%fs" : : "rm"(sel));
  393. }
  394. static inline void load_gs(u16 sel)
  395. {
  396. asm ("mov %0, %%gs" : : "rm"(sel));
  397. }
  398. #ifndef load_ldt
  399. static inline void load_ldt(u16 sel)
  400. {
  401. asm ("lldt %0" : : "g"(sel));
  402. }
  403. #endif
  404. static inline void get_idt(struct descriptor_table *table)
  405. {
  406. asm ("sidt %0" : "=m"(*table));
  407. }
  408. static inline void get_gdt(struct descriptor_table *table)
  409. {
  410. asm ("sgdt %0" : "=m"(*table));
  411. }
  412. static inline unsigned long read_tr_base(void)
  413. {
  414. u16 tr;
  415. asm ("str %0" : "=g"(tr));
  416. return segment_base(tr);
  417. }
  418. #ifdef CONFIG_X86_64
  419. static inline unsigned long read_msr(unsigned long msr)
  420. {
  421. u64 value;
  422. rdmsrl(msr, value);
  423. return value;
  424. }
  425. #endif
  426. static inline void fx_save(void *image)
  427. {
  428. asm ("fxsave (%0)":: "r" (image));
  429. }
  430. static inline void fx_restore(void *image)
  431. {
  432. asm ("fxrstor (%0)":: "r" (image));
  433. }
  434. static inline void fpu_init(void)
  435. {
  436. asm ("finit");
  437. }
  438. static inline u32 get_rdx_init_val(void)
  439. {
  440. return 0x600; /* P6 family */
  441. }
  442. #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
  443. #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
  444. #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
  445. #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
  446. #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
  447. #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
  448. #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
  449. #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
  450. #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
  451. #define MSR_IA32_TIME_STAMP_COUNTER 0x010
  452. #define TSS_IOPB_BASE_OFFSET 0x66
  453. #define TSS_BASE_SIZE 0x68
  454. #define TSS_IOPB_SIZE (65536 / 8)
  455. #define TSS_REDIRECTION_SIZE (256 / 8)
  456. #define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
  457. #ifdef CONFIG_X86_64
  458. /*
  459. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. Therefore
  460. * we need to allocate shadow page tables in the first 4GB of memory, which
  461. * happens to fit the DMA32 zone.
  462. */
  463. #define GFP_KVM_MMU (GFP_KERNEL | __GFP_DMA32)
  464. #else
  465. #define GFP_KVM_MMU GFP_KERNEL
  466. #endif
  467. #endif