nvm.c 9.7 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of version 2 of the GNU General Public License as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22. * USA
  23. *
  24. * The full GNU General Public License is included in this distribution
  25. * in the file called COPYING.
  26. *
  27. * Contact Information:
  28. * Intel Linux Wireless <ilw@linux.intel.com>
  29. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30. *
  31. * BSD LICENSE
  32. *
  33. * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
  34. * All rights reserved.
  35. *
  36. * Redistribution and use in source and binary forms, with or without
  37. * modification, are permitted provided that the following conditions
  38. * are met:
  39. *
  40. * * Redistributions of source code must retain the above copyright
  41. * notice, this list of conditions and the following disclaimer.
  42. * * Redistributions in binary form must reproduce the above copyright
  43. * notice, this list of conditions and the following disclaimer in
  44. * the documentation and/or other materials provided with the
  45. * distribution.
  46. * * Neither the name Intel Corporation nor the names of its
  47. * contributors may be used to endorse or promote products derived
  48. * from this software without specific prior written permission.
  49. *
  50. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61. *
  62. *****************************************************************************/
  63. #include "iwl-trans.h"
  64. #include "mvm.h"
  65. #include "iwl-eeprom-parse.h"
  66. #include "iwl-eeprom-read.h"
  67. #include "iwl-nvm-parse.h"
  68. /* list of NVM sections we are allowed/need to read */
  69. static const int nvm_to_read[] = {
  70. NVM_SECTION_TYPE_HW,
  71. NVM_SECTION_TYPE_SW,
  72. NVM_SECTION_TYPE_CALIBRATION,
  73. NVM_SECTION_TYPE_PRODUCTION,
  74. };
  75. /* Default NVM size to read */
  76. #define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024);
  77. /* used to simplify the shared operations on NCM_ACCESS_CMD versions */
  78. union iwl_nvm_access_cmd {
  79. struct iwl_nvm_access_cmd_ver1 ver1;
  80. struct iwl_nvm_access_cmd_ver2 ver2;
  81. };
  82. union iwl_nvm_access_resp {
  83. struct iwl_nvm_access_resp_ver1 ver1;
  84. struct iwl_nvm_access_resp_ver2 ver2;
  85. };
  86. static inline void iwl_nvm_fill_read_ver1(struct iwl_nvm_access_cmd_ver1 *cmd,
  87. u16 offset, u16 length)
  88. {
  89. cmd->offset = cpu_to_le16(offset);
  90. cmd->length = cpu_to_le16(length);
  91. cmd->cache_refresh = 1;
  92. }
  93. static inline void iwl_nvm_fill_read_ver2(struct iwl_nvm_access_cmd_ver2 *cmd,
  94. u16 offset, u16 length, u16 section)
  95. {
  96. cmd->offset = cpu_to_le16(offset);
  97. cmd->length = cpu_to_le16(length);
  98. cmd->type = cpu_to_le16(section);
  99. }
  100. static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
  101. u16 offset, u16 length, u8 *data)
  102. {
  103. union iwl_nvm_access_cmd nvm_access_cmd;
  104. union iwl_nvm_access_resp *nvm_resp;
  105. struct iwl_rx_packet *pkt;
  106. struct iwl_host_cmd cmd = {
  107. .id = NVM_ACCESS_CMD,
  108. .flags = CMD_SYNC | CMD_WANT_SKB,
  109. .data = { &nvm_access_cmd, },
  110. };
  111. int ret, bytes_read, offset_read;
  112. u8 *resp_data;
  113. memset(&nvm_access_cmd, 0, sizeof(nvm_access_cmd));
  114. /* TODO: not sure family should be the decider, maybe FW version? */
  115. if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) {
  116. iwl_nvm_fill_read_ver2(&(nvm_access_cmd.ver2),
  117. offset, length, section);
  118. cmd.len[0] = sizeof(struct iwl_nvm_access_cmd_ver2);
  119. } else {
  120. iwl_nvm_fill_read_ver1(&(nvm_access_cmd.ver1),
  121. offset, length);
  122. cmd.len[0] = sizeof(struct iwl_nvm_access_cmd_ver1);
  123. }
  124. ret = iwl_mvm_send_cmd(mvm, &cmd);
  125. if (ret)
  126. return ret;
  127. pkt = cmd.resp_pkt;
  128. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  129. IWL_ERR(mvm, "Bad return from NVM_ACCES_COMMAND (0x%08X)\n",
  130. pkt->hdr.flags);
  131. ret = -EIO;
  132. goto exit;
  133. }
  134. /* Extract NVM response */
  135. nvm_resp = (void *)pkt->data;
  136. if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) {
  137. ret = le16_to_cpu(nvm_resp->ver2.status);
  138. bytes_read = le16_to_cpu(nvm_resp->ver2.length);
  139. offset_read = le16_to_cpu(nvm_resp->ver2.offset);
  140. resp_data = nvm_resp->ver2.data;
  141. } else {
  142. ret = le16_to_cpu(nvm_resp->ver1.length) <= 0;
  143. bytes_read = le16_to_cpu(nvm_resp->ver1.length);
  144. offset_read = le16_to_cpu(nvm_resp->ver1.offset);
  145. resp_data = nvm_resp->ver1.data;
  146. }
  147. if (ret) {
  148. IWL_ERR(mvm,
  149. "NVM access command failed with status %d (device: %s)\n",
  150. ret, mvm->cfg->name);
  151. ret = -EINVAL;
  152. goto exit;
  153. }
  154. if (offset_read != offset) {
  155. IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
  156. offset_read);
  157. ret = -EINVAL;
  158. goto exit;
  159. }
  160. /* Write data to NVM */
  161. memcpy(data + offset, resp_data, bytes_read);
  162. ret = bytes_read;
  163. exit:
  164. iwl_free_resp(&cmd);
  165. return ret;
  166. }
  167. /*
  168. * Reads an NVM section completely.
  169. * NICs prior to 7000 family doesn't have a real NVM, but just read
  170. * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
  171. * by uCode, we need to manually check in this case that we don't
  172. * overflow and try to read more than the EEPROM size.
  173. * For 7000 family NICs, we supply the maximal size we can read, and
  174. * the uCode fills the response with as much data as we can,
  175. * without overflowing, so no check is needed.
  176. */
  177. static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
  178. u8 *data)
  179. {
  180. u16 length, offset = 0;
  181. int ret;
  182. bool old_eeprom = mvm->cfg->device_family != IWL_DEVICE_FAMILY_7000;
  183. /* Set nvm section read length */
  184. length = IWL_NVM_DEFAULT_CHUNK_SIZE;
  185. /*
  186. * if length is greater than EEPROM size, truncate it because uCode
  187. * doesn't check it by itself, and exit the loop when reached.
  188. */
  189. if (old_eeprom && length > mvm->cfg->base_params->eeprom_size)
  190. length = mvm->cfg->base_params->eeprom_size;
  191. ret = length;
  192. /* Read the NVM until exhausted (reading less than requested) */
  193. while (ret == length) {
  194. ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
  195. if (ret < 0) {
  196. IWL_ERR(mvm,
  197. "Cannot read NVM from section %d offset %d, length %d\n",
  198. section, offset, length);
  199. return ret;
  200. }
  201. offset += ret;
  202. if (old_eeprom && offset == mvm->cfg->base_params->eeprom_size)
  203. break;
  204. }
  205. IWL_INFO(mvm, "NVM section %d read completed\n", section);
  206. return offset;
  207. }
  208. static struct iwl_nvm_data *
  209. iwl_parse_nvm_sections(struct iwl_mvm *mvm)
  210. {
  211. struct iwl_nvm_section *sections = mvm->nvm_sections;
  212. const __le16 *hw, *sw, *calib;
  213. /* Checking for required sections */
  214. if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
  215. !mvm->nvm_sections[NVM_SECTION_TYPE_HW].data) {
  216. IWL_ERR(mvm, "Can't parse empty NVM sections\n");
  217. return NULL;
  218. }
  219. if (WARN_ON(!mvm->cfg))
  220. return NULL;
  221. hw = (const __le16 *)sections[NVM_SECTION_TYPE_HW].data;
  222. sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
  223. calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
  224. return iwl_parse_nvm_data(mvm->trans->dev, mvm->cfg, hw, sw, calib);
  225. }
  226. int iwl_nvm_init(struct iwl_mvm *mvm)
  227. {
  228. int ret, i, section;
  229. u8 *nvm_buffer, *temp;
  230. if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) {
  231. /* TODO: find correct NVM max size for a section */
  232. nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size,
  233. GFP_KERNEL);
  234. if (!nvm_buffer)
  235. return -ENOMEM;
  236. for (i = 0; i < ARRAY_SIZE(nvm_to_read); i++) {
  237. section = nvm_to_read[i];
  238. /* we override the constness for initial read */
  239. ret = iwl_nvm_read_section(mvm, section, nvm_buffer);
  240. if (ret < 0)
  241. break;
  242. temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
  243. if (!temp) {
  244. ret = -ENOMEM;
  245. break;
  246. }
  247. mvm->nvm_sections[section].data = temp;
  248. mvm->nvm_sections[section].length = ret;
  249. }
  250. kfree(nvm_buffer);
  251. if (ret < 0)
  252. return ret;
  253. } else {
  254. /* allocate eeprom */
  255. mvm->eeprom_blob_size = mvm->cfg->base_params->eeprom_size;
  256. IWL_DEBUG_EEPROM(mvm->trans->dev, "NVM size = %zd\n",
  257. mvm->eeprom_blob_size);
  258. mvm->eeprom_blob = kzalloc(mvm->eeprom_blob_size, GFP_KERNEL);
  259. if (!mvm->eeprom_blob)
  260. return -ENOMEM;
  261. ret = iwl_nvm_read_section(mvm, 0, mvm->eeprom_blob);
  262. if (ret != mvm->eeprom_blob_size) {
  263. IWL_ERR(mvm, "Read partial NVM %d/%zd\n",
  264. ret, mvm->eeprom_blob_size);
  265. kfree(mvm->eeprom_blob);
  266. mvm->eeprom_blob = NULL;
  267. return -EINVAL;
  268. }
  269. }
  270. ret = 0;
  271. if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000)
  272. mvm->nvm_data = iwl_parse_nvm_sections(mvm);
  273. else
  274. mvm->nvm_data =
  275. iwl_parse_eeprom_data(mvm->trans->dev,
  276. mvm->cfg,
  277. mvm->eeprom_blob,
  278. mvm->eeprom_blob_size);
  279. if (!mvm->nvm_data) {
  280. kfree(mvm->eeprom_blob);
  281. mvm->eeprom_blob = NULL;
  282. ret = -ENOMEM;
  283. }
  284. return ret;
  285. }