mcdi.c 35 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2008-2011 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. #include <linux/delay.h>
  10. #include "net_driver.h"
  11. #include "nic.h"
  12. #include "io.h"
  13. #include "farch_regs.h"
  14. #include "mcdi_pcol.h"
  15. #include "phy.h"
  16. /**************************************************************************
  17. *
  18. * Management-Controller-to-Driver Interface
  19. *
  20. **************************************************************************
  21. */
  22. #define MCDI_RPC_TIMEOUT (10 * HZ)
  23. /* A reboot/assertion causes the MCDI status word to be set after the
  24. * command word is set or a REBOOT event is sent. If we notice a reboot
  25. * via these mechanisms then wait 10ms for the status word to be set. */
  26. #define MCDI_STATUS_DELAY_US 100
  27. #define MCDI_STATUS_DELAY_COUNT 100
  28. #define MCDI_STATUS_SLEEP_MS \
  29. (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
  30. #define SEQ_MASK \
  31. EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
  32. static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
  33. {
  34. EFX_BUG_ON_PARANOID(!efx->mcdi);
  35. return &efx->mcdi->iface;
  36. }
  37. int efx_mcdi_init(struct efx_nic *efx)
  38. {
  39. struct efx_mcdi_iface *mcdi;
  40. efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
  41. if (!efx->mcdi)
  42. return -ENOMEM;
  43. mcdi = efx_mcdi(efx);
  44. init_waitqueue_head(&mcdi->wq);
  45. spin_lock_init(&mcdi->iface_lock);
  46. atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
  47. mcdi->mode = MCDI_MODE_POLL;
  48. (void) efx_mcdi_poll_reboot(efx);
  49. /* Recover from a failed assertion before probing */
  50. return efx_mcdi_handle_assertion(efx);
  51. }
  52. void efx_mcdi_fini(struct efx_nic *efx)
  53. {
  54. BUG_ON(efx->mcdi &&
  55. atomic_read(&efx->mcdi->iface.state) != MCDI_STATE_QUIESCENT);
  56. kfree(efx->mcdi);
  57. }
  58. static void efx_mcdi_copyin(struct efx_nic *efx, unsigned cmd,
  59. const efx_dword_t *inbuf, size_t inlen)
  60. {
  61. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  62. efx_dword_t hdr[2];
  63. size_t hdr_len;
  64. u32 xflags, seqno;
  65. BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
  66. seqno = mcdi->seqno & SEQ_MASK;
  67. xflags = 0;
  68. if (mcdi->mode == MCDI_MODE_EVENTS)
  69. xflags |= MCDI_HEADER_XFLAGS_EVREQ;
  70. if (efx->type->mcdi_max_ver == 1) {
  71. /* MCDI v1 */
  72. EFX_POPULATE_DWORD_6(hdr[0],
  73. MCDI_HEADER_RESPONSE, 0,
  74. MCDI_HEADER_RESYNC, 1,
  75. MCDI_HEADER_CODE, cmd,
  76. MCDI_HEADER_DATALEN, inlen,
  77. MCDI_HEADER_SEQ, seqno,
  78. MCDI_HEADER_XFLAGS, xflags);
  79. hdr_len = 4;
  80. } else {
  81. /* MCDI v2 */
  82. BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
  83. EFX_POPULATE_DWORD_6(hdr[0],
  84. MCDI_HEADER_RESPONSE, 0,
  85. MCDI_HEADER_RESYNC, 1,
  86. MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
  87. MCDI_HEADER_DATALEN, 0,
  88. MCDI_HEADER_SEQ, seqno,
  89. MCDI_HEADER_XFLAGS, xflags);
  90. EFX_POPULATE_DWORD_2(hdr[1],
  91. MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
  92. MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
  93. hdr_len = 8;
  94. }
  95. efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
  96. }
  97. static int efx_mcdi_errno(unsigned int mcdi_err)
  98. {
  99. switch (mcdi_err) {
  100. case 0:
  101. return 0;
  102. #define TRANSLATE_ERROR(name) \
  103. case MC_CMD_ERR_ ## name: \
  104. return -name;
  105. TRANSLATE_ERROR(EPERM);
  106. TRANSLATE_ERROR(ENOENT);
  107. TRANSLATE_ERROR(EINTR);
  108. TRANSLATE_ERROR(EAGAIN);
  109. TRANSLATE_ERROR(EACCES);
  110. TRANSLATE_ERROR(EBUSY);
  111. TRANSLATE_ERROR(EINVAL);
  112. TRANSLATE_ERROR(EDEADLK);
  113. TRANSLATE_ERROR(ENOSYS);
  114. TRANSLATE_ERROR(ETIME);
  115. TRANSLATE_ERROR(EALREADY);
  116. TRANSLATE_ERROR(ENOSPC);
  117. #undef TRANSLATE_ERROR
  118. case MC_CMD_ERR_ALLOC_FAIL:
  119. return -ENOBUFS;
  120. case MC_CMD_ERR_MAC_EXIST:
  121. return -EADDRINUSE;
  122. default:
  123. return -EPROTO;
  124. }
  125. }
  126. static void efx_mcdi_read_response_header(struct efx_nic *efx)
  127. {
  128. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  129. unsigned int respseq, respcmd, error;
  130. efx_dword_t hdr;
  131. efx->type->mcdi_read_response(efx, &hdr, 0, 4);
  132. respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
  133. respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
  134. error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
  135. if (respcmd != MC_CMD_V2_EXTN) {
  136. mcdi->resp_hdr_len = 4;
  137. mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
  138. } else {
  139. efx->type->mcdi_read_response(efx, &hdr, 4, 4);
  140. mcdi->resp_hdr_len = 8;
  141. mcdi->resp_data_len =
  142. EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
  143. }
  144. if (error && mcdi->resp_data_len == 0) {
  145. netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
  146. mcdi->resprc = -EIO;
  147. } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
  148. netif_err(efx, hw, efx->net_dev,
  149. "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
  150. respseq, mcdi->seqno);
  151. mcdi->resprc = -EIO;
  152. } else if (error) {
  153. efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
  154. mcdi->resprc =
  155. efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0));
  156. } else {
  157. mcdi->resprc = 0;
  158. }
  159. }
  160. static int efx_mcdi_poll(struct efx_nic *efx)
  161. {
  162. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  163. unsigned long time, finish;
  164. unsigned int spins;
  165. int rc;
  166. /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
  167. rc = efx_mcdi_poll_reboot(efx);
  168. if (rc) {
  169. spin_lock_bh(&mcdi->iface_lock);
  170. mcdi->resprc = rc;
  171. mcdi->resp_hdr_len = 0;
  172. mcdi->resp_data_len = 0;
  173. spin_unlock_bh(&mcdi->iface_lock);
  174. return 0;
  175. }
  176. /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
  177. * because generally mcdi responses are fast. After that, back off
  178. * and poll once a jiffy (approximately)
  179. */
  180. spins = TICK_USEC;
  181. finish = jiffies + MCDI_RPC_TIMEOUT;
  182. while (1) {
  183. if (spins != 0) {
  184. --spins;
  185. udelay(1);
  186. } else {
  187. schedule_timeout_uninterruptible(1);
  188. }
  189. time = jiffies;
  190. rmb();
  191. if (efx->type->mcdi_poll_response(efx))
  192. break;
  193. if (time_after(time, finish))
  194. return -ETIMEDOUT;
  195. }
  196. spin_lock_bh(&mcdi->iface_lock);
  197. efx_mcdi_read_response_header(efx);
  198. spin_unlock_bh(&mcdi->iface_lock);
  199. /* Return rc=0 like wait_event_timeout() */
  200. return 0;
  201. }
  202. /* Test and clear MC-rebooted flag for this port/function; reset
  203. * software state as necessary.
  204. */
  205. int efx_mcdi_poll_reboot(struct efx_nic *efx)
  206. {
  207. if (!efx->mcdi)
  208. return 0;
  209. return efx->type->mcdi_poll_reboot(efx);
  210. }
  211. static void efx_mcdi_acquire(struct efx_mcdi_iface *mcdi)
  212. {
  213. /* Wait until the interface becomes QUIESCENT and we win the race
  214. * to mark it RUNNING. */
  215. wait_event(mcdi->wq,
  216. atomic_cmpxchg(&mcdi->state,
  217. MCDI_STATE_QUIESCENT,
  218. MCDI_STATE_RUNNING)
  219. == MCDI_STATE_QUIESCENT);
  220. }
  221. static int efx_mcdi_await_completion(struct efx_nic *efx)
  222. {
  223. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  224. if (wait_event_timeout(
  225. mcdi->wq,
  226. atomic_read(&mcdi->state) == MCDI_STATE_COMPLETED,
  227. MCDI_RPC_TIMEOUT) == 0)
  228. return -ETIMEDOUT;
  229. /* Check if efx_mcdi_set_mode() switched us back to polled completions.
  230. * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
  231. * completed the request first, then we'll just end up completing the
  232. * request again, which is safe.
  233. *
  234. * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
  235. * wait_event_timeout() implicitly provides.
  236. */
  237. if (mcdi->mode == MCDI_MODE_POLL)
  238. return efx_mcdi_poll(efx);
  239. return 0;
  240. }
  241. static bool efx_mcdi_complete(struct efx_mcdi_iface *mcdi)
  242. {
  243. /* If the interface is RUNNING, then move to COMPLETED and wake any
  244. * waiters. If the interface isn't in RUNNING then we've received a
  245. * duplicate completion after we've already transitioned back to
  246. * QUIESCENT. [A subsequent invocation would increment seqno, so would
  247. * have failed the seqno check].
  248. */
  249. if (atomic_cmpxchg(&mcdi->state,
  250. MCDI_STATE_RUNNING,
  251. MCDI_STATE_COMPLETED) == MCDI_STATE_RUNNING) {
  252. wake_up(&mcdi->wq);
  253. return true;
  254. }
  255. return false;
  256. }
  257. static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
  258. {
  259. atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
  260. wake_up(&mcdi->wq);
  261. }
  262. static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
  263. unsigned int datalen, unsigned int mcdi_err)
  264. {
  265. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  266. bool wake = false;
  267. spin_lock(&mcdi->iface_lock);
  268. if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
  269. if (mcdi->credits)
  270. /* The request has been cancelled */
  271. --mcdi->credits;
  272. else
  273. netif_err(efx, hw, efx->net_dev,
  274. "MC response mismatch tx seq 0x%x rx "
  275. "seq 0x%x\n", seqno, mcdi->seqno);
  276. } else {
  277. if (efx->type->mcdi_max_ver >= 2) {
  278. /* MCDI v2 responses don't fit in an event */
  279. efx_mcdi_read_response_header(efx);
  280. } else {
  281. mcdi->resprc = efx_mcdi_errno(mcdi_err);
  282. mcdi->resp_hdr_len = 4;
  283. mcdi->resp_data_len = datalen;
  284. }
  285. wake = true;
  286. }
  287. spin_unlock(&mcdi->iface_lock);
  288. if (wake)
  289. efx_mcdi_complete(mcdi);
  290. }
  291. int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
  292. const efx_dword_t *inbuf, size_t inlen,
  293. efx_dword_t *outbuf, size_t outlen,
  294. size_t *outlen_actual)
  295. {
  296. int rc;
  297. rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
  298. if (rc)
  299. return rc;
  300. return efx_mcdi_rpc_finish(efx, cmd, inlen,
  301. outbuf, outlen, outlen_actual);
  302. }
  303. int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
  304. const efx_dword_t *inbuf, size_t inlen)
  305. {
  306. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  307. if (efx->type->mcdi_max_ver < 0 ||
  308. (efx->type->mcdi_max_ver < 2 &&
  309. cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
  310. return -EINVAL;
  311. if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
  312. (efx->type->mcdi_max_ver < 2 &&
  313. inlen > MCDI_CTL_SDU_LEN_MAX_V1))
  314. return -EMSGSIZE;
  315. efx_mcdi_acquire(mcdi);
  316. /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
  317. spin_lock_bh(&mcdi->iface_lock);
  318. ++mcdi->seqno;
  319. spin_unlock_bh(&mcdi->iface_lock);
  320. efx_mcdi_copyin(efx, cmd, inbuf, inlen);
  321. return 0;
  322. }
  323. int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
  324. efx_dword_t *outbuf, size_t outlen,
  325. size_t *outlen_actual)
  326. {
  327. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  328. int rc;
  329. if (mcdi->mode == MCDI_MODE_POLL)
  330. rc = efx_mcdi_poll(efx);
  331. else
  332. rc = efx_mcdi_await_completion(efx);
  333. if (rc != 0) {
  334. /* Close the race with efx_mcdi_ev_cpl() executing just too late
  335. * and completing a request we've just cancelled, by ensuring
  336. * that the seqno check therein fails.
  337. */
  338. spin_lock_bh(&mcdi->iface_lock);
  339. ++mcdi->seqno;
  340. ++mcdi->credits;
  341. spin_unlock_bh(&mcdi->iface_lock);
  342. netif_err(efx, hw, efx->net_dev,
  343. "MC command 0x%x inlen %d mode %d timed out\n",
  344. cmd, (int)inlen, mcdi->mode);
  345. } else {
  346. size_t hdr_len, data_len;
  347. /* At the very least we need a memory barrier here to ensure
  348. * we pick up changes from efx_mcdi_ev_cpl(). Protect against
  349. * a spurious efx_mcdi_ev_cpl() running concurrently by
  350. * acquiring the iface_lock. */
  351. spin_lock_bh(&mcdi->iface_lock);
  352. rc = mcdi->resprc;
  353. hdr_len = mcdi->resp_hdr_len;
  354. data_len = mcdi->resp_data_len;
  355. spin_unlock_bh(&mcdi->iface_lock);
  356. BUG_ON(rc > 0);
  357. if (rc == 0) {
  358. efx->type->mcdi_read_response(efx, outbuf, hdr_len,
  359. min(outlen, data_len));
  360. if (outlen_actual != NULL)
  361. *outlen_actual = data_len;
  362. } else if (cmd == MC_CMD_REBOOT && rc == -EIO)
  363. ; /* Don't reset if MC_CMD_REBOOT returns EIO */
  364. else if (rc == -EIO || rc == -EINTR) {
  365. netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
  366. -rc);
  367. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  368. } else
  369. netif_dbg(efx, hw, efx->net_dev,
  370. "MC command 0x%x inlen %d failed rc=%d\n",
  371. cmd, (int)inlen, -rc);
  372. if (rc == -EIO || rc == -EINTR) {
  373. msleep(MCDI_STATUS_SLEEP_MS);
  374. efx_mcdi_poll_reboot(efx);
  375. }
  376. }
  377. efx_mcdi_release(mcdi);
  378. return rc;
  379. }
  380. void efx_mcdi_mode_poll(struct efx_nic *efx)
  381. {
  382. struct efx_mcdi_iface *mcdi;
  383. if (!efx->mcdi)
  384. return;
  385. mcdi = efx_mcdi(efx);
  386. if (mcdi->mode == MCDI_MODE_POLL)
  387. return;
  388. /* We can switch from event completion to polled completion, because
  389. * mcdi requests are always completed in shared memory. We do this by
  390. * switching the mode to POLL'd then completing the request.
  391. * efx_mcdi_await_completion() will then call efx_mcdi_poll().
  392. *
  393. * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
  394. * which efx_mcdi_complete() provides for us.
  395. */
  396. mcdi->mode = MCDI_MODE_POLL;
  397. efx_mcdi_complete(mcdi);
  398. }
  399. void efx_mcdi_mode_event(struct efx_nic *efx)
  400. {
  401. struct efx_mcdi_iface *mcdi;
  402. if (!efx->mcdi)
  403. return;
  404. mcdi = efx_mcdi(efx);
  405. if (mcdi->mode == MCDI_MODE_EVENTS)
  406. return;
  407. /* We can't switch from polled to event completion in the middle of a
  408. * request, because the completion method is specified in the request.
  409. * So acquire the interface to serialise the requestors. We don't need
  410. * to acquire the iface_lock to change the mode here, but we do need a
  411. * write memory barrier ensure that efx_mcdi_rpc() sees it, which
  412. * efx_mcdi_acquire() provides.
  413. */
  414. efx_mcdi_acquire(mcdi);
  415. mcdi->mode = MCDI_MODE_EVENTS;
  416. efx_mcdi_release(mcdi);
  417. }
  418. static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
  419. {
  420. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  421. /* If there is an outstanding MCDI request, it has been terminated
  422. * either by a BADASSERT or REBOOT event. If the mcdi interface is
  423. * in polled mode, then do nothing because the MC reboot handler will
  424. * set the header correctly. However, if the mcdi interface is waiting
  425. * for a CMDDONE event it won't receive it [and since all MCDI events
  426. * are sent to the same queue, we can't be racing with
  427. * efx_mcdi_ev_cpl()]
  428. *
  429. * There's a race here with efx_mcdi_rpc(), because we might receive
  430. * a REBOOT event *before* the request has been copied out. In polled
  431. * mode (during startup) this is irrelevant, because efx_mcdi_complete()
  432. * is ignored. In event mode, this condition is just an edge-case of
  433. * receiving a REBOOT event after posting the MCDI request. Did the mc
  434. * reboot before or after the copyout? The best we can do always is
  435. * just return failure.
  436. */
  437. spin_lock(&mcdi->iface_lock);
  438. if (efx_mcdi_complete(mcdi)) {
  439. if (mcdi->mode == MCDI_MODE_EVENTS) {
  440. mcdi->resprc = rc;
  441. mcdi->resp_hdr_len = 0;
  442. mcdi->resp_data_len = 0;
  443. ++mcdi->credits;
  444. }
  445. } else {
  446. int count;
  447. /* Nobody was waiting for an MCDI request, so trigger a reset */
  448. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  449. /* Consume the status word since efx_mcdi_rpc_finish() won't */
  450. for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
  451. if (efx_mcdi_poll_reboot(efx))
  452. break;
  453. udelay(MCDI_STATUS_DELAY_US);
  454. }
  455. }
  456. spin_unlock(&mcdi->iface_lock);
  457. }
  458. /* Called from falcon_process_eventq for MCDI events */
  459. void efx_mcdi_process_event(struct efx_channel *channel,
  460. efx_qword_t *event)
  461. {
  462. struct efx_nic *efx = channel->efx;
  463. int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
  464. u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
  465. switch (code) {
  466. case MCDI_EVENT_CODE_BADSSERT:
  467. netif_err(efx, hw, efx->net_dev,
  468. "MC watchdog or assertion failure at 0x%x\n", data);
  469. efx_mcdi_ev_death(efx, -EINTR);
  470. break;
  471. case MCDI_EVENT_CODE_PMNOTICE:
  472. netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
  473. break;
  474. case MCDI_EVENT_CODE_CMDDONE:
  475. efx_mcdi_ev_cpl(efx,
  476. MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
  477. MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
  478. MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
  479. break;
  480. case MCDI_EVENT_CODE_LINKCHANGE:
  481. efx_mcdi_process_link_change(efx, event);
  482. break;
  483. case MCDI_EVENT_CODE_SENSOREVT:
  484. efx_mcdi_sensor_event(efx, event);
  485. break;
  486. case MCDI_EVENT_CODE_SCHEDERR:
  487. netif_info(efx, hw, efx->net_dev,
  488. "MC Scheduler error address=0x%x\n", data);
  489. break;
  490. case MCDI_EVENT_CODE_REBOOT:
  491. netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
  492. efx_mcdi_ev_death(efx, -EIO);
  493. break;
  494. case MCDI_EVENT_CODE_MAC_STATS_DMA:
  495. /* MAC stats are gather lazily. We can ignore this. */
  496. break;
  497. case MCDI_EVENT_CODE_FLR:
  498. efx_sriov_flr(efx, MCDI_EVENT_FIELD(*event, FLR_VF));
  499. break;
  500. case MCDI_EVENT_CODE_PTP_RX:
  501. case MCDI_EVENT_CODE_PTP_FAULT:
  502. case MCDI_EVENT_CODE_PTP_PPS:
  503. efx_ptp_event(efx, event);
  504. break;
  505. default:
  506. netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
  507. code);
  508. }
  509. }
  510. /**************************************************************************
  511. *
  512. * Specific request functions
  513. *
  514. **************************************************************************
  515. */
  516. void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
  517. {
  518. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN);
  519. size_t outlength;
  520. const __le16 *ver_words;
  521. int rc;
  522. BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
  523. rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
  524. outbuf, sizeof(outbuf), &outlength);
  525. if (rc)
  526. goto fail;
  527. if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
  528. rc = -EIO;
  529. goto fail;
  530. }
  531. ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
  532. snprintf(buf, len, "%u.%u.%u.%u",
  533. le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
  534. le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
  535. return;
  536. fail:
  537. netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  538. buf[0] = 0;
  539. }
  540. int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
  541. bool *was_attached)
  542. {
  543. MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
  544. MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_OUT_LEN);
  545. size_t outlen;
  546. int rc;
  547. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
  548. driver_operating ? 1 : 0);
  549. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
  550. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
  551. rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
  552. outbuf, sizeof(outbuf), &outlen);
  553. if (rc)
  554. goto fail;
  555. if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
  556. rc = -EIO;
  557. goto fail;
  558. }
  559. if (was_attached != NULL)
  560. *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
  561. return 0;
  562. fail:
  563. netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  564. return rc;
  565. }
  566. int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
  567. u16 *fw_subtype_list, u32 *capabilities)
  568. {
  569. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
  570. size_t outlen, i;
  571. int port_num = efx_port_num(efx);
  572. int rc;
  573. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
  574. rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
  575. outbuf, sizeof(outbuf), &outlen);
  576. if (rc)
  577. goto fail;
  578. if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
  579. rc = -EIO;
  580. goto fail;
  581. }
  582. if (mac_address)
  583. memcpy(mac_address,
  584. port_num ?
  585. MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
  586. MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0),
  587. ETH_ALEN);
  588. if (fw_subtype_list) {
  589. for (i = 0;
  590. i < MCDI_VAR_ARRAY_LEN(outlen,
  591. GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
  592. i++)
  593. fw_subtype_list[i] = MCDI_ARRAY_WORD(
  594. outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
  595. for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
  596. fw_subtype_list[i] = 0;
  597. }
  598. if (capabilities) {
  599. if (port_num)
  600. *capabilities = MCDI_DWORD(outbuf,
  601. GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
  602. else
  603. *capabilities = MCDI_DWORD(outbuf,
  604. GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
  605. }
  606. return 0;
  607. fail:
  608. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
  609. __func__, rc, (int)outlen);
  610. return rc;
  611. }
  612. int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
  613. {
  614. MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
  615. u32 dest = 0;
  616. int rc;
  617. if (uart)
  618. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
  619. if (evq)
  620. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
  621. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
  622. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
  623. BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
  624. rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
  625. NULL, 0, NULL);
  626. if (rc)
  627. goto fail;
  628. return 0;
  629. fail:
  630. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  631. return rc;
  632. }
  633. int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
  634. {
  635. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
  636. size_t outlen;
  637. int rc;
  638. BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
  639. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
  640. outbuf, sizeof(outbuf), &outlen);
  641. if (rc)
  642. goto fail;
  643. if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
  644. rc = -EIO;
  645. goto fail;
  646. }
  647. *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
  648. return 0;
  649. fail:
  650. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
  651. __func__, rc);
  652. return rc;
  653. }
  654. int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
  655. size_t *size_out, size_t *erase_size_out,
  656. bool *protected_out)
  657. {
  658. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
  659. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
  660. size_t outlen;
  661. int rc;
  662. MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
  663. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
  664. outbuf, sizeof(outbuf), &outlen);
  665. if (rc)
  666. goto fail;
  667. if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
  668. rc = -EIO;
  669. goto fail;
  670. }
  671. *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
  672. *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
  673. *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
  674. (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
  675. return 0;
  676. fail:
  677. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  678. return rc;
  679. }
  680. static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
  681. {
  682. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
  683. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
  684. int rc;
  685. MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
  686. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
  687. outbuf, sizeof(outbuf), NULL);
  688. if (rc)
  689. return rc;
  690. switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
  691. case MC_CMD_NVRAM_TEST_PASS:
  692. case MC_CMD_NVRAM_TEST_NOTSUPP:
  693. return 0;
  694. default:
  695. return -EIO;
  696. }
  697. }
  698. int efx_mcdi_nvram_test_all(struct efx_nic *efx)
  699. {
  700. u32 nvram_types;
  701. unsigned int type;
  702. int rc;
  703. rc = efx_mcdi_nvram_types(efx, &nvram_types);
  704. if (rc)
  705. goto fail1;
  706. type = 0;
  707. while (nvram_types != 0) {
  708. if (nvram_types & 1) {
  709. rc = efx_mcdi_nvram_test(efx, type);
  710. if (rc)
  711. goto fail2;
  712. }
  713. type++;
  714. nvram_types >>= 1;
  715. }
  716. return 0;
  717. fail2:
  718. netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
  719. __func__, type);
  720. fail1:
  721. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  722. return rc;
  723. }
  724. static int efx_mcdi_read_assertion(struct efx_nic *efx)
  725. {
  726. MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
  727. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
  728. unsigned int flags, index;
  729. const char *reason;
  730. size_t outlen;
  731. int retry;
  732. int rc;
  733. /* Attempt to read any stored assertion state before we reboot
  734. * the mcfw out of the assertion handler. Retry twice, once
  735. * because a boot-time assertion might cause this command to fail
  736. * with EINTR. And once again because GET_ASSERTS can race with
  737. * MC_CMD_REBOOT running on the other port. */
  738. retry = 2;
  739. do {
  740. MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
  741. rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS,
  742. inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
  743. outbuf, sizeof(outbuf), &outlen);
  744. } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
  745. if (rc)
  746. return rc;
  747. if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
  748. return -EIO;
  749. /* Print out any recorded assertion state */
  750. flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
  751. if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
  752. return 0;
  753. reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
  754. ? "system-level assertion"
  755. : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
  756. ? "thread-level assertion"
  757. : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
  758. ? "watchdog reset"
  759. : "unknown assertion";
  760. netif_err(efx, hw, efx->net_dev,
  761. "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
  762. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
  763. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
  764. /* Print out the registers */
  765. for (index = 0;
  766. index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
  767. index++)
  768. netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
  769. 1 + index,
  770. MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
  771. index));
  772. return 0;
  773. }
  774. static void efx_mcdi_exit_assertion(struct efx_nic *efx)
  775. {
  776. MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
  777. /* If the MC is running debug firmware, it might now be
  778. * waiting for a debugger to attach, but we just want it to
  779. * reboot. We set a flag that makes the command a no-op if it
  780. * has already done so. We don't know what return code to
  781. * expect (0 or -EIO), so ignore it.
  782. */
  783. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  784. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
  785. MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
  786. (void) efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
  787. NULL, 0, NULL);
  788. }
  789. int efx_mcdi_handle_assertion(struct efx_nic *efx)
  790. {
  791. int rc;
  792. rc = efx_mcdi_read_assertion(efx);
  793. if (rc)
  794. return rc;
  795. efx_mcdi_exit_assertion(efx);
  796. return 0;
  797. }
  798. void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  799. {
  800. MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
  801. int rc;
  802. BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
  803. BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
  804. BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
  805. BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
  806. MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
  807. rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
  808. NULL, 0, NULL);
  809. if (rc)
  810. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
  811. __func__, rc);
  812. }
  813. static int efx_mcdi_reset_port(struct efx_nic *efx)
  814. {
  815. int rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, NULL, 0, NULL, 0, NULL);
  816. if (rc)
  817. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
  818. __func__, rc);
  819. return rc;
  820. }
  821. static int efx_mcdi_reset_mc(struct efx_nic *efx)
  822. {
  823. MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
  824. int rc;
  825. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  826. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
  827. rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
  828. NULL, 0, NULL);
  829. /* White is black, and up is down */
  830. if (rc == -EIO)
  831. return 0;
  832. if (rc == 0)
  833. rc = -EIO;
  834. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  835. return rc;
  836. }
  837. enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
  838. {
  839. return RESET_TYPE_RECOVER_OR_ALL;
  840. }
  841. int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
  842. {
  843. int rc;
  844. /* Recover from a failed assertion pre-reset */
  845. rc = efx_mcdi_handle_assertion(efx);
  846. if (rc)
  847. return rc;
  848. if (method == RESET_TYPE_WORLD)
  849. return efx_mcdi_reset_mc(efx);
  850. else
  851. return efx_mcdi_reset_port(efx);
  852. }
  853. static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
  854. const u8 *mac, int *id_out)
  855. {
  856. MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
  857. MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
  858. size_t outlen;
  859. int rc;
  860. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
  861. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
  862. MC_CMD_FILTER_MODE_SIMPLE);
  863. memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
  864. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
  865. outbuf, sizeof(outbuf), &outlen);
  866. if (rc)
  867. goto fail;
  868. if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
  869. rc = -EIO;
  870. goto fail;
  871. }
  872. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
  873. return 0;
  874. fail:
  875. *id_out = -1;
  876. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  877. return rc;
  878. }
  879. int
  880. efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
  881. {
  882. return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
  883. }
  884. int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
  885. {
  886. MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
  887. size_t outlen;
  888. int rc;
  889. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
  890. outbuf, sizeof(outbuf), &outlen);
  891. if (rc)
  892. goto fail;
  893. if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
  894. rc = -EIO;
  895. goto fail;
  896. }
  897. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
  898. return 0;
  899. fail:
  900. *id_out = -1;
  901. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  902. return rc;
  903. }
  904. int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
  905. {
  906. MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
  907. int rc;
  908. MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
  909. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
  910. NULL, 0, NULL);
  911. if (rc)
  912. goto fail;
  913. return 0;
  914. fail:
  915. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  916. return rc;
  917. }
  918. int efx_mcdi_flush_rxqs(struct efx_nic *efx)
  919. {
  920. struct efx_channel *channel;
  921. struct efx_rx_queue *rx_queue;
  922. MCDI_DECLARE_BUF(inbuf,
  923. MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
  924. int rc, count;
  925. BUILD_BUG_ON(EFX_MAX_CHANNELS >
  926. MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
  927. count = 0;
  928. efx_for_each_channel(channel, efx) {
  929. efx_for_each_channel_rx_queue(rx_queue, channel) {
  930. if (rx_queue->flush_pending) {
  931. rx_queue->flush_pending = false;
  932. atomic_dec(&efx->rxq_flush_pending);
  933. MCDI_SET_ARRAY_DWORD(
  934. inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
  935. count, efx_rx_queue_index(rx_queue));
  936. count++;
  937. }
  938. }
  939. }
  940. rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
  941. MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
  942. WARN_ON(rc < 0);
  943. return rc;
  944. }
  945. int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
  946. {
  947. int rc;
  948. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
  949. if (rc)
  950. goto fail;
  951. return 0;
  952. fail:
  953. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  954. return rc;
  955. }
  956. #ifdef CONFIG_SFC_MTD
  957. #define EFX_MCDI_NVRAM_LEN_MAX 128
  958. static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
  959. {
  960. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
  961. int rc;
  962. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
  963. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
  964. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
  965. NULL, 0, NULL);
  966. if (rc)
  967. goto fail;
  968. return 0;
  969. fail:
  970. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  971. return rc;
  972. }
  973. static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
  974. loff_t offset, u8 *buffer, size_t length)
  975. {
  976. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
  977. MCDI_DECLARE_BUF(outbuf,
  978. MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
  979. size_t outlen;
  980. int rc;
  981. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
  982. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
  983. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
  984. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
  985. outbuf, sizeof(outbuf), &outlen);
  986. if (rc)
  987. goto fail;
  988. memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
  989. return 0;
  990. fail:
  991. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  992. return rc;
  993. }
  994. static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
  995. loff_t offset, const u8 *buffer, size_t length)
  996. {
  997. MCDI_DECLARE_BUF(inbuf,
  998. MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
  999. int rc;
  1000. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
  1001. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
  1002. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
  1003. memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
  1004. BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
  1005. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
  1006. ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
  1007. NULL, 0, NULL);
  1008. if (rc)
  1009. goto fail;
  1010. return 0;
  1011. fail:
  1012. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1013. return rc;
  1014. }
  1015. static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
  1016. loff_t offset, size_t length)
  1017. {
  1018. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
  1019. int rc;
  1020. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
  1021. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
  1022. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
  1023. BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
  1024. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
  1025. NULL, 0, NULL);
  1026. if (rc)
  1027. goto fail;
  1028. return 0;
  1029. fail:
  1030. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1031. return rc;
  1032. }
  1033. static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
  1034. {
  1035. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
  1036. int rc;
  1037. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
  1038. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
  1039. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
  1040. NULL, 0, NULL);
  1041. if (rc)
  1042. goto fail;
  1043. return 0;
  1044. fail:
  1045. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1046. return rc;
  1047. }
  1048. int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
  1049. size_t len, size_t *retlen, u8 *buffer)
  1050. {
  1051. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1052. struct efx_nic *efx = mtd->priv;
  1053. loff_t offset = start;
  1054. loff_t end = min_t(loff_t, start + len, mtd->size);
  1055. size_t chunk;
  1056. int rc = 0;
  1057. while (offset < end) {
  1058. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  1059. rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
  1060. buffer, chunk);
  1061. if (rc)
  1062. goto out;
  1063. offset += chunk;
  1064. buffer += chunk;
  1065. }
  1066. out:
  1067. *retlen = offset - start;
  1068. return rc;
  1069. }
  1070. int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
  1071. {
  1072. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1073. struct efx_nic *efx = mtd->priv;
  1074. loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
  1075. loff_t end = min_t(loff_t, start + len, mtd->size);
  1076. size_t chunk = part->common.mtd.erasesize;
  1077. int rc = 0;
  1078. if (!part->updating) {
  1079. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  1080. if (rc)
  1081. goto out;
  1082. part->updating = true;
  1083. }
  1084. /* The MCDI interface can in fact do multiple erase blocks at once;
  1085. * but erasing may be slow, so we make multiple calls here to avoid
  1086. * tripping the MCDI RPC timeout. */
  1087. while (offset < end) {
  1088. rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
  1089. chunk);
  1090. if (rc)
  1091. goto out;
  1092. offset += chunk;
  1093. }
  1094. out:
  1095. return rc;
  1096. }
  1097. int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
  1098. size_t len, size_t *retlen, const u8 *buffer)
  1099. {
  1100. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1101. struct efx_nic *efx = mtd->priv;
  1102. loff_t offset = start;
  1103. loff_t end = min_t(loff_t, start + len, mtd->size);
  1104. size_t chunk;
  1105. int rc = 0;
  1106. if (!part->updating) {
  1107. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  1108. if (rc)
  1109. goto out;
  1110. part->updating = true;
  1111. }
  1112. while (offset < end) {
  1113. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  1114. rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
  1115. buffer, chunk);
  1116. if (rc)
  1117. goto out;
  1118. offset += chunk;
  1119. buffer += chunk;
  1120. }
  1121. out:
  1122. *retlen = offset - start;
  1123. return rc;
  1124. }
  1125. int efx_mcdi_mtd_sync(struct mtd_info *mtd)
  1126. {
  1127. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1128. struct efx_nic *efx = mtd->priv;
  1129. int rc = 0;
  1130. if (part->updating) {
  1131. part->updating = false;
  1132. rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
  1133. }
  1134. return rc;
  1135. }
  1136. void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
  1137. {
  1138. struct efx_mcdi_mtd_partition *mcdi_part =
  1139. container_of(part, struct efx_mcdi_mtd_partition, common);
  1140. struct efx_nic *efx = part->mtd.priv;
  1141. snprintf(part->name, sizeof(part->name), "%s %s:%02x",
  1142. efx->name, part->type_name, mcdi_part->fw_subtype);
  1143. }
  1144. #endif /* CONFIG_SFC_MTD */