smartreflex.c 30 KB

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  1. /*
  2. * OMAP SmartReflex Voltage Control
  3. *
  4. * Author: Thara Gopinath <thara@ti.com>
  5. *
  6. * Copyright (C) 2012 Texas Instruments, Inc.
  7. * Thara Gopinath <thara@ti.com>
  8. *
  9. * Copyright (C) 2008 Nokia Corporation
  10. * Kalle Jokiniemi
  11. *
  12. * Copyright (C) 2007 Texas Instruments, Inc.
  13. * Lesly A M <x0080970@ti.com>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/clk.h>
  22. #include <linux/io.h>
  23. #include <linux/debugfs.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/power/smartreflex.h>
  28. #include <plat/cpu.h>
  29. #define SMARTREFLEX_NAME_LEN 16
  30. #define NVALUE_NAME_LEN 40
  31. #define SR_DISABLE_TIMEOUT 200
  32. /* sr_list contains all the instances of smartreflex module */
  33. static LIST_HEAD(sr_list);
  34. static struct omap_sr_class_data *sr_class;
  35. static struct omap_sr_pmic_data *sr_pmic_data;
  36. static struct dentry *sr_dbg_dir;
  37. static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
  38. {
  39. __raw_writel(value, (sr->base + offset));
  40. }
  41. static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
  42. u32 value)
  43. {
  44. u32 reg_val;
  45. /*
  46. * Smartreflex error config register is special as it contains
  47. * certain status bits which if written a 1 into means a clear
  48. * of those bits. So in order to make sure no accidental write of
  49. * 1 happens to those status bits, do a clear of them in the read
  50. * value. This mean this API doesn't rewrite values in these bits
  51. * if they are currently set, but does allow the caller to write
  52. * those bits.
  53. */
  54. if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
  55. mask |= ERRCONFIG_STATUS_V1_MASK;
  56. else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
  57. mask |= ERRCONFIG_VPBOUNDINTST_V2;
  58. reg_val = __raw_readl(sr->base + offset);
  59. reg_val &= ~mask;
  60. value &= mask;
  61. reg_val |= value;
  62. __raw_writel(reg_val, (sr->base + offset));
  63. }
  64. static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
  65. {
  66. return __raw_readl(sr->base + offset);
  67. }
  68. static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
  69. {
  70. struct omap_sr *sr_info;
  71. if (!voltdm) {
  72. pr_err("%s: Null voltage domain passed!\n", __func__);
  73. return ERR_PTR(-EINVAL);
  74. }
  75. list_for_each_entry(sr_info, &sr_list, node) {
  76. if (voltdm == sr_info->voltdm)
  77. return sr_info;
  78. }
  79. return ERR_PTR(-ENODATA);
  80. }
  81. static irqreturn_t sr_interrupt(int irq, void *data)
  82. {
  83. struct omap_sr *sr_info = data;
  84. u32 status = 0;
  85. switch (sr_info->ip_type) {
  86. case SR_TYPE_V1:
  87. /* Read the status bits */
  88. status = sr_read_reg(sr_info, ERRCONFIG_V1);
  89. /* Clear them by writing back */
  90. sr_write_reg(sr_info, ERRCONFIG_V1, status);
  91. break;
  92. case SR_TYPE_V2:
  93. /* Read the status bits */
  94. status = sr_read_reg(sr_info, IRQSTATUS);
  95. /* Clear them by writing back */
  96. sr_write_reg(sr_info, IRQSTATUS, status);
  97. break;
  98. default:
  99. dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
  100. sr_info->ip_type);
  101. return IRQ_NONE;
  102. }
  103. if (sr_class->notify)
  104. sr_class->notify(sr_info, status);
  105. return IRQ_HANDLED;
  106. }
  107. static void sr_set_clk_length(struct omap_sr *sr)
  108. {
  109. struct clk *sys_ck;
  110. u32 sys_clk_speed;
  111. if (cpu_is_omap34xx())
  112. sys_ck = clk_get(NULL, "sys_ck");
  113. else
  114. sys_ck = clk_get(NULL, "sys_clkin_ck");
  115. if (IS_ERR(sys_ck)) {
  116. dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n",
  117. __func__);
  118. return;
  119. }
  120. sys_clk_speed = clk_get_rate(sys_ck);
  121. clk_put(sys_ck);
  122. switch (sys_clk_speed) {
  123. case 12000000:
  124. sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
  125. break;
  126. case 13000000:
  127. sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
  128. break;
  129. case 19200000:
  130. sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
  131. break;
  132. case 26000000:
  133. sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
  134. break;
  135. case 38400000:
  136. sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
  137. break;
  138. default:
  139. dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n",
  140. __func__, sys_clk_speed);
  141. break;
  142. }
  143. }
  144. static void sr_set_regfields(struct omap_sr *sr)
  145. {
  146. /*
  147. * For time being these values are defined in smartreflex.h
  148. * and populated during init. May be they can be moved to board
  149. * file or pmic specific data structure. In that case these structure
  150. * fields will have to be populated using the pdata or pmic structure.
  151. */
  152. if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
  153. sr->err_weight = OMAP3430_SR_ERRWEIGHT;
  154. sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
  155. sr->accum_data = OMAP3430_SR_ACCUMDATA;
  156. if (!(strcmp(sr->name, "smartreflex_mpu_iva"))) {
  157. sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
  158. sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
  159. } else {
  160. sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
  161. sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
  162. }
  163. }
  164. }
  165. static void sr_start_vddautocomp(struct omap_sr *sr)
  166. {
  167. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  168. dev_warn(&sr->pdev->dev,
  169. "%s: smartreflex class driver not registered\n",
  170. __func__);
  171. return;
  172. }
  173. if (!sr_class->enable(sr))
  174. sr->autocomp_active = true;
  175. }
  176. static void sr_stop_vddautocomp(struct omap_sr *sr)
  177. {
  178. if (!sr_class || !(sr_class->disable)) {
  179. dev_warn(&sr->pdev->dev,
  180. "%s: smartreflex class driver not registered\n",
  181. __func__);
  182. return;
  183. }
  184. if (sr->autocomp_active) {
  185. sr_class->disable(sr, 1);
  186. sr->autocomp_active = false;
  187. }
  188. }
  189. /*
  190. * This function handles the intializations which have to be done
  191. * only when both sr device and class driver regiter has
  192. * completed. This will be attempted to be called from both sr class
  193. * driver register and sr device intializtion API's. Only one call
  194. * will ultimately succeed.
  195. *
  196. * Currently this function registers interrupt handler for a particular SR
  197. * if smartreflex class driver is already registered and has
  198. * requested for interrupts and the SR interrupt line in present.
  199. */
  200. static int sr_late_init(struct omap_sr *sr_info)
  201. {
  202. struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
  203. struct resource *mem;
  204. int ret = 0;
  205. if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
  206. ret = request_irq(sr_info->irq, sr_interrupt,
  207. 0, sr_info->name, sr_info);
  208. if (ret)
  209. goto error;
  210. disable_irq(sr_info->irq);
  211. }
  212. if (pdata && pdata->enable_on_init)
  213. sr_start_vddautocomp(sr_info);
  214. return ret;
  215. error:
  216. iounmap(sr_info->base);
  217. mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
  218. release_mem_region(mem->start, resource_size(mem));
  219. list_del(&sr_info->node);
  220. dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
  221. "interrupt handler. Smartreflex will"
  222. "not function as desired\n", __func__);
  223. kfree(sr_info);
  224. return ret;
  225. }
  226. static void sr_v1_disable(struct omap_sr *sr)
  227. {
  228. int timeout = 0;
  229. int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
  230. ERRCONFIG_MCUBOUNDINTST;
  231. /* Enable MCUDisableAcknowledge interrupt */
  232. sr_modify_reg(sr, ERRCONFIG_V1,
  233. ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
  234. /* SRCONFIG - disable SR */
  235. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  236. /* Disable all other SR interrupts and clear the status as needed */
  237. if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
  238. errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
  239. sr_modify_reg(sr, ERRCONFIG_V1,
  240. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  241. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
  242. errconf_val);
  243. /*
  244. * Wait for SR to be disabled.
  245. * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
  246. */
  247. sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
  248. ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
  249. timeout);
  250. if (timeout >= SR_DISABLE_TIMEOUT)
  251. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  252. __func__);
  253. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  254. sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
  255. ERRCONFIG_MCUDISACKINTST);
  256. }
  257. static void sr_v2_disable(struct omap_sr *sr)
  258. {
  259. int timeout = 0;
  260. /* Enable MCUDisableAcknowledge interrupt */
  261. sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
  262. /* SRCONFIG - disable SR */
  263. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  264. /*
  265. * Disable all other SR interrupts and clear the status
  266. * write to status register ONLY on need basis - only if status
  267. * is set.
  268. */
  269. if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
  270. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  271. ERRCONFIG_VPBOUNDINTST_V2);
  272. else
  273. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  274. 0x0);
  275. sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
  276. IRQENABLE_MCUVALIDINT |
  277. IRQENABLE_MCUBOUNDSINT));
  278. sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
  279. IRQSTATUS_MCVALIDINT |
  280. IRQSTATUS_MCBOUNDSINT));
  281. /*
  282. * Wait for SR to be disabled.
  283. * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
  284. */
  285. sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
  286. IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
  287. timeout);
  288. if (timeout >= SR_DISABLE_TIMEOUT)
  289. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  290. __func__);
  291. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  292. sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
  293. sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
  294. }
  295. static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
  296. struct omap_sr *sr, u32 efuse_offs)
  297. {
  298. int i;
  299. if (!sr->nvalue_table) {
  300. dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
  301. __func__);
  302. return NULL;
  303. }
  304. for (i = 0; i < sr->nvalue_count; i++) {
  305. if (sr->nvalue_table[i].efuse_offs == efuse_offs)
  306. return &sr->nvalue_table[i];
  307. }
  308. return NULL;
  309. }
  310. /* Public Functions */
  311. /**
  312. * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the
  313. * error generator module.
  314. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  315. *
  316. * This API is to be called from the smartreflex class driver to
  317. * configure the error generator module inside the smartreflex module.
  318. * SR settings if using the ERROR module inside Smartreflex.
  319. * SR CLASS 3 by default uses only the ERROR module where as
  320. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  321. * module. Returns 0 on success and error value in case of failure.
  322. */
  323. int sr_configure_errgen(struct voltagedomain *voltdm)
  324. {
  325. u32 sr_config, sr_errconfig, errconfig_offs;
  326. u32 vpboundint_en, vpboundint_st;
  327. u32 senp_en = 0, senn_en = 0;
  328. u8 senp_shift, senn_shift;
  329. struct omap_sr *sr = _sr_lookup(voltdm);
  330. if (IS_ERR(sr)) {
  331. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  332. return PTR_ERR(sr);
  333. }
  334. if (!sr->clk_length)
  335. sr_set_clk_length(sr);
  336. senp_en = sr->senp_mod;
  337. senn_en = sr->senn_mod;
  338. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  339. SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
  340. switch (sr->ip_type) {
  341. case SR_TYPE_V1:
  342. sr_config |= SRCONFIG_DELAYCTRL;
  343. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  344. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  345. errconfig_offs = ERRCONFIG_V1;
  346. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  347. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  348. break;
  349. case SR_TYPE_V2:
  350. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  351. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  352. errconfig_offs = ERRCONFIG_V2;
  353. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  354. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  355. break;
  356. default:
  357. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  358. "module without specifying the ip\n", __func__);
  359. return -EINVAL;
  360. }
  361. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  362. sr_write_reg(sr, SRCONFIG, sr_config);
  363. sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
  364. (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
  365. (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
  366. sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
  367. SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
  368. sr_errconfig);
  369. /* Enabling the interrupts if the ERROR module is used */
  370. sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
  371. vpboundint_en);
  372. return 0;
  373. }
  374. /**
  375. * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
  376. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  377. *
  378. * This API is to be called from the smartreflex class driver to
  379. * disable the error generator module inside the smartreflex module.
  380. *
  381. * Returns 0 on success and error value in case of failure.
  382. */
  383. int sr_disable_errgen(struct voltagedomain *voltdm)
  384. {
  385. u32 errconfig_offs;
  386. u32 vpboundint_en, vpboundint_st;
  387. struct omap_sr *sr = _sr_lookup(voltdm);
  388. if (IS_ERR(sr)) {
  389. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  390. return PTR_ERR(sr);
  391. }
  392. switch (sr->ip_type) {
  393. case SR_TYPE_V1:
  394. errconfig_offs = ERRCONFIG_V1;
  395. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  396. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  397. break;
  398. case SR_TYPE_V2:
  399. errconfig_offs = ERRCONFIG_V2;
  400. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  401. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  402. break;
  403. default:
  404. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  405. "module without specifying the ip\n", __func__);
  406. return -EINVAL;
  407. }
  408. /* Disable the interrupts of ERROR module */
  409. sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
  410. /* Disable the Sensor and errorgen */
  411. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
  412. return 0;
  413. }
  414. /**
  415. * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the
  416. * minmaxavg module.
  417. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  418. *
  419. * This API is to be called from the smartreflex class driver to
  420. * configure the minmaxavg module inside the smartreflex module.
  421. * SR settings if using the ERROR module inside Smartreflex.
  422. * SR CLASS 3 by default uses only the ERROR module where as
  423. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  424. * module. Returns 0 on success and error value in case of failure.
  425. */
  426. int sr_configure_minmax(struct voltagedomain *voltdm)
  427. {
  428. u32 sr_config, sr_avgwt;
  429. u32 senp_en = 0, senn_en = 0;
  430. u8 senp_shift, senn_shift;
  431. struct omap_sr *sr = _sr_lookup(voltdm);
  432. if (IS_ERR(sr)) {
  433. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  434. return PTR_ERR(sr);
  435. }
  436. if (!sr->clk_length)
  437. sr_set_clk_length(sr);
  438. senp_en = sr->senp_mod;
  439. senn_en = sr->senn_mod;
  440. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  441. SRCONFIG_SENENABLE |
  442. (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
  443. switch (sr->ip_type) {
  444. case SR_TYPE_V1:
  445. sr_config |= SRCONFIG_DELAYCTRL;
  446. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  447. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  448. break;
  449. case SR_TYPE_V2:
  450. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  451. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  452. break;
  453. default:
  454. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  455. "module without specifying the ip\n", __func__);
  456. return -EINVAL;
  457. }
  458. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  459. sr_write_reg(sr, SRCONFIG, sr_config);
  460. sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
  461. (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
  462. sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
  463. /*
  464. * Enabling the interrupts if MINMAXAVG module is used.
  465. * TODO: check if all the interrupts are mandatory
  466. */
  467. switch (sr->ip_type) {
  468. case SR_TYPE_V1:
  469. sr_modify_reg(sr, ERRCONFIG_V1,
  470. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  471. ERRCONFIG_MCUBOUNDINTEN),
  472. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
  473. ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
  474. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
  475. break;
  476. case SR_TYPE_V2:
  477. sr_write_reg(sr, IRQSTATUS,
  478. IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
  479. IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
  480. sr_write_reg(sr, IRQENABLE_SET,
  481. IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
  482. IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
  483. break;
  484. default:
  485. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  486. "module without specifying the ip\n", __func__);
  487. return -EINVAL;
  488. }
  489. return 0;
  490. }
  491. /**
  492. * sr_enable() - Enables the smartreflex module.
  493. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  494. * @volt: The voltage at which the Voltage domain associated with
  495. * the smartreflex module is operating at.
  496. * This is required only to program the correct Ntarget value.
  497. *
  498. * This API is to be called from the smartreflex class driver to
  499. * enable a smartreflex module. Returns 0 on success. Returns error
  500. * value if the voltage passed is wrong or if ntarget value is wrong.
  501. */
  502. int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
  503. {
  504. struct omap_volt_data *volt_data;
  505. struct omap_sr *sr = _sr_lookup(voltdm);
  506. struct omap_sr_nvalue_table *nvalue_row;
  507. int ret;
  508. if (IS_ERR(sr)) {
  509. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  510. return PTR_ERR(sr);
  511. }
  512. volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
  513. if (IS_ERR(volt_data)) {
  514. dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
  515. "for nominal voltage %ld\n", __func__, volt);
  516. return PTR_ERR(volt_data);
  517. }
  518. nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
  519. if (!nvalue_row) {
  520. dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
  521. __func__, volt);
  522. return -ENODATA;
  523. }
  524. /* errminlimit is opp dependent and hence linked to voltage */
  525. sr->err_minlimit = nvalue_row->errminlimit;
  526. pm_runtime_get_sync(&sr->pdev->dev);
  527. /* Check if SR is already enabled. If yes do nothing */
  528. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
  529. return 0;
  530. /* Configure SR */
  531. ret = sr_class->configure(sr);
  532. if (ret)
  533. return ret;
  534. sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
  535. /* SRCONFIG - enable SR */
  536. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
  537. return 0;
  538. }
  539. /**
  540. * sr_disable() - Disables the smartreflex module.
  541. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  542. *
  543. * This API is to be called from the smartreflex class driver to
  544. * disable a smartreflex module.
  545. */
  546. void sr_disable(struct voltagedomain *voltdm)
  547. {
  548. struct omap_sr *sr = _sr_lookup(voltdm);
  549. if (IS_ERR(sr)) {
  550. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  551. return;
  552. }
  553. /* Check if SR clocks are already disabled. If yes do nothing */
  554. if (pm_runtime_suspended(&sr->pdev->dev))
  555. return;
  556. /*
  557. * Disable SR if only it is indeed enabled. Else just
  558. * disable the clocks.
  559. */
  560. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
  561. switch (sr->ip_type) {
  562. case SR_TYPE_V1:
  563. sr_v1_disable(sr);
  564. break;
  565. case SR_TYPE_V2:
  566. sr_v2_disable(sr);
  567. break;
  568. default:
  569. dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
  570. sr->ip_type);
  571. }
  572. }
  573. pm_runtime_put_sync_suspend(&sr->pdev->dev);
  574. }
  575. /**
  576. * sr_register_class() - API to register a smartreflex class parameters.
  577. * @class_data: The structure containing various sr class specific data.
  578. *
  579. * This API is to be called by the smartreflex class driver to register itself
  580. * with the smartreflex driver during init. Returns 0 on success else the
  581. * error value.
  582. */
  583. int sr_register_class(struct omap_sr_class_data *class_data)
  584. {
  585. struct omap_sr *sr_info;
  586. if (!class_data) {
  587. pr_warning("%s:, Smartreflex class data passed is NULL\n",
  588. __func__);
  589. return -EINVAL;
  590. }
  591. if (sr_class) {
  592. pr_warning("%s: Smartreflex class driver already registered\n",
  593. __func__);
  594. return -EBUSY;
  595. }
  596. sr_class = class_data;
  597. /*
  598. * Call into late init to do intializations that require
  599. * both sr driver and sr class driver to be initiallized.
  600. */
  601. list_for_each_entry(sr_info, &sr_list, node)
  602. sr_late_init(sr_info);
  603. return 0;
  604. }
  605. /**
  606. * omap_sr_enable() - API to enable SR clocks and to call into the
  607. * registered smartreflex class enable API.
  608. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  609. *
  610. * This API is to be called from the kernel in order to enable
  611. * a particular smartreflex module. This API will do the initial
  612. * configurations to turn on the smartreflex module and in turn call
  613. * into the registered smartreflex class enable API.
  614. */
  615. void omap_sr_enable(struct voltagedomain *voltdm)
  616. {
  617. struct omap_sr *sr = _sr_lookup(voltdm);
  618. if (IS_ERR(sr)) {
  619. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  620. return;
  621. }
  622. if (!sr->autocomp_active)
  623. return;
  624. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  625. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  626. "registered\n", __func__);
  627. return;
  628. }
  629. sr_class->enable(sr);
  630. }
  631. /**
  632. * omap_sr_disable() - API to disable SR without resetting the voltage
  633. * processor voltage
  634. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  635. *
  636. * This API is to be called from the kernel in order to disable
  637. * a particular smartreflex module. This API will in turn call
  638. * into the registered smartreflex class disable API. This API will tell
  639. * the smartreflex class disable not to reset the VP voltage after
  640. * disabling smartreflex.
  641. */
  642. void omap_sr_disable(struct voltagedomain *voltdm)
  643. {
  644. struct omap_sr *sr = _sr_lookup(voltdm);
  645. if (IS_ERR(sr)) {
  646. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  647. return;
  648. }
  649. if (!sr->autocomp_active)
  650. return;
  651. if (!sr_class || !(sr_class->disable)) {
  652. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  653. "registered\n", __func__);
  654. return;
  655. }
  656. sr_class->disable(sr, 0);
  657. }
  658. /**
  659. * omap_sr_disable_reset_volt() - API to disable SR and reset the
  660. * voltage processor voltage
  661. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  662. *
  663. * This API is to be called from the kernel in order to disable
  664. * a particular smartreflex module. This API will in turn call
  665. * into the registered smartreflex class disable API. This API will tell
  666. * the smartreflex class disable to reset the VP voltage after
  667. * disabling smartreflex.
  668. */
  669. void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
  670. {
  671. struct omap_sr *sr = _sr_lookup(voltdm);
  672. if (IS_ERR(sr)) {
  673. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  674. return;
  675. }
  676. if (!sr->autocomp_active)
  677. return;
  678. if (!sr_class || !(sr_class->disable)) {
  679. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  680. "registered\n", __func__);
  681. return;
  682. }
  683. sr_class->disable(sr, 1);
  684. }
  685. /**
  686. * omap_sr_register_pmic() - API to register pmic specific info.
  687. * @pmic_data: The structure containing pmic specific data.
  688. *
  689. * This API is to be called from the PMIC specific code to register with
  690. * smartreflex driver pmic specific info. Currently the only info required
  691. * is the smartreflex init on the PMIC side.
  692. */
  693. void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
  694. {
  695. if (!pmic_data) {
  696. pr_warning("%s: Trying to register NULL PMIC data structure"
  697. "with smartreflex\n", __func__);
  698. return;
  699. }
  700. sr_pmic_data = pmic_data;
  701. }
  702. /* PM Debug FS entries to enable and disable smartreflex. */
  703. static int omap_sr_autocomp_show(void *data, u64 *val)
  704. {
  705. struct omap_sr *sr_info = data;
  706. if (!sr_info) {
  707. pr_warning("%s: omap_sr struct not found\n", __func__);
  708. return -EINVAL;
  709. }
  710. *val = sr_info->autocomp_active;
  711. return 0;
  712. }
  713. static int omap_sr_autocomp_store(void *data, u64 val)
  714. {
  715. struct omap_sr *sr_info = data;
  716. if (!sr_info) {
  717. pr_warning("%s: omap_sr struct not found\n", __func__);
  718. return -EINVAL;
  719. }
  720. /* Sanity check */
  721. if (val > 1) {
  722. pr_warning("%s: Invalid argument %lld\n", __func__, val);
  723. return -EINVAL;
  724. }
  725. /* control enable/disable only if there is a delta in value */
  726. if (sr_info->autocomp_active != val) {
  727. if (!val)
  728. sr_stop_vddautocomp(sr_info);
  729. else
  730. sr_start_vddautocomp(sr_info);
  731. }
  732. return 0;
  733. }
  734. DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
  735. omap_sr_autocomp_store, "%llu\n");
  736. static int __init omap_sr_probe(struct platform_device *pdev)
  737. {
  738. struct omap_sr *sr_info;
  739. struct omap_sr_data *pdata = pdev->dev.platform_data;
  740. struct resource *mem, *irq;
  741. struct dentry *nvalue_dir;
  742. int i, ret = 0;
  743. sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
  744. if (!sr_info) {
  745. dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
  746. __func__);
  747. return -ENOMEM;
  748. }
  749. platform_set_drvdata(pdev, sr_info);
  750. if (!pdata) {
  751. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  752. ret = -EINVAL;
  753. goto err_free_devinfo;
  754. }
  755. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  756. if (!mem) {
  757. dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
  758. ret = -ENODEV;
  759. goto err_free_devinfo;
  760. }
  761. mem = request_mem_region(mem->start, resource_size(mem),
  762. dev_name(&pdev->dev));
  763. if (!mem) {
  764. dev_err(&pdev->dev, "%s: no mem region\n", __func__);
  765. ret = -EBUSY;
  766. goto err_free_devinfo;
  767. }
  768. irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  769. pm_runtime_enable(&pdev->dev);
  770. pm_runtime_irq_safe(&pdev->dev);
  771. sr_info->name = kasprintf(GFP_KERNEL, "%s", pdata->name);
  772. if (!sr_info->name) {
  773. dev_err(&pdev->dev, "%s: Unable to alloc SR instance name\n",
  774. __func__);
  775. ret = -ENOMEM;
  776. goto err_release_region;
  777. }
  778. sr_info->pdev = pdev;
  779. sr_info->srid = pdev->id;
  780. sr_info->voltdm = pdata->voltdm;
  781. sr_info->nvalue_table = pdata->nvalue_table;
  782. sr_info->nvalue_count = pdata->nvalue_count;
  783. sr_info->senn_mod = pdata->senn_mod;
  784. sr_info->senp_mod = pdata->senp_mod;
  785. sr_info->autocomp_active = false;
  786. sr_info->ip_type = pdata->ip_type;
  787. sr_info->base = ioremap(mem->start, resource_size(mem));
  788. if (!sr_info->base) {
  789. dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
  790. ret = -ENOMEM;
  791. goto err_free_name;
  792. }
  793. if (irq)
  794. sr_info->irq = irq->start;
  795. sr_set_clk_length(sr_info);
  796. sr_set_regfields(sr_info);
  797. list_add(&sr_info->node, &sr_list);
  798. /*
  799. * Call into late init to do intializations that require
  800. * both sr driver and sr class driver to be initiallized.
  801. */
  802. if (sr_class) {
  803. ret = sr_late_init(sr_info);
  804. if (ret) {
  805. pr_warning("%s: Error in SR late init\n", __func__);
  806. goto err_iounmap;
  807. }
  808. }
  809. dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
  810. if (!sr_dbg_dir) {
  811. sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
  812. if (IS_ERR_OR_NULL(sr_dbg_dir)) {
  813. ret = PTR_ERR(sr_dbg_dir);
  814. pr_err("%s:sr debugfs dir creation failed(%d)\n",
  815. __func__, ret);
  816. goto err_iounmap;
  817. }
  818. }
  819. sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
  820. if (IS_ERR_OR_NULL(sr_info->dbg_dir)) {
  821. dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
  822. __func__);
  823. ret = PTR_ERR(sr_info->dbg_dir);
  824. goto err_debugfs;
  825. }
  826. (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
  827. sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
  828. (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
  829. &sr_info->err_weight);
  830. (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
  831. &sr_info->err_maxlimit);
  832. nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
  833. if (IS_ERR_OR_NULL(nvalue_dir)) {
  834. dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
  835. "for n-values\n", __func__);
  836. ret = PTR_ERR(nvalue_dir);
  837. goto err_debugfs;
  838. }
  839. if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
  840. dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
  841. __func__, sr_info->name);
  842. ret = -ENODATA;
  843. goto err_debugfs;
  844. }
  845. for (i = 0; i < sr_info->nvalue_count; i++) {
  846. char name[NVALUE_NAME_LEN + 1];
  847. snprintf(name, sizeof(name), "volt_%lu",
  848. sr_info->nvalue_table[i].volt_nominal);
  849. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  850. &(sr_info->nvalue_table[i].nvalue));
  851. snprintf(name, sizeof(name), "errminlimit_%lu",
  852. sr_info->nvalue_table[i].volt_nominal);
  853. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  854. &(sr_info->nvalue_table[i].errminlimit));
  855. }
  856. return ret;
  857. err_debugfs:
  858. debugfs_remove_recursive(sr_info->dbg_dir);
  859. err_iounmap:
  860. list_del(&sr_info->node);
  861. iounmap(sr_info->base);
  862. err_free_name:
  863. kfree(sr_info->name);
  864. err_release_region:
  865. release_mem_region(mem->start, resource_size(mem));
  866. err_free_devinfo:
  867. kfree(sr_info);
  868. return ret;
  869. }
  870. static int __devexit omap_sr_remove(struct platform_device *pdev)
  871. {
  872. struct omap_sr_data *pdata = pdev->dev.platform_data;
  873. struct omap_sr *sr_info;
  874. struct resource *mem;
  875. if (!pdata) {
  876. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  877. return -EINVAL;
  878. }
  879. sr_info = _sr_lookup(pdata->voltdm);
  880. if (IS_ERR(sr_info)) {
  881. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  882. __func__);
  883. return PTR_ERR(sr_info);
  884. }
  885. if (sr_info->autocomp_active)
  886. sr_stop_vddautocomp(sr_info);
  887. if (sr_info->dbg_dir)
  888. debugfs_remove_recursive(sr_info->dbg_dir);
  889. list_del(&sr_info->node);
  890. iounmap(sr_info->base);
  891. kfree(sr_info->name);
  892. kfree(sr_info);
  893. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  894. release_mem_region(mem->start, resource_size(mem));
  895. return 0;
  896. }
  897. static void __devexit omap_sr_shutdown(struct platform_device *pdev)
  898. {
  899. struct omap_sr_data *pdata = pdev->dev.platform_data;
  900. struct omap_sr *sr_info;
  901. if (!pdata) {
  902. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  903. return;
  904. }
  905. sr_info = _sr_lookup(pdata->voltdm);
  906. if (IS_ERR(sr_info)) {
  907. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  908. __func__);
  909. return;
  910. }
  911. if (sr_info->autocomp_active)
  912. sr_stop_vddautocomp(sr_info);
  913. return;
  914. }
  915. static struct platform_driver smartreflex_driver = {
  916. .remove = __devexit_p(omap_sr_remove),
  917. .shutdown = __devexit_p(omap_sr_shutdown),
  918. .driver = {
  919. .name = "smartreflex",
  920. },
  921. };
  922. static int __init sr_init(void)
  923. {
  924. int ret = 0;
  925. /*
  926. * sr_init is a late init. If by then a pmic specific API is not
  927. * registered either there is no need for anything to be done on
  928. * the PMIC side or somebody has forgotten to register a PMIC
  929. * handler. Warn for the second condition.
  930. */
  931. if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
  932. sr_pmic_data->sr_pmic_init();
  933. else
  934. pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
  935. ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
  936. if (ret) {
  937. pr_err("%s: platform driver register failed for SR\n",
  938. __func__);
  939. return ret;
  940. }
  941. return 0;
  942. }
  943. late_initcall(sr_init);
  944. static void __exit sr_exit(void)
  945. {
  946. platform_driver_unregister(&smartreflex_driver);
  947. }
  948. module_exit(sr_exit);
  949. MODULE_DESCRIPTION("OMAP Smartreflex Driver");
  950. MODULE_LICENSE("GPL");
  951. MODULE_ALIAS("platform:" DRIVER_NAME);
  952. MODULE_AUTHOR("Texas Instruments Inc");