adv7180.c 19 KB

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  1. /*
  2. * adv7180.c Analog Devices ADV7180 video decoder driver
  3. * Copyright (c) 2009 Intel Corporation
  4. * Copyright (C) 2013 Cogent Embedded, Inc.
  5. * Copyright (C) 2013 Renesas Solutions Corp.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/errno.h>
  23. #include <linux/kernel.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/i2c.h>
  26. #include <linux/slab.h>
  27. #include <media/v4l2-ioctl.h>
  28. #include <linux/videodev2.h>
  29. #include <media/v4l2-device.h>
  30. #include <media/v4l2-ctrls.h>
  31. #include <media/v4l2-chip-ident.h>
  32. #include <linux/mutex.h>
  33. #define ADV7180_INPUT_CONTROL_REG 0x00
  34. #define ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM 0x00
  35. #define ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM_PED 0x10
  36. #define ADV7180_INPUT_CONTROL_AD_PAL_N_NTSC_J_SECAM 0x20
  37. #define ADV7180_INPUT_CONTROL_AD_PAL_N_NTSC_M_SECAM 0x30
  38. #define ADV7180_INPUT_CONTROL_NTSC_J 0x40
  39. #define ADV7180_INPUT_CONTROL_NTSC_M 0x50
  40. #define ADV7180_INPUT_CONTROL_PAL60 0x60
  41. #define ADV7180_INPUT_CONTROL_NTSC_443 0x70
  42. #define ADV7180_INPUT_CONTROL_PAL_BG 0x80
  43. #define ADV7180_INPUT_CONTROL_PAL_N 0x90
  44. #define ADV7180_INPUT_CONTROL_PAL_M 0xa0
  45. #define ADV7180_INPUT_CONTROL_PAL_M_PED 0xb0
  46. #define ADV7180_INPUT_CONTROL_PAL_COMB_N 0xc0
  47. #define ADV7180_INPUT_CONTROL_PAL_COMB_N_PED 0xd0
  48. #define ADV7180_INPUT_CONTROL_PAL_SECAM 0xe0
  49. #define ADV7180_INPUT_CONTROL_PAL_SECAM_PED 0xf0
  50. #define ADV7180_INPUT_CONTROL_INSEL_MASK 0x0f
  51. #define ADV7180_EXTENDED_OUTPUT_CONTROL_REG 0x04
  52. #define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS 0xC5
  53. #define ADV7180_AUTODETECT_ENABLE_REG 0x07
  54. #define ADV7180_AUTODETECT_DEFAULT 0x7f
  55. /* Contrast */
  56. #define ADV7180_CON_REG 0x08 /*Unsigned */
  57. #define ADV7180_CON_MIN 0
  58. #define ADV7180_CON_DEF 128
  59. #define ADV7180_CON_MAX 255
  60. /* Brightness*/
  61. #define ADV7180_BRI_REG 0x0a /*Signed */
  62. #define ADV7180_BRI_MIN -128
  63. #define ADV7180_BRI_DEF 0
  64. #define ADV7180_BRI_MAX 127
  65. /* Hue */
  66. #define ADV7180_HUE_REG 0x0b /*Signed, inverted */
  67. #define ADV7180_HUE_MIN -127
  68. #define ADV7180_HUE_DEF 0
  69. #define ADV7180_HUE_MAX 128
  70. #define ADV7180_ADI_CTRL_REG 0x0e
  71. #define ADV7180_ADI_CTRL_IRQ_SPACE 0x20
  72. #define ADV7180_PWR_MAN_REG 0x0f
  73. #define ADV7180_PWR_MAN_ON 0x04
  74. #define ADV7180_PWR_MAN_OFF 0x24
  75. #define ADV7180_PWR_MAN_RES 0x80
  76. #define ADV7180_STATUS1_REG 0x10
  77. #define ADV7180_STATUS1_IN_LOCK 0x01
  78. #define ADV7180_STATUS1_AUTOD_MASK 0x70
  79. #define ADV7180_STATUS1_AUTOD_NTSM_M_J 0x00
  80. #define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10
  81. #define ADV7180_STATUS1_AUTOD_PAL_M 0x20
  82. #define ADV7180_STATUS1_AUTOD_PAL_60 0x30
  83. #define ADV7180_STATUS1_AUTOD_PAL_B_G 0x40
  84. #define ADV7180_STATUS1_AUTOD_SECAM 0x50
  85. #define ADV7180_STATUS1_AUTOD_PAL_COMB 0x60
  86. #define ADV7180_STATUS1_AUTOD_SECAM_525 0x70
  87. #define ADV7180_IDENT_REG 0x11
  88. #define ADV7180_ID_7180 0x18
  89. #define ADV7180_ICONF1_ADI 0x40
  90. #define ADV7180_ICONF1_ACTIVE_LOW 0x01
  91. #define ADV7180_ICONF1_PSYNC_ONLY 0x10
  92. #define ADV7180_ICONF1_ACTIVE_TO_CLR 0xC0
  93. /* Saturation */
  94. #define ADV7180_SD_SAT_CB_REG 0xe3 /*Unsigned */
  95. #define ADV7180_SD_SAT_CR_REG 0xe4 /*Unsigned */
  96. #define ADV7180_SAT_MIN 0
  97. #define ADV7180_SAT_DEF 128
  98. #define ADV7180_SAT_MAX 255
  99. #define ADV7180_IRQ1_LOCK 0x01
  100. #define ADV7180_IRQ1_UNLOCK 0x02
  101. #define ADV7180_ISR1_ADI 0x42
  102. #define ADV7180_ICR1_ADI 0x43
  103. #define ADV7180_IMR1_ADI 0x44
  104. #define ADV7180_IMR2_ADI 0x48
  105. #define ADV7180_IRQ3_AD_CHANGE 0x08
  106. #define ADV7180_ISR3_ADI 0x4A
  107. #define ADV7180_ICR3_ADI 0x4B
  108. #define ADV7180_IMR3_ADI 0x4C
  109. #define ADV7180_IMR4_ADI 0x50
  110. #define ADV7180_NTSC_V_BIT_END_REG 0xE6
  111. #define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND 0x4F
  112. struct adv7180_state {
  113. struct v4l2_ctrl_handler ctrl_hdl;
  114. struct v4l2_subdev sd;
  115. struct work_struct work;
  116. struct mutex mutex; /* mutual excl. when accessing chip */
  117. int irq;
  118. v4l2_std_id curr_norm;
  119. bool autodetect;
  120. u8 input;
  121. };
  122. #define to_adv7180_sd(_ctrl) (&container_of(_ctrl->handler, \
  123. struct adv7180_state, \
  124. ctrl_hdl)->sd)
  125. static v4l2_std_id adv7180_std_to_v4l2(u8 status1)
  126. {
  127. /* in case V4L2_IN_ST_NO_SIGNAL */
  128. if (!(status1 & ADV7180_STATUS1_IN_LOCK))
  129. return V4L2_STD_UNKNOWN;
  130. switch (status1 & ADV7180_STATUS1_AUTOD_MASK) {
  131. case ADV7180_STATUS1_AUTOD_NTSM_M_J:
  132. return V4L2_STD_NTSC;
  133. case ADV7180_STATUS1_AUTOD_NTSC_4_43:
  134. return V4L2_STD_NTSC_443;
  135. case ADV7180_STATUS1_AUTOD_PAL_M:
  136. return V4L2_STD_PAL_M;
  137. case ADV7180_STATUS1_AUTOD_PAL_60:
  138. return V4L2_STD_PAL_60;
  139. case ADV7180_STATUS1_AUTOD_PAL_B_G:
  140. return V4L2_STD_PAL;
  141. case ADV7180_STATUS1_AUTOD_SECAM:
  142. return V4L2_STD_SECAM;
  143. case ADV7180_STATUS1_AUTOD_PAL_COMB:
  144. return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N;
  145. case ADV7180_STATUS1_AUTOD_SECAM_525:
  146. return V4L2_STD_SECAM;
  147. default:
  148. return V4L2_STD_UNKNOWN;
  149. }
  150. }
  151. static int v4l2_std_to_adv7180(v4l2_std_id std)
  152. {
  153. if (std == V4L2_STD_PAL_60)
  154. return ADV7180_INPUT_CONTROL_PAL60;
  155. if (std == V4L2_STD_NTSC_443)
  156. return ADV7180_INPUT_CONTROL_NTSC_443;
  157. if (std == V4L2_STD_PAL_N)
  158. return ADV7180_INPUT_CONTROL_PAL_N;
  159. if (std == V4L2_STD_PAL_M)
  160. return ADV7180_INPUT_CONTROL_PAL_M;
  161. if (std == V4L2_STD_PAL_Nc)
  162. return ADV7180_INPUT_CONTROL_PAL_COMB_N;
  163. if (std & V4L2_STD_PAL)
  164. return ADV7180_INPUT_CONTROL_PAL_BG;
  165. if (std & V4L2_STD_NTSC)
  166. return ADV7180_INPUT_CONTROL_NTSC_M;
  167. if (std & V4L2_STD_SECAM)
  168. return ADV7180_INPUT_CONTROL_PAL_SECAM;
  169. return -EINVAL;
  170. }
  171. static u32 adv7180_status_to_v4l2(u8 status1)
  172. {
  173. if (!(status1 & ADV7180_STATUS1_IN_LOCK))
  174. return V4L2_IN_ST_NO_SIGNAL;
  175. return 0;
  176. }
  177. static int __adv7180_status(struct i2c_client *client, u32 *status,
  178. v4l2_std_id *std)
  179. {
  180. int status1 = i2c_smbus_read_byte_data(client, ADV7180_STATUS1_REG);
  181. if (status1 < 0)
  182. return status1;
  183. if (status)
  184. *status = adv7180_status_to_v4l2(status1);
  185. if (std)
  186. *std = adv7180_std_to_v4l2(status1);
  187. return 0;
  188. }
  189. static inline struct adv7180_state *to_state(struct v4l2_subdev *sd)
  190. {
  191. return container_of(sd, struct adv7180_state, sd);
  192. }
  193. static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
  194. {
  195. struct adv7180_state *state = to_state(sd);
  196. int err = mutex_lock_interruptible(&state->mutex);
  197. if (err)
  198. return err;
  199. /* when we are interrupt driven we know the state */
  200. if (!state->autodetect || state->irq > 0)
  201. *std = state->curr_norm;
  202. else
  203. err = __adv7180_status(v4l2_get_subdevdata(sd), NULL, std);
  204. mutex_unlock(&state->mutex);
  205. return err;
  206. }
  207. static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input,
  208. u32 output, u32 config)
  209. {
  210. struct adv7180_state *state = to_state(sd);
  211. int ret = mutex_lock_interruptible(&state->mutex);
  212. struct i2c_client *client = v4l2_get_subdevdata(sd);
  213. if (ret)
  214. return ret;
  215. /* We cannot discriminate between LQFP and 40-pin LFCSP, so accept
  216. * all inputs and let the card driver take care of validation
  217. */
  218. if ((input & ADV7180_INPUT_CONTROL_INSEL_MASK) != input)
  219. goto out;
  220. ret = i2c_smbus_read_byte_data(client, ADV7180_INPUT_CONTROL_REG);
  221. if (ret < 0)
  222. goto out;
  223. ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK;
  224. ret = i2c_smbus_write_byte_data(client,
  225. ADV7180_INPUT_CONTROL_REG, ret | input);
  226. state->input = input;
  227. out:
  228. mutex_unlock(&state->mutex);
  229. return ret;
  230. }
  231. static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status)
  232. {
  233. struct adv7180_state *state = to_state(sd);
  234. int ret = mutex_lock_interruptible(&state->mutex);
  235. if (ret)
  236. return ret;
  237. ret = __adv7180_status(v4l2_get_subdevdata(sd), status, NULL);
  238. mutex_unlock(&state->mutex);
  239. return ret;
  240. }
  241. static int adv7180_g_chip_ident(struct v4l2_subdev *sd,
  242. struct v4l2_dbg_chip_ident *chip)
  243. {
  244. struct i2c_client *client = v4l2_get_subdevdata(sd);
  245. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_ADV7180, 0);
  246. }
  247. static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
  248. {
  249. struct adv7180_state *state = to_state(sd);
  250. struct i2c_client *client = v4l2_get_subdevdata(sd);
  251. int ret = mutex_lock_interruptible(&state->mutex);
  252. if (ret)
  253. return ret;
  254. /* all standards -> autodetect */
  255. if (std == V4L2_STD_ALL) {
  256. ret =
  257. i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG,
  258. ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM
  259. | state->input);
  260. if (ret < 0)
  261. goto out;
  262. __adv7180_status(client, NULL, &state->curr_norm);
  263. state->autodetect = true;
  264. } else {
  265. ret = v4l2_std_to_adv7180(std);
  266. if (ret < 0)
  267. goto out;
  268. ret = i2c_smbus_write_byte_data(client,
  269. ADV7180_INPUT_CONTROL_REG,
  270. ret | state->input);
  271. if (ret < 0)
  272. goto out;
  273. state->curr_norm = std;
  274. state->autodetect = false;
  275. }
  276. ret = 0;
  277. out:
  278. mutex_unlock(&state->mutex);
  279. return ret;
  280. }
  281. static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl)
  282. {
  283. struct v4l2_subdev *sd = to_adv7180_sd(ctrl);
  284. struct adv7180_state *state = to_state(sd);
  285. struct i2c_client *client = v4l2_get_subdevdata(sd);
  286. int ret = mutex_lock_interruptible(&state->mutex);
  287. int val;
  288. if (ret)
  289. return ret;
  290. val = ctrl->val;
  291. switch (ctrl->id) {
  292. case V4L2_CID_BRIGHTNESS:
  293. ret = i2c_smbus_write_byte_data(client, ADV7180_BRI_REG, val);
  294. break;
  295. case V4L2_CID_HUE:
  296. /*Hue is inverted according to HSL chart */
  297. ret = i2c_smbus_write_byte_data(client, ADV7180_HUE_REG, -val);
  298. break;
  299. case V4L2_CID_CONTRAST:
  300. ret = i2c_smbus_write_byte_data(client, ADV7180_CON_REG, val);
  301. break;
  302. case V4L2_CID_SATURATION:
  303. /*
  304. *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE
  305. *Let's not confuse the user, everybody understands saturation
  306. */
  307. ret = i2c_smbus_write_byte_data(client, ADV7180_SD_SAT_CB_REG,
  308. val);
  309. if (ret < 0)
  310. break;
  311. ret = i2c_smbus_write_byte_data(client, ADV7180_SD_SAT_CR_REG,
  312. val);
  313. break;
  314. default:
  315. ret = -EINVAL;
  316. }
  317. mutex_unlock(&state->mutex);
  318. return ret;
  319. }
  320. static const struct v4l2_ctrl_ops adv7180_ctrl_ops = {
  321. .s_ctrl = adv7180_s_ctrl,
  322. };
  323. static int adv7180_init_controls(struct adv7180_state *state)
  324. {
  325. v4l2_ctrl_handler_init(&state->ctrl_hdl, 4);
  326. v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
  327. V4L2_CID_BRIGHTNESS, ADV7180_BRI_MIN,
  328. ADV7180_BRI_MAX, 1, ADV7180_BRI_DEF);
  329. v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
  330. V4L2_CID_CONTRAST, ADV7180_CON_MIN,
  331. ADV7180_CON_MAX, 1, ADV7180_CON_DEF);
  332. v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
  333. V4L2_CID_SATURATION, ADV7180_SAT_MIN,
  334. ADV7180_SAT_MAX, 1, ADV7180_SAT_DEF);
  335. v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
  336. V4L2_CID_HUE, ADV7180_HUE_MIN,
  337. ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF);
  338. state->sd.ctrl_handler = &state->ctrl_hdl;
  339. if (state->ctrl_hdl.error) {
  340. int err = state->ctrl_hdl.error;
  341. v4l2_ctrl_handler_free(&state->ctrl_hdl);
  342. return err;
  343. }
  344. v4l2_ctrl_handler_setup(&state->ctrl_hdl);
  345. return 0;
  346. }
  347. static void adv7180_exit_controls(struct adv7180_state *state)
  348. {
  349. v4l2_ctrl_handler_free(&state->ctrl_hdl);
  350. }
  351. static int adv7180_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned int index,
  352. enum v4l2_mbus_pixelcode *code)
  353. {
  354. if (index > 0)
  355. return -EINVAL;
  356. *code = V4L2_MBUS_FMT_YUYV8_2X8;
  357. return 0;
  358. }
  359. static int adv7180_mbus_fmt(struct v4l2_subdev *sd,
  360. struct v4l2_mbus_framefmt *fmt)
  361. {
  362. struct adv7180_state *state = to_state(sd);
  363. fmt->code = V4L2_MBUS_FMT_YUYV8_2X8;
  364. fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
  365. fmt->field = V4L2_FIELD_INTERLACED;
  366. fmt->width = 720;
  367. fmt->height = state->curr_norm & V4L2_STD_525_60 ? 480 : 576;
  368. return 0;
  369. }
  370. static int adv7180_g_mbus_config(struct v4l2_subdev *sd,
  371. struct v4l2_mbus_config *cfg)
  372. {
  373. /*
  374. * The ADV7180 sensor supports BT.601/656 output modes.
  375. * The BT.656 is default and not yet configurable by s/w.
  376. */
  377. cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
  378. V4L2_MBUS_DATA_ACTIVE_HIGH;
  379. cfg->type = V4L2_MBUS_BT656;
  380. return 0;
  381. }
  382. static const struct v4l2_subdev_video_ops adv7180_video_ops = {
  383. .querystd = adv7180_querystd,
  384. .g_input_status = adv7180_g_input_status,
  385. .s_routing = adv7180_s_routing,
  386. .enum_mbus_fmt = adv7180_enum_mbus_fmt,
  387. .try_mbus_fmt = adv7180_mbus_fmt,
  388. .g_mbus_fmt = adv7180_mbus_fmt,
  389. .s_mbus_fmt = adv7180_mbus_fmt,
  390. .g_mbus_config = adv7180_g_mbus_config,
  391. };
  392. static const struct v4l2_subdev_core_ops adv7180_core_ops = {
  393. .g_chip_ident = adv7180_g_chip_ident,
  394. .s_std = adv7180_s_std,
  395. };
  396. static const struct v4l2_subdev_ops adv7180_ops = {
  397. .core = &adv7180_core_ops,
  398. .video = &adv7180_video_ops,
  399. };
  400. static void adv7180_work(struct work_struct *work)
  401. {
  402. struct adv7180_state *state = container_of(work, struct adv7180_state,
  403. work);
  404. struct i2c_client *client = v4l2_get_subdevdata(&state->sd);
  405. u8 isr3;
  406. mutex_lock(&state->mutex);
  407. i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG,
  408. ADV7180_ADI_CTRL_IRQ_SPACE);
  409. isr3 = i2c_smbus_read_byte_data(client, ADV7180_ISR3_ADI);
  410. /* clear */
  411. i2c_smbus_write_byte_data(client, ADV7180_ICR3_ADI, isr3);
  412. i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG, 0);
  413. if (isr3 & ADV7180_IRQ3_AD_CHANGE && state->autodetect)
  414. __adv7180_status(client, NULL, &state->curr_norm);
  415. mutex_unlock(&state->mutex);
  416. enable_irq(state->irq);
  417. }
  418. static irqreturn_t adv7180_irq(int irq, void *devid)
  419. {
  420. struct adv7180_state *state = devid;
  421. schedule_work(&state->work);
  422. disable_irq_nosync(state->irq);
  423. return IRQ_HANDLED;
  424. }
  425. static int init_device(struct i2c_client *client, struct adv7180_state *state)
  426. {
  427. int ret;
  428. /* Initialize adv7180 */
  429. /* Enable autodetection */
  430. if (state->autodetect) {
  431. ret =
  432. i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG,
  433. ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM
  434. | state->input);
  435. if (ret < 0)
  436. return ret;
  437. ret =
  438. i2c_smbus_write_byte_data(client,
  439. ADV7180_AUTODETECT_ENABLE_REG,
  440. ADV7180_AUTODETECT_DEFAULT);
  441. if (ret < 0)
  442. return ret;
  443. } else {
  444. ret = v4l2_std_to_adv7180(state->curr_norm);
  445. if (ret < 0)
  446. return ret;
  447. ret =
  448. i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG,
  449. ret | state->input);
  450. if (ret < 0)
  451. return ret;
  452. }
  453. /* ITU-R BT.656-4 compatible */
  454. ret = i2c_smbus_write_byte_data(client,
  455. ADV7180_EXTENDED_OUTPUT_CONTROL_REG,
  456. ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS);
  457. if (ret < 0)
  458. return ret;
  459. /* Manually set V bit end position in NTSC mode */
  460. ret = i2c_smbus_write_byte_data(client,
  461. ADV7180_NTSC_V_BIT_END_REG,
  462. ADV7180_NTSC_V_BIT_END_MANUAL_NVEND);
  463. if (ret < 0)
  464. return ret;
  465. /* read current norm */
  466. __adv7180_status(client, NULL, &state->curr_norm);
  467. /* register for interrupts */
  468. if (state->irq > 0) {
  469. ret = request_irq(state->irq, adv7180_irq, 0, KBUILD_MODNAME,
  470. state);
  471. if (ret)
  472. return ret;
  473. ret = i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG,
  474. ADV7180_ADI_CTRL_IRQ_SPACE);
  475. if (ret < 0)
  476. return ret;
  477. /* config the Interrupt pin to be active low */
  478. ret = i2c_smbus_write_byte_data(client, ADV7180_ICONF1_ADI,
  479. ADV7180_ICONF1_ACTIVE_LOW |
  480. ADV7180_ICONF1_PSYNC_ONLY);
  481. if (ret < 0)
  482. return ret;
  483. ret = i2c_smbus_write_byte_data(client, ADV7180_IMR1_ADI, 0);
  484. if (ret < 0)
  485. return ret;
  486. ret = i2c_smbus_write_byte_data(client, ADV7180_IMR2_ADI, 0);
  487. if (ret < 0)
  488. return ret;
  489. /* enable AD change interrupts interrupts */
  490. ret = i2c_smbus_write_byte_data(client, ADV7180_IMR3_ADI,
  491. ADV7180_IRQ3_AD_CHANGE);
  492. if (ret < 0)
  493. return ret;
  494. ret = i2c_smbus_write_byte_data(client, ADV7180_IMR4_ADI, 0);
  495. if (ret < 0)
  496. return ret;
  497. ret = i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG,
  498. 0);
  499. if (ret < 0)
  500. return ret;
  501. }
  502. return 0;
  503. }
  504. static int adv7180_probe(struct i2c_client *client,
  505. const struct i2c_device_id *id)
  506. {
  507. struct adv7180_state *state;
  508. struct v4l2_subdev *sd;
  509. int ret;
  510. /* Check if the adapter supports the needed features */
  511. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  512. return -EIO;
  513. v4l_info(client, "chip found @ 0x%02x (%s)\n",
  514. client->addr, client->adapter->name);
  515. state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
  516. if (state == NULL) {
  517. ret = -ENOMEM;
  518. goto err;
  519. }
  520. state->irq = client->irq;
  521. INIT_WORK(&state->work, adv7180_work);
  522. mutex_init(&state->mutex);
  523. state->autodetect = true;
  524. state->input = 0;
  525. sd = &state->sd;
  526. v4l2_i2c_subdev_init(sd, client, &adv7180_ops);
  527. ret = adv7180_init_controls(state);
  528. if (ret)
  529. goto err_unreg_subdev;
  530. ret = init_device(client, state);
  531. if (ret)
  532. goto err_free_ctrl;
  533. return 0;
  534. err_free_ctrl:
  535. adv7180_exit_controls(state);
  536. err_unreg_subdev:
  537. mutex_destroy(&state->mutex);
  538. v4l2_device_unregister_subdev(sd);
  539. err:
  540. printk(KERN_ERR KBUILD_MODNAME ": Failed to probe: %d\n", ret);
  541. return ret;
  542. }
  543. static int adv7180_remove(struct i2c_client *client)
  544. {
  545. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  546. struct adv7180_state *state = to_state(sd);
  547. if (state->irq > 0) {
  548. free_irq(client->irq, state);
  549. if (cancel_work_sync(&state->work)) {
  550. /*
  551. * Work was pending, therefore we need to enable
  552. * IRQ here to balance the disable_irq() done in the
  553. * interrupt handler.
  554. */
  555. enable_irq(state->irq);
  556. }
  557. }
  558. mutex_destroy(&state->mutex);
  559. v4l2_device_unregister_subdev(sd);
  560. return 0;
  561. }
  562. static const struct i2c_device_id adv7180_id[] = {
  563. {KBUILD_MODNAME, 0},
  564. {},
  565. };
  566. #ifdef CONFIG_PM_SLEEP
  567. static int adv7180_suspend(struct device *dev)
  568. {
  569. struct i2c_client *client = to_i2c_client(dev);
  570. int ret;
  571. ret = i2c_smbus_write_byte_data(client, ADV7180_PWR_MAN_REG,
  572. ADV7180_PWR_MAN_OFF);
  573. if (ret < 0)
  574. return ret;
  575. return 0;
  576. }
  577. static int adv7180_resume(struct device *dev)
  578. {
  579. struct i2c_client *client = to_i2c_client(dev);
  580. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  581. struct adv7180_state *state = to_state(sd);
  582. int ret;
  583. ret = i2c_smbus_write_byte_data(client, ADV7180_PWR_MAN_REG,
  584. ADV7180_PWR_MAN_ON);
  585. if (ret < 0)
  586. return ret;
  587. ret = init_device(client, state);
  588. if (ret < 0)
  589. return ret;
  590. return 0;
  591. }
  592. static SIMPLE_DEV_PM_OPS(adv7180_pm_ops, adv7180_suspend, adv7180_resume);
  593. #define ADV7180_PM_OPS (&adv7180_pm_ops)
  594. #else
  595. #define ADV7180_PM_OPS NULL
  596. #endif
  597. MODULE_DEVICE_TABLE(i2c, adv7180_id);
  598. static struct i2c_driver adv7180_driver = {
  599. .driver = {
  600. .owner = THIS_MODULE,
  601. .name = KBUILD_MODNAME,
  602. .pm = ADV7180_PM_OPS,
  603. },
  604. .probe = adv7180_probe,
  605. .remove = adv7180_remove,
  606. .id_table = adv7180_id,
  607. };
  608. module_i2c_driver(adv7180_driver);
  609. MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver");
  610. MODULE_AUTHOR("Mocean Laboratories");
  611. MODULE_LICENSE("GPL v2");