mpc85xx_ads.h 1.7 KB

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  1. /*
  2. * MPC85xx ADS board definitions
  3. *
  4. * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  5. *
  6. * Copyright 2004 Freescale Semiconductor Inc.
  7. *
  8. * 2006 (c) MontaVista Software, Inc.
  9. * Vitaly Bordug <vbordug@ru.mvista.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify it
  12. * under the terms of the GNU General Public License as published by the
  13. * Free Software Foundation; either version 2 of the License, or (at your
  14. * option) any later version.
  15. *
  16. */
  17. #ifndef __MACH_MPC85XXADS_H
  18. #define __MACH_MPC85XXADS_H
  19. #include <linux/config.h>
  20. #include <linux/initrd.h>
  21. #include <sysdev/fsl_soc.h>
  22. #define BCSR_ADDR ((uint)0xf8000000)
  23. #define BCSR_SIZE ((uint)(32 * 1024))
  24. #ifdef CONFIG_CPM2
  25. #define MPC85xx_CPM_OFFSET (0x80000)
  26. #define CPM_MAP_ADDR (get_immrbase() + MPC85xx_CPM_OFFSET)
  27. #define CPM_IRQ_OFFSET 60
  28. #define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET)
  29. #define SIU_INT_SMC2 ((uint)0x05+CPM_IRQ_OFFSET)
  30. #define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET)
  31. #define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET)
  32. #define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET)
  33. #define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET)
  34. /* FCC1 Clock Source Configuration. These can be
  35. * redefined in the board specific file.
  36. * Can only choose from CLK9-12 */
  37. #define F1_RXCLK 12
  38. #define F1_TXCLK 11
  39. /* FCC2 Clock Source Configuration. These can be
  40. * redefined in the board specific file.
  41. * Can only choose from CLK13-16 */
  42. #define F2_RXCLK 13
  43. #define F2_TXCLK 14
  44. /* FCC3 Clock Source Configuration. These can be
  45. * redefined in the board specific file.
  46. * Can only choose from CLK13-16 */
  47. #define F3_RXCLK 15
  48. #define F3_TXCLK 16
  49. #endif /* CONFIG_CPM2 */
  50. #endif /* __MACH_MPC85XXADS_H */