udc.c 44 KB

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  1. /*
  2. * udc.c - ChipIdea UDC driver
  3. *
  4. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  5. *
  6. * Author: David Lopo
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/err.h>
  16. #include <linux/irqreturn.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/pm_runtime.h>
  20. #include <linux/usb/ch9.h>
  21. #include <linux/usb/gadget.h>
  22. #include <linux/usb/otg.h>
  23. #include <linux/usb/chipidea.h>
  24. #include "ci.h"
  25. #include "udc.h"
  26. #include "bits.h"
  27. #include "debug.h"
  28. /* control endpoint description */
  29. static const struct usb_endpoint_descriptor
  30. ctrl_endpt_out_desc = {
  31. .bLength = USB_DT_ENDPOINT_SIZE,
  32. .bDescriptorType = USB_DT_ENDPOINT,
  33. .bEndpointAddress = USB_DIR_OUT,
  34. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  35. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  36. };
  37. static const struct usb_endpoint_descriptor
  38. ctrl_endpt_in_desc = {
  39. .bLength = USB_DT_ENDPOINT_SIZE,
  40. .bDescriptorType = USB_DT_ENDPOINT,
  41. .bEndpointAddress = USB_DIR_IN,
  42. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  43. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  44. };
  45. /**
  46. * hw_ep_bit: calculates the bit number
  47. * @num: endpoint number
  48. * @dir: endpoint direction
  49. *
  50. * This function returns bit number
  51. */
  52. static inline int hw_ep_bit(int num, int dir)
  53. {
  54. return num + (dir ? 16 : 0);
  55. }
  56. static inline int ep_to_bit(struct ci13xxx *ci, int n)
  57. {
  58. int fill = 16 - ci->hw_ep_max / 2;
  59. if (n >= ci->hw_ep_max / 2)
  60. n += fill;
  61. return n;
  62. }
  63. /**
  64. * hw_device_state: enables/disables interrupts (execute without interruption)
  65. * @dma: 0 => disable, !0 => enable and set dma engine
  66. *
  67. * This function returns an error code
  68. */
  69. static int hw_device_state(struct ci13xxx *ci, u32 dma)
  70. {
  71. if (dma) {
  72. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  73. /* interrupt, error, port change, reset, sleep/suspend */
  74. hw_write(ci, OP_USBINTR, ~0,
  75. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  76. } else {
  77. hw_write(ci, OP_USBINTR, ~0, 0);
  78. }
  79. return 0;
  80. }
  81. /**
  82. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  83. * @num: endpoint number
  84. * @dir: endpoint direction
  85. *
  86. * This function returns an error code
  87. */
  88. static int hw_ep_flush(struct ci13xxx *ci, int num, int dir)
  89. {
  90. int n = hw_ep_bit(num, dir);
  91. do {
  92. /* flush any pending transfer */
  93. hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n));
  94. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  95. cpu_relax();
  96. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  97. return 0;
  98. }
  99. /**
  100. * hw_ep_disable: disables endpoint (execute without interruption)
  101. * @num: endpoint number
  102. * @dir: endpoint direction
  103. *
  104. * This function returns an error code
  105. */
  106. static int hw_ep_disable(struct ci13xxx *ci, int num, int dir)
  107. {
  108. hw_ep_flush(ci, num, dir);
  109. hw_write(ci, OP_ENDPTCTRL + num,
  110. dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  111. return 0;
  112. }
  113. /**
  114. * hw_ep_enable: enables endpoint (execute without interruption)
  115. * @num: endpoint number
  116. * @dir: endpoint direction
  117. * @type: endpoint type
  118. *
  119. * This function returns an error code
  120. */
  121. static int hw_ep_enable(struct ci13xxx *ci, int num, int dir, int type)
  122. {
  123. u32 mask, data;
  124. if (dir) {
  125. mask = ENDPTCTRL_TXT; /* type */
  126. data = type << __ffs(mask);
  127. mask |= ENDPTCTRL_TXS; /* unstall */
  128. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  129. data |= ENDPTCTRL_TXR;
  130. mask |= ENDPTCTRL_TXE; /* enable */
  131. data |= ENDPTCTRL_TXE;
  132. } else {
  133. mask = ENDPTCTRL_RXT; /* type */
  134. data = type << __ffs(mask);
  135. mask |= ENDPTCTRL_RXS; /* unstall */
  136. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  137. data |= ENDPTCTRL_RXR;
  138. mask |= ENDPTCTRL_RXE; /* enable */
  139. data |= ENDPTCTRL_RXE;
  140. }
  141. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  142. return 0;
  143. }
  144. /**
  145. * hw_ep_get_halt: return endpoint halt status
  146. * @num: endpoint number
  147. * @dir: endpoint direction
  148. *
  149. * This function returns 1 if endpoint halted
  150. */
  151. static int hw_ep_get_halt(struct ci13xxx *ci, int num, int dir)
  152. {
  153. u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  154. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  155. }
  156. /**
  157. * hw_test_and_clear_setup_status: test & clear setup status (execute without
  158. * interruption)
  159. * @n: endpoint number
  160. *
  161. * This function returns setup status
  162. */
  163. static int hw_test_and_clear_setup_status(struct ci13xxx *ci, int n)
  164. {
  165. n = ep_to_bit(ci, n);
  166. return hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(n));
  167. }
  168. /**
  169. * hw_ep_prime: primes endpoint (execute without interruption)
  170. * @num: endpoint number
  171. * @dir: endpoint direction
  172. * @is_ctrl: true if control endpoint
  173. *
  174. * This function returns an error code
  175. */
  176. static int hw_ep_prime(struct ci13xxx *ci, int num, int dir, int is_ctrl)
  177. {
  178. int n = hw_ep_bit(num, dir);
  179. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  180. return -EAGAIN;
  181. hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n));
  182. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  183. cpu_relax();
  184. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  185. return -EAGAIN;
  186. /* status shoult be tested according with manual but it doesn't work */
  187. return 0;
  188. }
  189. /**
  190. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  191. * without interruption)
  192. * @num: endpoint number
  193. * @dir: endpoint direction
  194. * @value: true => stall, false => unstall
  195. *
  196. * This function returns an error code
  197. */
  198. static int hw_ep_set_halt(struct ci13xxx *ci, int num, int dir, int value)
  199. {
  200. if (value != 0 && value != 1)
  201. return -EINVAL;
  202. do {
  203. enum ci13xxx_regs reg = OP_ENDPTCTRL + num;
  204. u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  205. u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  206. /* data toggle - reserved for EP0 but it's in ESS */
  207. hw_write(ci, reg, mask_xs|mask_xr,
  208. value ? mask_xs : mask_xr);
  209. } while (value != hw_ep_get_halt(ci, num, dir));
  210. return 0;
  211. }
  212. /**
  213. * hw_is_port_high_speed: test if port is high speed
  214. *
  215. * This function returns true if high speed port
  216. */
  217. static int hw_port_is_high_speed(struct ci13xxx *ci)
  218. {
  219. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  220. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  221. }
  222. /**
  223. * hw_read_intr_enable: returns interrupt enable register
  224. *
  225. * This function returns register data
  226. */
  227. static u32 hw_read_intr_enable(struct ci13xxx *ci)
  228. {
  229. return hw_read(ci, OP_USBINTR, ~0);
  230. }
  231. /**
  232. * hw_read_intr_status: returns interrupt status register
  233. *
  234. * This function returns register data
  235. */
  236. static u32 hw_read_intr_status(struct ci13xxx *ci)
  237. {
  238. return hw_read(ci, OP_USBSTS, ~0);
  239. }
  240. /**
  241. * hw_test_and_clear_complete: test & clear complete status (execute without
  242. * interruption)
  243. * @n: endpoint number
  244. *
  245. * This function returns complete status
  246. */
  247. static int hw_test_and_clear_complete(struct ci13xxx *ci, int n)
  248. {
  249. n = ep_to_bit(ci, n);
  250. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  251. }
  252. /**
  253. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  254. * without interruption)
  255. *
  256. * This function returns active interrutps
  257. */
  258. static u32 hw_test_and_clear_intr_active(struct ci13xxx *ci)
  259. {
  260. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  261. hw_write(ci, OP_USBSTS, ~0, reg);
  262. return reg;
  263. }
  264. /**
  265. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  266. * interruption)
  267. *
  268. * This function returns guard value
  269. */
  270. static int hw_test_and_clear_setup_guard(struct ci13xxx *ci)
  271. {
  272. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  273. }
  274. /**
  275. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  276. * interruption)
  277. *
  278. * This function returns guard value
  279. */
  280. static int hw_test_and_set_setup_guard(struct ci13xxx *ci)
  281. {
  282. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  283. }
  284. /**
  285. * hw_usb_set_address: configures USB address (execute without interruption)
  286. * @value: new USB address
  287. *
  288. * This function explicitly sets the address, without the "USBADRA" (advance)
  289. * feature, which is not supported by older versions of the controller.
  290. */
  291. static void hw_usb_set_address(struct ci13xxx *ci, u8 value)
  292. {
  293. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  294. value << __ffs(DEVICEADDR_USBADR));
  295. }
  296. /**
  297. * hw_usb_reset: restart device after a bus reset (execute without
  298. * interruption)
  299. *
  300. * This function returns an error code
  301. */
  302. static int hw_usb_reset(struct ci13xxx *ci)
  303. {
  304. hw_usb_set_address(ci, 0);
  305. /* ESS flushes only at end?!? */
  306. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  307. /* clear setup token semaphores */
  308. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  309. /* clear complete status */
  310. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  311. /* wait until all bits cleared */
  312. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  313. udelay(10); /* not RTOS friendly */
  314. /* reset all endpoints ? */
  315. /* reset internal status and wait for further instructions
  316. no need to verify the port reset status (ESS does it) */
  317. return 0;
  318. }
  319. /******************************************************************************
  320. * UTIL block
  321. *****************************************************************************/
  322. static void setup_td_bits(struct td_node *tdnode, unsigned length)
  323. {
  324. memset(tdnode->ptr, 0, sizeof(*tdnode->ptr));
  325. tdnode->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  326. tdnode->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  327. tdnode->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  328. }
  329. static int add_td_to_list(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq,
  330. unsigned length)
  331. {
  332. struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
  333. GFP_ATOMIC);
  334. if (node == NULL)
  335. return -ENOMEM;
  336. node->ptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
  337. &node->dma);
  338. if (node->ptr == NULL) {
  339. kfree(node);
  340. return -ENOMEM;
  341. }
  342. setup_td_bits(node, length);
  343. if (!list_empty(&mReq->tds)) {
  344. /* get the last entry */
  345. lastnode = list_entry(mReq->tds.prev,
  346. struct td_node, td);
  347. lastnode->ptr->next = cpu_to_le32(node->dma);
  348. }
  349. INIT_LIST_HEAD(&node->td);
  350. list_add_tail(&node->td, &mReq->tds);
  351. return 0;
  352. }
  353. /**
  354. * _usb_addr: calculates endpoint address from direction & number
  355. * @ep: endpoint
  356. */
  357. static inline u8 _usb_addr(struct ci13xxx_ep *ep)
  358. {
  359. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  360. }
  361. /**
  362. * _hardware_queue: configures a request at hardware level
  363. * @gadget: gadget
  364. * @mEp: endpoint
  365. *
  366. * This function returns an error code
  367. */
  368. static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
  369. {
  370. struct ci13xxx *ci = mEp->ci;
  371. unsigned i;
  372. int ret = 0;
  373. unsigned length = mReq->req.length;
  374. struct td_node *firstnode, *lastnode;
  375. /* don't queue twice */
  376. if (mReq->req.status == -EALREADY)
  377. return -EALREADY;
  378. mReq->req.status = -EALREADY;
  379. ret = usb_gadget_map_request(&ci->gadget, &mReq->req, mEp->dir);
  380. if (ret)
  381. return ret;
  382. firstnode = list_first_entry(&mReq->tds,
  383. struct td_node, td);
  384. setup_td_bits(firstnode, length);
  385. firstnode->ptr->page[0] = cpu_to_le32(mReq->req.dma);
  386. for (i = 1; i < TD_PAGE_COUNT; i++) {
  387. u32 page = mReq->req.dma + i * CI13XXX_PAGE_SIZE;
  388. page &= ~TD_RESERVED_MASK;
  389. firstnode->ptr->page[i] = cpu_to_le32(page);
  390. }
  391. if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0))
  392. add_td_to_list(mEp, mReq, 0);
  393. lastnode = list_entry(mReq->tds.prev,
  394. struct td_node, td);
  395. lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
  396. if (!mReq->req.no_interrupt)
  397. lastnode->ptr->token |= cpu_to_le32(TD_IOC);
  398. wmb();
  399. if (!list_empty(&mEp->qh.queue)) {
  400. struct ci13xxx_req *mReqPrev;
  401. int n = hw_ep_bit(mEp->num, mEp->dir);
  402. int tmp_stat;
  403. struct td_node *prevlastnode;
  404. u32 next = firstnode->dma & TD_ADDR_MASK;
  405. mReqPrev = list_entry(mEp->qh.queue.prev,
  406. struct ci13xxx_req, queue);
  407. prevlastnode = list_entry(mReqPrev->tds.prev,
  408. struct td_node, td);
  409. prevlastnode->ptr->next = cpu_to_le32(next);
  410. wmb();
  411. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  412. goto done;
  413. do {
  414. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  415. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  416. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  417. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  418. if (tmp_stat)
  419. goto done;
  420. }
  421. /* QH configuration */
  422. mEp->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
  423. mEp->qh.ptr->td.token &=
  424. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  425. if (mEp->type == USB_ENDPOINT_XFER_ISOC) {
  426. u32 mul = mReq->req.length / mEp->ep.maxpacket;
  427. if (mReq->req.length % mEp->ep.maxpacket)
  428. mul++;
  429. mEp->qh.ptr->cap |= mul << __ffs(QH_MULT);
  430. }
  431. wmb(); /* synchronize before ep prime */
  432. ret = hw_ep_prime(ci, mEp->num, mEp->dir,
  433. mEp->type == USB_ENDPOINT_XFER_CONTROL);
  434. done:
  435. return ret;
  436. }
  437. /**
  438. * _hardware_dequeue: handles a request at hardware level
  439. * @gadget: gadget
  440. * @mEp: endpoint
  441. *
  442. * This function returns an error code
  443. */
  444. static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
  445. {
  446. u32 tmptoken;
  447. struct td_node *node, *tmpnode, *firstnode;
  448. if (mReq->req.status != -EALREADY)
  449. return -EINVAL;
  450. firstnode = list_first_entry(&mReq->tds,
  451. struct td_node, td);
  452. list_for_each_entry_safe(node, tmpnode, &mReq->tds, td) {
  453. tmptoken = le32_to_cpu(node->ptr->token);
  454. if ((TD_STATUS_ACTIVE & tmptoken) != 0)
  455. return -EBUSY;
  456. if (node != firstnode) {
  457. dma_pool_free(mEp->td_pool, node->ptr, node->dma);
  458. list_del_init(&node->td);
  459. node->ptr = NULL;
  460. kfree(node);
  461. }
  462. }
  463. mReq->req.status = 0;
  464. usb_gadget_unmap_request(&mEp->ci->gadget, &mReq->req, mEp->dir);
  465. mReq->req.status = tmptoken & TD_STATUS;
  466. if ((TD_STATUS_HALTED & mReq->req.status) != 0)
  467. mReq->req.status = -1;
  468. else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
  469. mReq->req.status = -1;
  470. else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
  471. mReq->req.status = -1;
  472. mReq->req.actual = tmptoken & TD_TOTAL_BYTES;
  473. mReq->req.actual >>= __ffs(TD_TOTAL_BYTES);
  474. mReq->req.actual = mReq->req.length - mReq->req.actual;
  475. mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
  476. return mReq->req.actual;
  477. }
  478. /**
  479. * _ep_nuke: dequeues all endpoint requests
  480. * @mEp: endpoint
  481. *
  482. * This function returns an error code
  483. * Caller must hold lock
  484. */
  485. static int _ep_nuke(struct ci13xxx_ep *mEp)
  486. __releases(mEp->lock)
  487. __acquires(mEp->lock)
  488. {
  489. struct td_node *node, *tmpnode, *firstnode;
  490. if (mEp == NULL)
  491. return -EINVAL;
  492. hw_ep_flush(mEp->ci, mEp->num, mEp->dir);
  493. while (!list_empty(&mEp->qh.queue)) {
  494. /* pop oldest request */
  495. struct ci13xxx_req *mReq = \
  496. list_entry(mEp->qh.queue.next,
  497. struct ci13xxx_req, queue);
  498. firstnode = list_first_entry(&mReq->tds,
  499. struct td_node, td);
  500. list_for_each_entry_safe(node, tmpnode, &mReq->tds, td) {
  501. if (node != firstnode) {
  502. dma_pool_free(mEp->td_pool, node->ptr,
  503. node->dma);
  504. list_del_init(&node->td);
  505. node->ptr = NULL;
  506. kfree(node);
  507. }
  508. }
  509. list_del_init(&mReq->queue);
  510. mReq->req.status = -ESHUTDOWN;
  511. if (mReq->req.complete != NULL) {
  512. spin_unlock(mEp->lock);
  513. mReq->req.complete(&mEp->ep, &mReq->req);
  514. spin_lock(mEp->lock);
  515. }
  516. }
  517. return 0;
  518. }
  519. /**
  520. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  521. * @gadget: gadget
  522. *
  523. * This function returns an error code
  524. */
  525. static int _gadget_stop_activity(struct usb_gadget *gadget)
  526. {
  527. struct usb_ep *ep;
  528. struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget);
  529. unsigned long flags;
  530. spin_lock_irqsave(&ci->lock, flags);
  531. ci->gadget.speed = USB_SPEED_UNKNOWN;
  532. ci->remote_wakeup = 0;
  533. ci->suspended = 0;
  534. spin_unlock_irqrestore(&ci->lock, flags);
  535. /* flush all endpoints */
  536. gadget_for_each_ep(ep, gadget) {
  537. usb_ep_fifo_flush(ep);
  538. }
  539. usb_ep_fifo_flush(&ci->ep0out->ep);
  540. usb_ep_fifo_flush(&ci->ep0in->ep);
  541. if (ci->driver)
  542. ci->driver->disconnect(gadget);
  543. /* make sure to disable all endpoints */
  544. gadget_for_each_ep(ep, gadget) {
  545. usb_ep_disable(ep);
  546. }
  547. if (ci->status != NULL) {
  548. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  549. ci->status = NULL;
  550. }
  551. return 0;
  552. }
  553. /******************************************************************************
  554. * ISR block
  555. *****************************************************************************/
  556. /**
  557. * isr_reset_handler: USB reset interrupt handler
  558. * @ci: UDC device
  559. *
  560. * This function resets USB engine after a bus reset occurred
  561. */
  562. static void isr_reset_handler(struct ci13xxx *ci)
  563. __releases(ci->lock)
  564. __acquires(ci->lock)
  565. {
  566. int retval;
  567. spin_unlock(&ci->lock);
  568. retval = _gadget_stop_activity(&ci->gadget);
  569. if (retval)
  570. goto done;
  571. retval = hw_usb_reset(ci);
  572. if (retval)
  573. goto done;
  574. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  575. if (ci->status == NULL)
  576. retval = -ENOMEM;
  577. done:
  578. spin_lock(&ci->lock);
  579. if (retval)
  580. dev_err(ci->dev, "error: %i\n", retval);
  581. }
  582. /**
  583. * isr_get_status_complete: get_status request complete function
  584. * @ep: endpoint
  585. * @req: request handled
  586. *
  587. * Caller must release lock
  588. */
  589. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  590. {
  591. if (ep == NULL || req == NULL)
  592. return;
  593. kfree(req->buf);
  594. usb_ep_free_request(ep, req);
  595. }
  596. /**
  597. * _ep_queue: queues (submits) an I/O request to an endpoint
  598. *
  599. * Caller must hold lock
  600. */
  601. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  602. gfp_t __maybe_unused gfp_flags)
  603. {
  604. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  605. struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
  606. struct ci13xxx *ci = mEp->ci;
  607. int retval = 0;
  608. if (ep == NULL || req == NULL || mEp->ep.desc == NULL)
  609. return -EINVAL;
  610. if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
  611. if (req->length)
  612. mEp = (ci->ep0_dir == RX) ?
  613. ci->ep0out : ci->ep0in;
  614. if (!list_empty(&mEp->qh.queue)) {
  615. _ep_nuke(mEp);
  616. retval = -EOVERFLOW;
  617. dev_warn(mEp->ci->dev, "endpoint ctrl %X nuked\n",
  618. _usb_addr(mEp));
  619. }
  620. }
  621. if (usb_endpoint_xfer_isoc(mEp->ep.desc) &&
  622. mReq->req.length > (1 + mEp->ep.mult) * mEp->ep.maxpacket) {
  623. dev_err(mEp->ci->dev, "request length too big for isochronous\n");
  624. return -EMSGSIZE;
  625. }
  626. /* first nuke then test link, e.g. previous status has not sent */
  627. if (!list_empty(&mReq->queue)) {
  628. dev_err(mEp->ci->dev, "request already in queue\n");
  629. return -EBUSY;
  630. }
  631. if (req->length > (TD_PAGE_COUNT - 1) * CI13XXX_PAGE_SIZE) {
  632. dev_err(mEp->ci->dev, "request bigger than one td\n");
  633. return -EMSGSIZE;
  634. }
  635. /* push request */
  636. mReq->req.status = -EINPROGRESS;
  637. mReq->req.actual = 0;
  638. retval = _hardware_enqueue(mEp, mReq);
  639. if (retval == -EALREADY)
  640. retval = 0;
  641. if (!retval)
  642. list_add_tail(&mReq->queue, &mEp->qh.queue);
  643. return retval;
  644. }
  645. /**
  646. * isr_get_status_response: get_status request response
  647. * @ci: ci struct
  648. * @setup: setup request packet
  649. *
  650. * This function returns an error code
  651. */
  652. static int isr_get_status_response(struct ci13xxx *ci,
  653. struct usb_ctrlrequest *setup)
  654. __releases(mEp->lock)
  655. __acquires(mEp->lock)
  656. {
  657. struct ci13xxx_ep *mEp = ci->ep0in;
  658. struct usb_request *req = NULL;
  659. gfp_t gfp_flags = GFP_ATOMIC;
  660. int dir, num, retval;
  661. if (mEp == NULL || setup == NULL)
  662. return -EINVAL;
  663. spin_unlock(mEp->lock);
  664. req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
  665. spin_lock(mEp->lock);
  666. if (req == NULL)
  667. return -ENOMEM;
  668. req->complete = isr_get_status_complete;
  669. req->length = 2;
  670. req->buf = kzalloc(req->length, gfp_flags);
  671. if (req->buf == NULL) {
  672. retval = -ENOMEM;
  673. goto err_free_req;
  674. }
  675. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  676. /* Assume that device is bus powered for now. */
  677. *(u16 *)req->buf = ci->remote_wakeup << 1;
  678. retval = 0;
  679. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  680. == USB_RECIP_ENDPOINT) {
  681. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  682. TX : RX;
  683. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  684. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  685. }
  686. /* else do nothing; reserved for future use */
  687. retval = _ep_queue(&mEp->ep, req, gfp_flags);
  688. if (retval)
  689. goto err_free_buf;
  690. return 0;
  691. err_free_buf:
  692. kfree(req->buf);
  693. err_free_req:
  694. spin_unlock(mEp->lock);
  695. usb_ep_free_request(&mEp->ep, req);
  696. spin_lock(mEp->lock);
  697. return retval;
  698. }
  699. /**
  700. * isr_setup_status_complete: setup_status request complete function
  701. * @ep: endpoint
  702. * @req: request handled
  703. *
  704. * Caller must release lock. Put the port in test mode if test mode
  705. * feature is selected.
  706. */
  707. static void
  708. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  709. {
  710. struct ci13xxx *ci = req->context;
  711. unsigned long flags;
  712. if (ci->setaddr) {
  713. hw_usb_set_address(ci, ci->address);
  714. ci->setaddr = false;
  715. }
  716. spin_lock_irqsave(&ci->lock, flags);
  717. if (ci->test_mode)
  718. hw_port_test_set(ci, ci->test_mode);
  719. spin_unlock_irqrestore(&ci->lock, flags);
  720. }
  721. /**
  722. * isr_setup_status_phase: queues the status phase of a setup transation
  723. * @ci: ci struct
  724. *
  725. * This function returns an error code
  726. */
  727. static int isr_setup_status_phase(struct ci13xxx *ci)
  728. {
  729. int retval;
  730. struct ci13xxx_ep *mEp;
  731. mEp = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  732. ci->status->context = ci;
  733. ci->status->complete = isr_setup_status_complete;
  734. retval = _ep_queue(&mEp->ep, ci->status, GFP_ATOMIC);
  735. return retval;
  736. }
  737. /**
  738. * isr_tr_complete_low: transaction complete low level handler
  739. * @mEp: endpoint
  740. *
  741. * This function returns an error code
  742. * Caller must hold lock
  743. */
  744. static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
  745. __releases(mEp->lock)
  746. __acquires(mEp->lock)
  747. {
  748. struct ci13xxx_req *mReq, *mReqTemp;
  749. struct ci13xxx_ep *mEpTemp = mEp;
  750. int retval = 0;
  751. struct td_node *firstnode;
  752. list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
  753. queue) {
  754. firstnode = list_first_entry(&mReq->tds,
  755. struct td_node, td);
  756. retval = _hardware_dequeue(mEp, mReq);
  757. if (retval < 0)
  758. break;
  759. list_del_init(&mReq->queue);
  760. if (mReq->req.complete != NULL) {
  761. spin_unlock(mEp->lock);
  762. if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
  763. mReq->req.length)
  764. mEpTemp = mEp->ci->ep0in;
  765. mReq->req.complete(&mEpTemp->ep, &mReq->req);
  766. spin_lock(mEp->lock);
  767. }
  768. }
  769. if (retval == -EBUSY)
  770. retval = 0;
  771. return retval;
  772. }
  773. /**
  774. * isr_tr_complete_handler: transaction complete interrupt handler
  775. * @ci: UDC descriptor
  776. *
  777. * This function handles traffic events
  778. */
  779. static void isr_tr_complete_handler(struct ci13xxx *ci)
  780. __releases(ci->lock)
  781. __acquires(ci->lock)
  782. {
  783. unsigned i;
  784. u8 tmode = 0;
  785. for (i = 0; i < ci->hw_ep_max; i++) {
  786. struct ci13xxx_ep *mEp = &ci->ci13xxx_ep[i];
  787. int type, num, dir, err = -EINVAL;
  788. struct usb_ctrlrequest req;
  789. if (mEp->ep.desc == NULL)
  790. continue; /* not configured */
  791. if (hw_test_and_clear_complete(ci, i)) {
  792. err = isr_tr_complete_low(mEp);
  793. if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
  794. if (err > 0) /* needs status phase */
  795. err = isr_setup_status_phase(ci);
  796. if (err < 0) {
  797. spin_unlock(&ci->lock);
  798. if (usb_ep_set_halt(&mEp->ep))
  799. dev_err(ci->dev,
  800. "error: ep_set_halt\n");
  801. spin_lock(&ci->lock);
  802. }
  803. }
  804. }
  805. if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
  806. !hw_test_and_clear_setup_status(ci, i))
  807. continue;
  808. if (i != 0) {
  809. dev_warn(ci->dev, "ctrl traffic at endpoint %d\n", i);
  810. continue;
  811. }
  812. /*
  813. * Flush data and handshake transactions of previous
  814. * setup packet.
  815. */
  816. _ep_nuke(ci->ep0out);
  817. _ep_nuke(ci->ep0in);
  818. /* read_setup_packet */
  819. do {
  820. hw_test_and_set_setup_guard(ci);
  821. memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
  822. } while (!hw_test_and_clear_setup_guard(ci));
  823. type = req.bRequestType;
  824. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  825. switch (req.bRequest) {
  826. case USB_REQ_CLEAR_FEATURE:
  827. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  828. le16_to_cpu(req.wValue) ==
  829. USB_ENDPOINT_HALT) {
  830. if (req.wLength != 0)
  831. break;
  832. num = le16_to_cpu(req.wIndex);
  833. dir = num & USB_ENDPOINT_DIR_MASK;
  834. num &= USB_ENDPOINT_NUMBER_MASK;
  835. if (dir) /* TX */
  836. num += ci->hw_ep_max/2;
  837. if (!ci->ci13xxx_ep[num].wedge) {
  838. spin_unlock(&ci->lock);
  839. err = usb_ep_clear_halt(
  840. &ci->ci13xxx_ep[num].ep);
  841. spin_lock(&ci->lock);
  842. if (err)
  843. break;
  844. }
  845. err = isr_setup_status_phase(ci);
  846. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  847. le16_to_cpu(req.wValue) ==
  848. USB_DEVICE_REMOTE_WAKEUP) {
  849. if (req.wLength != 0)
  850. break;
  851. ci->remote_wakeup = 0;
  852. err = isr_setup_status_phase(ci);
  853. } else {
  854. goto delegate;
  855. }
  856. break;
  857. case USB_REQ_GET_STATUS:
  858. if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
  859. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  860. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  861. goto delegate;
  862. if (le16_to_cpu(req.wLength) != 2 ||
  863. le16_to_cpu(req.wValue) != 0)
  864. break;
  865. err = isr_get_status_response(ci, &req);
  866. break;
  867. case USB_REQ_SET_ADDRESS:
  868. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  869. goto delegate;
  870. if (le16_to_cpu(req.wLength) != 0 ||
  871. le16_to_cpu(req.wIndex) != 0)
  872. break;
  873. ci->address = (u8)le16_to_cpu(req.wValue);
  874. ci->setaddr = true;
  875. err = isr_setup_status_phase(ci);
  876. break;
  877. case USB_REQ_SET_FEATURE:
  878. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  879. le16_to_cpu(req.wValue) ==
  880. USB_ENDPOINT_HALT) {
  881. if (req.wLength != 0)
  882. break;
  883. num = le16_to_cpu(req.wIndex);
  884. dir = num & USB_ENDPOINT_DIR_MASK;
  885. num &= USB_ENDPOINT_NUMBER_MASK;
  886. if (dir) /* TX */
  887. num += ci->hw_ep_max/2;
  888. spin_unlock(&ci->lock);
  889. err = usb_ep_set_halt(&ci->ci13xxx_ep[num].ep);
  890. spin_lock(&ci->lock);
  891. if (!err)
  892. isr_setup_status_phase(ci);
  893. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  894. if (req.wLength != 0)
  895. break;
  896. switch (le16_to_cpu(req.wValue)) {
  897. case USB_DEVICE_REMOTE_WAKEUP:
  898. ci->remote_wakeup = 1;
  899. err = isr_setup_status_phase(ci);
  900. break;
  901. case USB_DEVICE_TEST_MODE:
  902. tmode = le16_to_cpu(req.wIndex) >> 8;
  903. switch (tmode) {
  904. case TEST_J:
  905. case TEST_K:
  906. case TEST_SE0_NAK:
  907. case TEST_PACKET:
  908. case TEST_FORCE_EN:
  909. ci->test_mode = tmode;
  910. err = isr_setup_status_phase(
  911. ci);
  912. break;
  913. default:
  914. break;
  915. }
  916. default:
  917. goto delegate;
  918. }
  919. } else {
  920. goto delegate;
  921. }
  922. break;
  923. default:
  924. delegate:
  925. if (req.wLength == 0) /* no data phase */
  926. ci->ep0_dir = TX;
  927. spin_unlock(&ci->lock);
  928. err = ci->driver->setup(&ci->gadget, &req);
  929. spin_lock(&ci->lock);
  930. break;
  931. }
  932. if (err < 0) {
  933. spin_unlock(&ci->lock);
  934. if (usb_ep_set_halt(&mEp->ep))
  935. dev_err(ci->dev, "error: ep_set_halt\n");
  936. spin_lock(&ci->lock);
  937. }
  938. }
  939. }
  940. /******************************************************************************
  941. * ENDPT block
  942. *****************************************************************************/
  943. /**
  944. * ep_enable: configure endpoint, making it usable
  945. *
  946. * Check usb_ep_enable() at "usb_gadget.h" for details
  947. */
  948. static int ep_enable(struct usb_ep *ep,
  949. const struct usb_endpoint_descriptor *desc)
  950. {
  951. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  952. int retval = 0;
  953. unsigned long flags;
  954. u32 cap = 0;
  955. if (ep == NULL || desc == NULL)
  956. return -EINVAL;
  957. spin_lock_irqsave(mEp->lock, flags);
  958. /* only internal SW should enable ctrl endpts */
  959. mEp->ep.desc = desc;
  960. if (!list_empty(&mEp->qh.queue))
  961. dev_warn(mEp->ci->dev, "enabling a non-empty endpoint!\n");
  962. mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  963. mEp->num = usb_endpoint_num(desc);
  964. mEp->type = usb_endpoint_type(desc);
  965. mEp->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
  966. mEp->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
  967. if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
  968. cap |= QH_IOS;
  969. if (mEp->num)
  970. cap |= QH_ZLT;
  971. cap |= (mEp->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  972. mEp->qh.ptr->cap = cpu_to_le32(cap);
  973. mEp->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  974. /*
  975. * Enable endpoints in the HW other than ep0 as ep0
  976. * is always enabled
  977. */
  978. if (mEp->num)
  979. retval |= hw_ep_enable(mEp->ci, mEp->num, mEp->dir, mEp->type);
  980. spin_unlock_irqrestore(mEp->lock, flags);
  981. return retval;
  982. }
  983. /**
  984. * ep_disable: endpoint is no longer usable
  985. *
  986. * Check usb_ep_disable() at "usb_gadget.h" for details
  987. */
  988. static int ep_disable(struct usb_ep *ep)
  989. {
  990. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  991. int direction, retval = 0;
  992. unsigned long flags;
  993. if (ep == NULL)
  994. return -EINVAL;
  995. else if (mEp->ep.desc == NULL)
  996. return -EBUSY;
  997. spin_lock_irqsave(mEp->lock, flags);
  998. /* only internal SW should disable ctrl endpts */
  999. direction = mEp->dir;
  1000. do {
  1001. retval |= _ep_nuke(mEp);
  1002. retval |= hw_ep_disable(mEp->ci, mEp->num, mEp->dir);
  1003. if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
  1004. mEp->dir = (mEp->dir == TX) ? RX : TX;
  1005. } while (mEp->dir != direction);
  1006. mEp->ep.desc = NULL;
  1007. spin_unlock_irqrestore(mEp->lock, flags);
  1008. return retval;
  1009. }
  1010. /**
  1011. * ep_alloc_request: allocate a request object to use with this endpoint
  1012. *
  1013. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  1014. */
  1015. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  1016. {
  1017. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1018. struct ci13xxx_req *mReq = NULL;
  1019. struct td_node *node;
  1020. if (ep == NULL)
  1021. return NULL;
  1022. mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
  1023. node = kzalloc(sizeof(struct td_node), gfp_flags);
  1024. if (mReq != NULL && node != NULL) {
  1025. INIT_LIST_HEAD(&mReq->queue);
  1026. INIT_LIST_HEAD(&mReq->tds);
  1027. INIT_LIST_HEAD(&node->td);
  1028. node->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
  1029. &node->dma);
  1030. if (node->ptr == NULL) {
  1031. kfree(node);
  1032. kfree(mReq);
  1033. mReq = NULL;
  1034. } else {
  1035. list_add_tail(&node->td, &mReq->tds);
  1036. }
  1037. }
  1038. return (mReq == NULL) ? NULL : &mReq->req;
  1039. }
  1040. /**
  1041. * ep_free_request: frees a request object
  1042. *
  1043. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1044. */
  1045. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1046. {
  1047. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1048. struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
  1049. struct td_node *firstnode;
  1050. unsigned long flags;
  1051. if (ep == NULL || req == NULL) {
  1052. return;
  1053. } else if (!list_empty(&mReq->queue)) {
  1054. dev_err(mEp->ci->dev, "freeing queued request\n");
  1055. return;
  1056. }
  1057. spin_lock_irqsave(mEp->lock, flags);
  1058. firstnode = list_first_entry(&mReq->tds,
  1059. struct td_node, td);
  1060. if (firstnode->ptr)
  1061. dma_pool_free(mEp->td_pool, firstnode->ptr, firstnode->dma);
  1062. kfree(mReq);
  1063. spin_unlock_irqrestore(mEp->lock, flags);
  1064. }
  1065. /**
  1066. * ep_queue: queues (submits) an I/O request to an endpoint
  1067. *
  1068. * Check usb_ep_queue()* at usb_gadget.h" for details
  1069. */
  1070. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1071. gfp_t __maybe_unused gfp_flags)
  1072. {
  1073. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1074. int retval = 0;
  1075. unsigned long flags;
  1076. if (ep == NULL || req == NULL || mEp->ep.desc == NULL)
  1077. return -EINVAL;
  1078. spin_lock_irqsave(mEp->lock, flags);
  1079. retval = _ep_queue(ep, req, gfp_flags);
  1080. spin_unlock_irqrestore(mEp->lock, flags);
  1081. return retval;
  1082. }
  1083. /**
  1084. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1085. *
  1086. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1087. */
  1088. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1089. {
  1090. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1091. struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
  1092. unsigned long flags;
  1093. if (ep == NULL || req == NULL || mReq->req.status != -EALREADY ||
  1094. mEp->ep.desc == NULL || list_empty(&mReq->queue) ||
  1095. list_empty(&mEp->qh.queue))
  1096. return -EINVAL;
  1097. spin_lock_irqsave(mEp->lock, flags);
  1098. hw_ep_flush(mEp->ci, mEp->num, mEp->dir);
  1099. /* pop request */
  1100. list_del_init(&mReq->queue);
  1101. usb_gadget_unmap_request(&mEp->ci->gadget, req, mEp->dir);
  1102. req->status = -ECONNRESET;
  1103. if (mReq->req.complete != NULL) {
  1104. spin_unlock(mEp->lock);
  1105. mReq->req.complete(&mEp->ep, &mReq->req);
  1106. spin_lock(mEp->lock);
  1107. }
  1108. spin_unlock_irqrestore(mEp->lock, flags);
  1109. return 0;
  1110. }
  1111. /**
  1112. * ep_set_halt: sets the endpoint halt feature
  1113. *
  1114. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1115. */
  1116. static int ep_set_halt(struct usb_ep *ep, int value)
  1117. {
  1118. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1119. int direction, retval = 0;
  1120. unsigned long flags;
  1121. if (ep == NULL || mEp->ep.desc == NULL)
  1122. return -EINVAL;
  1123. if (usb_endpoint_xfer_isoc(mEp->ep.desc))
  1124. return -EOPNOTSUPP;
  1125. spin_lock_irqsave(mEp->lock, flags);
  1126. #ifndef STALL_IN
  1127. /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
  1128. if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
  1129. !list_empty(&mEp->qh.queue)) {
  1130. spin_unlock_irqrestore(mEp->lock, flags);
  1131. return -EAGAIN;
  1132. }
  1133. #endif
  1134. direction = mEp->dir;
  1135. do {
  1136. retval |= hw_ep_set_halt(mEp->ci, mEp->num, mEp->dir, value);
  1137. if (!value)
  1138. mEp->wedge = 0;
  1139. if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
  1140. mEp->dir = (mEp->dir == TX) ? RX : TX;
  1141. } while (mEp->dir != direction);
  1142. spin_unlock_irqrestore(mEp->lock, flags);
  1143. return retval;
  1144. }
  1145. /**
  1146. * ep_set_wedge: sets the halt feature and ignores clear requests
  1147. *
  1148. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1149. */
  1150. static int ep_set_wedge(struct usb_ep *ep)
  1151. {
  1152. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1153. unsigned long flags;
  1154. if (ep == NULL || mEp->ep.desc == NULL)
  1155. return -EINVAL;
  1156. spin_lock_irqsave(mEp->lock, flags);
  1157. mEp->wedge = 1;
  1158. spin_unlock_irqrestore(mEp->lock, flags);
  1159. return usb_ep_set_halt(ep);
  1160. }
  1161. /**
  1162. * ep_fifo_flush: flushes contents of a fifo
  1163. *
  1164. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1165. */
  1166. static void ep_fifo_flush(struct usb_ep *ep)
  1167. {
  1168. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1169. unsigned long flags;
  1170. if (ep == NULL) {
  1171. dev_err(mEp->ci->dev, "%02X: -EINVAL\n", _usb_addr(mEp));
  1172. return;
  1173. }
  1174. spin_lock_irqsave(mEp->lock, flags);
  1175. hw_ep_flush(mEp->ci, mEp->num, mEp->dir);
  1176. spin_unlock_irqrestore(mEp->lock, flags);
  1177. }
  1178. /**
  1179. * Endpoint-specific part of the API to the USB controller hardware
  1180. * Check "usb_gadget.h" for details
  1181. */
  1182. static const struct usb_ep_ops usb_ep_ops = {
  1183. .enable = ep_enable,
  1184. .disable = ep_disable,
  1185. .alloc_request = ep_alloc_request,
  1186. .free_request = ep_free_request,
  1187. .queue = ep_queue,
  1188. .dequeue = ep_dequeue,
  1189. .set_halt = ep_set_halt,
  1190. .set_wedge = ep_set_wedge,
  1191. .fifo_flush = ep_fifo_flush,
  1192. };
  1193. /******************************************************************************
  1194. * GADGET block
  1195. *****************************************************************************/
  1196. static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
  1197. {
  1198. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1199. unsigned long flags;
  1200. int gadget_ready = 0;
  1201. if (!(ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS))
  1202. return -EOPNOTSUPP;
  1203. spin_lock_irqsave(&ci->lock, flags);
  1204. ci->vbus_active = is_active;
  1205. if (ci->driver)
  1206. gadget_ready = 1;
  1207. spin_unlock_irqrestore(&ci->lock, flags);
  1208. if (gadget_ready) {
  1209. if (is_active) {
  1210. pm_runtime_get_sync(&_gadget->dev);
  1211. hw_device_reset(ci, USBMODE_CM_DC);
  1212. hw_device_state(ci, ci->ep0out->qh.dma);
  1213. } else {
  1214. hw_device_state(ci, 0);
  1215. if (ci->platdata->notify_event)
  1216. ci->platdata->notify_event(ci,
  1217. CI13XXX_CONTROLLER_STOPPED_EVENT);
  1218. _gadget_stop_activity(&ci->gadget);
  1219. pm_runtime_put_sync(&_gadget->dev);
  1220. }
  1221. }
  1222. return 0;
  1223. }
  1224. static int ci13xxx_wakeup(struct usb_gadget *_gadget)
  1225. {
  1226. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1227. unsigned long flags;
  1228. int ret = 0;
  1229. spin_lock_irqsave(&ci->lock, flags);
  1230. if (!ci->remote_wakeup) {
  1231. ret = -EOPNOTSUPP;
  1232. goto out;
  1233. }
  1234. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1235. ret = -EINVAL;
  1236. goto out;
  1237. }
  1238. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1239. out:
  1240. spin_unlock_irqrestore(&ci->lock, flags);
  1241. return ret;
  1242. }
  1243. static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
  1244. {
  1245. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1246. if (ci->transceiver)
  1247. return usb_phy_set_power(ci->transceiver, mA);
  1248. return -ENOTSUPP;
  1249. }
  1250. /* Change Data+ pullup status
  1251. * this func is used by usb_gadget_connect/disconnet
  1252. */
  1253. static int ci13xxx_pullup(struct usb_gadget *_gadget, int is_on)
  1254. {
  1255. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1256. if (is_on)
  1257. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1258. else
  1259. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1260. return 0;
  1261. }
  1262. static int ci13xxx_start(struct usb_gadget *gadget,
  1263. struct usb_gadget_driver *driver);
  1264. static int ci13xxx_stop(struct usb_gadget *gadget,
  1265. struct usb_gadget_driver *driver);
  1266. /**
  1267. * Device operations part of the API to the USB controller hardware,
  1268. * which don't involve endpoints (or i/o)
  1269. * Check "usb_gadget.h" for details
  1270. */
  1271. static const struct usb_gadget_ops usb_gadget_ops = {
  1272. .vbus_session = ci13xxx_vbus_session,
  1273. .wakeup = ci13xxx_wakeup,
  1274. .pullup = ci13xxx_pullup,
  1275. .vbus_draw = ci13xxx_vbus_draw,
  1276. .udc_start = ci13xxx_start,
  1277. .udc_stop = ci13xxx_stop,
  1278. };
  1279. static int init_eps(struct ci13xxx *ci)
  1280. {
  1281. int retval = 0, i, j;
  1282. for (i = 0; i < ci->hw_ep_max/2; i++)
  1283. for (j = RX; j <= TX; j++) {
  1284. int k = i + j * ci->hw_ep_max/2;
  1285. struct ci13xxx_ep *mEp = &ci->ci13xxx_ep[k];
  1286. scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
  1287. (j == TX) ? "in" : "out");
  1288. mEp->ci = ci;
  1289. mEp->lock = &ci->lock;
  1290. mEp->td_pool = ci->td_pool;
  1291. mEp->ep.name = mEp->name;
  1292. mEp->ep.ops = &usb_ep_ops;
  1293. /*
  1294. * for ep0: maxP defined in desc, for other
  1295. * eps, maxP is set by epautoconfig() called
  1296. * by gadget layer
  1297. */
  1298. mEp->ep.maxpacket = (unsigned short)~0;
  1299. INIT_LIST_HEAD(&mEp->qh.queue);
  1300. mEp->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
  1301. &mEp->qh.dma);
  1302. if (mEp->qh.ptr == NULL)
  1303. retval = -ENOMEM;
  1304. else
  1305. memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
  1306. /*
  1307. * set up shorthands for ep0 out and in endpoints,
  1308. * don't add to gadget's ep_list
  1309. */
  1310. if (i == 0) {
  1311. if (j == RX)
  1312. ci->ep0out = mEp;
  1313. else
  1314. ci->ep0in = mEp;
  1315. mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
  1316. continue;
  1317. }
  1318. list_add_tail(&mEp->ep.ep_list, &ci->gadget.ep_list);
  1319. }
  1320. return retval;
  1321. }
  1322. static void destroy_eps(struct ci13xxx *ci)
  1323. {
  1324. int i;
  1325. for (i = 0; i < ci->hw_ep_max; i++) {
  1326. struct ci13xxx_ep *mEp = &ci->ci13xxx_ep[i];
  1327. dma_pool_free(ci->qh_pool, mEp->qh.ptr, mEp->qh.dma);
  1328. }
  1329. }
  1330. /**
  1331. * ci13xxx_start: register a gadget driver
  1332. * @gadget: our gadget
  1333. * @driver: the driver being registered
  1334. *
  1335. * Interrupts are enabled here.
  1336. */
  1337. static int ci13xxx_start(struct usb_gadget *gadget,
  1338. struct usb_gadget_driver *driver)
  1339. {
  1340. struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget);
  1341. unsigned long flags;
  1342. int retval = -ENOMEM;
  1343. if (driver->disconnect == NULL)
  1344. return -EINVAL;
  1345. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1346. retval = usb_ep_enable(&ci->ep0out->ep);
  1347. if (retval)
  1348. return retval;
  1349. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1350. retval = usb_ep_enable(&ci->ep0in->ep);
  1351. if (retval)
  1352. return retval;
  1353. spin_lock_irqsave(&ci->lock, flags);
  1354. ci->driver = driver;
  1355. pm_runtime_get_sync(&ci->gadget.dev);
  1356. if (ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS) {
  1357. if (ci->vbus_active) {
  1358. if (ci->platdata->flags & CI13XXX_REGS_SHARED)
  1359. hw_device_reset(ci, USBMODE_CM_DC);
  1360. } else {
  1361. pm_runtime_put_sync(&ci->gadget.dev);
  1362. goto done;
  1363. }
  1364. }
  1365. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1366. if (retval)
  1367. pm_runtime_put_sync(&ci->gadget.dev);
  1368. done:
  1369. spin_unlock_irqrestore(&ci->lock, flags);
  1370. return retval;
  1371. }
  1372. /**
  1373. * ci13xxx_stop: unregister a gadget driver
  1374. */
  1375. static int ci13xxx_stop(struct usb_gadget *gadget,
  1376. struct usb_gadget_driver *driver)
  1377. {
  1378. struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget);
  1379. unsigned long flags;
  1380. spin_lock_irqsave(&ci->lock, flags);
  1381. if (!(ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS) ||
  1382. ci->vbus_active) {
  1383. hw_device_state(ci, 0);
  1384. if (ci->platdata->notify_event)
  1385. ci->platdata->notify_event(ci,
  1386. CI13XXX_CONTROLLER_STOPPED_EVENT);
  1387. ci->driver = NULL;
  1388. spin_unlock_irqrestore(&ci->lock, flags);
  1389. _gadget_stop_activity(&ci->gadget);
  1390. spin_lock_irqsave(&ci->lock, flags);
  1391. pm_runtime_put(&ci->gadget.dev);
  1392. }
  1393. spin_unlock_irqrestore(&ci->lock, flags);
  1394. return 0;
  1395. }
  1396. /******************************************************************************
  1397. * BUS block
  1398. *****************************************************************************/
  1399. /**
  1400. * udc_irq: ci interrupt handler
  1401. *
  1402. * This function returns IRQ_HANDLED if the IRQ has been handled
  1403. * It locks access to registers
  1404. */
  1405. static irqreturn_t udc_irq(struct ci13xxx *ci)
  1406. {
  1407. irqreturn_t retval;
  1408. u32 intr;
  1409. if (ci == NULL)
  1410. return IRQ_HANDLED;
  1411. spin_lock(&ci->lock);
  1412. if (ci->platdata->flags & CI13XXX_REGS_SHARED) {
  1413. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1414. USBMODE_CM_DC) {
  1415. spin_unlock(&ci->lock);
  1416. return IRQ_NONE;
  1417. }
  1418. }
  1419. intr = hw_test_and_clear_intr_active(ci);
  1420. if (intr) {
  1421. /* order defines priority - do NOT change it */
  1422. if (USBi_URI & intr)
  1423. isr_reset_handler(ci);
  1424. if (USBi_PCI & intr) {
  1425. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1426. USB_SPEED_HIGH : USB_SPEED_FULL;
  1427. if (ci->suspended && ci->driver->resume) {
  1428. spin_unlock(&ci->lock);
  1429. ci->driver->resume(&ci->gadget);
  1430. spin_lock(&ci->lock);
  1431. ci->suspended = 0;
  1432. }
  1433. }
  1434. if (USBi_UI & intr)
  1435. isr_tr_complete_handler(ci);
  1436. if (USBi_SLI & intr) {
  1437. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1438. ci->driver->suspend) {
  1439. ci->suspended = 1;
  1440. spin_unlock(&ci->lock);
  1441. ci->driver->suspend(&ci->gadget);
  1442. spin_lock(&ci->lock);
  1443. }
  1444. }
  1445. retval = IRQ_HANDLED;
  1446. } else {
  1447. retval = IRQ_NONE;
  1448. }
  1449. spin_unlock(&ci->lock);
  1450. return retval;
  1451. }
  1452. /**
  1453. * udc_start: initialize gadget role
  1454. * @ci: chipidea controller
  1455. */
  1456. static int udc_start(struct ci13xxx *ci)
  1457. {
  1458. struct device *dev = ci->dev;
  1459. int retval = 0;
  1460. spin_lock_init(&ci->lock);
  1461. ci->gadget.ops = &usb_gadget_ops;
  1462. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1463. ci->gadget.max_speed = USB_SPEED_HIGH;
  1464. ci->gadget.is_otg = 0;
  1465. ci->gadget.name = ci->platdata->name;
  1466. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1467. /* alloc resources */
  1468. ci->qh_pool = dma_pool_create("ci13xxx_qh", dev,
  1469. sizeof(struct ci13xxx_qh),
  1470. 64, CI13XXX_PAGE_SIZE);
  1471. if (ci->qh_pool == NULL)
  1472. return -ENOMEM;
  1473. ci->td_pool = dma_pool_create("ci13xxx_td", dev,
  1474. sizeof(struct ci13xxx_td),
  1475. 64, CI13XXX_PAGE_SIZE);
  1476. if (ci->td_pool == NULL) {
  1477. retval = -ENOMEM;
  1478. goto free_qh_pool;
  1479. }
  1480. retval = init_eps(ci);
  1481. if (retval)
  1482. goto free_pools;
  1483. ci->gadget.ep0 = &ci->ep0in->ep;
  1484. if (ci->global_phy) {
  1485. ci->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
  1486. if (IS_ERR(ci->transceiver))
  1487. ci->transceiver = NULL;
  1488. }
  1489. if (ci->platdata->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
  1490. if (ci->transceiver == NULL) {
  1491. retval = -ENODEV;
  1492. goto destroy_eps;
  1493. }
  1494. }
  1495. if (!(ci->platdata->flags & CI13XXX_REGS_SHARED)) {
  1496. retval = hw_device_reset(ci, USBMODE_CM_DC);
  1497. if (retval)
  1498. goto put_transceiver;
  1499. }
  1500. if (ci->transceiver) {
  1501. retval = otg_set_peripheral(ci->transceiver->otg,
  1502. &ci->gadget);
  1503. if (retval)
  1504. goto put_transceiver;
  1505. }
  1506. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1507. if (retval)
  1508. goto remove_trans;
  1509. pm_runtime_no_callbacks(&ci->gadget.dev);
  1510. pm_runtime_enable(&ci->gadget.dev);
  1511. return retval;
  1512. remove_trans:
  1513. if (ci->transceiver) {
  1514. otg_set_peripheral(ci->transceiver->otg, NULL);
  1515. if (ci->global_phy)
  1516. usb_put_phy(ci->transceiver);
  1517. }
  1518. dev_err(dev, "error = %i\n", retval);
  1519. put_transceiver:
  1520. if (ci->transceiver && ci->global_phy)
  1521. usb_put_phy(ci->transceiver);
  1522. destroy_eps:
  1523. destroy_eps(ci);
  1524. free_pools:
  1525. dma_pool_destroy(ci->td_pool);
  1526. free_qh_pool:
  1527. dma_pool_destroy(ci->qh_pool);
  1528. return retval;
  1529. }
  1530. /**
  1531. * udc_remove: parent remove must call this to remove UDC
  1532. *
  1533. * No interrupts active, the IRQ has been released
  1534. */
  1535. static void udc_stop(struct ci13xxx *ci)
  1536. {
  1537. if (ci == NULL)
  1538. return;
  1539. usb_del_gadget_udc(&ci->gadget);
  1540. destroy_eps(ci);
  1541. dma_pool_destroy(ci->td_pool);
  1542. dma_pool_destroy(ci->qh_pool);
  1543. if (ci->transceiver) {
  1544. otg_set_peripheral(ci->transceiver->otg, NULL);
  1545. if (ci->global_phy)
  1546. usb_put_phy(ci->transceiver);
  1547. }
  1548. /* my kobject is dynamic, I swear! */
  1549. memset(&ci->gadget, 0, sizeof(ci->gadget));
  1550. }
  1551. /**
  1552. * ci_hdrc_gadget_init - initialize device related bits
  1553. * ci: the controller
  1554. *
  1555. * This function enables the gadget role, if the device is "device capable".
  1556. */
  1557. int ci_hdrc_gadget_init(struct ci13xxx *ci)
  1558. {
  1559. struct ci_role_driver *rdrv;
  1560. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1561. return -ENXIO;
  1562. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  1563. if (!rdrv)
  1564. return -ENOMEM;
  1565. rdrv->start = udc_start;
  1566. rdrv->stop = udc_stop;
  1567. rdrv->irq = udc_irq;
  1568. rdrv->name = "gadget";
  1569. ci->roles[CI_ROLE_GADGET] = rdrv;
  1570. return 0;
  1571. }