patch_hdmi.c 77 KB

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  1. /*
  2. *
  3. * patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4. *
  5. * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6. * Copyright (c) 2006 ATI Technologies Inc.
  7. * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
  8. * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9. *
  10. * Authors:
  11. * Wu Fengguang <wfg@linux.intel.com>
  12. *
  13. * Maintained by:
  14. * Wu Fengguang <wfg@linux.intel.com>
  15. *
  16. * This program is free software; you can redistribute it and/or modify it
  17. * under the terms of the GNU General Public License as published by the Free
  18. * Software Foundation; either version 2 of the License, or (at your option)
  19. * any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  24. * for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software Foundation,
  28. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  29. */
  30. #include <linux/init.h>
  31. #include <linux/delay.h>
  32. #include <linux/slab.h>
  33. #include <linux/module.h>
  34. #include <sound/core.h>
  35. #include <sound/jack.h>
  36. #include <sound/asoundef.h>
  37. #include <sound/tlv.h>
  38. #include "hda_codec.h"
  39. #include "hda_local.h"
  40. #include "hda_jack.h"
  41. static bool static_hdmi_pcm;
  42. module_param(static_hdmi_pcm, bool, 0644);
  43. MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  44. struct hdmi_spec_per_cvt {
  45. hda_nid_t cvt_nid;
  46. int assigned;
  47. unsigned int channels_min;
  48. unsigned int channels_max;
  49. u32 rates;
  50. u64 formats;
  51. unsigned int maxbps;
  52. };
  53. /* max. connections to a widget */
  54. #define HDA_MAX_CONNECTIONS 32
  55. struct hdmi_spec_per_pin {
  56. hda_nid_t pin_nid;
  57. int num_mux_nids;
  58. hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  59. struct hda_codec *codec;
  60. struct hdmi_eld sink_eld;
  61. struct delayed_work work;
  62. struct snd_kcontrol *eld_ctl;
  63. int repoll_count;
  64. bool setup; /* the stream has been set up by prepare callback */
  65. int channels; /* current number of channels */
  66. bool non_pcm;
  67. bool chmap_set; /* channel-map override by ALSA API? */
  68. unsigned char chmap[8]; /* ALSA API channel-map */
  69. char pcm_name[8]; /* filled in build_pcm callbacks */
  70. };
  71. struct hdmi_spec {
  72. int num_cvts;
  73. struct snd_array cvts; /* struct hdmi_spec_per_cvt */
  74. hda_nid_t cvt_nids[4]; /* only for haswell fix */
  75. int num_pins;
  76. struct snd_array pins; /* struct hdmi_spec_per_pin */
  77. struct snd_array pcm_rec; /* struct hda_pcm */
  78. unsigned int channels_max; /* max over all cvts */
  79. struct hdmi_eld temp_eld;
  80. /*
  81. * Non-generic ATI/NVIDIA specific
  82. */
  83. struct hda_multi_out multiout;
  84. struct hda_pcm_stream pcm_playback;
  85. };
  86. struct hdmi_audio_infoframe {
  87. u8 type; /* 0x84 */
  88. u8 ver; /* 0x01 */
  89. u8 len; /* 0x0a */
  90. u8 checksum;
  91. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  92. u8 SS01_SF24;
  93. u8 CXT04;
  94. u8 CA;
  95. u8 LFEPBL01_LSV36_DM_INH7;
  96. };
  97. struct dp_audio_infoframe {
  98. u8 type; /* 0x84 */
  99. u8 len; /* 0x1b */
  100. u8 ver; /* 0x11 << 2 */
  101. u8 CC02_CT47; /* match with HDMI infoframe from this on */
  102. u8 SS01_SF24;
  103. u8 CXT04;
  104. u8 CA;
  105. u8 LFEPBL01_LSV36_DM_INH7;
  106. };
  107. union audio_infoframe {
  108. struct hdmi_audio_infoframe hdmi;
  109. struct dp_audio_infoframe dp;
  110. u8 bytes[0];
  111. };
  112. /*
  113. * CEA speaker placement:
  114. *
  115. * FLH FCH FRH
  116. * FLW FL FLC FC FRC FR FRW
  117. *
  118. * LFE
  119. * TC
  120. *
  121. * RL RLC RC RRC RR
  122. *
  123. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  124. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  125. */
  126. enum cea_speaker_placement {
  127. FL = (1 << 0), /* Front Left */
  128. FC = (1 << 1), /* Front Center */
  129. FR = (1 << 2), /* Front Right */
  130. FLC = (1 << 3), /* Front Left Center */
  131. FRC = (1 << 4), /* Front Right Center */
  132. RL = (1 << 5), /* Rear Left */
  133. RC = (1 << 6), /* Rear Center */
  134. RR = (1 << 7), /* Rear Right */
  135. RLC = (1 << 8), /* Rear Left Center */
  136. RRC = (1 << 9), /* Rear Right Center */
  137. LFE = (1 << 10), /* Low Frequency Effect */
  138. FLW = (1 << 11), /* Front Left Wide */
  139. FRW = (1 << 12), /* Front Right Wide */
  140. FLH = (1 << 13), /* Front Left High */
  141. FCH = (1 << 14), /* Front Center High */
  142. FRH = (1 << 15), /* Front Right High */
  143. TC = (1 << 16), /* Top Center */
  144. };
  145. /*
  146. * ELD SA bits in the CEA Speaker Allocation data block
  147. */
  148. static int eld_speaker_allocation_bits[] = {
  149. [0] = FL | FR,
  150. [1] = LFE,
  151. [2] = FC,
  152. [3] = RL | RR,
  153. [4] = RC,
  154. [5] = FLC | FRC,
  155. [6] = RLC | RRC,
  156. /* the following are not defined in ELD yet */
  157. [7] = FLW | FRW,
  158. [8] = FLH | FRH,
  159. [9] = TC,
  160. [10] = FCH,
  161. };
  162. struct cea_channel_speaker_allocation {
  163. int ca_index;
  164. int speakers[8];
  165. /* derived values, just for convenience */
  166. int channels;
  167. int spk_mask;
  168. };
  169. /*
  170. * ALSA sequence is:
  171. *
  172. * surround40 surround41 surround50 surround51 surround71
  173. * ch0 front left = = = =
  174. * ch1 front right = = = =
  175. * ch2 rear left = = = =
  176. * ch3 rear right = = = =
  177. * ch4 LFE center center center
  178. * ch5 LFE LFE
  179. * ch6 side left
  180. * ch7 side right
  181. *
  182. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  183. */
  184. static int hdmi_channel_mapping[0x32][8] = {
  185. /* stereo */
  186. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  187. /* 2.1 */
  188. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  189. /* Dolby Surround */
  190. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  191. /* surround40 */
  192. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  193. /* 4ch */
  194. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  195. /* surround41 */
  196. [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
  197. /* surround50 */
  198. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  199. /* surround51 */
  200. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  201. /* 7.1 */
  202. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  203. };
  204. /*
  205. * This is an ordered list!
  206. *
  207. * The preceding ones have better chances to be selected by
  208. * hdmi_channel_allocation().
  209. */
  210. static struct cea_channel_speaker_allocation channel_allocations[] = {
  211. /* channel: 7 6 5 4 3 2 1 0 */
  212. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  213. /* 2.1 */
  214. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  215. /* Dolby Surround */
  216. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  217. /* surround40 */
  218. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  219. /* surround41 */
  220. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  221. /* surround50 */
  222. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  223. /* surround51 */
  224. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  225. /* 6.1 */
  226. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  227. /* surround71 */
  228. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  229. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  230. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  231. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  232. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  233. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  234. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  235. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  236. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  237. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  238. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  239. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  240. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  241. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  242. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  243. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  244. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  245. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  246. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  247. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  248. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  249. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  250. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  251. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  252. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  253. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  254. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  255. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  256. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  257. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  258. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  259. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  260. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  261. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  262. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  263. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  264. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  265. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  266. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  267. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  268. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  269. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  270. };
  271. /*
  272. * HDMI routines
  273. */
  274. #define get_pin(spec, idx) \
  275. ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
  276. #define get_cvt(spec, idx) \
  277. ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
  278. #define get_pcm_rec(spec, idx) \
  279. ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
  280. static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
  281. {
  282. int pin_idx;
  283. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  284. if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
  285. return pin_idx;
  286. snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
  287. return -EINVAL;
  288. }
  289. static int hinfo_to_pin_index(struct hdmi_spec *spec,
  290. struct hda_pcm_stream *hinfo)
  291. {
  292. int pin_idx;
  293. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  294. if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
  295. return pin_idx;
  296. snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
  297. return -EINVAL;
  298. }
  299. static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
  300. {
  301. int cvt_idx;
  302. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
  303. if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
  304. return cvt_idx;
  305. snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
  306. return -EINVAL;
  307. }
  308. static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
  309. struct snd_ctl_elem_info *uinfo)
  310. {
  311. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  312. struct hdmi_spec *spec = codec->spec;
  313. struct hdmi_eld *eld;
  314. int pin_idx;
  315. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  316. pin_idx = kcontrol->private_value;
  317. eld = &get_pin(spec, pin_idx)->sink_eld;
  318. mutex_lock(&eld->lock);
  319. uinfo->count = eld->eld_valid ? eld->eld_size : 0;
  320. mutex_unlock(&eld->lock);
  321. return 0;
  322. }
  323. static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
  324. struct snd_ctl_elem_value *ucontrol)
  325. {
  326. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  327. struct hdmi_spec *spec = codec->spec;
  328. struct hdmi_eld *eld;
  329. int pin_idx;
  330. pin_idx = kcontrol->private_value;
  331. eld = &get_pin(spec, pin_idx)->sink_eld;
  332. mutex_lock(&eld->lock);
  333. if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
  334. mutex_unlock(&eld->lock);
  335. snd_BUG();
  336. return -EINVAL;
  337. }
  338. memset(ucontrol->value.bytes.data, 0,
  339. ARRAY_SIZE(ucontrol->value.bytes.data));
  340. if (eld->eld_valid)
  341. memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
  342. eld->eld_size);
  343. mutex_unlock(&eld->lock);
  344. return 0;
  345. }
  346. static struct snd_kcontrol_new eld_bytes_ctl = {
  347. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  348. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  349. .name = "ELD",
  350. .info = hdmi_eld_ctl_info,
  351. .get = hdmi_eld_ctl_get,
  352. };
  353. static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
  354. int device)
  355. {
  356. struct snd_kcontrol *kctl;
  357. struct hdmi_spec *spec = codec->spec;
  358. int err;
  359. kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
  360. if (!kctl)
  361. return -ENOMEM;
  362. kctl->private_value = pin_idx;
  363. kctl->id.device = device;
  364. err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
  365. if (err < 0)
  366. return err;
  367. get_pin(spec, pin_idx)->eld_ctl = kctl;
  368. return 0;
  369. }
  370. #ifdef BE_PARANOID
  371. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  372. int *packet_index, int *byte_index)
  373. {
  374. int val;
  375. val = snd_hda_codec_read(codec, pin_nid, 0,
  376. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  377. *packet_index = val >> 5;
  378. *byte_index = val & 0x1f;
  379. }
  380. #endif
  381. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  382. int packet_index, int byte_index)
  383. {
  384. int val;
  385. val = (packet_index << 5) | (byte_index & 0x1f);
  386. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  387. }
  388. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  389. unsigned char val)
  390. {
  391. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  392. }
  393. static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  394. {
  395. /* Unmute */
  396. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  397. snd_hda_codec_write(codec, pin_nid, 0,
  398. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  399. /* Enable pin out: some machines with GM965 gets broken output when
  400. * the pin is disabled or changed while using with HDMI
  401. */
  402. snd_hda_codec_write(codec, pin_nid, 0,
  403. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  404. }
  405. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
  406. {
  407. return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
  408. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  409. }
  410. static void hdmi_set_channel_count(struct hda_codec *codec,
  411. hda_nid_t cvt_nid, int chs)
  412. {
  413. if (chs != hdmi_get_channel_count(codec, cvt_nid))
  414. snd_hda_codec_write(codec, cvt_nid, 0,
  415. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  416. }
  417. /*
  418. * Channel mapping routines
  419. */
  420. /*
  421. * Compute derived values in channel_allocations[].
  422. */
  423. static void init_channel_allocations(void)
  424. {
  425. int i, j;
  426. struct cea_channel_speaker_allocation *p;
  427. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  428. p = channel_allocations + i;
  429. p->channels = 0;
  430. p->spk_mask = 0;
  431. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  432. if (p->speakers[j]) {
  433. p->channels++;
  434. p->spk_mask |= p->speakers[j];
  435. }
  436. }
  437. }
  438. static int get_channel_allocation_order(int ca)
  439. {
  440. int i;
  441. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  442. if (channel_allocations[i].ca_index == ca)
  443. break;
  444. }
  445. return i;
  446. }
  447. /*
  448. * The transformation takes two steps:
  449. *
  450. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  451. * spk_mask => (channel_allocations[]) => ai->CA
  452. *
  453. * TODO: it could select the wrong CA from multiple candidates.
  454. */
  455. static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
  456. {
  457. int i;
  458. int ca = 0;
  459. int spk_mask = 0;
  460. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  461. /*
  462. * CA defaults to 0 for basic stereo audio
  463. */
  464. if (channels <= 2)
  465. return 0;
  466. /*
  467. * expand ELD's speaker allocation mask
  468. *
  469. * ELD tells the speaker mask in a compact(paired) form,
  470. * expand ELD's notions to match the ones used by Audio InfoFrame.
  471. */
  472. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  473. if (eld->info.spk_alloc & (1 << i))
  474. spk_mask |= eld_speaker_allocation_bits[i];
  475. }
  476. /* search for the first working match in the CA table */
  477. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  478. if (channels == channel_allocations[i].channels &&
  479. (spk_mask & channel_allocations[i].spk_mask) ==
  480. channel_allocations[i].spk_mask) {
  481. ca = channel_allocations[i].ca_index;
  482. break;
  483. }
  484. }
  485. if (!ca) {
  486. /* if there was no match, select the regular ALSA channel
  487. * allocation with the matching number of channels */
  488. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  489. if (channels == channel_allocations[i].channels) {
  490. ca = channel_allocations[i].ca_index;
  491. break;
  492. }
  493. }
  494. }
  495. snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
  496. snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  497. ca, channels, buf);
  498. return ca;
  499. }
  500. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  501. hda_nid_t pin_nid)
  502. {
  503. #ifdef CONFIG_SND_DEBUG_VERBOSE
  504. int i;
  505. int slot;
  506. for (i = 0; i < 8; i++) {
  507. slot = snd_hda_codec_read(codec, pin_nid, 0,
  508. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  509. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  510. slot >> 4, slot & 0xf);
  511. }
  512. #endif
  513. }
  514. static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
  515. hda_nid_t pin_nid,
  516. bool non_pcm,
  517. int ca)
  518. {
  519. int i;
  520. int err;
  521. int order;
  522. int non_pcm_mapping[8];
  523. order = get_channel_allocation_order(ca);
  524. if (hdmi_channel_mapping[ca][1] == 0) {
  525. for (i = 0; i < channel_allocations[order].channels; i++)
  526. hdmi_channel_mapping[ca][i] = i | (i << 4);
  527. for (; i < 8; i++)
  528. hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
  529. }
  530. if (non_pcm) {
  531. for (i = 0; i < channel_allocations[order].channels; i++)
  532. non_pcm_mapping[i] = i | (i << 4);
  533. for (; i < 8; i++)
  534. non_pcm_mapping[i] = 0xf | (i << 4);
  535. }
  536. for (i = 0; i < 8; i++) {
  537. err = snd_hda_codec_write(codec, pin_nid, 0,
  538. AC_VERB_SET_HDMI_CHAN_SLOT,
  539. non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
  540. if (err) {
  541. snd_printdd(KERN_NOTICE
  542. "HDMI: channel mapping failed\n");
  543. break;
  544. }
  545. }
  546. hdmi_debug_channel_mapping(codec, pin_nid);
  547. }
  548. struct channel_map_table {
  549. unsigned char map; /* ALSA API channel map position */
  550. unsigned char cea_slot; /* CEA slot value */
  551. int spk_mask; /* speaker position bit mask */
  552. };
  553. static struct channel_map_table map_tables[] = {
  554. { SNDRV_CHMAP_FL, 0x00, FL },
  555. { SNDRV_CHMAP_FR, 0x01, FR },
  556. { SNDRV_CHMAP_RL, 0x04, RL },
  557. { SNDRV_CHMAP_RR, 0x05, RR },
  558. { SNDRV_CHMAP_LFE, 0x02, LFE },
  559. { SNDRV_CHMAP_FC, 0x03, FC },
  560. { SNDRV_CHMAP_RLC, 0x06, RLC },
  561. { SNDRV_CHMAP_RRC, 0x07, RRC },
  562. {} /* terminator */
  563. };
  564. /* from ALSA API channel position to speaker bit mask */
  565. static int to_spk_mask(unsigned char c)
  566. {
  567. struct channel_map_table *t = map_tables;
  568. for (; t->map; t++) {
  569. if (t->map == c)
  570. return t->spk_mask;
  571. }
  572. return 0;
  573. }
  574. /* from ALSA API channel position to CEA slot */
  575. static int to_cea_slot(unsigned char c)
  576. {
  577. struct channel_map_table *t = map_tables;
  578. for (; t->map; t++) {
  579. if (t->map == c)
  580. return t->cea_slot;
  581. }
  582. return 0x0f;
  583. }
  584. /* from CEA slot to ALSA API channel position */
  585. static int from_cea_slot(unsigned char c)
  586. {
  587. struct channel_map_table *t = map_tables;
  588. for (; t->map; t++) {
  589. if (t->cea_slot == c)
  590. return t->map;
  591. }
  592. return 0;
  593. }
  594. /* from speaker bit mask to ALSA API channel position */
  595. static int spk_to_chmap(int spk)
  596. {
  597. struct channel_map_table *t = map_tables;
  598. for (; t->map; t++) {
  599. if (t->spk_mask == spk)
  600. return t->map;
  601. }
  602. return 0;
  603. }
  604. /* get the CA index corresponding to the given ALSA API channel map */
  605. static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
  606. {
  607. int i, spks = 0, spk_mask = 0;
  608. for (i = 0; i < chs; i++) {
  609. int mask = to_spk_mask(map[i]);
  610. if (mask) {
  611. spk_mask |= mask;
  612. spks++;
  613. }
  614. }
  615. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  616. if ((chs == channel_allocations[i].channels ||
  617. spks == channel_allocations[i].channels) &&
  618. (spk_mask & channel_allocations[i].spk_mask) ==
  619. channel_allocations[i].spk_mask)
  620. return channel_allocations[i].ca_index;
  621. }
  622. return -1;
  623. }
  624. /* set up the channel slots for the given ALSA API channel map */
  625. static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
  626. hda_nid_t pin_nid,
  627. int chs, unsigned char *map)
  628. {
  629. int i;
  630. for (i = 0; i < 8; i++) {
  631. int val, err;
  632. if (i < chs)
  633. val = to_cea_slot(map[i]);
  634. else
  635. val = 0xf;
  636. val |= (i << 4);
  637. err = snd_hda_codec_write(codec, pin_nid, 0,
  638. AC_VERB_SET_HDMI_CHAN_SLOT, val);
  639. if (err)
  640. return -EINVAL;
  641. }
  642. return 0;
  643. }
  644. /* store ALSA API channel map from the current default map */
  645. static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
  646. {
  647. int i;
  648. for (i = 0; i < 8; i++) {
  649. if (i < channel_allocations[ca].channels)
  650. map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
  651. else
  652. map[i] = 0;
  653. }
  654. }
  655. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  656. hda_nid_t pin_nid, bool non_pcm, int ca,
  657. int channels, unsigned char *map,
  658. bool chmap_set)
  659. {
  660. if (!non_pcm && chmap_set) {
  661. hdmi_manual_setup_channel_mapping(codec, pin_nid,
  662. channels, map);
  663. } else {
  664. hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
  665. hdmi_setup_fake_chmap(map, ca);
  666. }
  667. }
  668. /*
  669. * Audio InfoFrame routines
  670. */
  671. /*
  672. * Enable Audio InfoFrame Transmission
  673. */
  674. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  675. hda_nid_t pin_nid)
  676. {
  677. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  678. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  679. AC_DIPXMIT_BEST);
  680. }
  681. /*
  682. * Disable Audio InfoFrame Transmission
  683. */
  684. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  685. hda_nid_t pin_nid)
  686. {
  687. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  688. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  689. AC_DIPXMIT_DISABLE);
  690. }
  691. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  692. {
  693. #ifdef CONFIG_SND_DEBUG_VERBOSE
  694. int i;
  695. int size;
  696. size = snd_hdmi_get_eld_size(codec, pin_nid);
  697. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  698. for (i = 0; i < 8; i++) {
  699. size = snd_hda_codec_read(codec, pin_nid, 0,
  700. AC_VERB_GET_HDMI_DIP_SIZE, i);
  701. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  702. }
  703. #endif
  704. }
  705. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  706. {
  707. #ifdef BE_PARANOID
  708. int i, j;
  709. int size;
  710. int pi, bi;
  711. for (i = 0; i < 8; i++) {
  712. size = snd_hda_codec_read(codec, pin_nid, 0,
  713. AC_VERB_GET_HDMI_DIP_SIZE, i);
  714. if (size == 0)
  715. continue;
  716. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  717. for (j = 1; j < 1000; j++) {
  718. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  719. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  720. if (pi != i)
  721. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  722. bi, pi, i);
  723. if (bi == 0) /* byte index wrapped around */
  724. break;
  725. }
  726. snd_printd(KERN_INFO
  727. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  728. i, size, j);
  729. }
  730. #endif
  731. }
  732. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
  733. {
  734. u8 *bytes = (u8 *)hdmi_ai;
  735. u8 sum = 0;
  736. int i;
  737. hdmi_ai->checksum = 0;
  738. for (i = 0; i < sizeof(*hdmi_ai); i++)
  739. sum += bytes[i];
  740. hdmi_ai->checksum = -sum;
  741. }
  742. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  743. hda_nid_t pin_nid,
  744. u8 *dip, int size)
  745. {
  746. int i;
  747. hdmi_debug_dip_size(codec, pin_nid);
  748. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  749. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  750. for (i = 0; i < size; i++)
  751. hdmi_write_dip_byte(codec, pin_nid, dip[i]);
  752. }
  753. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  754. u8 *dip, int size)
  755. {
  756. u8 val;
  757. int i;
  758. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  759. != AC_DIPXMIT_BEST)
  760. return false;
  761. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  762. for (i = 0; i < size; i++) {
  763. val = snd_hda_codec_read(codec, pin_nid, 0,
  764. AC_VERB_GET_HDMI_DIP_DATA, 0);
  765. if (val != dip[i])
  766. return false;
  767. }
  768. return true;
  769. }
  770. static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
  771. struct hdmi_spec_per_pin *per_pin,
  772. bool non_pcm)
  773. {
  774. hda_nid_t pin_nid = per_pin->pin_nid;
  775. int channels = per_pin->channels;
  776. struct hdmi_eld *eld;
  777. int ca;
  778. union audio_infoframe ai;
  779. if (!channels)
  780. return;
  781. eld = &per_pin->sink_eld;
  782. if (!eld->monitor_present)
  783. return;
  784. if (!non_pcm && per_pin->chmap_set)
  785. ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
  786. else
  787. ca = hdmi_channel_allocation(eld, channels);
  788. if (ca < 0)
  789. ca = 0;
  790. memset(&ai, 0, sizeof(ai));
  791. if (eld->info.conn_type == 0) { /* HDMI */
  792. struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
  793. hdmi_ai->type = 0x84;
  794. hdmi_ai->ver = 0x01;
  795. hdmi_ai->len = 0x0a;
  796. hdmi_ai->CC02_CT47 = channels - 1;
  797. hdmi_ai->CA = ca;
  798. hdmi_checksum_audio_infoframe(hdmi_ai);
  799. } else if (eld->info.conn_type == 1) { /* DisplayPort */
  800. struct dp_audio_infoframe *dp_ai = &ai.dp;
  801. dp_ai->type = 0x84;
  802. dp_ai->len = 0x1b;
  803. dp_ai->ver = 0x11 << 2;
  804. dp_ai->CC02_CT47 = channels - 1;
  805. dp_ai->CA = ca;
  806. } else {
  807. snd_printd("HDMI: unknown connection type at pin %d\n",
  808. pin_nid);
  809. return;
  810. }
  811. /*
  812. * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
  813. * sizeof(*dp_ai) to avoid partial match/update problems when
  814. * the user switches between HDMI/DP monitors.
  815. */
  816. if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
  817. sizeof(ai))) {
  818. snd_printdd("hdmi_setup_audio_infoframe: "
  819. "pin=%d channels=%d\n",
  820. pin_nid,
  821. channels);
  822. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  823. channels, per_pin->chmap,
  824. per_pin->chmap_set);
  825. hdmi_stop_infoframe_trans(codec, pin_nid);
  826. hdmi_fill_audio_infoframe(codec, pin_nid,
  827. ai.bytes, sizeof(ai));
  828. hdmi_start_infoframe_trans(codec, pin_nid);
  829. } else {
  830. /* For non-pcm audio switch, setup new channel mapping
  831. * accordingly */
  832. if (per_pin->non_pcm != non_pcm)
  833. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  834. channels, per_pin->chmap,
  835. per_pin->chmap_set);
  836. }
  837. per_pin->non_pcm = non_pcm;
  838. }
  839. /*
  840. * Unsolicited events
  841. */
  842. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
  843. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  844. {
  845. struct hdmi_spec *spec = codec->spec;
  846. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  847. int pin_nid;
  848. int pin_idx;
  849. struct hda_jack_tbl *jack;
  850. int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
  851. jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
  852. if (!jack)
  853. return;
  854. pin_nid = jack->nid;
  855. jack->jack_dirty = 1;
  856. _snd_printd(SND_PR_VERBOSE,
  857. "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
  858. codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
  859. !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
  860. pin_idx = pin_nid_to_pin_index(spec, pin_nid);
  861. if (pin_idx < 0)
  862. return;
  863. hdmi_present_sense(get_pin(spec, pin_idx), 1);
  864. snd_hda_jack_report_sync(codec);
  865. }
  866. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  867. {
  868. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  869. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  870. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  871. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  872. printk(KERN_INFO
  873. "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  874. codec->addr,
  875. tag,
  876. subtag,
  877. cp_state,
  878. cp_ready);
  879. /* TODO */
  880. if (cp_state)
  881. ;
  882. if (cp_ready)
  883. ;
  884. }
  885. static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  886. {
  887. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  888. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  889. if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
  890. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  891. return;
  892. }
  893. if (subtag == 0)
  894. hdmi_intrinsic_event(codec, res);
  895. else
  896. hdmi_non_intrinsic_event(codec, res);
  897. }
  898. static void haswell_verify_pin_D0(struct hda_codec *codec,
  899. hda_nid_t cvt_nid, hda_nid_t nid)
  900. {
  901. int pwr, lamp, ramp;
  902. /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
  903. * thus pins could only choose converter 0 for use. Make sure the
  904. * converters are in correct power state */
  905. if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
  906. snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  907. if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
  908. snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
  909. AC_PWRST_D0);
  910. msleep(40);
  911. pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
  912. pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
  913. snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
  914. }
  915. lamp = snd_hda_codec_read(codec, nid, 0,
  916. AC_VERB_GET_AMP_GAIN_MUTE,
  917. AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
  918. ramp = snd_hda_codec_read(codec, nid, 0,
  919. AC_VERB_GET_AMP_GAIN_MUTE,
  920. AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
  921. if (lamp != ramp) {
  922. snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  923. AC_AMP_SET_RIGHT | AC_AMP_SET_OUTPUT | lamp);
  924. lamp = snd_hda_codec_read(codec, nid, 0,
  925. AC_VERB_GET_AMP_GAIN_MUTE,
  926. AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
  927. ramp = snd_hda_codec_read(codec, nid, 0,
  928. AC_VERB_GET_AMP_GAIN_MUTE,
  929. AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
  930. snd_printd("Haswell HDMI audio: Mute after set on pin 0x%x: [0x%x 0x%x]\n", nid, lamp, ramp);
  931. }
  932. }
  933. /*
  934. * Callbacks
  935. */
  936. /* HBR should be Non-PCM, 8 channels */
  937. #define is_hbr_format(format) \
  938. ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
  939. static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
  940. hda_nid_t pin_nid, u32 stream_tag, int format)
  941. {
  942. int pinctl;
  943. int new_pinctl = 0;
  944. if (codec->vendor_id == 0x80862807)
  945. haswell_verify_pin_D0(codec, cvt_nid, pin_nid);
  946. if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
  947. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  948. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  949. new_pinctl = pinctl & ~AC_PINCTL_EPT;
  950. if (is_hbr_format(format))
  951. new_pinctl |= AC_PINCTL_EPT_HBR;
  952. else
  953. new_pinctl |= AC_PINCTL_EPT_NATIVE;
  954. snd_printdd("hdmi_setup_stream: "
  955. "NID=0x%x, %spinctl=0x%x\n",
  956. pin_nid,
  957. pinctl == new_pinctl ? "" : "new-",
  958. new_pinctl);
  959. if (pinctl != new_pinctl)
  960. snd_hda_codec_write(codec, pin_nid, 0,
  961. AC_VERB_SET_PIN_WIDGET_CONTROL,
  962. new_pinctl);
  963. }
  964. if (is_hbr_format(format) && !new_pinctl) {
  965. snd_printdd("hdmi_setup_stream: HBR is not supported\n");
  966. return -EINVAL;
  967. }
  968. snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
  969. return 0;
  970. }
  971. static int hdmi_choose_cvt(struct hda_codec *codec,
  972. int pin_idx, int *cvt_id, int *mux_id)
  973. {
  974. struct hdmi_spec *spec = codec->spec;
  975. struct hdmi_spec_per_pin *per_pin;
  976. struct hdmi_spec_per_cvt *per_cvt = NULL;
  977. int cvt_idx, mux_idx = 0;
  978. per_pin = get_pin(spec, pin_idx);
  979. /* Dynamically assign converter to stream */
  980. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  981. per_cvt = get_cvt(spec, cvt_idx);
  982. /* Must not already be assigned */
  983. if (per_cvt->assigned)
  984. continue;
  985. /* Must be in pin's mux's list of converters */
  986. for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
  987. if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
  988. break;
  989. /* Not in mux list */
  990. if (mux_idx == per_pin->num_mux_nids)
  991. continue;
  992. break;
  993. }
  994. /* No free converters */
  995. if (cvt_idx == spec->num_cvts)
  996. return -ENODEV;
  997. if (cvt_id)
  998. *cvt_id = cvt_idx;
  999. if (mux_id)
  1000. *mux_id = mux_idx;
  1001. return 0;
  1002. }
  1003. static void haswell_config_cvts(struct hda_codec *codec,
  1004. int pin_id, int mux_id)
  1005. {
  1006. struct hdmi_spec *spec = codec->spec;
  1007. struct hdmi_spec_per_pin *per_pin;
  1008. int pin_idx, mux_idx;
  1009. int curr;
  1010. int err;
  1011. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1012. per_pin = get_pin(spec, pin_idx);
  1013. if (pin_idx == pin_id)
  1014. continue;
  1015. curr = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
  1016. AC_VERB_GET_CONNECT_SEL, 0);
  1017. /* Choose another unused converter */
  1018. if (curr == mux_id) {
  1019. err = hdmi_choose_cvt(codec, pin_idx, NULL, &mux_idx);
  1020. if (err < 0)
  1021. return;
  1022. snd_printdd("HDMI: choose converter %d for pin %d\n", mux_idx, pin_idx);
  1023. snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
  1024. AC_VERB_SET_CONNECT_SEL,
  1025. mux_idx);
  1026. }
  1027. }
  1028. }
  1029. /*
  1030. * HDA PCM callbacks
  1031. */
  1032. static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
  1033. struct hda_codec *codec,
  1034. struct snd_pcm_substream *substream)
  1035. {
  1036. struct hdmi_spec *spec = codec->spec;
  1037. struct snd_pcm_runtime *runtime = substream->runtime;
  1038. int pin_idx, cvt_idx, mux_idx = 0;
  1039. struct hdmi_spec_per_pin *per_pin;
  1040. struct hdmi_eld *eld;
  1041. struct hdmi_spec_per_cvt *per_cvt = NULL;
  1042. int err;
  1043. /* Validate hinfo */
  1044. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1045. if (snd_BUG_ON(pin_idx < 0))
  1046. return -EINVAL;
  1047. per_pin = get_pin(spec, pin_idx);
  1048. eld = &per_pin->sink_eld;
  1049. err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
  1050. if (err < 0)
  1051. return err;
  1052. per_cvt = get_cvt(spec, cvt_idx);
  1053. /* Claim converter */
  1054. per_cvt->assigned = 1;
  1055. hinfo->nid = per_cvt->cvt_nid;
  1056. snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
  1057. AC_VERB_SET_CONNECT_SEL,
  1058. mux_idx);
  1059. /* configure unused pins to choose other converters */
  1060. if (codec->vendor_id == 0x80862807)
  1061. haswell_config_cvts(codec, pin_idx, mux_idx);
  1062. snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
  1063. /* Initially set the converter's capabilities */
  1064. hinfo->channels_min = per_cvt->channels_min;
  1065. hinfo->channels_max = per_cvt->channels_max;
  1066. hinfo->rates = per_cvt->rates;
  1067. hinfo->formats = per_cvt->formats;
  1068. hinfo->maxbps = per_cvt->maxbps;
  1069. /* Restrict capabilities by ELD if this isn't disabled */
  1070. if (!static_hdmi_pcm && eld->eld_valid) {
  1071. snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
  1072. if (hinfo->channels_min > hinfo->channels_max ||
  1073. !hinfo->rates || !hinfo->formats) {
  1074. per_cvt->assigned = 0;
  1075. hinfo->nid = 0;
  1076. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1077. return -ENODEV;
  1078. }
  1079. }
  1080. /* Store the updated parameters */
  1081. runtime->hw.channels_min = hinfo->channels_min;
  1082. runtime->hw.channels_max = hinfo->channels_max;
  1083. runtime->hw.formats = hinfo->formats;
  1084. runtime->hw.rates = hinfo->rates;
  1085. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1086. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1087. return 0;
  1088. }
  1089. /*
  1090. * HDA/HDMI auto parsing
  1091. */
  1092. static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
  1093. {
  1094. struct hdmi_spec *spec = codec->spec;
  1095. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1096. hda_nid_t pin_nid = per_pin->pin_nid;
  1097. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  1098. snd_printk(KERN_WARNING
  1099. "HDMI: pin %d wcaps %#x "
  1100. "does not support connection list\n",
  1101. pin_nid, get_wcaps(codec, pin_nid));
  1102. return -EINVAL;
  1103. }
  1104. per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
  1105. per_pin->mux_nids,
  1106. HDA_MAX_CONNECTIONS);
  1107. return 0;
  1108. }
  1109. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
  1110. {
  1111. struct hda_codec *codec = per_pin->codec;
  1112. struct hdmi_spec *spec = codec->spec;
  1113. struct hdmi_eld *eld = &spec->temp_eld;
  1114. struct hdmi_eld *pin_eld = &per_pin->sink_eld;
  1115. hda_nid_t pin_nid = per_pin->pin_nid;
  1116. /*
  1117. * Always execute a GetPinSense verb here, even when called from
  1118. * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
  1119. * response's PD bit is not the real PD value, but indicates that
  1120. * the real PD value changed. An older version of the HD-audio
  1121. * specification worked this way. Hence, we just ignore the data in
  1122. * the unsolicited response to avoid custom WARs.
  1123. */
  1124. int present = snd_hda_pin_sense(codec, pin_nid);
  1125. bool update_eld = false;
  1126. bool eld_changed = false;
  1127. pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  1128. if (pin_eld->monitor_present)
  1129. eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
  1130. else
  1131. eld->eld_valid = false;
  1132. _snd_printd(SND_PR_VERBOSE,
  1133. "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  1134. codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
  1135. if (eld->eld_valid) {
  1136. if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
  1137. &eld->eld_size) < 0)
  1138. eld->eld_valid = false;
  1139. else {
  1140. memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
  1141. if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
  1142. eld->eld_size) < 0)
  1143. eld->eld_valid = false;
  1144. }
  1145. if (eld->eld_valid) {
  1146. snd_hdmi_show_eld(&eld->info);
  1147. update_eld = true;
  1148. }
  1149. else if (repoll) {
  1150. queue_delayed_work(codec->bus->workq,
  1151. &per_pin->work,
  1152. msecs_to_jiffies(300));
  1153. return;
  1154. }
  1155. }
  1156. mutex_lock(&pin_eld->lock);
  1157. if (pin_eld->eld_valid && !eld->eld_valid) {
  1158. update_eld = true;
  1159. eld_changed = true;
  1160. }
  1161. if (update_eld) {
  1162. bool old_eld_valid = pin_eld->eld_valid;
  1163. pin_eld->eld_valid = eld->eld_valid;
  1164. eld_changed = pin_eld->eld_size != eld->eld_size ||
  1165. memcmp(pin_eld->eld_buffer, eld->eld_buffer,
  1166. eld->eld_size) != 0;
  1167. if (eld_changed)
  1168. memcpy(pin_eld->eld_buffer, eld->eld_buffer,
  1169. eld->eld_size);
  1170. pin_eld->eld_size = eld->eld_size;
  1171. pin_eld->info = eld->info;
  1172. /* Haswell-specific workaround: re-setup when the transcoder is
  1173. * changed during the stream playback
  1174. */
  1175. if (codec->vendor_id == 0x80862807 &&
  1176. eld->eld_valid && !old_eld_valid && per_pin->setup) {
  1177. snd_hda_codec_write(codec, pin_nid, 0,
  1178. AC_VERB_SET_AMP_GAIN_MUTE,
  1179. AMP_OUT_UNMUTE);
  1180. hdmi_setup_audio_infoframe(codec, per_pin,
  1181. per_pin->non_pcm);
  1182. }
  1183. }
  1184. mutex_unlock(&pin_eld->lock);
  1185. if (eld_changed)
  1186. snd_ctl_notify(codec->bus->card,
  1187. SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
  1188. &per_pin->eld_ctl->id);
  1189. }
  1190. static void hdmi_repoll_eld(struct work_struct *work)
  1191. {
  1192. struct hdmi_spec_per_pin *per_pin =
  1193. container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
  1194. if (per_pin->repoll_count++ > 6)
  1195. per_pin->repoll_count = 0;
  1196. hdmi_present_sense(per_pin, per_pin->repoll_count);
  1197. }
  1198. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1199. hda_nid_t nid);
  1200. static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  1201. {
  1202. struct hdmi_spec *spec = codec->spec;
  1203. unsigned int caps, config;
  1204. int pin_idx;
  1205. struct hdmi_spec_per_pin *per_pin;
  1206. int err;
  1207. caps = snd_hda_query_pin_caps(codec, pin_nid);
  1208. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  1209. return 0;
  1210. config = snd_hda_codec_get_pincfg(codec, pin_nid);
  1211. if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
  1212. return 0;
  1213. if (codec->vendor_id == 0x80862807)
  1214. intel_haswell_fixup_connect_list(codec, pin_nid);
  1215. pin_idx = spec->num_pins;
  1216. per_pin = snd_array_new(&spec->pins);
  1217. if (!per_pin)
  1218. return -ENOMEM;
  1219. per_pin->pin_nid = pin_nid;
  1220. per_pin->non_pcm = false;
  1221. err = hdmi_read_pin_conn(codec, pin_idx);
  1222. if (err < 0)
  1223. return err;
  1224. spec->num_pins++;
  1225. return 0;
  1226. }
  1227. static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1228. {
  1229. struct hdmi_spec *spec = codec->spec;
  1230. struct hdmi_spec_per_cvt *per_cvt;
  1231. unsigned int chans;
  1232. int err;
  1233. chans = get_wcaps(codec, cvt_nid);
  1234. chans = get_wcaps_channels(chans);
  1235. per_cvt = snd_array_new(&spec->cvts);
  1236. if (!per_cvt)
  1237. return -ENOMEM;
  1238. per_cvt->cvt_nid = cvt_nid;
  1239. per_cvt->channels_min = 2;
  1240. if (chans <= 16) {
  1241. per_cvt->channels_max = chans;
  1242. if (chans > spec->channels_max)
  1243. spec->channels_max = chans;
  1244. }
  1245. err = snd_hda_query_supported_pcm(codec, cvt_nid,
  1246. &per_cvt->rates,
  1247. &per_cvt->formats,
  1248. &per_cvt->maxbps);
  1249. if (err < 0)
  1250. return err;
  1251. if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
  1252. spec->cvt_nids[spec->num_cvts] = cvt_nid;
  1253. spec->num_cvts++;
  1254. return 0;
  1255. }
  1256. static int hdmi_parse_codec(struct hda_codec *codec)
  1257. {
  1258. hda_nid_t nid;
  1259. int i, nodes;
  1260. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  1261. if (!nid || nodes < 0) {
  1262. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  1263. return -EINVAL;
  1264. }
  1265. for (i = 0; i < nodes; i++, nid++) {
  1266. unsigned int caps;
  1267. unsigned int type;
  1268. caps = get_wcaps(codec, nid);
  1269. type = get_wcaps_type(caps);
  1270. if (!(caps & AC_WCAP_DIGITAL))
  1271. continue;
  1272. switch (type) {
  1273. case AC_WID_AUD_OUT:
  1274. hdmi_add_cvt(codec, nid);
  1275. break;
  1276. case AC_WID_PIN:
  1277. hdmi_add_pin(codec, nid);
  1278. break;
  1279. }
  1280. }
  1281. #ifdef CONFIG_PM
  1282. /* We're seeing some problems with unsolicited hot plug events on
  1283. * PantherPoint after S3, if this is not enabled */
  1284. if (codec->vendor_id == 0x80862806)
  1285. codec->bus->power_keep_link_on = 1;
  1286. /*
  1287. * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
  1288. * can be lost and presence sense verb will become inaccurate if the
  1289. * HDA link is powered off at hot plug or hw initialization time.
  1290. */
  1291. else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
  1292. AC_PWRST_EPSS))
  1293. codec->bus->power_keep_link_on = 1;
  1294. #endif
  1295. return 0;
  1296. }
  1297. /*
  1298. */
  1299. static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1300. {
  1301. struct hda_spdif_out *spdif;
  1302. bool non_pcm;
  1303. mutex_lock(&codec->spdif_mutex);
  1304. spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
  1305. non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
  1306. mutex_unlock(&codec->spdif_mutex);
  1307. return non_pcm;
  1308. }
  1309. /*
  1310. * HDMI callbacks
  1311. */
  1312. static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1313. struct hda_codec *codec,
  1314. unsigned int stream_tag,
  1315. unsigned int format,
  1316. struct snd_pcm_substream *substream)
  1317. {
  1318. hda_nid_t cvt_nid = hinfo->nid;
  1319. struct hdmi_spec *spec = codec->spec;
  1320. int pin_idx = hinfo_to_pin_index(spec, hinfo);
  1321. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1322. hda_nid_t pin_nid = per_pin->pin_nid;
  1323. bool non_pcm;
  1324. non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
  1325. per_pin->channels = substream->runtime->channels;
  1326. per_pin->setup = true;
  1327. hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
  1328. hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
  1329. return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
  1330. }
  1331. static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1332. struct hda_codec *codec,
  1333. struct snd_pcm_substream *substream)
  1334. {
  1335. snd_hda_codec_cleanup_stream(codec, hinfo->nid);
  1336. return 0;
  1337. }
  1338. static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
  1339. struct hda_codec *codec,
  1340. struct snd_pcm_substream *substream)
  1341. {
  1342. struct hdmi_spec *spec = codec->spec;
  1343. int cvt_idx, pin_idx;
  1344. struct hdmi_spec_per_cvt *per_cvt;
  1345. struct hdmi_spec_per_pin *per_pin;
  1346. if (hinfo->nid) {
  1347. cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
  1348. if (snd_BUG_ON(cvt_idx < 0))
  1349. return -EINVAL;
  1350. per_cvt = get_cvt(spec, cvt_idx);
  1351. snd_BUG_ON(!per_cvt->assigned);
  1352. per_cvt->assigned = 0;
  1353. hinfo->nid = 0;
  1354. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1355. if (snd_BUG_ON(pin_idx < 0))
  1356. return -EINVAL;
  1357. per_pin = get_pin(spec, pin_idx);
  1358. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1359. per_pin->chmap_set = false;
  1360. memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
  1361. per_pin->setup = false;
  1362. per_pin->channels = 0;
  1363. }
  1364. return 0;
  1365. }
  1366. static const struct hda_pcm_ops generic_ops = {
  1367. .open = hdmi_pcm_open,
  1368. .close = hdmi_pcm_close,
  1369. .prepare = generic_hdmi_playback_pcm_prepare,
  1370. .cleanup = generic_hdmi_playback_pcm_cleanup,
  1371. };
  1372. /*
  1373. * ALSA API channel-map control callbacks
  1374. */
  1375. static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
  1376. struct snd_ctl_elem_info *uinfo)
  1377. {
  1378. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1379. struct hda_codec *codec = info->private_data;
  1380. struct hdmi_spec *spec = codec->spec;
  1381. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1382. uinfo->count = spec->channels_max;
  1383. uinfo->value.integer.min = 0;
  1384. uinfo->value.integer.max = SNDRV_CHMAP_LAST;
  1385. return 0;
  1386. }
  1387. static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
  1388. unsigned int size, unsigned int __user *tlv)
  1389. {
  1390. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1391. struct hda_codec *codec = info->private_data;
  1392. struct hdmi_spec *spec = codec->spec;
  1393. const unsigned int valid_mask =
  1394. FL | FR | RL | RR | LFE | FC | RLC | RRC;
  1395. unsigned int __user *dst;
  1396. int chs, count = 0;
  1397. if (size < 8)
  1398. return -ENOMEM;
  1399. if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
  1400. return -EFAULT;
  1401. size -= 8;
  1402. dst = tlv + 2;
  1403. for (chs = 2; chs <= spec->channels_max; chs++) {
  1404. int i, c;
  1405. struct cea_channel_speaker_allocation *cap;
  1406. cap = channel_allocations;
  1407. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
  1408. int chs_bytes = chs * 4;
  1409. if (cap->channels != chs)
  1410. continue;
  1411. if (cap->spk_mask & ~valid_mask)
  1412. continue;
  1413. if (size < 8)
  1414. return -ENOMEM;
  1415. if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
  1416. put_user(chs_bytes, dst + 1))
  1417. return -EFAULT;
  1418. dst += 2;
  1419. size -= 8;
  1420. count += 8;
  1421. if (size < chs_bytes)
  1422. return -ENOMEM;
  1423. size -= chs_bytes;
  1424. count += chs_bytes;
  1425. for (c = 7; c >= 0; c--) {
  1426. int spk = cap->speakers[c];
  1427. if (!spk)
  1428. continue;
  1429. if (put_user(spk_to_chmap(spk), dst))
  1430. return -EFAULT;
  1431. dst++;
  1432. }
  1433. }
  1434. }
  1435. if (put_user(count, tlv + 1))
  1436. return -EFAULT;
  1437. return 0;
  1438. }
  1439. static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
  1440. struct snd_ctl_elem_value *ucontrol)
  1441. {
  1442. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1443. struct hda_codec *codec = info->private_data;
  1444. struct hdmi_spec *spec = codec->spec;
  1445. int pin_idx = kcontrol->private_value;
  1446. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1447. int i;
  1448. for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
  1449. ucontrol->value.integer.value[i] = per_pin->chmap[i];
  1450. return 0;
  1451. }
  1452. static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
  1453. struct snd_ctl_elem_value *ucontrol)
  1454. {
  1455. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1456. struct hda_codec *codec = info->private_data;
  1457. struct hdmi_spec *spec = codec->spec;
  1458. int pin_idx = kcontrol->private_value;
  1459. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1460. unsigned int ctl_idx;
  1461. struct snd_pcm_substream *substream;
  1462. unsigned char chmap[8];
  1463. int i, ca, prepared = 0;
  1464. ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1465. substream = snd_pcm_chmap_substream(info, ctl_idx);
  1466. if (!substream || !substream->runtime)
  1467. return 0; /* just for avoiding error from alsactl restore */
  1468. switch (substream->runtime->status->state) {
  1469. case SNDRV_PCM_STATE_OPEN:
  1470. case SNDRV_PCM_STATE_SETUP:
  1471. break;
  1472. case SNDRV_PCM_STATE_PREPARED:
  1473. prepared = 1;
  1474. break;
  1475. default:
  1476. return -EBUSY;
  1477. }
  1478. memset(chmap, 0, sizeof(chmap));
  1479. for (i = 0; i < ARRAY_SIZE(chmap); i++)
  1480. chmap[i] = ucontrol->value.integer.value[i];
  1481. if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
  1482. return 0;
  1483. ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
  1484. if (ca < 0)
  1485. return -EINVAL;
  1486. per_pin->chmap_set = true;
  1487. memcpy(per_pin->chmap, chmap, sizeof(chmap));
  1488. if (prepared)
  1489. hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
  1490. return 0;
  1491. }
  1492. static int generic_hdmi_build_pcms(struct hda_codec *codec)
  1493. {
  1494. struct hdmi_spec *spec = codec->spec;
  1495. int pin_idx;
  1496. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1497. struct hda_pcm *info;
  1498. struct hda_pcm_stream *pstr;
  1499. struct hdmi_spec_per_pin *per_pin;
  1500. per_pin = get_pin(spec, pin_idx);
  1501. sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
  1502. info = snd_array_new(&spec->pcm_rec);
  1503. if (!info)
  1504. return -ENOMEM;
  1505. info->name = per_pin->pcm_name;
  1506. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1507. info->own_chmap = true;
  1508. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1509. pstr->substreams = 1;
  1510. pstr->ops = generic_ops;
  1511. /* other pstr fields are set in open */
  1512. }
  1513. codec->num_pcms = spec->num_pins;
  1514. codec->pcm_info = spec->pcm_rec.list;
  1515. return 0;
  1516. }
  1517. static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
  1518. {
  1519. char hdmi_str[32] = "HDMI/DP";
  1520. struct hdmi_spec *spec = codec->spec;
  1521. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1522. int pcmdev = get_pcm_rec(spec, pin_idx)->device;
  1523. if (pcmdev > 0)
  1524. sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
  1525. if (!is_jack_detectable(codec, per_pin->pin_nid))
  1526. strncat(hdmi_str, " Phantom",
  1527. sizeof(hdmi_str) - strlen(hdmi_str) - 1);
  1528. return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
  1529. }
  1530. static int generic_hdmi_build_controls(struct hda_codec *codec)
  1531. {
  1532. struct hdmi_spec *spec = codec->spec;
  1533. int err;
  1534. int pin_idx;
  1535. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1536. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1537. err = generic_hdmi_build_jack(codec, pin_idx);
  1538. if (err < 0)
  1539. return err;
  1540. err = snd_hda_create_dig_out_ctls(codec,
  1541. per_pin->pin_nid,
  1542. per_pin->mux_nids[0],
  1543. HDA_PCM_TYPE_HDMI);
  1544. if (err < 0)
  1545. return err;
  1546. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1547. /* add control for ELD Bytes */
  1548. err = hdmi_create_eld_ctl(codec, pin_idx,
  1549. get_pcm_rec(spec, pin_idx)->device);
  1550. if (err < 0)
  1551. return err;
  1552. hdmi_present_sense(per_pin, 0);
  1553. }
  1554. /* add channel maps */
  1555. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1556. struct snd_pcm_chmap *chmap;
  1557. struct snd_kcontrol *kctl;
  1558. int i;
  1559. if (!codec->pcm_info[pin_idx].pcm)
  1560. break;
  1561. err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
  1562. SNDRV_PCM_STREAM_PLAYBACK,
  1563. NULL, 0, pin_idx, &chmap);
  1564. if (err < 0)
  1565. return err;
  1566. /* override handlers */
  1567. chmap->private_data = codec;
  1568. kctl = chmap->kctl;
  1569. for (i = 0; i < kctl->count; i++)
  1570. kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
  1571. kctl->info = hdmi_chmap_ctl_info;
  1572. kctl->get = hdmi_chmap_ctl_get;
  1573. kctl->put = hdmi_chmap_ctl_put;
  1574. kctl->tlv.c = hdmi_chmap_ctl_tlv;
  1575. }
  1576. return 0;
  1577. }
  1578. static int generic_hdmi_init_per_pins(struct hda_codec *codec)
  1579. {
  1580. struct hdmi_spec *spec = codec->spec;
  1581. int pin_idx;
  1582. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1583. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1584. struct hdmi_eld *eld = &per_pin->sink_eld;
  1585. per_pin->codec = codec;
  1586. mutex_init(&eld->lock);
  1587. INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
  1588. snd_hda_eld_proc_new(codec, eld, pin_idx);
  1589. }
  1590. return 0;
  1591. }
  1592. static int generic_hdmi_init(struct hda_codec *codec)
  1593. {
  1594. struct hdmi_spec *spec = codec->spec;
  1595. int pin_idx;
  1596. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1597. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1598. hda_nid_t pin_nid = per_pin->pin_nid;
  1599. hdmi_init_pin(codec, pin_nid);
  1600. snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
  1601. }
  1602. return 0;
  1603. }
  1604. static void hdmi_array_init(struct hdmi_spec *spec, int nums)
  1605. {
  1606. snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
  1607. snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
  1608. snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
  1609. }
  1610. static void hdmi_array_free(struct hdmi_spec *spec)
  1611. {
  1612. snd_array_free(&spec->pins);
  1613. snd_array_free(&spec->cvts);
  1614. snd_array_free(&spec->pcm_rec);
  1615. }
  1616. static void generic_hdmi_free(struct hda_codec *codec)
  1617. {
  1618. struct hdmi_spec *spec = codec->spec;
  1619. int pin_idx;
  1620. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1621. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1622. struct hdmi_eld *eld = &per_pin->sink_eld;
  1623. cancel_delayed_work(&per_pin->work);
  1624. snd_hda_eld_proc_free(codec, eld);
  1625. }
  1626. flush_workqueue(codec->bus->workq);
  1627. hdmi_array_free(spec);
  1628. kfree(spec);
  1629. }
  1630. #ifdef CONFIG_PM
  1631. static int generic_hdmi_resume(struct hda_codec *codec)
  1632. {
  1633. struct hdmi_spec *spec = codec->spec;
  1634. int pin_idx;
  1635. generic_hdmi_init(codec);
  1636. snd_hda_codec_resume_amp(codec);
  1637. snd_hda_codec_resume_cache(codec);
  1638. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1639. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1640. hdmi_present_sense(per_pin, 1);
  1641. }
  1642. return 0;
  1643. }
  1644. #endif
  1645. static const struct hda_codec_ops generic_hdmi_patch_ops = {
  1646. .init = generic_hdmi_init,
  1647. .free = generic_hdmi_free,
  1648. .build_pcms = generic_hdmi_build_pcms,
  1649. .build_controls = generic_hdmi_build_controls,
  1650. .unsol_event = hdmi_unsol_event,
  1651. #ifdef CONFIG_PM
  1652. .resume = generic_hdmi_resume,
  1653. #endif
  1654. };
  1655. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1656. hda_nid_t nid)
  1657. {
  1658. struct hdmi_spec *spec = codec->spec;
  1659. hda_nid_t conns[4];
  1660. int nconns;
  1661. nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
  1662. if (nconns == spec->num_cvts &&
  1663. !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
  1664. return;
  1665. /* override pins connection list */
  1666. snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
  1667. snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
  1668. }
  1669. #define INTEL_VENDOR_NID 0x08
  1670. #define INTEL_GET_VENDOR_VERB 0xf81
  1671. #define INTEL_SET_VENDOR_VERB 0x781
  1672. #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
  1673. #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
  1674. static void intel_haswell_enable_all_pins(struct hda_codec *codec,
  1675. bool update_tree)
  1676. {
  1677. unsigned int vendor_param;
  1678. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1679. INTEL_GET_VENDOR_VERB, 0);
  1680. if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
  1681. return;
  1682. vendor_param |= INTEL_EN_ALL_PIN_CVTS;
  1683. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1684. INTEL_SET_VENDOR_VERB, vendor_param);
  1685. if (vendor_param == -1)
  1686. return;
  1687. if (update_tree)
  1688. snd_hda_codec_update_widgets(codec);
  1689. }
  1690. static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
  1691. {
  1692. unsigned int vendor_param;
  1693. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1694. INTEL_GET_VENDOR_VERB, 0);
  1695. if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
  1696. return;
  1697. /* enable DP1.2 mode */
  1698. vendor_param |= INTEL_EN_DP12;
  1699. snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
  1700. INTEL_SET_VENDOR_VERB, vendor_param);
  1701. }
  1702. /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
  1703. * Otherwise you may get severe h/w communication errors.
  1704. */
  1705. static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
  1706. unsigned int power_state)
  1707. {
  1708. if (power_state == AC_PWRST_D0) {
  1709. intel_haswell_enable_all_pins(codec, false);
  1710. intel_haswell_fixup_enable_dp12(codec);
  1711. }
  1712. snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
  1713. snd_hda_codec_set_power_to_all(codec, fg, power_state);
  1714. }
  1715. static int patch_generic_hdmi(struct hda_codec *codec)
  1716. {
  1717. struct hdmi_spec *spec;
  1718. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1719. if (spec == NULL)
  1720. return -ENOMEM;
  1721. codec->spec = spec;
  1722. hdmi_array_init(spec, 4);
  1723. if (codec->vendor_id == 0x80862807) {
  1724. intel_haswell_enable_all_pins(codec, true);
  1725. intel_haswell_fixup_enable_dp12(codec);
  1726. }
  1727. if (hdmi_parse_codec(codec) < 0) {
  1728. codec->spec = NULL;
  1729. kfree(spec);
  1730. return -EINVAL;
  1731. }
  1732. codec->patch_ops = generic_hdmi_patch_ops;
  1733. if (codec->vendor_id == 0x80862807) {
  1734. codec->patch_ops.set_power_state = haswell_set_power_state;
  1735. codec->dp_mst = true;
  1736. }
  1737. generic_hdmi_init_per_pins(codec);
  1738. init_channel_allocations();
  1739. return 0;
  1740. }
  1741. /*
  1742. * Shared non-generic implementations
  1743. */
  1744. static int simple_playback_build_pcms(struct hda_codec *codec)
  1745. {
  1746. struct hdmi_spec *spec = codec->spec;
  1747. struct hda_pcm *info;
  1748. unsigned int chans;
  1749. struct hda_pcm_stream *pstr;
  1750. struct hdmi_spec_per_cvt *per_cvt;
  1751. per_cvt = get_cvt(spec, 0);
  1752. chans = get_wcaps(codec, per_cvt->cvt_nid);
  1753. chans = get_wcaps_channels(chans);
  1754. info = snd_array_new(&spec->pcm_rec);
  1755. if (!info)
  1756. return -ENOMEM;
  1757. info->name = get_pin(spec, 0)->pcm_name;
  1758. sprintf(info->name, "HDMI 0");
  1759. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1760. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1761. *pstr = spec->pcm_playback;
  1762. pstr->nid = per_cvt->cvt_nid;
  1763. if (pstr->channels_max <= 2 && chans && chans <= 16)
  1764. pstr->channels_max = chans;
  1765. codec->num_pcms = 1;
  1766. codec->pcm_info = info;
  1767. return 0;
  1768. }
  1769. /* unsolicited event for jack sensing */
  1770. static void simple_hdmi_unsol_event(struct hda_codec *codec,
  1771. unsigned int res)
  1772. {
  1773. snd_hda_jack_set_dirty_all(codec);
  1774. snd_hda_jack_report_sync(codec);
  1775. }
  1776. /* generic_hdmi_build_jack can be used for simple_hdmi, too,
  1777. * as long as spec->pins[] is set correctly
  1778. */
  1779. #define simple_hdmi_build_jack generic_hdmi_build_jack
  1780. static int simple_playback_build_controls(struct hda_codec *codec)
  1781. {
  1782. struct hdmi_spec *spec = codec->spec;
  1783. struct hdmi_spec_per_cvt *per_cvt;
  1784. int err;
  1785. per_cvt = get_cvt(spec, 0);
  1786. err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
  1787. per_cvt->cvt_nid);
  1788. if (err < 0)
  1789. return err;
  1790. return simple_hdmi_build_jack(codec, 0);
  1791. }
  1792. static int simple_playback_init(struct hda_codec *codec)
  1793. {
  1794. struct hdmi_spec *spec = codec->spec;
  1795. struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
  1796. hda_nid_t pin = per_pin->pin_nid;
  1797. snd_hda_codec_write(codec, pin, 0,
  1798. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  1799. /* some codecs require to unmute the pin */
  1800. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  1801. snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  1802. AMP_OUT_UNMUTE);
  1803. snd_hda_jack_detect_enable(codec, pin, pin);
  1804. return 0;
  1805. }
  1806. static void simple_playback_free(struct hda_codec *codec)
  1807. {
  1808. struct hdmi_spec *spec = codec->spec;
  1809. hdmi_array_free(spec);
  1810. kfree(spec);
  1811. }
  1812. /*
  1813. * Nvidia specific implementations
  1814. */
  1815. #define Nv_VERB_SET_Channel_Allocation 0xF79
  1816. #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
  1817. #define Nv_VERB_SET_Audio_Protection_On 0xF98
  1818. #define Nv_VERB_SET_Audio_Protection_Off 0xF99
  1819. #define nvhdmi_master_con_nid_7x 0x04
  1820. #define nvhdmi_master_pin_nid_7x 0x05
  1821. static const hda_nid_t nvhdmi_con_nids_7x[4] = {
  1822. /*front, rear, clfe, rear_surr */
  1823. 0x6, 0x8, 0xa, 0xc,
  1824. };
  1825. static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
  1826. /* set audio protect on */
  1827. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1828. /* enable digital output on pin widget */
  1829. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1830. {} /* terminator */
  1831. };
  1832. static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
  1833. /* set audio protect on */
  1834. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1835. /* enable digital output on pin widget */
  1836. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1837. { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1838. { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1839. { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1840. { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1841. {} /* terminator */
  1842. };
  1843. #ifdef LIMITED_RATE_FMT_SUPPORT
  1844. /* support only the safe format and rate */
  1845. #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
  1846. #define SUPPORTED_MAXBPS 16
  1847. #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
  1848. #else
  1849. /* support all rates and formats */
  1850. #define SUPPORTED_RATES \
  1851. (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  1852. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
  1853. SNDRV_PCM_RATE_192000)
  1854. #define SUPPORTED_MAXBPS 24
  1855. #define SUPPORTED_FORMATS \
  1856. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1857. #endif
  1858. static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
  1859. {
  1860. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
  1861. return 0;
  1862. }
  1863. static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
  1864. {
  1865. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
  1866. return 0;
  1867. }
  1868. static unsigned int channels_2_6_8[] = {
  1869. 2, 6, 8
  1870. };
  1871. static unsigned int channels_2_8[] = {
  1872. 2, 8
  1873. };
  1874. static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
  1875. .count = ARRAY_SIZE(channels_2_6_8),
  1876. .list = channels_2_6_8,
  1877. .mask = 0,
  1878. };
  1879. static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
  1880. .count = ARRAY_SIZE(channels_2_8),
  1881. .list = channels_2_8,
  1882. .mask = 0,
  1883. };
  1884. static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1885. struct hda_codec *codec,
  1886. struct snd_pcm_substream *substream)
  1887. {
  1888. struct hdmi_spec *spec = codec->spec;
  1889. struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
  1890. switch (codec->preset->id) {
  1891. case 0x10de0002:
  1892. case 0x10de0003:
  1893. case 0x10de0005:
  1894. case 0x10de0006:
  1895. hw_constraints_channels = &hw_constraints_2_8_channels;
  1896. break;
  1897. case 0x10de0007:
  1898. hw_constraints_channels = &hw_constraints_2_6_8_channels;
  1899. break;
  1900. default:
  1901. break;
  1902. }
  1903. if (hw_constraints_channels != NULL) {
  1904. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1905. SNDRV_PCM_HW_PARAM_CHANNELS,
  1906. hw_constraints_channels);
  1907. } else {
  1908. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1909. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1910. }
  1911. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1912. }
  1913. static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1914. struct hda_codec *codec,
  1915. struct snd_pcm_substream *substream)
  1916. {
  1917. struct hdmi_spec *spec = codec->spec;
  1918. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1919. }
  1920. static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1921. struct hda_codec *codec,
  1922. unsigned int stream_tag,
  1923. unsigned int format,
  1924. struct snd_pcm_substream *substream)
  1925. {
  1926. struct hdmi_spec *spec = codec->spec;
  1927. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1928. stream_tag, format, substream);
  1929. }
  1930. static const struct hda_pcm_stream simple_pcm_playback = {
  1931. .substreams = 1,
  1932. .channels_min = 2,
  1933. .channels_max = 2,
  1934. .ops = {
  1935. .open = simple_playback_pcm_open,
  1936. .close = simple_playback_pcm_close,
  1937. .prepare = simple_playback_pcm_prepare
  1938. },
  1939. };
  1940. static const struct hda_codec_ops simple_hdmi_patch_ops = {
  1941. .build_controls = simple_playback_build_controls,
  1942. .build_pcms = simple_playback_build_pcms,
  1943. .init = simple_playback_init,
  1944. .free = simple_playback_free,
  1945. .unsol_event = simple_hdmi_unsol_event,
  1946. };
  1947. static int patch_simple_hdmi(struct hda_codec *codec,
  1948. hda_nid_t cvt_nid, hda_nid_t pin_nid)
  1949. {
  1950. struct hdmi_spec *spec;
  1951. struct hdmi_spec_per_cvt *per_cvt;
  1952. struct hdmi_spec_per_pin *per_pin;
  1953. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1954. if (!spec)
  1955. return -ENOMEM;
  1956. codec->spec = spec;
  1957. hdmi_array_init(spec, 1);
  1958. spec->multiout.num_dacs = 0; /* no analog */
  1959. spec->multiout.max_channels = 2;
  1960. spec->multiout.dig_out_nid = cvt_nid;
  1961. spec->num_cvts = 1;
  1962. spec->num_pins = 1;
  1963. per_pin = snd_array_new(&spec->pins);
  1964. per_cvt = snd_array_new(&spec->cvts);
  1965. if (!per_pin || !per_cvt) {
  1966. simple_playback_free(codec);
  1967. return -ENOMEM;
  1968. }
  1969. per_cvt->cvt_nid = cvt_nid;
  1970. per_pin->pin_nid = pin_nid;
  1971. spec->pcm_playback = simple_pcm_playback;
  1972. codec->patch_ops = simple_hdmi_patch_ops;
  1973. return 0;
  1974. }
  1975. static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
  1976. int channels)
  1977. {
  1978. unsigned int chanmask;
  1979. int chan = channels ? (channels - 1) : 1;
  1980. switch (channels) {
  1981. default:
  1982. case 0:
  1983. case 2:
  1984. chanmask = 0x00;
  1985. break;
  1986. case 4:
  1987. chanmask = 0x08;
  1988. break;
  1989. case 6:
  1990. chanmask = 0x0b;
  1991. break;
  1992. case 8:
  1993. chanmask = 0x13;
  1994. break;
  1995. }
  1996. /* Set the audio infoframe channel allocation and checksum fields. The
  1997. * channel count is computed implicitly by the hardware. */
  1998. snd_hda_codec_write(codec, 0x1, 0,
  1999. Nv_VERB_SET_Channel_Allocation, chanmask);
  2000. snd_hda_codec_write(codec, 0x1, 0,
  2001. Nv_VERB_SET_Info_Frame_Checksum,
  2002. (0x71 - chan - chanmask));
  2003. }
  2004. static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
  2005. struct hda_codec *codec,
  2006. struct snd_pcm_substream *substream)
  2007. {
  2008. struct hdmi_spec *spec = codec->spec;
  2009. int i;
  2010. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
  2011. 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
  2012. for (i = 0; i < 4; i++) {
  2013. /* set the stream id */
  2014. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  2015. AC_VERB_SET_CHANNEL_STREAMID, 0);
  2016. /* set the stream format */
  2017. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  2018. AC_VERB_SET_STREAM_FORMAT, 0);
  2019. }
  2020. /* The audio hardware sends a channel count of 0x7 (8ch) when all the
  2021. * streams are disabled. */
  2022. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2023. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  2024. }
  2025. static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
  2026. struct hda_codec *codec,
  2027. unsigned int stream_tag,
  2028. unsigned int format,
  2029. struct snd_pcm_substream *substream)
  2030. {
  2031. int chs;
  2032. unsigned int dataDCC2, channel_id;
  2033. int i;
  2034. struct hdmi_spec *spec = codec->spec;
  2035. struct hda_spdif_out *spdif;
  2036. struct hdmi_spec_per_cvt *per_cvt;
  2037. mutex_lock(&codec->spdif_mutex);
  2038. per_cvt = get_cvt(spec, 0);
  2039. spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
  2040. chs = substream->runtime->channels;
  2041. dataDCC2 = 0x2;
  2042. /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
  2043. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
  2044. snd_hda_codec_write(codec,
  2045. nvhdmi_master_con_nid_7x,
  2046. 0,
  2047. AC_VERB_SET_DIGI_CONVERT_1,
  2048. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2049. /* set the stream id */
  2050. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2051. AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
  2052. /* set the stream format */
  2053. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2054. AC_VERB_SET_STREAM_FORMAT, format);
  2055. /* turn on again (if needed) */
  2056. /* enable and set the channel status audio/data flag */
  2057. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
  2058. snd_hda_codec_write(codec,
  2059. nvhdmi_master_con_nid_7x,
  2060. 0,
  2061. AC_VERB_SET_DIGI_CONVERT_1,
  2062. spdif->ctls & 0xff);
  2063. snd_hda_codec_write(codec,
  2064. nvhdmi_master_con_nid_7x,
  2065. 0,
  2066. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2067. }
  2068. for (i = 0; i < 4; i++) {
  2069. if (chs == 2)
  2070. channel_id = 0;
  2071. else
  2072. channel_id = i * 2;
  2073. /* turn off SPDIF once;
  2074. *otherwise the IEC958 bits won't be updated
  2075. */
  2076. if (codec->spdif_status_reset &&
  2077. (spdif->ctls & AC_DIG1_ENABLE))
  2078. snd_hda_codec_write(codec,
  2079. nvhdmi_con_nids_7x[i],
  2080. 0,
  2081. AC_VERB_SET_DIGI_CONVERT_1,
  2082. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2083. /* set the stream id */
  2084. snd_hda_codec_write(codec,
  2085. nvhdmi_con_nids_7x[i],
  2086. 0,
  2087. AC_VERB_SET_CHANNEL_STREAMID,
  2088. (stream_tag << 4) | channel_id);
  2089. /* set the stream format */
  2090. snd_hda_codec_write(codec,
  2091. nvhdmi_con_nids_7x[i],
  2092. 0,
  2093. AC_VERB_SET_STREAM_FORMAT,
  2094. format);
  2095. /* turn on again (if needed) */
  2096. /* enable and set the channel status audio/data flag */
  2097. if (codec->spdif_status_reset &&
  2098. (spdif->ctls & AC_DIG1_ENABLE)) {
  2099. snd_hda_codec_write(codec,
  2100. nvhdmi_con_nids_7x[i],
  2101. 0,
  2102. AC_VERB_SET_DIGI_CONVERT_1,
  2103. spdif->ctls & 0xff);
  2104. snd_hda_codec_write(codec,
  2105. nvhdmi_con_nids_7x[i],
  2106. 0,
  2107. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2108. }
  2109. }
  2110. nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
  2111. mutex_unlock(&codec->spdif_mutex);
  2112. return 0;
  2113. }
  2114. static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
  2115. .substreams = 1,
  2116. .channels_min = 2,
  2117. .channels_max = 8,
  2118. .nid = nvhdmi_master_con_nid_7x,
  2119. .rates = SUPPORTED_RATES,
  2120. .maxbps = SUPPORTED_MAXBPS,
  2121. .formats = SUPPORTED_FORMATS,
  2122. .ops = {
  2123. .open = simple_playback_pcm_open,
  2124. .close = nvhdmi_8ch_7x_pcm_close,
  2125. .prepare = nvhdmi_8ch_7x_pcm_prepare
  2126. },
  2127. };
  2128. static int patch_nvhdmi_2ch(struct hda_codec *codec)
  2129. {
  2130. struct hdmi_spec *spec;
  2131. int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
  2132. nvhdmi_master_pin_nid_7x);
  2133. if (err < 0)
  2134. return err;
  2135. codec->patch_ops.init = nvhdmi_7x_init_2ch;
  2136. /* override the PCM rates, etc, as the codec doesn't give full list */
  2137. spec = codec->spec;
  2138. spec->pcm_playback.rates = SUPPORTED_RATES;
  2139. spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
  2140. spec->pcm_playback.formats = SUPPORTED_FORMATS;
  2141. return 0;
  2142. }
  2143. static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
  2144. {
  2145. struct hdmi_spec *spec = codec->spec;
  2146. int err = simple_playback_build_pcms(codec);
  2147. if (!err) {
  2148. struct hda_pcm *info = get_pcm_rec(spec, 0);
  2149. info->own_chmap = true;
  2150. }
  2151. return err;
  2152. }
  2153. static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
  2154. {
  2155. struct hdmi_spec *spec = codec->spec;
  2156. struct hda_pcm *info;
  2157. struct snd_pcm_chmap *chmap;
  2158. int err;
  2159. err = simple_playback_build_controls(codec);
  2160. if (err < 0)
  2161. return err;
  2162. /* add channel maps */
  2163. info = get_pcm_rec(spec, 0);
  2164. err = snd_pcm_add_chmap_ctls(info->pcm,
  2165. SNDRV_PCM_STREAM_PLAYBACK,
  2166. snd_pcm_alt_chmaps, 8, 0, &chmap);
  2167. if (err < 0)
  2168. return err;
  2169. switch (codec->preset->id) {
  2170. case 0x10de0002:
  2171. case 0x10de0003:
  2172. case 0x10de0005:
  2173. case 0x10de0006:
  2174. chmap->channel_mask = (1U << 2) | (1U << 8);
  2175. break;
  2176. case 0x10de0007:
  2177. chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
  2178. }
  2179. return 0;
  2180. }
  2181. static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
  2182. {
  2183. struct hdmi_spec *spec;
  2184. int err = patch_nvhdmi_2ch(codec);
  2185. if (err < 0)
  2186. return err;
  2187. spec = codec->spec;
  2188. spec->multiout.max_channels = 8;
  2189. spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
  2190. codec->patch_ops.init = nvhdmi_7x_init_8ch;
  2191. codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
  2192. codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
  2193. /* Initialize the audio infoframe channel mask and checksum to something
  2194. * valid */
  2195. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2196. return 0;
  2197. }
  2198. /*
  2199. * ATI-specific implementations
  2200. *
  2201. * FIXME: we may omit the whole this and use the generic code once after
  2202. * it's confirmed to work.
  2203. */
  2204. #define ATIHDMI_CVT_NID 0x02 /* audio converter */
  2205. #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
  2206. static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  2207. struct hda_codec *codec,
  2208. unsigned int stream_tag,
  2209. unsigned int format,
  2210. struct snd_pcm_substream *substream)
  2211. {
  2212. struct hdmi_spec *spec = codec->spec;
  2213. struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
  2214. int chans = substream->runtime->channels;
  2215. int i, err;
  2216. err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
  2217. substream);
  2218. if (err < 0)
  2219. return err;
  2220. snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
  2221. AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
  2222. /* FIXME: XXX */
  2223. for (i = 0; i < chans; i++) {
  2224. snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
  2225. AC_VERB_SET_HDMI_CHAN_SLOT,
  2226. (i << 4) | i);
  2227. }
  2228. return 0;
  2229. }
  2230. static int patch_atihdmi(struct hda_codec *codec)
  2231. {
  2232. struct hdmi_spec *spec;
  2233. int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
  2234. if (err < 0)
  2235. return err;
  2236. spec = codec->spec;
  2237. spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
  2238. return 0;
  2239. }
  2240. /* VIA HDMI Implementation */
  2241. #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
  2242. #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
  2243. static int patch_via_hdmi(struct hda_codec *codec)
  2244. {
  2245. return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
  2246. }
  2247. /*
  2248. * patch entries
  2249. */
  2250. static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
  2251. { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2252. { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2253. { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
  2254. { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
  2255. { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
  2256. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
  2257. { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
  2258. { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2259. { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2260. { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2261. { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2262. { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
  2263. { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
  2264. { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
  2265. { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
  2266. { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
  2267. { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
  2268. { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
  2269. { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
  2270. { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
  2271. { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
  2272. { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
  2273. { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
  2274. /* 17 is known to be absent */
  2275. { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
  2276. { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
  2277. { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
  2278. { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
  2279. { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
  2280. { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
  2281. { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
  2282. { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
  2283. { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
  2284. { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
  2285. { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
  2286. { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi },
  2287. { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
  2288. { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
  2289. { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2290. { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2291. { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2292. { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2293. { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2294. { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
  2295. { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
  2296. { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
  2297. { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2298. { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
  2299. { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
  2300. { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
  2301. { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
  2302. { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
  2303. {} /* terminator */
  2304. };
  2305. MODULE_ALIAS("snd-hda-codec-id:1002793c");
  2306. MODULE_ALIAS("snd-hda-codec-id:10027919");
  2307. MODULE_ALIAS("snd-hda-codec-id:1002791a");
  2308. MODULE_ALIAS("snd-hda-codec-id:1002aa01");
  2309. MODULE_ALIAS("snd-hda-codec-id:10951390");
  2310. MODULE_ALIAS("snd-hda-codec-id:10951392");
  2311. MODULE_ALIAS("snd-hda-codec-id:10de0002");
  2312. MODULE_ALIAS("snd-hda-codec-id:10de0003");
  2313. MODULE_ALIAS("snd-hda-codec-id:10de0005");
  2314. MODULE_ALIAS("snd-hda-codec-id:10de0006");
  2315. MODULE_ALIAS("snd-hda-codec-id:10de0007");
  2316. MODULE_ALIAS("snd-hda-codec-id:10de000a");
  2317. MODULE_ALIAS("snd-hda-codec-id:10de000b");
  2318. MODULE_ALIAS("snd-hda-codec-id:10de000c");
  2319. MODULE_ALIAS("snd-hda-codec-id:10de000d");
  2320. MODULE_ALIAS("snd-hda-codec-id:10de0010");
  2321. MODULE_ALIAS("snd-hda-codec-id:10de0011");
  2322. MODULE_ALIAS("snd-hda-codec-id:10de0012");
  2323. MODULE_ALIAS("snd-hda-codec-id:10de0013");
  2324. MODULE_ALIAS("snd-hda-codec-id:10de0014");
  2325. MODULE_ALIAS("snd-hda-codec-id:10de0015");
  2326. MODULE_ALIAS("snd-hda-codec-id:10de0016");
  2327. MODULE_ALIAS("snd-hda-codec-id:10de0018");
  2328. MODULE_ALIAS("snd-hda-codec-id:10de0019");
  2329. MODULE_ALIAS("snd-hda-codec-id:10de001a");
  2330. MODULE_ALIAS("snd-hda-codec-id:10de001b");
  2331. MODULE_ALIAS("snd-hda-codec-id:10de001c");
  2332. MODULE_ALIAS("snd-hda-codec-id:10de0040");
  2333. MODULE_ALIAS("snd-hda-codec-id:10de0041");
  2334. MODULE_ALIAS("snd-hda-codec-id:10de0042");
  2335. MODULE_ALIAS("snd-hda-codec-id:10de0043");
  2336. MODULE_ALIAS("snd-hda-codec-id:10de0044");
  2337. MODULE_ALIAS("snd-hda-codec-id:10de0051");
  2338. MODULE_ALIAS("snd-hda-codec-id:10de0060");
  2339. MODULE_ALIAS("snd-hda-codec-id:10de0067");
  2340. MODULE_ALIAS("snd-hda-codec-id:10de8001");
  2341. MODULE_ALIAS("snd-hda-codec-id:11069f80");
  2342. MODULE_ALIAS("snd-hda-codec-id:11069f81");
  2343. MODULE_ALIAS("snd-hda-codec-id:11069f84");
  2344. MODULE_ALIAS("snd-hda-codec-id:11069f85");
  2345. MODULE_ALIAS("snd-hda-codec-id:17e80047");
  2346. MODULE_ALIAS("snd-hda-codec-id:80860054");
  2347. MODULE_ALIAS("snd-hda-codec-id:80862801");
  2348. MODULE_ALIAS("snd-hda-codec-id:80862802");
  2349. MODULE_ALIAS("snd-hda-codec-id:80862803");
  2350. MODULE_ALIAS("snd-hda-codec-id:80862804");
  2351. MODULE_ALIAS("snd-hda-codec-id:80862805");
  2352. MODULE_ALIAS("snd-hda-codec-id:80862806");
  2353. MODULE_ALIAS("snd-hda-codec-id:80862807");
  2354. MODULE_ALIAS("snd-hda-codec-id:80862880");
  2355. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  2356. MODULE_LICENSE("GPL");
  2357. MODULE_DESCRIPTION("HDMI HD-audio codec");
  2358. MODULE_ALIAS("snd-hda-codec-intelhdmi");
  2359. MODULE_ALIAS("snd-hda-codec-nvhdmi");
  2360. MODULE_ALIAS("snd-hda-codec-atihdmi");
  2361. static struct hda_codec_preset_list intel_list = {
  2362. .preset = snd_hda_preset_hdmi,
  2363. .owner = THIS_MODULE,
  2364. };
  2365. static int __init patch_hdmi_init(void)
  2366. {
  2367. return snd_hda_add_codec_preset(&intel_list);
  2368. }
  2369. static void __exit patch_hdmi_exit(void)
  2370. {
  2371. snd_hda_delete_codec_preset(&intel_list);
  2372. }
  2373. module_init(patch_hdmi_init)
  2374. module_exit(patch_hdmi_exit)