board-bockw.c 8.1 KB

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  1. /*
  2. * Bock-W board support
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. * Copyright (C) 2013 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/mfd/tmio.h>
  22. #include <linux/mmc/host.h>
  23. #include <linux/mtd/partitions.h>
  24. #include <linux/pinctrl/machine.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/regulator/fixed.h>
  27. #include <linux/regulator/machine.h>
  28. #include <linux/smsc911x.h>
  29. #include <linux/spi/spi.h>
  30. #include <linux/spi/flash.h>
  31. #include <media/soc_camera.h>
  32. #include <mach/common.h>
  33. #include <mach/irqs.h>
  34. #include <mach/r8a7778.h>
  35. #include <asm/mach/arch.h>
  36. /*
  37. * CN9(Upper side) SCIF/RCAN selection
  38. *
  39. * 1,4 3,6
  40. * SW40 SCIF RCAN
  41. * SW41 SCIF RCAN
  42. */
  43. /*
  44. * MMC (CN26) pin
  45. *
  46. * SW6 (D2) 3 pin
  47. * SW7 (D5) ON
  48. * SW8 (D3) 3 pin
  49. * SW10 (D4) 1 pin
  50. * SW12 (CLK) 1 pin
  51. * SW13 (D6) 3 pin
  52. * SW14 (CMD) ON
  53. * SW15 (D6) 1 pin
  54. * SW16 (D0) ON
  55. * SW17 (D1) ON
  56. * SW18 (D7) 3 pin
  57. * SW19 (MMC) 1 pin
  58. */
  59. /* Dummy supplies, where voltage doesn't matter */
  60. static struct regulator_consumer_supply dummy_supplies[] = {
  61. REGULATOR_SUPPLY("vddvario", "smsc911x"),
  62. REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  63. };
  64. static struct smsc911x_platform_config smsc911x_data = {
  65. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  66. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  67. .flags = SMSC911X_USE_32BIT,
  68. .phy_interface = PHY_INTERFACE_MODE_MII,
  69. };
  70. static struct resource smsc911x_resources[] = {
  71. DEFINE_RES_MEM(0x18300000, 0x1000),
  72. DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
  73. };
  74. /* USB */
  75. static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
  76. /* SDHI */
  77. static struct sh_mobile_sdhi_info sdhi0_info = {
  78. .tmio_caps = MMC_CAP_SD_HIGHSPEED,
  79. .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  80. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
  81. };
  82. static struct sh_eth_plat_data ether_platform_data __initdata = {
  83. .phy = 0x01,
  84. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  85. .phy_interface = PHY_INTERFACE_MODE_RMII,
  86. /*
  87. * Although the LINK signal is available on the board, it's connected to
  88. * the link/activity LED output of the PHY, thus the link disappears and
  89. * reappears after each packet. We'd be better off ignoring such signal
  90. * and getting the link state from the PHY indirectly.
  91. */
  92. .no_ether_link = 1,
  93. };
  94. /* I2C */
  95. static struct i2c_board_info i2c0_devices[] = {
  96. {
  97. I2C_BOARD_INFO("rx8581", 0x51),
  98. },
  99. };
  100. /* HSPI*/
  101. static struct mtd_partition m25p80_spi_flash_partitions[] = {
  102. {
  103. .name = "data(spi)",
  104. .size = 0x0100000,
  105. .offset = 0,
  106. },
  107. };
  108. static struct flash_platform_data spi_flash_data = {
  109. .name = "m25p80",
  110. .type = "s25fl008k",
  111. .parts = m25p80_spi_flash_partitions,
  112. .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
  113. };
  114. static struct spi_board_info spi_board_info[] __initdata = {
  115. {
  116. .modalias = "m25p80",
  117. .max_speed_hz = 104000000,
  118. .chip_select = 0,
  119. .bus_num = 0,
  120. .mode = SPI_MODE_0,
  121. .platform_data = &spi_flash_data,
  122. },
  123. };
  124. /* MMC */
  125. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  126. .sup_pclk = 0,
  127. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  128. .caps = MMC_CAP_4_BIT_DATA |
  129. MMC_CAP_8_BIT_DATA |
  130. MMC_CAP_NEEDS_POLL,
  131. };
  132. static struct rcar_vin_platform_data vin_platform_data __initdata = {
  133. .flags = RCAR_VIN_BT656,
  134. };
  135. /* In the default configuration both decoders reside on I2C bus 0 */
  136. #define BOCKW_CAMERA(idx) \
  137. static struct i2c_board_info camera##idx##_info = { \
  138. I2C_BOARD_INFO("ml86v7667", 0x41 + 2 * (idx)), \
  139. }; \
  140. \
  141. static struct soc_camera_link iclink##idx##_ml86v7667 __initdata = { \
  142. .bus_id = idx, \
  143. .i2c_adapter_id = 0, \
  144. .board_info = &camera##idx##_info, \
  145. }
  146. BOCKW_CAMERA(0);
  147. BOCKW_CAMERA(1);
  148. static const struct pinctrl_map bockw_pinctrl_map[] = {
  149. /* Ether */
  150. PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
  151. "ether_rmii", "ether"),
  152. /* HSPI0 */
  153. PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
  154. "hspi0_a", "hspi0"),
  155. /* MMC */
  156. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
  157. "mmc_data8", "mmc"),
  158. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
  159. "mmc_ctrl", "mmc"),
  160. /* SCIF0 */
  161. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
  162. "scif0_data_a", "scif0"),
  163. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
  164. "scif0_ctrl", "scif0"),
  165. /* USB */
  166. PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
  167. "usb0", "usb0"),
  168. PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
  169. "usb1", "usb1"),
  170. /* SDHI0 */
  171. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  172. "sdhi0_data4", "sdhi0"),
  173. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  174. "sdhi0_ctrl", "sdhi0"),
  175. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  176. "sdhi0_cd", "sdhi0"),
  177. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  178. "sdhi0_wp", "sdhi0"),
  179. /* VIN0 */
  180. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
  181. "vin0_clk", "vin0"),
  182. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
  183. "vin0_data8", "vin0"),
  184. /* VIN1 */
  185. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
  186. "vin1_clk", "vin1"),
  187. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
  188. "vin1_data8", "vin1"),
  189. };
  190. #define FPGA 0x18200000
  191. #define IRQ0MR 0x30
  192. #define PFC 0xfffc0000
  193. #define PUPR4 0x110
  194. static void __init bockw_init(void)
  195. {
  196. void __iomem *base;
  197. r8a7778_clock_init();
  198. r8a7778_init_irq_extpin(1);
  199. r8a7778_add_standard_devices();
  200. r8a7778_add_usb_phy_device(&usb_phy_platform_data);
  201. r8a7778_add_ether_device(&ether_platform_data);
  202. r8a7778_add_i2c_device(0);
  203. r8a7778_add_hspi_device(0);
  204. r8a7778_add_mmc_device(&sh_mmcif_plat);
  205. r8a7778_add_vin_device(0, &vin_platform_data);
  206. /* VIN1 has a pin conflict with Ether */
  207. if (!IS_ENABLED(CONFIG_SH_ETH))
  208. r8a7778_add_vin_device(1, &vin_platform_data);
  209. platform_device_register_data(&platform_bus, "soc-camera-pdrv", 0,
  210. &iclink0_ml86v7667,
  211. sizeof(iclink0_ml86v7667));
  212. platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
  213. &iclink1_ml86v7667,
  214. sizeof(iclink1_ml86v7667));
  215. i2c_register_board_info(0, i2c0_devices,
  216. ARRAY_SIZE(i2c0_devices));
  217. spi_register_board_info(spi_board_info,
  218. ARRAY_SIZE(spi_board_info));
  219. pinctrl_register_mappings(bockw_pinctrl_map,
  220. ARRAY_SIZE(bockw_pinctrl_map));
  221. r8a7778_pinmux_init();
  222. /* for SMSC */
  223. base = ioremap_nocache(FPGA, SZ_1M);
  224. if (base) {
  225. /*
  226. * CAUTION
  227. *
  228. * IRQ0/1 is cascaded interrupt from FPGA.
  229. * it should be cared in the future
  230. * Now, it is assuming IRQ0 was used only from SMSC.
  231. */
  232. u16 val = ioread16(base + IRQ0MR);
  233. val &= ~(1 << 4); /* enable SMSC911x */
  234. iowrite16(val, base + IRQ0MR);
  235. iounmap(base);
  236. regulator_register_fixed(0, dummy_supplies,
  237. ARRAY_SIZE(dummy_supplies));
  238. platform_device_register_resndata(
  239. &platform_bus, "smsc911x", -1,
  240. smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
  241. &smsc911x_data, sizeof(smsc911x_data));
  242. }
  243. /* for SDHI */
  244. base = ioremap_nocache(PFC, 0x200);
  245. if (base) {
  246. /*
  247. * FIXME
  248. *
  249. * SDHI CD/WP pin needs pull-up
  250. */
  251. iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
  252. iounmap(base);
  253. r8a7778_sdhi_init(0, &sdhi0_info);
  254. }
  255. }
  256. static const char *bockw_boards_compat_dt[] __initdata = {
  257. "renesas,bockw",
  258. NULL,
  259. };
  260. DT_MACHINE_START(BOCKW_DT, "bockw")
  261. .init_early = r8a7778_init_delay,
  262. .init_irq = r8a7778_init_irq_dt,
  263. .init_machine = bockw_init,
  264. .init_time = shmobile_timer_init,
  265. .dt_compat = bockw_boards_compat_dt,
  266. .init_late = r8a7778_init_late,
  267. MACHINE_END