ste-ccu8540-pinctrl.dtsi 3.6 KB

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  1. /*
  2. * Copyright 2012 ST-Ericsson
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. #include "ste-nomadik-pinctrl.dtsi"
  12. / {
  13. soc {
  14. pinctrl {
  15. uart0 {
  16. uart0_default_mux: uart0_mux {
  17. default_mux {
  18. ste,function = "u0";
  19. ste,pins = "u0_a_1";
  20. };
  21. };
  22. uart0_default_mode: uart0_default {
  23. default_cfg1 {
  24. ste,pins = "GPIO0", "GPIO2";
  25. ste,config = <&in_pu>;
  26. };
  27. default_cfg2 {
  28. ste,pins = "GPIO1", "GPIO3";
  29. ste,config = <&out_hi>;
  30. };
  31. };
  32. uart0_sleep_mode: uart0_sleep {
  33. sleep_cfg1 {
  34. ste,pins = "GPIO0", "GPIO2";
  35. ste,config = <&slpm_in_pu>;
  36. };
  37. sleep_cfg2 {
  38. ste,pins = "GPIO1", "GPIO3";
  39. ste,config = <&slpm_out_hi>;
  40. };
  41. };
  42. };
  43. uart2 {
  44. uart2_default_mode: uart2_default {
  45. default_mux {
  46. ste,function = "u2";
  47. ste,pins = "u2txrx_a_1";
  48. };
  49. default_cfg1 {
  50. ste,pins = "GPIO120";
  51. ste,config = <&in_pu>;
  52. };
  53. default_cfg2 {
  54. ste,pins = "GPIO121";
  55. ste,config = <&out_hi>;
  56. };
  57. };
  58. uart2_sleep_mode: uart2_sleep {
  59. sleep_cfg1 {
  60. ste,pins = "GPIO120";
  61. ste,config = <&slpm_in_pu>;
  62. };
  63. sleep_cfg2 {
  64. ste,pins = "GPIO121";
  65. ste,config = <&slpm_out_hi>;
  66. };
  67. };
  68. };
  69. i2c0 {
  70. i2c0_default_mux: i2c_mux {
  71. default_mux {
  72. ste,function = "i2c0";
  73. ste,pins = "i2c0_a_1";
  74. };
  75. };
  76. i2c0_default_mode: i2c_default {
  77. default_cfg1 {
  78. ste,pins = "GPIO147", "GPIO148";
  79. ste,config = <&in_pu>;
  80. };
  81. };
  82. i2c0_sleep_mode: i2c_sleep {
  83. sleep_cfg1 {
  84. ste,pins = "GPIO147", "GPIO148";
  85. ste,config = <&slpm_in_pu>;
  86. };
  87. };
  88. };
  89. i2c1 {
  90. i2c1_default_mux: i2c_mux {
  91. default_mux {
  92. ste,function = "i2c1";
  93. ste,pins = "i2c1_b_2";
  94. };
  95. };
  96. i2c1_default_mode: i2c_default {
  97. default_cfg1 {
  98. ste,pins = "GPIO16", "GPIO17";
  99. ste,config = <&in_pu>;
  100. };
  101. };
  102. i2c1_sleep_mode: i2c_sleep {
  103. sleep_cfg1 {
  104. ste,pins = "GPIO16", "GPIO17";
  105. ste,config = <&slpm_in_pu>;
  106. };
  107. };
  108. };
  109. i2c2 {
  110. i2c2_default_mux: i2c_mux {
  111. default_mux {
  112. ste,function = "i2c2";
  113. ste,pins = "i2c2_b_2";
  114. };
  115. };
  116. i2c2_default_mode: i2c_default {
  117. default_cfg1 {
  118. ste,pins = "GPIO10", "GPIO11";
  119. ste,config = <&in_pu>;
  120. };
  121. };
  122. i2c2_sleep_mode: i2c_sleep {
  123. sleep_cfg1 {
  124. ste,pins = "GPIO11", "GPIO11";
  125. ste,config = <&slpm_in_pu>;
  126. };
  127. };
  128. };
  129. i2c4 {
  130. i2c4_default_mux: i2c_mux {
  131. default_mux {
  132. ste,function = "i2c4";
  133. ste,pins = "i2c4_b_2";
  134. };
  135. };
  136. i2c4_default_mode: i2c_default {
  137. default_cfg1 {
  138. ste,pins = "GPIO122", "GPIO123";
  139. ste,config = <&in_pu>;
  140. };
  141. };
  142. i2c4_sleep_mode: i2c_sleep {
  143. sleep_cfg1 {
  144. ste,pins = "GPIO122", "GPIO123";
  145. ste,config = <&slpm_in_pu>;
  146. };
  147. };
  148. };
  149. i2c5 {
  150. i2c5_default_mux: i2c_mux {
  151. default_mux {
  152. ste,function = "i2c5";
  153. ste,pins = "i2c5_c_2";
  154. };
  155. };
  156. i2c5_default_mode: i2c_default {
  157. default_cfg1 {
  158. ste,pins = "GPIO118", "GPIO119";
  159. ste,config = <&in_pu>;
  160. };
  161. };
  162. i2c5_sleep_mode: i2c_sleep {
  163. sleep_cfg1 {
  164. ste,pins = "GPIO118", "GPIO119";
  165. ste,config = <&slpm_in_pu>;
  166. };
  167. };
  168. };
  169. };
  170. };
  171. };