recv.c 25 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "ath9k.h"
  17. static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
  18. struct ieee80211_hdr *hdr)
  19. {
  20. struct ieee80211_hw *hw = sc->pri_wiphy->hw;
  21. int i;
  22. spin_lock_bh(&sc->wiphy_lock);
  23. for (i = 0; i < sc->num_sec_wiphy; i++) {
  24. struct ath_wiphy *aphy = sc->sec_wiphy[i];
  25. if (aphy == NULL)
  26. continue;
  27. if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
  28. == 0) {
  29. hw = aphy->hw;
  30. break;
  31. }
  32. }
  33. spin_unlock_bh(&sc->wiphy_lock);
  34. return hw;
  35. }
  36. /*
  37. * Setup and link descriptors.
  38. *
  39. * 11N: we can no longer afford to self link the last descriptor.
  40. * MAC acknowledges BA status as long as it copies frames to host
  41. * buffer (or rx fifo). This can incorrectly acknowledge packets
  42. * to a sender if last desc is self-linked.
  43. */
  44. static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
  45. {
  46. struct ath_hw *ah = sc->sc_ah;
  47. struct ath_common *common = ath9k_hw_common(ah);
  48. struct ath_desc *ds;
  49. struct sk_buff *skb;
  50. ATH_RXBUF_RESET(bf);
  51. ds = bf->bf_desc;
  52. ds->ds_link = 0; /* link to null */
  53. ds->ds_data = bf->bf_buf_addr;
  54. /* virtual addr of the beginning of the buffer. */
  55. skb = bf->bf_mpdu;
  56. BUG_ON(skb == NULL);
  57. ds->ds_vdata = skb->data;
  58. /*
  59. * setup rx descriptors. The rx_bufsize here tells the hardware
  60. * how much data it can DMA to us and that we are prepared
  61. * to process
  62. */
  63. ath9k_hw_setuprxdesc(ah, ds,
  64. common->rx_bufsize,
  65. 0);
  66. if (sc->rx.rxlink == NULL)
  67. ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  68. else
  69. *sc->rx.rxlink = bf->bf_daddr;
  70. sc->rx.rxlink = &ds->ds_link;
  71. ath9k_hw_rxena(ah);
  72. }
  73. static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
  74. {
  75. /* XXX block beacon interrupts */
  76. ath9k_hw_setantenna(sc->sc_ah, antenna);
  77. sc->rx.defant = antenna;
  78. sc->rx.rxotherant = 0;
  79. }
  80. /* Assumes you've already done the endian to CPU conversion */
  81. static bool ath9k_rx_accept(struct ath_common *common,
  82. struct sk_buff *skb,
  83. struct ieee80211_rx_status *rxs,
  84. struct ath_rx_status *rx_stats,
  85. bool *decrypt_error)
  86. {
  87. struct ath_hw *ah = common->ah;
  88. struct ieee80211_hdr *hdr;
  89. __le16 fc;
  90. hdr = (struct ieee80211_hdr *) skb->data;
  91. fc = hdr->frame_control;
  92. if (!rx_stats->rs_datalen)
  93. return false;
  94. if (rx_stats->rs_more) {
  95. /*
  96. * Frame spans multiple descriptors; this cannot happen yet
  97. * as we don't support jumbograms. If not in monitor mode,
  98. * discard the frame. Enable this if you want to see
  99. * error frames in Monitor mode.
  100. */
  101. if (ah->opmode != NL80211_IFTYPE_MONITOR)
  102. return false;
  103. } else if (rx_stats->rs_status != 0) {
  104. if (rx_stats->rs_status & ATH9K_RXERR_CRC)
  105. rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
  106. if (rx_stats->rs_status & ATH9K_RXERR_PHY)
  107. return false;
  108. if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
  109. *decrypt_error = true;
  110. } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
  111. if (ieee80211_is_ctl(fc))
  112. /*
  113. * Sometimes, we get invalid
  114. * MIC failures on valid control frames.
  115. * Remove these mic errors.
  116. */
  117. rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
  118. else
  119. rxs->flag |= RX_FLAG_MMIC_ERROR;
  120. }
  121. /*
  122. * Reject error frames with the exception of
  123. * decryption and MIC failures. For monitor mode,
  124. * we also ignore the CRC error.
  125. */
  126. if (ah->opmode == NL80211_IFTYPE_MONITOR) {
  127. if (rx_stats->rs_status &
  128. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
  129. ATH9K_RXERR_CRC))
  130. return false;
  131. } else {
  132. if (rx_stats->rs_status &
  133. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
  134. return false;
  135. }
  136. }
  137. }
  138. return true;
  139. }
  140. static u8 ath9k_process_rate(struct ath_common *common,
  141. struct ieee80211_hw *hw,
  142. struct ath_rx_status *rx_stats,
  143. struct ieee80211_rx_status *rxs,
  144. struct sk_buff *skb)
  145. {
  146. struct ieee80211_supported_band *sband;
  147. enum ieee80211_band band;
  148. unsigned int i = 0;
  149. band = hw->conf.channel->band;
  150. sband = hw->wiphy->bands[band];
  151. if (rx_stats->rs_rate & 0x80) {
  152. /* HT rate */
  153. rxs->flag |= RX_FLAG_HT;
  154. if (rx_stats->rs_flags & ATH9K_RX_2040)
  155. rxs->flag |= RX_FLAG_40MHZ;
  156. if (rx_stats->rs_flags & ATH9K_RX_GI)
  157. rxs->flag |= RX_FLAG_SHORT_GI;
  158. return rx_stats->rs_rate & 0x7f;
  159. }
  160. for (i = 0; i < sband->n_bitrates; i++) {
  161. if (sband->bitrates[i].hw_value == rx_stats->rs_rate)
  162. return i;
  163. if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
  164. rxs->flag |= RX_FLAG_SHORTPRE;
  165. return i;
  166. }
  167. }
  168. /* No valid hardware bitrate found -- we should not get here */
  169. ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected "
  170. "0x%02x using 1 Mbit\n", rx_stats->rs_rate);
  171. if ((common->debug_mask & ATH_DBG_XMIT))
  172. print_hex_dump_bytes("", DUMP_PREFIX_NONE, skb->data, skb->len);
  173. return 0;
  174. }
  175. /*
  176. * Theory for reporting quality:
  177. *
  178. * At a hardware RSSI of 45 you will be able to use MCS 7 reliably.
  179. * At a hardware RSSI of 45 you will be able to use MCS 15 reliably.
  180. * At a hardware RSSI of 35 you should be able use 54 Mbps reliably.
  181. *
  182. * MCS 7 is the highets MCS index usable by a 1-stream device.
  183. * MCS 15 is the highest MCS index usable by a 2-stream device.
  184. *
  185. * All ath9k devices are either 1-stream or 2-stream.
  186. *
  187. * How many bars you see is derived from the qual reporting.
  188. *
  189. * A more elaborate scheme can be used here but it requires tables
  190. * of SNR/throughput for each possible mode used. For the MCS table
  191. * you can refer to the wireless wiki:
  192. *
  193. * http://wireless.kernel.org/en/developers/Documentation/ieee80211/802.11n
  194. *
  195. */
  196. static int ath9k_compute_qual(struct ieee80211_hw *hw,
  197. struct ath_rx_status *rx_stats)
  198. {
  199. int qual;
  200. if (conf_is_ht(&hw->conf))
  201. qual = rx_stats->rs_rssi * 100 / 45;
  202. else
  203. qual = rx_stats->rs_rssi * 100 / 35;
  204. /*
  205. * rssi can be more than 45 though, anything above that
  206. * should be considered at 100%
  207. */
  208. if (qual > 100)
  209. qual = 100;
  210. return qual;
  211. }
  212. static void ath9k_process_rssi(struct ath_common *common,
  213. struct ieee80211_hw *hw,
  214. struct sk_buff *skb,
  215. struct ath_rx_status *rx_stats)
  216. {
  217. struct ath_hw *ah = common->ah;
  218. struct ieee80211_sta *sta;
  219. struct ieee80211_hdr *hdr;
  220. struct ath_node *an;
  221. int last_rssi = ATH_RSSI_DUMMY_MARKER;
  222. __le16 fc;
  223. hdr = (struct ieee80211_hdr *)skb->data;
  224. fc = hdr->frame_control;
  225. rcu_read_lock();
  226. /* XXX: use ieee80211_find_sta! */
  227. sta = ieee80211_find_sta_by_hw(hw, hdr->addr2);
  228. if (sta) {
  229. an = (struct ath_node *) sta->drv_priv;
  230. if (rx_stats->rs_rssi != ATH9K_RSSI_BAD &&
  231. !rx_stats->rs_moreaggr)
  232. ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi);
  233. last_rssi = an->last_rssi;
  234. }
  235. rcu_read_unlock();
  236. if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
  237. rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
  238. ATH_RSSI_EP_MULTIPLIER);
  239. if (rx_stats->rs_rssi < 0)
  240. rx_stats->rs_rssi = 0;
  241. else if (rx_stats->rs_rssi > 127)
  242. rx_stats->rs_rssi = 127;
  243. /* Update Beacon RSSI, this is used by ANI. */
  244. if (ieee80211_is_beacon(fc))
  245. ah->stats.avgbrssi = rx_stats->rs_rssi;
  246. }
  247. /*
  248. * For Decrypt or Demic errors, we only mark packet status here and always push
  249. * up the frame up to let mac80211 handle the actual error case, be it no
  250. * decryption key or real decryption error. This let us keep statistics there.
  251. */
  252. static int ath_rx_prepare(struct ath_common *common,
  253. struct ieee80211_hw *hw,
  254. struct sk_buff *skb, struct ath_rx_status *rx_stats,
  255. struct ieee80211_rx_status *rx_status,
  256. bool *decrypt_error)
  257. {
  258. struct ath_hw *ah = common->ah;
  259. if (!ath9k_rx_accept(common, skb, rx_status, rx_stats, decrypt_error))
  260. goto rx_next;
  261. ath9k_process_rssi(common, hw, skb, rx_stats);
  262. rx_status->rate_idx = ath9k_process_rate(common, hw,
  263. rx_stats, rx_status, skb);
  264. rx_status->mactime = ath9k_hw_extend_tsf(ah, rx_stats->rs_tstamp);
  265. rx_status->band = hw->conf.channel->band;
  266. rx_status->freq = hw->conf.channel->center_freq;
  267. rx_status->noise = common->ani.noise_floor;
  268. rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
  269. rx_status->antenna = rx_stats->rs_antenna;
  270. rx_status->qual = ath9k_compute_qual(hw, rx_stats);
  271. rx_status->flag |= RX_FLAG_TSFT;
  272. return 1;
  273. rx_next:
  274. return 0;
  275. }
  276. static void ath_opmode_init(struct ath_softc *sc)
  277. {
  278. struct ath_hw *ah = sc->sc_ah;
  279. struct ath_common *common = ath9k_hw_common(ah);
  280. u32 rfilt, mfilt[2];
  281. /* configure rx filter */
  282. rfilt = ath_calcrxfilter(sc);
  283. ath9k_hw_setrxfilter(ah, rfilt);
  284. /* configure bssid mask */
  285. if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
  286. ath_hw_setbssidmask(common);
  287. /* configure operational mode */
  288. ath9k_hw_setopmode(ah);
  289. /* Handle any link-level address change. */
  290. ath9k_hw_setmac(ah, common->macaddr);
  291. /* calculate and install multicast filter */
  292. mfilt[0] = mfilt[1] = ~0;
  293. ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
  294. }
  295. int ath_rx_init(struct ath_softc *sc, int nbufs)
  296. {
  297. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  298. struct sk_buff *skb;
  299. struct ath_buf *bf;
  300. int error = 0;
  301. spin_lock_init(&sc->rx.rxflushlock);
  302. sc->sc_flags &= ~SC_OP_RXFLUSH;
  303. spin_lock_init(&sc->rx.rxbuflock);
  304. common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
  305. min(common->cachelsz, (u16)64));
  306. ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
  307. common->cachelsz, common->rx_bufsize);
  308. /* Initialize rx descriptors */
  309. error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
  310. "rx", nbufs, 1);
  311. if (error != 0) {
  312. ath_print(common, ATH_DBG_FATAL,
  313. "failed to allocate rx descriptors: %d\n", error);
  314. goto err;
  315. }
  316. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  317. skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
  318. if (skb == NULL) {
  319. error = -ENOMEM;
  320. goto err;
  321. }
  322. bf->bf_mpdu = skb;
  323. bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
  324. common->rx_bufsize,
  325. DMA_FROM_DEVICE);
  326. if (unlikely(dma_mapping_error(sc->dev,
  327. bf->bf_buf_addr))) {
  328. dev_kfree_skb_any(skb);
  329. bf->bf_mpdu = NULL;
  330. ath_print(common, ATH_DBG_FATAL,
  331. "dma_mapping_error() on RX init\n");
  332. error = -ENOMEM;
  333. goto err;
  334. }
  335. bf->bf_dmacontext = bf->bf_buf_addr;
  336. }
  337. sc->rx.rxlink = NULL;
  338. err:
  339. if (error)
  340. ath_rx_cleanup(sc);
  341. return error;
  342. }
  343. void ath_rx_cleanup(struct ath_softc *sc)
  344. {
  345. struct ath_hw *ah = sc->sc_ah;
  346. struct ath_common *common = ath9k_hw_common(ah);
  347. struct sk_buff *skb;
  348. struct ath_buf *bf;
  349. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  350. skb = bf->bf_mpdu;
  351. if (skb) {
  352. dma_unmap_single(sc->dev, bf->bf_buf_addr,
  353. common->rx_bufsize, DMA_FROM_DEVICE);
  354. dev_kfree_skb(skb);
  355. }
  356. }
  357. if (sc->rx.rxdma.dd_desc_len != 0)
  358. ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
  359. }
  360. /*
  361. * Calculate the receive filter according to the
  362. * operating mode and state:
  363. *
  364. * o always accept unicast, broadcast, and multicast traffic
  365. * o maintain current state of phy error reception (the hal
  366. * may enable phy error frames for noise immunity work)
  367. * o probe request frames are accepted only when operating in
  368. * hostap, adhoc, or monitor modes
  369. * o enable promiscuous mode according to the interface state
  370. * o accept beacons:
  371. * - when operating in adhoc mode so the 802.11 layer creates
  372. * node table entries for peers,
  373. * - when operating in station mode for collecting rssi data when
  374. * the station is otherwise quiet, or
  375. * - when operating as a repeater so we see repeater-sta beacons
  376. * - when scanning
  377. */
  378. u32 ath_calcrxfilter(struct ath_softc *sc)
  379. {
  380. #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
  381. u32 rfilt;
  382. rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
  383. | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
  384. | ATH9K_RX_FILTER_MCAST;
  385. /* If not a STA, enable processing of Probe Requests */
  386. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  387. rfilt |= ATH9K_RX_FILTER_PROBEREQ;
  388. /*
  389. * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
  390. * mode interface or when in monitor mode. AP mode does not need this
  391. * since it receives all in-BSS frames anyway.
  392. */
  393. if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
  394. (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
  395. (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
  396. rfilt |= ATH9K_RX_FILTER_PROM;
  397. if (sc->rx.rxfilter & FIF_CONTROL)
  398. rfilt |= ATH9K_RX_FILTER_CONTROL;
  399. if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
  400. !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
  401. rfilt |= ATH9K_RX_FILTER_MYBEACON;
  402. else
  403. rfilt |= ATH9K_RX_FILTER_BEACON;
  404. if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
  405. AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
  406. (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
  407. (sc->rx.rxfilter & FIF_PSPOLL))
  408. rfilt |= ATH9K_RX_FILTER_PSPOLL;
  409. if (conf_is_ht(&sc->hw->conf))
  410. rfilt |= ATH9K_RX_FILTER_COMP_BAR;
  411. if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
  412. /* TODO: only needed if more than one BSSID is in use in
  413. * station/adhoc mode */
  414. /* The following may also be needed for other older chips */
  415. if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
  416. rfilt |= ATH9K_RX_FILTER_PROM;
  417. rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
  418. }
  419. return rfilt;
  420. #undef RX_FILTER_PRESERVE
  421. }
  422. int ath_startrecv(struct ath_softc *sc)
  423. {
  424. struct ath_hw *ah = sc->sc_ah;
  425. struct ath_buf *bf, *tbf;
  426. spin_lock_bh(&sc->rx.rxbuflock);
  427. if (list_empty(&sc->rx.rxbuf))
  428. goto start_recv;
  429. sc->rx.rxlink = NULL;
  430. list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
  431. ath_rx_buf_link(sc, bf);
  432. }
  433. /* We could have deleted elements so the list may be empty now */
  434. if (list_empty(&sc->rx.rxbuf))
  435. goto start_recv;
  436. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  437. ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  438. ath9k_hw_rxena(ah);
  439. start_recv:
  440. spin_unlock_bh(&sc->rx.rxbuflock);
  441. ath_opmode_init(sc);
  442. ath9k_hw_startpcureceive(ah);
  443. return 0;
  444. }
  445. bool ath_stoprecv(struct ath_softc *sc)
  446. {
  447. struct ath_hw *ah = sc->sc_ah;
  448. bool stopped;
  449. ath9k_hw_stoppcurecv(ah);
  450. ath9k_hw_setrxfilter(ah, 0);
  451. stopped = ath9k_hw_stopdmarecv(ah);
  452. sc->rx.rxlink = NULL;
  453. return stopped;
  454. }
  455. void ath_flushrecv(struct ath_softc *sc)
  456. {
  457. spin_lock_bh(&sc->rx.rxflushlock);
  458. sc->sc_flags |= SC_OP_RXFLUSH;
  459. ath_rx_tasklet(sc, 1);
  460. sc->sc_flags &= ~SC_OP_RXFLUSH;
  461. spin_unlock_bh(&sc->rx.rxflushlock);
  462. }
  463. static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
  464. {
  465. /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
  466. struct ieee80211_mgmt *mgmt;
  467. u8 *pos, *end, id, elen;
  468. struct ieee80211_tim_ie *tim;
  469. mgmt = (struct ieee80211_mgmt *)skb->data;
  470. pos = mgmt->u.beacon.variable;
  471. end = skb->data + skb->len;
  472. while (pos + 2 < end) {
  473. id = *pos++;
  474. elen = *pos++;
  475. if (pos + elen > end)
  476. break;
  477. if (id == WLAN_EID_TIM) {
  478. if (elen < sizeof(*tim))
  479. break;
  480. tim = (struct ieee80211_tim_ie *) pos;
  481. if (tim->dtim_count != 0)
  482. break;
  483. return tim->bitmap_ctrl & 0x01;
  484. }
  485. pos += elen;
  486. }
  487. return false;
  488. }
  489. static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
  490. {
  491. struct ieee80211_mgmt *mgmt;
  492. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  493. if (skb->len < 24 + 8 + 2 + 2)
  494. return;
  495. mgmt = (struct ieee80211_mgmt *)skb->data;
  496. if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
  497. return; /* not from our current AP */
  498. sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON;
  499. if (sc->sc_flags & SC_OP_BEACON_SYNC) {
  500. sc->sc_flags &= ~SC_OP_BEACON_SYNC;
  501. ath_print(common, ATH_DBG_PS,
  502. "Reconfigure Beacon timers based on "
  503. "timestamp from the AP\n");
  504. ath_beacon_config(sc, NULL);
  505. }
  506. if (ath_beacon_dtim_pending_cab(skb)) {
  507. /*
  508. * Remain awake waiting for buffered broadcast/multicast
  509. * frames. If the last broadcast/multicast frame is not
  510. * received properly, the next beacon frame will work as
  511. * a backup trigger for returning into NETWORK SLEEP state,
  512. * so we are waiting for it as well.
  513. */
  514. ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
  515. "buffered broadcast/multicast frame(s)\n");
  516. sc->sc_flags |= SC_OP_WAIT_FOR_CAB | SC_OP_WAIT_FOR_BEACON;
  517. return;
  518. }
  519. if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) {
  520. /*
  521. * This can happen if a broadcast frame is dropped or the AP
  522. * fails to send a frame indicating that all CAB frames have
  523. * been delivered.
  524. */
  525. sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
  526. ath_print(common, ATH_DBG_PS,
  527. "PS wait for CAB frames timed out\n");
  528. }
  529. }
  530. static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
  531. {
  532. struct ieee80211_hdr *hdr;
  533. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  534. hdr = (struct ieee80211_hdr *)skb->data;
  535. /* Process Beacon and CAB receive in PS state */
  536. if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) &&
  537. ieee80211_is_beacon(hdr->frame_control))
  538. ath_rx_ps_beacon(sc, skb);
  539. else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) &&
  540. (ieee80211_is_data(hdr->frame_control) ||
  541. ieee80211_is_action(hdr->frame_control)) &&
  542. is_multicast_ether_addr(hdr->addr1) &&
  543. !ieee80211_has_moredata(hdr->frame_control)) {
  544. /*
  545. * No more broadcast/multicast frames to be received at this
  546. * point.
  547. */
  548. sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
  549. ath_print(common, ATH_DBG_PS,
  550. "All PS CAB frames received, back to sleep\n");
  551. } else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) &&
  552. !is_multicast_ether_addr(hdr->addr1) &&
  553. !ieee80211_has_morefrags(hdr->frame_control)) {
  554. sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA;
  555. ath_print(common, ATH_DBG_PS,
  556. "Going back to sleep after having received "
  557. "PS-Poll data (0x%x)\n",
  558. sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
  559. SC_OP_WAIT_FOR_CAB |
  560. SC_OP_WAIT_FOR_PSPOLL_DATA |
  561. SC_OP_WAIT_FOR_TX_ACK));
  562. }
  563. }
  564. static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
  565. struct ath_softc *sc, struct sk_buff *skb,
  566. struct ieee80211_rx_status *rxs)
  567. {
  568. struct ieee80211_hdr *hdr;
  569. hdr = (struct ieee80211_hdr *)skb->data;
  570. /* Send the frame to mac80211 */
  571. if (is_multicast_ether_addr(hdr->addr1)) {
  572. int i;
  573. /*
  574. * Deliver broadcast/multicast frames to all suitable
  575. * virtual wiphys.
  576. */
  577. /* TODO: filter based on channel configuration */
  578. for (i = 0; i < sc->num_sec_wiphy; i++) {
  579. struct ath_wiphy *aphy = sc->sec_wiphy[i];
  580. struct sk_buff *nskb;
  581. if (aphy == NULL)
  582. continue;
  583. nskb = skb_copy(skb, GFP_ATOMIC);
  584. if (!nskb)
  585. continue;
  586. ieee80211_rx(aphy->hw, nskb);
  587. }
  588. ieee80211_rx(sc->hw, skb);
  589. } else
  590. /* Deliver unicast frames based on receiver address */
  591. ieee80211_rx(hw, skb);
  592. }
  593. int ath_rx_tasklet(struct ath_softc *sc, int flush)
  594. {
  595. #define PA2DESC(_sc, _pa) \
  596. ((struct ath_desc *)((caddr_t)(_sc)->rx.rxdma.dd_desc + \
  597. ((_pa) - (_sc)->rx.rxdma.dd_desc_paddr)))
  598. struct ath_buf *bf;
  599. struct ath_desc *ds;
  600. struct ath_rx_status *rx_stats;
  601. struct sk_buff *skb = NULL, *requeue_skb;
  602. struct ieee80211_rx_status *rxs;
  603. struct ath_hw *ah = sc->sc_ah;
  604. struct ath_common *common = ath9k_hw_common(ah);
  605. /*
  606. * The hw can techncically differ from common->hw when using ath9k
  607. * virtual wiphy so to account for that we iterate over the active
  608. * wiphys and find the appropriate wiphy and therefore hw.
  609. */
  610. struct ieee80211_hw *hw = NULL;
  611. struct ieee80211_hdr *hdr;
  612. int hdrlen, padsize, retval;
  613. bool decrypt_error = false;
  614. u8 keyix;
  615. __le16 fc;
  616. spin_lock_bh(&sc->rx.rxbuflock);
  617. do {
  618. /* If handling rx interrupt and flush is in progress => exit */
  619. if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
  620. break;
  621. if (list_empty(&sc->rx.rxbuf)) {
  622. sc->rx.rxlink = NULL;
  623. break;
  624. }
  625. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  626. ds = bf->bf_desc;
  627. /*
  628. * Must provide the virtual address of the current
  629. * descriptor, the physical address, and the virtual
  630. * address of the next descriptor in the h/w chain.
  631. * This allows the HAL to look ahead to see if the
  632. * hardware is done with a descriptor by checking the
  633. * done bit in the following descriptor and the address
  634. * of the current descriptor the DMA engine is working
  635. * on. All this is necessary because of our use of
  636. * a self-linked list to avoid rx overruns.
  637. */
  638. retval = ath9k_hw_rxprocdesc(ah, ds,
  639. bf->bf_daddr,
  640. PA2DESC(sc, ds->ds_link),
  641. 0);
  642. if (retval == -EINPROGRESS) {
  643. struct ath_buf *tbf;
  644. struct ath_desc *tds;
  645. if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
  646. sc->rx.rxlink = NULL;
  647. break;
  648. }
  649. tbf = list_entry(bf->list.next, struct ath_buf, list);
  650. /*
  651. * On some hardware the descriptor status words could
  652. * get corrupted, including the done bit. Because of
  653. * this, check if the next descriptor's done bit is
  654. * set or not.
  655. *
  656. * If the next descriptor's done bit is set, the current
  657. * descriptor has been corrupted. Force s/w to discard
  658. * this descriptor and continue...
  659. */
  660. tds = tbf->bf_desc;
  661. retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,
  662. PA2DESC(sc, tds->ds_link), 0);
  663. if (retval == -EINPROGRESS) {
  664. break;
  665. }
  666. }
  667. skb = bf->bf_mpdu;
  668. if (!skb)
  669. continue;
  670. /*
  671. * Synchronize the DMA transfer with CPU before
  672. * 1. accessing the frame
  673. * 2. requeueing the same buffer to h/w
  674. */
  675. dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
  676. common->rx_bufsize,
  677. DMA_FROM_DEVICE);
  678. hdr = (struct ieee80211_hdr *) skb->data;
  679. rxs = IEEE80211_SKB_RXCB(skb);
  680. hw = ath_get_virt_hw(sc, hdr);
  681. rx_stats = &ds->ds_rxstat;
  682. /*
  683. * If we're asked to flush receive queue, directly
  684. * chain it back at the queue without processing it.
  685. */
  686. if (flush)
  687. goto requeue;
  688. /* The status portion of the descriptor could get corrupted. */
  689. if (common->rx_bufsize < rx_stats->rs_datalen)
  690. goto requeue;
  691. if (!ath_rx_prepare(common, hw, skb, rx_stats,
  692. rxs, &decrypt_error))
  693. goto requeue;
  694. /* Ensure we always have an skb to requeue once we are done
  695. * processing the current buffer's skb */
  696. requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
  697. /* If there is no memory we ignore the current RX'd frame,
  698. * tell hardware it can give us a new frame using the old
  699. * skb and put it at the tail of the sc->rx.rxbuf list for
  700. * processing. */
  701. if (!requeue_skb)
  702. goto requeue;
  703. /* Unmap the frame */
  704. dma_unmap_single(sc->dev, bf->bf_buf_addr,
  705. common->rx_bufsize,
  706. DMA_FROM_DEVICE);
  707. skb_put(skb, rx_stats->rs_datalen);
  708. /* see if any padding is done by the hw and remove it */
  709. hdrlen = ieee80211_get_hdrlen_from_skb(skb);
  710. fc = hdr->frame_control;
  711. /* The MAC header is padded to have 32-bit boundary if the
  712. * packet payload is non-zero. The general calculation for
  713. * padsize would take into account odd header lengths:
  714. * padsize = (4 - hdrlen % 4) % 4; However, since only
  715. * even-length headers are used, padding can only be 0 or 2
  716. * bytes and we can optimize this a bit. In addition, we must
  717. * not try to remove padding from short control frames that do
  718. * not have payload. */
  719. padsize = hdrlen & 3;
  720. if (padsize && hdrlen >= 24) {
  721. memmove(skb->data + padsize, skb->data, hdrlen);
  722. skb_pull(skb, padsize);
  723. }
  724. keyix = rx_stats->rs_keyix;
  725. if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) {
  726. rxs->flag |= RX_FLAG_DECRYPTED;
  727. } else if (ieee80211_has_protected(fc)
  728. && !decrypt_error && skb->len >= hdrlen + 4) {
  729. keyix = skb->data[hdrlen + 3] >> 6;
  730. if (test_bit(keyix, sc->keymap))
  731. rxs->flag |= RX_FLAG_DECRYPTED;
  732. }
  733. if (ah->sw_mgmt_crypto &&
  734. (rxs->flag & RX_FLAG_DECRYPTED) &&
  735. ieee80211_is_mgmt(fc))
  736. /* Use software decrypt for management frames. */
  737. rxs->flag &= ~RX_FLAG_DECRYPTED;
  738. /* We will now give hardware our shiny new allocated skb */
  739. bf->bf_mpdu = requeue_skb;
  740. bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
  741. common->rx_bufsize,
  742. DMA_FROM_DEVICE);
  743. if (unlikely(dma_mapping_error(sc->dev,
  744. bf->bf_buf_addr))) {
  745. dev_kfree_skb_any(requeue_skb);
  746. bf->bf_mpdu = NULL;
  747. ath_print(common, ATH_DBG_FATAL,
  748. "dma_mapping_error() on RX\n");
  749. ath_rx_send_to_mac80211(hw, sc, skb, rxs);
  750. break;
  751. }
  752. bf->bf_dmacontext = bf->bf_buf_addr;
  753. /*
  754. * change the default rx antenna if rx diversity chooses the
  755. * other antenna 3 times in a row.
  756. */
  757. if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
  758. if (++sc->rx.rxotherant >= 3)
  759. ath_setdefantenna(sc, rx_stats->rs_antenna);
  760. } else {
  761. sc->rx.rxotherant = 0;
  762. }
  763. if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
  764. SC_OP_WAIT_FOR_CAB |
  765. SC_OP_WAIT_FOR_PSPOLL_DATA)))
  766. ath_rx_ps(sc, skb);
  767. ath_rx_send_to_mac80211(hw, sc, skb, rxs);
  768. requeue:
  769. list_move_tail(&bf->list, &sc->rx.rxbuf);
  770. ath_rx_buf_link(sc, bf);
  771. } while (1);
  772. spin_unlock_bh(&sc->rx.rxbuflock);
  773. return 0;
  774. #undef PA2DESC
  775. }