p54common.c 37 KB

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  1. /*
  2. * Common code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
  6. *
  7. * Based on the islsm (softmac prism54) driver, which is:
  8. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/firmware.h>
  16. #include <linux/etherdevice.h>
  17. #include <net/mac80211.h>
  18. #include "p54.h"
  19. #include "p54common.h"
  20. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  21. MODULE_DESCRIPTION("Softmac Prism54 common code");
  22. MODULE_LICENSE("GPL");
  23. MODULE_ALIAS("prism54common");
  24. static struct ieee80211_rate p54_rates[] = {
  25. { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  26. { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  27. { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  28. { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  29. { .bitrate = 60, .hw_value = 4, },
  30. { .bitrate = 90, .hw_value = 5, },
  31. { .bitrate = 120, .hw_value = 6, },
  32. { .bitrate = 180, .hw_value = 7, },
  33. { .bitrate = 240, .hw_value = 8, },
  34. { .bitrate = 360, .hw_value = 9, },
  35. { .bitrate = 480, .hw_value = 10, },
  36. { .bitrate = 540, .hw_value = 11, },
  37. };
  38. static struct ieee80211_channel p54_channels[] = {
  39. { .center_freq = 2412, .hw_value = 1, },
  40. { .center_freq = 2417, .hw_value = 2, },
  41. { .center_freq = 2422, .hw_value = 3, },
  42. { .center_freq = 2427, .hw_value = 4, },
  43. { .center_freq = 2432, .hw_value = 5, },
  44. { .center_freq = 2437, .hw_value = 6, },
  45. { .center_freq = 2442, .hw_value = 7, },
  46. { .center_freq = 2447, .hw_value = 8, },
  47. { .center_freq = 2452, .hw_value = 9, },
  48. { .center_freq = 2457, .hw_value = 10, },
  49. { .center_freq = 2462, .hw_value = 11, },
  50. { .center_freq = 2467, .hw_value = 12, },
  51. { .center_freq = 2472, .hw_value = 13, },
  52. { .center_freq = 2484, .hw_value = 14, },
  53. };
  54. static struct ieee80211_supported_band band_2GHz = {
  55. .channels = p54_channels,
  56. .n_channels = ARRAY_SIZE(p54_channels),
  57. .bitrates = p54_rates,
  58. .n_bitrates = ARRAY_SIZE(p54_rates),
  59. };
  60. int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  61. {
  62. struct p54_common *priv = dev->priv;
  63. struct bootrec_exp_if *exp_if;
  64. struct bootrec *bootrec;
  65. u32 *data = (u32 *)fw->data;
  66. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  67. u8 *fw_version = NULL;
  68. size_t len;
  69. int i;
  70. if (priv->rx_start)
  71. return 0;
  72. while (data < end_data && *data)
  73. data++;
  74. while (data < end_data && !*data)
  75. data++;
  76. bootrec = (struct bootrec *) data;
  77. while (bootrec->data <= end_data &&
  78. (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
  79. u32 code = le32_to_cpu(bootrec->code);
  80. switch (code) {
  81. case BR_CODE_COMPONENT_ID:
  82. priv->fw_interface = be32_to_cpup(bootrec->data);
  83. switch (priv->fw_interface) {
  84. case FW_FMAC:
  85. printk(KERN_INFO "p54: FreeMAC firmware\n");
  86. break;
  87. case FW_LM20:
  88. printk(KERN_INFO "p54: LM20 firmware\n");
  89. break;
  90. case FW_LM86:
  91. printk(KERN_INFO "p54: LM86 firmware\n");
  92. break;
  93. case FW_LM87:
  94. printk(KERN_INFO "p54: LM87 firmware\n");
  95. break;
  96. default:
  97. printk(KERN_INFO "p54: unknown firmware\n");
  98. break;
  99. }
  100. break;
  101. case BR_CODE_COMPONENT_VERSION:
  102. /* 24 bytes should be enough for all firmwares */
  103. if (strnlen((unsigned char*)bootrec->data, 24) < 24)
  104. fw_version = (unsigned char*)bootrec->data;
  105. break;
  106. case BR_CODE_DESCR: {
  107. struct bootrec_desc *desc =
  108. (struct bootrec_desc *)bootrec->data;
  109. priv->rx_start = le32_to_cpu(desc->rx_start);
  110. /* FIXME add sanity checking */
  111. priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
  112. priv->headroom = desc->headroom;
  113. priv->tailroom = desc->tailroom;
  114. if (bootrec->len == 11)
  115. priv->rx_mtu = (size_t) le16_to_cpu(
  116. (__le16)bootrec->data[10]);
  117. else
  118. priv->rx_mtu = (size_t)
  119. 0x620 - priv->tx_hdr_len;
  120. break;
  121. }
  122. case BR_CODE_EXPOSED_IF:
  123. exp_if = (struct bootrec_exp_if *) bootrec->data;
  124. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  125. if (exp_if[i].if_id == cpu_to_le16(0x1a))
  126. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  127. break;
  128. case BR_CODE_DEPENDENT_IF:
  129. break;
  130. case BR_CODE_END_OF_BRA:
  131. case LEGACY_BR_CODE_END_OF_BRA:
  132. end_data = NULL;
  133. break;
  134. default:
  135. break;
  136. }
  137. bootrec = (struct bootrec *)&bootrec->data[len];
  138. }
  139. if (fw_version)
  140. printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
  141. fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
  142. if (priv->fw_var >= 0x300) {
  143. /* Firmware supports QoS, use it! */
  144. priv->tx_stats[4].limit = 3;
  145. priv->tx_stats[5].limit = 4;
  146. priv->tx_stats[6].limit = 3;
  147. priv->tx_stats[7].limit = 1;
  148. dev->queues = 4;
  149. }
  150. return 0;
  151. }
  152. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  153. static int p54_convert_rev0(struct ieee80211_hw *dev,
  154. struct pda_pa_curve_data *curve_data)
  155. {
  156. struct p54_common *priv = dev->priv;
  157. struct p54_pa_curve_data_sample *dst;
  158. struct pda_pa_curve_data_sample_rev0 *src;
  159. size_t cd_len = sizeof(*curve_data) +
  160. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  161. curve_data->channels;
  162. unsigned int i, j;
  163. void *source, *target;
  164. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  165. if (!priv->curve_data)
  166. return -ENOMEM;
  167. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  168. source = curve_data->data;
  169. target = priv->curve_data->data;
  170. for (i = 0; i < curve_data->channels; i++) {
  171. __le16 *freq = source;
  172. source += sizeof(__le16);
  173. *((__le16 *)target) = *freq;
  174. target += sizeof(__le16);
  175. for (j = 0; j < curve_data->points_per_channel; j++) {
  176. dst = target;
  177. src = source;
  178. dst->rf_power = src->rf_power;
  179. dst->pa_detector = src->pa_detector;
  180. dst->data_64qam = src->pcv;
  181. /* "invent" the points for the other modulations */
  182. #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
  183. dst->data_16qam = SUB(src->pcv, 12);
  184. dst->data_qpsk = SUB(dst->data_16qam, 12);
  185. dst->data_bpsk = SUB(dst->data_qpsk, 12);
  186. dst->data_barker = SUB(dst->data_bpsk, 14);
  187. #undef SUB
  188. target += sizeof(*dst);
  189. source += sizeof(*src);
  190. }
  191. }
  192. return 0;
  193. }
  194. static int p54_convert_rev1(struct ieee80211_hw *dev,
  195. struct pda_pa_curve_data *curve_data)
  196. {
  197. struct p54_common *priv = dev->priv;
  198. struct p54_pa_curve_data_sample *dst;
  199. struct pda_pa_curve_data_sample_rev1 *src;
  200. size_t cd_len = sizeof(*curve_data) +
  201. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  202. curve_data->channels;
  203. unsigned int i, j;
  204. void *source, *target;
  205. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  206. if (!priv->curve_data)
  207. return -ENOMEM;
  208. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  209. source = curve_data->data;
  210. target = priv->curve_data->data;
  211. for (i = 0; i < curve_data->channels; i++) {
  212. __le16 *freq = source;
  213. source += sizeof(__le16);
  214. *((__le16 *)target) = *freq;
  215. target += sizeof(__le16);
  216. for (j = 0; j < curve_data->points_per_channel; j++) {
  217. memcpy(target, source, sizeof(*src));
  218. target += sizeof(*dst);
  219. source += sizeof(*src);
  220. }
  221. source++;
  222. }
  223. return 0;
  224. }
  225. const char* p54_rf_chips[] = { "NULL", "Indigo?", "Duette",
  226. "Frisbee", "Xbow", "Longbow" };
  227. int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
  228. {
  229. struct p54_common *priv = dev->priv;
  230. struct eeprom_pda_wrap *wrap = NULL;
  231. struct pda_entry *entry;
  232. unsigned int data_len, entry_len;
  233. void *tmp;
  234. int err;
  235. u8 *end = (u8 *)eeprom + len;
  236. DECLARE_MAC_BUF(mac);
  237. wrap = (struct eeprom_pda_wrap *) eeprom;
  238. entry = (void *)wrap->data + le16_to_cpu(wrap->len);
  239. /* verify that at least the entry length/code fits */
  240. while ((u8 *)entry <= end - sizeof(*entry)) {
  241. entry_len = le16_to_cpu(entry->len);
  242. data_len = ((entry_len - 1) << 1);
  243. /* abort if entry exceeds whole structure */
  244. if ((u8 *)entry + sizeof(*entry) + data_len > end)
  245. break;
  246. switch (le16_to_cpu(entry->code)) {
  247. case PDR_MAC_ADDRESS:
  248. SET_IEEE80211_PERM_ADDR(dev, entry->data);
  249. break;
  250. case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
  251. if (data_len < 2) {
  252. err = -EINVAL;
  253. goto err;
  254. }
  255. if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
  256. err = -EINVAL;
  257. goto err;
  258. }
  259. priv->output_limit = kmalloc(entry->data[1] *
  260. sizeof(*priv->output_limit), GFP_KERNEL);
  261. if (!priv->output_limit) {
  262. err = -ENOMEM;
  263. goto err;
  264. }
  265. memcpy(priv->output_limit, &entry->data[2],
  266. entry->data[1]*sizeof(*priv->output_limit));
  267. priv->output_limit_len = entry->data[1];
  268. break;
  269. case PDR_PRISM_PA_CAL_CURVE_DATA: {
  270. struct pda_pa_curve_data *curve_data =
  271. (struct pda_pa_curve_data *)entry->data;
  272. if (data_len < sizeof(*curve_data)) {
  273. err = -EINVAL;
  274. goto err;
  275. }
  276. switch (curve_data->cal_method_rev) {
  277. case 0:
  278. err = p54_convert_rev0(dev, curve_data);
  279. break;
  280. case 1:
  281. err = p54_convert_rev1(dev, curve_data);
  282. break;
  283. default:
  284. printk(KERN_ERR "p54: unknown curve data "
  285. "revision %d\n",
  286. curve_data->cal_method_rev);
  287. err = -ENODEV;
  288. break;
  289. }
  290. if (err)
  291. goto err;
  292. }
  293. case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
  294. priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
  295. if (!priv->iq_autocal) {
  296. err = -ENOMEM;
  297. goto err;
  298. }
  299. memcpy(priv->iq_autocal, entry->data, data_len);
  300. priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
  301. break;
  302. case PDR_INTERFACE_LIST:
  303. tmp = entry->data;
  304. while ((u8 *)tmp < entry->data + data_len) {
  305. struct bootrec_exp_if *exp_if = tmp;
  306. if (le16_to_cpu(exp_if->if_id) == 0xF)
  307. priv->rxhw = le16_to_cpu(exp_if->variant) & 0x07;
  308. tmp += sizeof(struct bootrec_exp_if);
  309. }
  310. break;
  311. case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
  312. priv->version = *(u8 *)(entry->data + 1);
  313. break;
  314. case PDR_END:
  315. /* make it overrun */
  316. entry_len = len;
  317. break;
  318. default:
  319. printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
  320. le16_to_cpu(entry->code));
  321. break;
  322. }
  323. entry = (void *)entry + (entry_len + 1)*2;
  324. }
  325. if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) {
  326. printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
  327. err = -EINVAL;
  328. goto err;
  329. }
  330. switch (priv->rxhw) {
  331. case 4: /* XBow */
  332. case 1: /* Indigo? */
  333. case 2: /* Duette */
  334. /* TODO: 5GHz initialization goes here */
  335. case 3: /* Frisbee */
  336. case 5: /* Longbow */
  337. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
  338. break;
  339. default:
  340. printk(KERN_ERR "%s: unsupported RF-Chip\n",
  341. wiphy_name(dev->wiphy));
  342. err = -EINVAL;
  343. goto err;
  344. }
  345. if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
  346. u8 perm_addr[ETH_ALEN];
  347. printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
  348. wiphy_name(dev->wiphy));
  349. random_ether_addr(perm_addr);
  350. SET_IEEE80211_PERM_ADDR(dev, perm_addr);
  351. }
  352. printk(KERN_INFO "%s: hwaddr %s, MAC:isl38%02x RF:%s\n",
  353. wiphy_name(dev->wiphy),
  354. print_mac(mac, dev->wiphy->perm_addr),
  355. priv->version, p54_rf_chips[priv->rxhw]);
  356. return 0;
  357. err:
  358. if (priv->iq_autocal) {
  359. kfree(priv->iq_autocal);
  360. priv->iq_autocal = NULL;
  361. }
  362. if (priv->output_limit) {
  363. kfree(priv->output_limit);
  364. priv->output_limit = NULL;
  365. }
  366. if (priv->curve_data) {
  367. kfree(priv->curve_data);
  368. priv->curve_data = NULL;
  369. }
  370. printk(KERN_ERR "p54: eeprom parse failed!\n");
  371. return err;
  372. }
  373. EXPORT_SYMBOL_GPL(p54_parse_eeprom);
  374. static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
  375. {
  376. /* TODO: get the rssi_add & rssi_mul data from the eeprom */
  377. return ((rssi * 0x83) / 64 - 400) / 4;
  378. }
  379. static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
  380. {
  381. struct p54_common *priv = dev->priv;
  382. struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
  383. struct ieee80211_rx_status rx_status = {0};
  384. u16 freq = le16_to_cpu(hdr->freq);
  385. size_t header_len = sizeof(*hdr);
  386. u32 tsf32;
  387. if (!(hdr->magic & cpu_to_le16(0x0001))) {
  388. if (priv->filter_flags & FIF_FCSFAIL)
  389. rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
  390. else
  391. return 0;
  392. }
  393. rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
  394. rx_status.noise = priv->noise;
  395. /* XX correct? */
  396. rx_status.qual = (100 * hdr->rssi) / 127;
  397. rx_status.rate_idx = hdr->rate & 0xf;
  398. rx_status.freq = freq;
  399. rx_status.band = IEEE80211_BAND_2GHZ;
  400. rx_status.antenna = hdr->antenna;
  401. tsf32 = le32_to_cpu(hdr->tsf32);
  402. if (tsf32 < priv->tsf_low32)
  403. priv->tsf_high32++;
  404. rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
  405. priv->tsf_low32 = tsf32;
  406. rx_status.flag |= RX_FLAG_TSFT;
  407. if (hdr->magic & cpu_to_le16(0x4000))
  408. header_len += hdr->align[0];
  409. skb_pull(skb, header_len);
  410. skb_trim(skb, le16_to_cpu(hdr->len));
  411. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  412. return -1;
  413. }
  414. static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
  415. {
  416. struct p54_common *priv = dev->priv;
  417. int i;
  418. for (i = 0; i < dev->queues; i++)
  419. if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
  420. ieee80211_wake_queue(dev, i);
  421. }
  422. static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
  423. {
  424. struct p54_common *priv = dev->priv;
  425. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  426. struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
  427. struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
  428. u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
  429. struct memrecord *range = NULL;
  430. u32 freed = 0;
  431. u32 last_addr = priv->rx_start;
  432. unsigned long flags;
  433. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  434. while (entry != (struct sk_buff *)&priv->tx_queue) {
  435. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
  436. range = (void *)info->driver_data;
  437. if (range->start_addr == addr) {
  438. struct p54_control_hdr *entry_hdr;
  439. struct p54_tx_control_allocdata *entry_data;
  440. int pad = 0;
  441. if (entry->next != (struct sk_buff *)&priv->tx_queue) {
  442. struct ieee80211_tx_info *ni;
  443. struct memrecord *mr;
  444. ni = IEEE80211_SKB_CB(entry->next);
  445. mr = (struct memrecord *)ni->driver_data;
  446. freed = mr->start_addr - last_addr;
  447. } else
  448. freed = priv->rx_end - last_addr;
  449. last_addr = range->end_addr;
  450. __skb_unlink(entry, &priv->tx_queue);
  451. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  452. memset(&info->status, 0, sizeof(info->status));
  453. entry_hdr = (struct p54_control_hdr *) entry->data;
  454. entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
  455. if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
  456. pad = entry_data->align[0];
  457. priv->tx_stats[entry_data->hw_queue].len--;
  458. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  459. if (!(payload->status & 0x01))
  460. info->flags |= IEEE80211_TX_STAT_ACK;
  461. else
  462. info->status.excessive_retries = 1;
  463. }
  464. info->status.retry_count = payload->retries - 1;
  465. info->status.ack_signal = p54_rssi_to_dbm(dev,
  466. le16_to_cpu(payload->ack_rssi));
  467. skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
  468. ieee80211_tx_status_irqsafe(dev, entry);
  469. goto out;
  470. } else
  471. last_addr = range->end_addr;
  472. entry = entry->next;
  473. }
  474. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  475. out:
  476. if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  477. sizeof(struct p54_control_hdr))
  478. p54_wake_free_queues(dev);
  479. }
  480. static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
  481. struct sk_buff *skb)
  482. {
  483. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  484. struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
  485. struct p54_common *priv = dev->priv;
  486. if (!priv->eeprom)
  487. return ;
  488. memcpy(priv->eeprom, eeprom->data, eeprom->len);
  489. complete(&priv->eeprom_comp);
  490. }
  491. static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
  492. {
  493. struct p54_common *priv = dev->priv;
  494. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  495. struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
  496. u32 tsf32 = le32_to_cpu(stats->tsf32);
  497. if (tsf32 < priv->tsf_low32)
  498. priv->tsf_high32++;
  499. priv->tsf_low32 = tsf32;
  500. priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
  501. priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
  502. priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
  503. priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
  504. complete(&priv->stats_comp);
  505. mod_timer(&priv->stats_timer, jiffies + 5 * HZ);
  506. }
  507. static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
  508. {
  509. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  510. switch (le16_to_cpu(hdr->type)) {
  511. case P54_CONTROL_TYPE_TXDONE:
  512. p54_rx_frame_sent(dev, skb);
  513. break;
  514. case P54_CONTROL_TYPE_BBP:
  515. break;
  516. case P54_CONTROL_TYPE_STAT_READBACK:
  517. p54_rx_stats(dev, skb);
  518. break;
  519. case P54_CONTROL_TYPE_EEPROM_READBACK:
  520. p54_rx_eeprom_readback(dev, skb);
  521. break;
  522. default:
  523. printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
  524. wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
  525. break;
  526. }
  527. return 0;
  528. }
  529. /* returns zero if skb can be reused */
  530. int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
  531. {
  532. u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
  533. if (type == 0x80)
  534. return p54_rx_control(dev, skb);
  535. else
  536. return p54_rx_data(dev, skb);
  537. }
  538. EXPORT_SYMBOL_GPL(p54_rx);
  539. /*
  540. * So, the firmware is somewhat stupid and doesn't know what places in its
  541. * memory incoming data should go to. By poking around in the firmware, we
  542. * can find some unused memory to upload our packets to. However, data that we
  543. * want the card to TX needs to stay intact until the card has told us that
  544. * it is done with it. This function finds empty places we can upload to and
  545. * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
  546. * allocated areas.
  547. */
  548. static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
  549. struct p54_control_hdr *data, u32 len)
  550. {
  551. struct p54_common *priv = dev->priv;
  552. struct sk_buff *entry = priv->tx_queue.next;
  553. struct sk_buff *target_skb = NULL;
  554. u32 last_addr = priv->rx_start;
  555. u32 largest_hole = 0;
  556. u32 target_addr = priv->rx_start;
  557. unsigned long flags;
  558. unsigned int left;
  559. len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
  560. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  561. left = skb_queue_len(&priv->tx_queue);
  562. while (left--) {
  563. u32 hole_size;
  564. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
  565. struct memrecord *range = (void *)info->driver_data;
  566. hole_size = range->start_addr - last_addr;
  567. if (!target_skb && hole_size >= len) {
  568. target_skb = entry->prev;
  569. hole_size -= len;
  570. target_addr = last_addr;
  571. }
  572. largest_hole = max(largest_hole, hole_size);
  573. last_addr = range->end_addr;
  574. entry = entry->next;
  575. }
  576. if (!target_skb && priv->rx_end - last_addr >= len) {
  577. target_skb = priv->tx_queue.prev;
  578. largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
  579. if (!skb_queue_empty(&priv->tx_queue)) {
  580. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(target_skb);
  581. struct memrecord *range = (void *)info->driver_data;
  582. target_addr = range->end_addr;
  583. }
  584. } else
  585. largest_hole = max(largest_hole, priv->rx_end - last_addr);
  586. if (skb) {
  587. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  588. struct memrecord *range = (void *)info->driver_data;
  589. range->start_addr = target_addr;
  590. range->end_addr = target_addr + len;
  591. __skb_queue_after(&priv->tx_queue, target_skb, skb);
  592. if (largest_hole < priv->rx_mtu + priv->headroom +
  593. priv->tailroom +
  594. sizeof(struct p54_control_hdr))
  595. ieee80211_stop_queues(dev);
  596. }
  597. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  598. data->req_id = cpu_to_le32(target_addr + priv->headroom);
  599. }
  600. int p54_read_eeprom(struct ieee80211_hw *dev)
  601. {
  602. struct p54_common *priv = dev->priv;
  603. struct p54_control_hdr *hdr = NULL;
  604. struct p54_eeprom_lm86 *eeprom_hdr;
  605. size_t eeprom_size = 0x2020, offset = 0, blocksize;
  606. int ret = -ENOMEM;
  607. void *eeprom = NULL;
  608. hdr = (struct p54_control_hdr *)kzalloc(sizeof(*hdr) +
  609. sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN, GFP_KERNEL);
  610. if (!hdr)
  611. goto free;
  612. priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
  613. if (!priv->eeprom)
  614. goto free;
  615. eeprom = kzalloc(eeprom_size, GFP_KERNEL);
  616. if (!eeprom)
  617. goto free;
  618. hdr->magic1 = cpu_to_le16(0x8000);
  619. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
  620. hdr->retry1 = hdr->retry2 = 0;
  621. eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
  622. while (eeprom_size) {
  623. blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
  624. hdr->len = cpu_to_le16(blocksize + sizeof(*eeprom_hdr));
  625. eeprom_hdr->offset = cpu_to_le16(offset);
  626. eeprom_hdr->len = cpu_to_le16(blocksize);
  627. p54_assign_address(dev, NULL, hdr, hdr->len + sizeof(*hdr));
  628. priv->tx(dev, hdr, hdr->len + sizeof(*hdr), 0);
  629. if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
  630. printk(KERN_ERR "%s: device does not respond!\n",
  631. wiphy_name(dev->wiphy));
  632. ret = -EBUSY;
  633. goto free;
  634. }
  635. memcpy(eeprom + offset, priv->eeprom, blocksize);
  636. offset += blocksize;
  637. eeprom_size -= blocksize;
  638. }
  639. ret = p54_parse_eeprom(dev, eeprom, offset);
  640. free:
  641. kfree(priv->eeprom);
  642. priv->eeprom = NULL;
  643. kfree(hdr);
  644. kfree(eeprom);
  645. return ret;
  646. }
  647. EXPORT_SYMBOL_GPL(p54_read_eeprom);
  648. static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
  649. {
  650. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  651. struct ieee80211_tx_queue_stats *current_queue;
  652. struct p54_common *priv = dev->priv;
  653. struct p54_control_hdr *hdr;
  654. struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
  655. struct p54_tx_control_allocdata *txhdr;
  656. size_t padding, len;
  657. u8 rate;
  658. u8 cts_rate = 0x20;
  659. current_queue = &priv->tx_stats[skb_get_queue_mapping(skb) + 4];
  660. if (unlikely(current_queue->len > current_queue->limit))
  661. return NETDEV_TX_BUSY;
  662. current_queue->len++;
  663. current_queue->count++;
  664. if (current_queue->len == current_queue->limit)
  665. ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
  666. padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
  667. len = skb->len;
  668. txhdr = (struct p54_tx_control_allocdata *)
  669. skb_push(skb, sizeof(*txhdr) + padding);
  670. hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
  671. if (padding)
  672. hdr->magic1 = cpu_to_le16(0x4010);
  673. else
  674. hdr->magic1 = cpu_to_le16(0x0010);
  675. hdr->len = cpu_to_le16(len);
  676. hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
  677. hdr->retry1 = hdr->retry2 = info->control.retry_limit;
  678. /* TODO: add support for alternate retry TX rates */
  679. rate = ieee80211_get_tx_rate(dev, info)->hw_value;
  680. if (info->flags & IEEE80211_TX_CTL_SHORT_PREAMBLE) {
  681. rate |= 0x10;
  682. cts_rate |= 0x10;
  683. }
  684. if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
  685. rate |= 0x40;
  686. cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
  687. } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
  688. rate |= 0x20;
  689. cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
  690. }
  691. memset(txhdr->rateset, rate, 8);
  692. txhdr->key_type = 0;
  693. txhdr->key_len = 0;
  694. txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
  695. txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
  696. 2 : info->antenna_sel_tx - 1;
  697. txhdr->output_power = 0x7f; // HW Maximum
  698. txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
  699. 0 : cts_rate;
  700. if (padding)
  701. txhdr->align[0] = padding;
  702. /* FIXME: The sequence that follows is needed for this driver to
  703. * work with mac80211 since "mac80211: fix TX sequence numbers".
  704. * As with the temporary code in rt2x00, changes will be needed
  705. * to get proper sequence numbers on beacons. In addition, this
  706. * patch places the sequence number in the hardware state, which
  707. * limits us to a single virtual state.
  708. */
  709. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  710. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  711. priv->seqno += 0x10;
  712. ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  713. ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
  714. }
  715. /* modifies skb->cb and with it info, so must be last! */
  716. p54_assign_address(dev, skb, hdr, skb->len);
  717. priv->tx(dev, hdr, skb->len, 0);
  718. return 0;
  719. }
  720. static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
  721. const u8 *bssid)
  722. {
  723. struct p54_common *priv = dev->priv;
  724. struct p54_control_hdr *hdr;
  725. struct p54_tx_control_filter *filter;
  726. size_t data_len;
  727. hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
  728. priv->tx_hdr_len, GFP_ATOMIC);
  729. if (!hdr)
  730. return -ENOMEM;
  731. hdr = (void *)hdr + priv->tx_hdr_len;
  732. filter = (struct p54_tx_control_filter *) hdr->data;
  733. hdr->magic1 = cpu_to_le16(0x8001);
  734. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
  735. priv->filter_type = filter->filter_type = cpu_to_le16(filter_type);
  736. memcpy(filter->mac_addr, priv->mac_addr, ETH_ALEN);
  737. if (!bssid)
  738. memset(filter->bssid, ~0, ETH_ALEN);
  739. else
  740. memcpy(filter->bssid, bssid, ETH_ALEN);
  741. filter->rx_antenna = priv->rx_antenna;
  742. if (priv->fw_var < 0x500) {
  743. data_len = P54_TX_CONTROL_FILTER_V1_LEN;
  744. filter->v1.basic_rate_mask = cpu_to_le32(0x15F);
  745. filter->v1.rx_addr = cpu_to_le32(priv->rx_end);
  746. filter->v1.max_rx = cpu_to_le16(priv->rx_mtu);
  747. filter->v1.rxhw = cpu_to_le16(priv->rxhw);
  748. filter->v1.wakeup_timer = cpu_to_le16(500);
  749. } else {
  750. data_len = P54_TX_CONTROL_FILTER_V2_LEN;
  751. filter->v2.rx_addr = cpu_to_le32(priv->rx_end);
  752. filter->v2.max_rx = cpu_to_le16(priv->rx_mtu);
  753. filter->v2.rxhw = cpu_to_le16(priv->rxhw);
  754. filter->v2.timer = cpu_to_le16(1000);
  755. }
  756. hdr->len = cpu_to_le16(data_len);
  757. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
  758. priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
  759. return 0;
  760. }
  761. static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
  762. {
  763. struct p54_common *priv = dev->priv;
  764. struct p54_control_hdr *hdr;
  765. struct p54_tx_control_channel *chan;
  766. unsigned int i;
  767. size_t data_len;
  768. void *entry;
  769. hdr = kzalloc(sizeof(*hdr) + sizeof(*chan) +
  770. priv->tx_hdr_len, GFP_KERNEL);
  771. if (!hdr)
  772. return -ENOMEM;
  773. hdr = (void *)hdr + priv->tx_hdr_len;
  774. chan = (struct p54_tx_control_channel *) hdr->data;
  775. hdr->magic1 = cpu_to_le16(0x8001);
  776. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
  777. chan->flags = cpu_to_le16(0x1);
  778. chan->dwell = cpu_to_le16(0x0);
  779. for (i = 0; i < priv->iq_autocal_len; i++) {
  780. if (priv->iq_autocal[i].freq != freq)
  781. continue;
  782. memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
  783. sizeof(*priv->iq_autocal));
  784. break;
  785. }
  786. if (i == priv->iq_autocal_len)
  787. goto err;
  788. for (i = 0; i < priv->output_limit_len; i++) {
  789. if (priv->output_limit[i].freq != freq)
  790. continue;
  791. chan->val_barker = 0x38;
  792. chan->val_bpsk = chan->dup_bpsk =
  793. priv->output_limit[i].val_bpsk;
  794. chan->val_qpsk = chan->dup_qpsk =
  795. priv->output_limit[i].val_qpsk;
  796. chan->val_16qam = chan->dup_16qam =
  797. priv->output_limit[i].val_16qam;
  798. chan->val_64qam = chan->dup_64qam =
  799. priv->output_limit[i].val_64qam;
  800. break;
  801. }
  802. if (i == priv->output_limit_len)
  803. goto err;
  804. entry = priv->curve_data->data;
  805. for (i = 0; i < priv->curve_data->channels; i++) {
  806. if (*((__le16 *)entry) != freq) {
  807. entry += sizeof(__le16);
  808. entry += sizeof(struct p54_pa_curve_data_sample) *
  809. priv->curve_data->points_per_channel;
  810. continue;
  811. }
  812. entry += sizeof(__le16);
  813. chan->pa_points_per_curve =
  814. min(priv->curve_data->points_per_channel, (u8) 8);
  815. memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
  816. chan->pa_points_per_curve);
  817. break;
  818. }
  819. if (priv->fw_var < 0x500) {
  820. data_len = P54_TX_CONTROL_CHANNEL_V1_LEN;
  821. chan->v1.rssical_mul = cpu_to_le16(130);
  822. chan->v1.rssical_add = cpu_to_le16(0xfe70);
  823. } else {
  824. data_len = P54_TX_CONTROL_CHANNEL_V2_LEN;
  825. chan->v2.rssical_mul = cpu_to_le16(130);
  826. chan->v2.rssical_add = cpu_to_le16(0xfe70);
  827. chan->v2.basic_rate_mask = cpu_to_le32(0x15f);
  828. }
  829. hdr->len = cpu_to_le16(data_len);
  830. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
  831. priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
  832. return 0;
  833. err:
  834. printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
  835. kfree(hdr);
  836. return -EINVAL;
  837. }
  838. static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
  839. {
  840. struct p54_common *priv = dev->priv;
  841. struct p54_control_hdr *hdr;
  842. struct p54_tx_control_led *led;
  843. hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
  844. priv->tx_hdr_len, GFP_KERNEL);
  845. if (!hdr)
  846. return -ENOMEM;
  847. hdr = (void *)hdr + priv->tx_hdr_len;
  848. hdr->magic1 = cpu_to_le16(0x8001);
  849. hdr->len = cpu_to_le16(sizeof(*led));
  850. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
  851. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led));
  852. led = (struct p54_tx_control_led *) hdr->data;
  853. led->mode = cpu_to_le16(mode);
  854. led->led_permanent = cpu_to_le16(link);
  855. led->led_temporary = cpu_to_le16(act);
  856. led->duration = cpu_to_le16(1000);
  857. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
  858. return 0;
  859. }
  860. #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
  861. do { \
  862. queue.aifs = cpu_to_le16(ai_fs); \
  863. queue.cwmin = cpu_to_le16(cw_min); \
  864. queue.cwmax = cpu_to_le16(cw_max); \
  865. queue.txop = cpu_to_le16(_txop); \
  866. } while(0)
  867. static void p54_init_vdcf(struct ieee80211_hw *dev)
  868. {
  869. struct p54_common *priv = dev->priv;
  870. struct p54_control_hdr *hdr;
  871. struct p54_tx_control_vdcf *vdcf;
  872. /* all USB V1 adapters need a extra headroom */
  873. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  874. hdr->magic1 = cpu_to_le16(0x8001);
  875. hdr->len = cpu_to_le16(sizeof(*vdcf));
  876. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
  877. hdr->req_id = cpu_to_le32(priv->rx_start);
  878. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  879. P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
  880. P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
  881. P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
  882. P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
  883. }
  884. static void p54_set_vdcf(struct ieee80211_hw *dev)
  885. {
  886. struct p54_common *priv = dev->priv;
  887. struct p54_control_hdr *hdr;
  888. struct p54_tx_control_vdcf *vdcf;
  889. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  890. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf));
  891. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  892. if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  893. vdcf->slottime = 9;
  894. vdcf->magic1 = 0x10;
  895. vdcf->magic2 = 0x00;
  896. } else {
  897. vdcf->slottime = 20;
  898. vdcf->magic1 = 0x0a;
  899. vdcf->magic2 = 0x06;
  900. }
  901. /* (see prism54/isl_oid.h for further details) */
  902. vdcf->frameburst = cpu_to_le16(0);
  903. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
  904. }
  905. static int p54_start(struct ieee80211_hw *dev)
  906. {
  907. struct p54_common *priv = dev->priv;
  908. int err;
  909. if (!priv->cached_vdcf) {
  910. priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf)+
  911. priv->tx_hdr_len + sizeof(struct p54_control_hdr),
  912. GFP_KERNEL);
  913. if (!priv->cached_vdcf)
  914. return -ENOMEM;
  915. }
  916. if (!priv->cached_stats) {
  917. priv->cached_stats = kzalloc(sizeof(struct p54_statistics) +
  918. priv->tx_hdr_len + sizeof(struct p54_control_hdr),
  919. GFP_KERNEL);
  920. if (!priv->cached_stats) {
  921. kfree(priv->cached_vdcf);
  922. priv->cached_vdcf = NULL;
  923. return -ENOMEM;
  924. }
  925. }
  926. err = priv->open(dev);
  927. if (!err)
  928. priv->mode = IEEE80211_IF_TYPE_MNTR;
  929. p54_init_vdcf(dev);
  930. mod_timer(&priv->stats_timer, jiffies + HZ);
  931. return err;
  932. }
  933. static void p54_stop(struct ieee80211_hw *dev)
  934. {
  935. struct p54_common *priv = dev->priv;
  936. struct sk_buff *skb;
  937. del_timer(&priv->stats_timer);
  938. while ((skb = skb_dequeue(&priv->tx_queue)))
  939. kfree_skb(skb);
  940. priv->stop(dev);
  941. priv->tsf_high32 = priv->tsf_low32 = 0;
  942. priv->mode = IEEE80211_IF_TYPE_INVALID;
  943. }
  944. static int p54_add_interface(struct ieee80211_hw *dev,
  945. struct ieee80211_if_init_conf *conf)
  946. {
  947. struct p54_common *priv = dev->priv;
  948. if (priv->mode != IEEE80211_IF_TYPE_MNTR)
  949. return -EOPNOTSUPP;
  950. switch (conf->type) {
  951. case IEEE80211_IF_TYPE_STA:
  952. priv->mode = conf->type;
  953. break;
  954. default:
  955. return -EOPNOTSUPP;
  956. }
  957. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  958. p54_set_filter(dev, 0, NULL);
  959. switch (conf->type) {
  960. case IEEE80211_IF_TYPE_STA:
  961. p54_set_filter(dev, 1, NULL);
  962. break;
  963. default:
  964. BUG(); /* impossible */
  965. break;
  966. }
  967. p54_set_leds(dev, 1, 0, 0);
  968. return 0;
  969. }
  970. static void p54_remove_interface(struct ieee80211_hw *dev,
  971. struct ieee80211_if_init_conf *conf)
  972. {
  973. struct p54_common *priv = dev->priv;
  974. priv->mode = IEEE80211_IF_TYPE_MNTR;
  975. memset(priv->mac_addr, 0, ETH_ALEN);
  976. p54_set_filter(dev, 0, NULL);
  977. }
  978. static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  979. {
  980. int ret;
  981. struct p54_common *priv = dev->priv;
  982. mutex_lock(&priv->conf_mutex);
  983. priv->rx_antenna = (conf->antenna_sel_rx == 0) ?
  984. 2 : conf->antenna_sel_tx - 1;
  985. ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
  986. p54_set_vdcf(dev);
  987. mutex_unlock(&priv->conf_mutex);
  988. return ret;
  989. }
  990. static int p54_config_interface(struct ieee80211_hw *dev,
  991. struct ieee80211_vif *vif,
  992. struct ieee80211_if_conf *conf)
  993. {
  994. struct p54_common *priv = dev->priv;
  995. mutex_lock(&priv->conf_mutex);
  996. p54_set_filter(dev, 0, conf->bssid);
  997. p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
  998. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  999. mutex_unlock(&priv->conf_mutex);
  1000. return 0;
  1001. }
  1002. static void p54_configure_filter(struct ieee80211_hw *dev,
  1003. unsigned int changed_flags,
  1004. unsigned int *total_flags,
  1005. int mc_count, struct dev_mc_list *mclist)
  1006. {
  1007. struct p54_common *priv = dev->priv;
  1008. *total_flags &= FIF_BCN_PRBRESP_PROMISC |
  1009. FIF_PROMISC_IN_BSS |
  1010. FIF_FCSFAIL;
  1011. priv->filter_flags = *total_flags;
  1012. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1013. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1014. p54_set_filter(dev, priv->filter_type, NULL);
  1015. else
  1016. p54_set_filter(dev, priv->filter_type, priv->bssid);
  1017. }
  1018. if (changed_flags & FIF_PROMISC_IN_BSS) {
  1019. if (*total_flags & FIF_PROMISC_IN_BSS)
  1020. p54_set_filter(dev, priv->filter_type |
  1021. cpu_to_le16(0x8), NULL);
  1022. else
  1023. p54_set_filter(dev, priv->filter_type &
  1024. ~cpu_to_le16(0x8), priv->bssid);
  1025. }
  1026. }
  1027. static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
  1028. const struct ieee80211_tx_queue_params *params)
  1029. {
  1030. struct p54_common *priv = dev->priv;
  1031. struct p54_tx_control_vdcf *vdcf;
  1032. vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
  1033. ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
  1034. if ((params) && !(queue > 4)) {
  1035. P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
  1036. params->cw_min, params->cw_max, params->txop);
  1037. } else
  1038. return -EINVAL;
  1039. p54_set_vdcf(dev);
  1040. return 0;
  1041. }
  1042. static void p54_statistics_timer(unsigned long data)
  1043. {
  1044. struct ieee80211_hw *dev = (struct ieee80211_hw *) data;
  1045. struct p54_common *priv = dev->priv;
  1046. struct p54_control_hdr *hdr;
  1047. struct p54_statistics *stats;
  1048. BUG_ON(!priv->cached_stats);
  1049. hdr = (void *)priv->cached_stats + priv->tx_hdr_len;
  1050. hdr->magic1 = cpu_to_le16(0x8000);
  1051. hdr->len = cpu_to_le16(sizeof(*stats));
  1052. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_STAT_READBACK);
  1053. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*stats));
  1054. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*stats), 0);
  1055. }
  1056. static int p54_get_stats(struct ieee80211_hw *dev,
  1057. struct ieee80211_low_level_stats *stats)
  1058. {
  1059. struct p54_common *priv = dev->priv;
  1060. del_timer(&priv->stats_timer);
  1061. p54_statistics_timer((unsigned long)dev);
  1062. if (!wait_for_completion_interruptible_timeout(&priv->stats_comp, HZ)) {
  1063. printk(KERN_ERR "%s: device does not respond!\n",
  1064. wiphy_name(dev->wiphy));
  1065. return -EBUSY;
  1066. }
  1067. memcpy(stats, &priv->stats, sizeof(*stats));
  1068. return 0;
  1069. }
  1070. static int p54_get_tx_stats(struct ieee80211_hw *dev,
  1071. struct ieee80211_tx_queue_stats *stats)
  1072. {
  1073. struct p54_common *priv = dev->priv;
  1074. memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
  1075. return 0;
  1076. }
  1077. static const struct ieee80211_ops p54_ops = {
  1078. .tx = p54_tx,
  1079. .start = p54_start,
  1080. .stop = p54_stop,
  1081. .add_interface = p54_add_interface,
  1082. .remove_interface = p54_remove_interface,
  1083. .config = p54_config,
  1084. .config_interface = p54_config_interface,
  1085. .configure_filter = p54_configure_filter,
  1086. .conf_tx = p54_conf_tx,
  1087. .get_stats = p54_get_stats,
  1088. .get_tx_stats = p54_get_tx_stats
  1089. };
  1090. struct ieee80211_hw *p54_init_common(size_t priv_data_len)
  1091. {
  1092. struct ieee80211_hw *dev;
  1093. struct p54_common *priv;
  1094. dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
  1095. if (!dev)
  1096. return NULL;
  1097. priv = dev->priv;
  1098. priv->mode = IEEE80211_IF_TYPE_INVALID;
  1099. skb_queue_head_init(&priv->tx_queue);
  1100. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
  1101. IEEE80211_HW_RX_INCLUDES_FCS |
  1102. IEEE80211_HW_SIGNAL_DBM |
  1103. IEEE80211_HW_NOISE_DBM;
  1104. dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
  1105. dev->channel_change_time = 1000; /* TODO: find actual value */
  1106. priv->tx_stats[0].limit = 1;
  1107. priv->tx_stats[1].limit = 1;
  1108. priv->tx_stats[2].limit = 1;
  1109. priv->tx_stats[3].limit = 1;
  1110. priv->tx_stats[4].limit = 5;
  1111. dev->queues = 1;
  1112. priv->noise = -94;
  1113. dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
  1114. sizeof(struct p54_tx_control_allocdata);
  1115. mutex_init(&priv->conf_mutex);
  1116. init_completion(&priv->eeprom_comp);
  1117. init_completion(&priv->stats_comp);
  1118. setup_timer(&priv->stats_timer, p54_statistics_timer,
  1119. (unsigned long)dev);
  1120. return dev;
  1121. }
  1122. EXPORT_SYMBOL_GPL(p54_init_common);
  1123. void p54_free_common(struct ieee80211_hw *dev)
  1124. {
  1125. struct p54_common *priv = dev->priv;
  1126. kfree(priv->cached_stats);
  1127. kfree(priv->iq_autocal);
  1128. kfree(priv->output_limit);
  1129. kfree(priv->curve_data);
  1130. kfree(priv->cached_vdcf);
  1131. }
  1132. EXPORT_SYMBOL_GPL(p54_free_common);
  1133. static int __init p54_init(void)
  1134. {
  1135. return 0;
  1136. }
  1137. static void __exit p54_exit(void)
  1138. {
  1139. }
  1140. module_init(p54_init);
  1141. module_exit(p54_exit);